Sérgio Natan / Mbed OS luva_tatil_repo

teste

Dependencies:   BurstSPI Fonts

MPU6050RegDef.h@0:cf17b1f16335, 2017-10-24 (annotated)

Committer:
sergionatan
Date:
Tue Oct 24 20:12:54 2017 +0000
Revision:
0:cf17b1f16335
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sergionatan 0:cf17b1f16335 1 /*
sergionatan 0:cf17b1f16335 2 * Copyright (c) 2015, Baser Kandehir, baser.kandehir@ieee.metu.edu.tr
sergionatan 0:cf17b1f16335 3 *
sergionatan 0:cf17b1f16335 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
sergionatan 0:cf17b1f16335 5 * of this software and associated documentation files (the "Software"), to deal
sergionatan 0:cf17b1f16335 6 * in the Software without restriction, including without limitation the rights
sergionatan 0:cf17b1f16335 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
sergionatan 0:cf17b1f16335 8 * copies of the Software, and to permit persons to whom the Software is
sergionatan 0:cf17b1f16335 9 * furnished to do so, subject to the following conditions:
sergionatan 0:cf17b1f16335 10 *
sergionatan 0:cf17b1f16335 11 * The above copyright notice and this permission notice shall be included in
sergionatan 0:cf17b1f16335 12 * all copies or substantial portions of the Software.
sergionatan 0:cf17b1f16335 13 *
sergionatan 0:cf17b1f16335 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
sergionatan 0:cf17b1f16335 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
sergionatan 0:cf17b1f16335 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
sergionatan 0:cf17b1f16335 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
sergionatan 0:cf17b1f16335 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
sergionatan 0:cf17b1f16335 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
sergionatan 0:cf17b1f16335 20 * THE SOFTWARE.
sergionatan 0:cf17b1f16335 21 *
sergionatan 0:cf17b1f16335 22 */
sergionatan 0:cf17b1f16335 23
sergionatan 0:cf17b1f16335 24 // Taken from Kris Winer's MPU6050 library
sergionatan 0:cf17b1f16335 25
sergionatan 0:cf17b1f16335 26 // Define registers per MPU6050, Register Map and Descriptions, Rev 4.2, 08/19/2013 6 DOF Motion sensor fusion device
sergionatan 0:cf17b1f16335 27 // Invensense Inc., www.invensense.com
sergionatan 0:cf17b1f16335 28 // See also MPU-6050 Register Map and Descriptions, Revision 4.0, RM-MPU-6050A-00, 9/12/2012 for registers not listed in
sergionatan 0:cf17b1f16335 29 // above document; the MPU6050 and MPU 9150 are virtually identical but the latter has an on-board magnetic sensor
sergionatan 0:cf17b1f16335 30 //
sergionatan 0:cf17b1f16335 31 #define XGOFFS_TC 0x00 // Bit 7 PWR_MODE, bits 6:1 XG_OFFS_TC, bit 0 OTP_BNK_VLD
sergionatan 0:cf17b1f16335 32 #define YGOFFS_TC 0x01
sergionatan 0:cf17b1f16335 33 #define ZGOFFS_TC 0x02
sergionatan 0:cf17b1f16335 34 #define X_FINE_GAIN 0x03 // [7:0] fine gain
sergionatan 0:cf17b1f16335 35 #define Y_FINE_GAIN 0x04
sergionatan 0:cf17b1f16335 36 #define Z_FINE_GAIN 0x05
sergionatan 0:cf17b1f16335 37 #define XA_OFFSET_H 0x06 // User-defined trim values for accelerometer
sergionatan 0:cf17b1f16335 38 #define XA_OFFSET_L_TC 0x07
sergionatan 0:cf17b1f16335 39 #define YA_OFFSET_H 0x08
sergionatan 0:cf17b1f16335 40 #define YA_OFFSET_L_TC 0x09
sergionatan 0:cf17b1f16335 41 #define ZA_OFFSET_H 0x0A
sergionatan 0:cf17b1f16335 42 #define ZA_OFFSET_L_TC 0x0B
sergionatan 0:cf17b1f16335 43 #define SELF_TEST_X 0x0D
sergionatan 0:cf17b1f16335 44 #define SELF_TEST_Y 0x0E
sergionatan 0:cf17b1f16335 45 #define SELF_TEST_Z 0x0F
sergionatan 0:cf17b1f16335 46 #define SELF_TEST_A 0x10
sergionatan 0:cf17b1f16335 47 #define XG_OFFS_USRH 0x13 // User-defined trim values for gyroscope; supported in MPU-6050?
sergionatan 0:cf17b1f16335 48 #define XG_OFFS_USRL 0x14
sergionatan 0:cf17b1f16335 49 #define YG_OFFS_USRH 0x15
sergionatan 0:cf17b1f16335 50 #define YG_OFFS_USRL 0x16
sergionatan 0:cf17b1f16335 51 #define ZG_OFFS_USRH 0x17
sergionatan 0:cf17b1f16335 52 #define ZG_OFFS_USRL 0x18
sergionatan 0:cf17b1f16335 53 #define SMPLRT_DIV 0x19
sergionatan 0:cf17b1f16335 54 #define CONFIG 0x1A
sergionatan 0:cf17b1f16335 55 #define GYRO_CONFIG 0x1B
sergionatan 0:cf17b1f16335 56 #define ACCEL_CONFIG 0x1C
sergionatan 0:cf17b1f16335 57 #define FF_THR 0x1D // Free-fall
sergionatan 0:cf17b1f16335 58 #define FF_DUR 0x1E // Free-fall
sergionatan 0:cf17b1f16335 59 #define MOT_THR 0x1F // Motion detection threshold bits [7:0]
sergionatan 0:cf17b1f16335 60 #define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms
sergionatan 0:cf17b1f16335 61 #define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0]
sergionatan 0:cf17b1f16335 62 #define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms
sergionatan 0:cf17b1f16335 63 #define FIFO_EN 0x23
sergionatan 0:cf17b1f16335 64 #define I2C_MST_CTRL 0x24
sergionatan 0:cf17b1f16335 65 #define I2C_SLV0_ADDR 0x25
sergionatan 0:cf17b1f16335 66 #define I2C_SLV0_REG 0x26
sergionatan 0:cf17b1f16335 67 #define I2C_SLV0_CTRL 0x27
sergionatan 0:cf17b1f16335 68 #define I2C_SLV1_ADDR 0x28
sergionatan 0:cf17b1f16335 69 #define I2C_SLV1_REG 0x29
sergionatan 0:cf17b1f16335 70 #define I2C_SLV1_CTRL 0x2A
sergionatan 0:cf17b1f16335 71 #define I2C_SLV2_ADDR 0x2B
sergionatan 0:cf17b1f16335 72 #define I2C_SLV2_REG 0x2C
sergionatan 0:cf17b1f16335 73 #define I2C_SLV2_CTRL 0x2D
sergionatan 0:cf17b1f16335 74 #define I2C_SLV3_ADDR 0x2E
sergionatan 0:cf17b1f16335 75 #define I2C_SLV3_REG 0x2F
sergionatan 0:cf17b1f16335 76 #define I2C_SLV3_CTRL 0x30
sergionatan 0:cf17b1f16335 77 #define I2C_SLV4_ADDR 0x31
sergionatan 0:cf17b1f16335 78 #define I2C_SLV4_REG 0x32
sergionatan 0:cf17b1f16335 79 #define I2C_SLV4_DO 0x33
sergionatan 0:cf17b1f16335 80 #define I2C_SLV4_CTRL 0x34
sergionatan 0:cf17b1f16335 81 #define I2C_SLV4_DI 0x35
sergionatan 0:cf17b1f16335 82 #define I2C_MST_STATUS 0x36
sergionatan 0:cf17b1f16335 83 #define INT_PIN_CFG 0x37
sergionatan 0:cf17b1f16335 84 #define INT_ENABLE 0x38
sergionatan 0:cf17b1f16335 85 #define DMP_INT_STATUS 0x39 // Check DMP interrupt
sergionatan 0:cf17b1f16335 86 #define INT_STATUS 0x3A
sergionatan 0:cf17b1f16335 87 #define ACCEL_XOUT_H 0x3B
sergionatan 0:cf17b1f16335 88 #define ACCEL_XOUT_L 0x3C
sergionatan 0:cf17b1f16335 89 #define ACCEL_YOUT_H 0x3D
sergionatan 0:cf17b1f16335 90 #define ACCEL_YOUT_L 0x3E
sergionatan 0:cf17b1f16335 91 #define ACCEL_ZOUT_H 0x3F
sergionatan 0:cf17b1f16335 92 #define ACCEL_ZOUT_L 0x40
sergionatan 0:cf17b1f16335 93 #define TEMP_OUT_H 0x41
sergionatan 0:cf17b1f16335 94 #define TEMP_OUT_L 0x42
sergionatan 0:cf17b1f16335 95 #define GYRO_XOUT_H 0x43
sergionatan 0:cf17b1f16335 96 #define GYRO_XOUT_L 0x44
sergionatan 0:cf17b1f16335 97 #define GYRO_YOUT_H 0x45
sergionatan 0:cf17b1f16335 98 #define GYRO_YOUT_L 0x46
sergionatan 0:cf17b1f16335 99 #define GYRO_ZOUT_H 0x47
sergionatan 0:cf17b1f16335 100 #define GYRO_ZOUT_L 0x48
sergionatan 0:cf17b1f16335 101 #define EXT_SENS_DATA_00 0x49
sergionatan 0:cf17b1f16335 102 #define EXT_SENS_DATA_01 0x4A
sergionatan 0:cf17b1f16335 103 #define EXT_SENS_DATA_02 0x4B
sergionatan 0:cf17b1f16335 104 #define EXT_SENS_DATA_03 0x4C
sergionatan 0:cf17b1f16335 105 #define EXT_SENS_DATA_04 0x4D
sergionatan 0:cf17b1f16335 106 #define EXT_SENS_DATA_05 0x4E
sergionatan 0:cf17b1f16335 107 #define EXT_SENS_DATA_06 0x4F
sergionatan 0:cf17b1f16335 108 #define EXT_SENS_DATA_07 0x50
sergionatan 0:cf17b1f16335 109 #define EXT_SENS_DATA_08 0x51
sergionatan 0:cf17b1f16335 110 #define EXT_SENS_DATA_09 0x52
sergionatan 0:cf17b1f16335 111 #define EXT_SENS_DATA_10 0x53
sergionatan 0:cf17b1f16335 112 #define EXT_SENS_DATA_11 0x54
sergionatan 0:cf17b1f16335 113 #define EXT_SENS_DATA_12 0x55
sergionatan 0:cf17b1f16335 114 #define EXT_SENS_DATA_13 0x56
sergionatan 0:cf17b1f16335 115 #define EXT_SENS_DATA_14 0x57
sergionatan 0:cf17b1f16335 116 #define EXT_SENS_DATA_15 0x58
sergionatan 0:cf17b1f16335 117 #define EXT_SENS_DATA_16 0x59
sergionatan 0:cf17b1f16335 118 #define EXT_SENS_DATA_17 0x5A
sergionatan 0:cf17b1f16335 119 #define EXT_SENS_DATA_18 0x5B
sergionatan 0:cf17b1f16335 120 #define EXT_SENS_DATA_19 0x5C
sergionatan 0:cf17b1f16335 121 #define EXT_SENS_DATA_20 0x5D
sergionatan 0:cf17b1f16335 122 #define EXT_SENS_DATA_21 0x5E
sergionatan 0:cf17b1f16335 123 #define EXT_SENS_DATA_22 0x5F
sergionatan 0:cf17b1f16335 124 #define EXT_SENS_DATA_23 0x60
sergionatan 0:cf17b1f16335 125 #define MOT_DETECT_STATUS 0x61
sergionatan 0:cf17b1f16335 126 #define I2C_SLV0_DO 0x63
sergionatan 0:cf17b1f16335 127 #define I2C_SLV1_DO 0x64
sergionatan 0:cf17b1f16335 128 #define I2C_SLV2_DO 0x65
sergionatan 0:cf17b1f16335 129 #define I2C_SLV3_DO 0x66
sergionatan 0:cf17b1f16335 130 #define I2C_MST_DELAY_CTRL 0x67
sergionatan 0:cf17b1f16335 131 #define SIGNAL_PATH_RESET 0x68
sergionatan 0:cf17b1f16335 132 #define MOT_DETECT_CTRL 0x69
sergionatan 0:cf17b1f16335 133 #define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP
sergionatan 0:cf17b1f16335 134 #define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode
sergionatan 0:cf17b1f16335 135 #define PWR_MGMT_2 0x6C
sergionatan 0:cf17b1f16335 136 #define DMP_BANK 0x6D // Activates a specific bank in the DMP
sergionatan 0:cf17b1f16335 137 #define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank
sergionatan 0:cf17b1f16335 138 #define DMP_REG 0x6F // Register in DMP from which to read or to which to write
sergionatan 0:cf17b1f16335 139 #define DMP_REG_1 0x70
sergionatan 0:cf17b1f16335 140 #define DMP_REG_2 0x71
sergionatan 0:cf17b1f16335 141 #define FIFO_COUNTH 0x72
sergionatan 0:cf17b1f16335 142 #define FIFO_COUNTL 0x73
sergionatan 0:cf17b1f16335 143 #define FIFO_R_W 0x74
sergionatan 0:cf17b1f16335 144 #define WHO_AM_I_MPU6050 0x75 // Should return 0x68
sergionatan 0:cf17b1f16335 145
sergionatan 0:cf17b1f16335 146 // Using the GY-521 breakout board, I set ADO to 0 by grounding through a 4k7 resistor
sergionatan 0:cf17b1f16335 147 // Seven-bit device address is 110100 for ADO = 0 and 110101 for ADO = 1
sergionatan 0:cf17b1f16335 148 #define ADO 0
sergionatan 0:cf17b1f16335 149 #if ADO
sergionatan 0:cf17b1f16335 150 #define MPU6050_ADDRESS 0x69<<1 // Device address when ADO = 1
sergionatan 0:cf17b1f16335 151 #else
sergionatan 0:cf17b1f16335 152 #define MPU6050_ADDRESS 0x68<<1 // Device address when ADO = 0
sergionatan 0:cf17b1f16335 153 #endif