Greatly simplified Architecture, Identical Functions Removed: Platform Interfaces, STP6001 interface
VL53L0X.cpp@13:253cb4ea3fcc, 2019-07-20 (annotated)
- Committer:
- sepp_nepp
- Date:
- Sat Jul 20 08:48:49 2019 +0000
- Revision:
- 13:253cb4ea3fcc
- Parent:
- 12:81f37e50f8f8
Proven to work with TOF-Synth-III
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sepp_nepp | 6:fb11b746ceb5 | 1 | /** |
sepp_nepp | 6:fb11b746ceb5 | 2 | ****************************************************************************** |
sepp_nepp | 6:fb11b746ceb5 | 3 | * @file VL53L0X_class.cpp |
sepp_nepp | 6:fb11b746ceb5 | 4 | * @author IMG |
sepp_nepp | 6:fb11b746ceb5 | 5 | * @version V0.0.1 |
sepp_nepp | 6:fb11b746ceb5 | 6 | * @date 28-June-2016 |
sepp_nepp | 6:fb11b746ceb5 | 7 | * @brief Implementation file for the VL53L0X driver class |
sepp_nepp | 6:fb11b746ceb5 | 8 | ****************************************************************************** |
sepp_nepp | 6:fb11b746ceb5 | 9 | * @attention |
sepp_nepp | 6:fb11b746ceb5 | 10 | * |
sepp_nepp | 6:fb11b746ceb5 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
sepp_nepp | 6:fb11b746ceb5 | 12 | * |
sepp_nepp | 6:fb11b746ceb5 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
sepp_nepp | 6:fb11b746ceb5 | 14 | * are permitted provided that the following conditions are met: |
sepp_nepp | 6:fb11b746ceb5 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
sepp_nepp | 6:fb11b746ceb5 | 16 | * this list of conditions and the following disclaimer. |
sepp_nepp | 6:fb11b746ceb5 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sepp_nepp | 6:fb11b746ceb5 | 18 | * this list of conditions and the following disclaimer in the documentation |
sepp_nepp | 6:fb11b746ceb5 | 19 | * and/or other materials provided with the distribution. |
sepp_nepp | 6:fb11b746ceb5 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
sepp_nepp | 6:fb11b746ceb5 | 21 | * may be used to endorse or promote products derived from this software |
sepp_nepp | 6:fb11b746ceb5 | 22 | * without specific prior written permission. |
sepp_nepp | 6:fb11b746ceb5 | 23 | * |
sepp_nepp | 6:fb11b746ceb5 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
sepp_nepp | 6:fb11b746ceb5 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
sepp_nepp | 6:fb11b746ceb5 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
sepp_nepp | 6:fb11b746ceb5 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
sepp_nepp | 6:fb11b746ceb5 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sepp_nepp | 6:fb11b746ceb5 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
sepp_nepp | 6:fb11b746ceb5 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
sepp_nepp | 6:fb11b746ceb5 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
sepp_nepp | 6:fb11b746ceb5 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
sepp_nepp | 6:fb11b746ceb5 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
sepp_nepp | 6:fb11b746ceb5 | 34 | * |
sepp_nepp | 6:fb11b746ceb5 | 35 | ****************************************************************************** |
sepp_nepp | 6:fb11b746ceb5 | 36 | */ |
sepp_nepp | 6:fb11b746ceb5 | 37 | |
sepp_nepp | 11:d8dbe3b87f9f | 38 | /* |
sepp_nepp | 11:d8dbe3b87f9f | 39 | Simplifications versus the original library: |
sepp_nepp | 11:d8dbe3b87f9f | 40 | |
sepp_nepp | 11:d8dbe3b87f9f | 41 | Replace: |
sepp_nepp | 11:d8dbe3b87f9f | 42 | * "MicroSeconds" or "micro_seconds" by "us" or "_us" |
sepp_nepp | 11:d8dbe3b87f9f | 43 | * "MilliSeconds" or "milli_seconds" by "ms" or "_ms" |
sepp_nepp | 11:d8dbe3b87f9f | 44 | * "MegaCps" or "MCps" or "_mega_cps" by "MHz" or "_MHz" |
sepp_nepp | 11:d8dbe3b87f9f | 45 | * "MicroMeter" by "um" or "_um" |
sepp_nepp | 11:d8dbe3b87f9f | 46 | * "FIXEDPNT" by "FP" |
sepp_nepp | 11:d8dbe3b87f9f | 47 | |
sepp_nepp | 11:d8dbe3b87f9f | 48 | Everything related to histogram_mode seems completely not implemented, so all definitions removed. |
sepp_nepp | 11:d8dbe3b87f9f | 49 | |
sepp_nepp | 11:d8dbe3b87f9f | 50 | Everything related to x_talk_compensation seems also not implemented, all removed |
sepp_nepp | 11:d8dbe3b87f9f | 51 | |
sepp_nepp | 11:d8dbe3b87f9f | 52 | Some example regular expressinos used to simplify the code: |
sepp_nepp | 8:2fd7cb217068 | 53 | b) Search for: \QRead_Byte(\E([A-Za-z_\d]+)[[:punct:]](\s*)\Q&\E([A-Za-z\d_]+)\Q);\E |
sepp_nepp | 8:2fd7cb217068 | 54 | Replace by: \3 = Read_Byte\(\1\); |
sepp_nepp | 8:2fd7cb217068 | 55 | to replace: Read_Byte(0x90,&module_id); |
sepp_nepp | 8:2fd7cb217068 | 56 | by this: module_id = Read_Byte(0x90); |
sepp_nepp | 8:2fd7cb217068 | 57 | |
sepp_nepp | 8:2fd7cb217068 | 58 | c) Search for: ([A-Za-z_\d]+)\Q(\E\r\n(\s*) |
sepp_nepp | 8:2fd7cb217068 | 59 | Replace by: \1\( |
sepp_nepp | 8:2fd7cb217068 | 60 | To join lines where the first line has an open bracket, and the next line starts listing the parameters. |
sepp_nepp | 8:2fd7cb217068 | 61 | for example: Status = VL53L0X_UpdateByte(V |
sepp_nepp | 8:2fd7cb217068 | 62 | L53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV, .... |
sepp_nepp | 8:2fd7cb217068 | 63 | becomes: Status = VL53L0X_UpdateByte(VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV, .... |
sepp_nepp | 8:2fd7cb217068 | 64 | |
sepp_nepp | 8:2fd7cb217068 | 65 | */ |
sepp_nepp | 8:2fd7cb217068 | 66 | |
sepp_nepp | 6:fb11b746ceb5 | 67 | /* Includes */ |
sepp_nepp | 6:fb11b746ceb5 | 68 | #include <stdlib.h> |
sepp_nepp | 6:fb11b746ceb5 | 69 | #include "VL53L0X.h" |
sepp_nepp | 6:fb11b746ceb5 | 70 | |
sepp_nepp | 13:253cb4ea3fcc | 71 | void Report_Range_Infos(VL53L0X_RangingMeasurementData_t RangeResults, Serial *aSerial ) |
sepp_nepp | 12:81f37e50f8f8 | 72 | { |
sepp_nepp | 13:253cb4ea3fcc | 73 | aSerial->printf("\n\r Reporting All Fields of VL53L0X_RangingMeasurementData_t structure \n\r" ); |
sepp_nepp | 13:253cb4ea3fcc | 74 | aSerial->printf(" .Range_mm = %dmm; Ranged distance. \n\r", RangeResults.Range_mm ); |
sepp_nepp | 13:253cb4ea3fcc | 75 | aSerial->printf(" .RangeDMax_mm = %dmm; maximum detection distance in current setup and environment conditions \n\r", RangeResults.RangeDMax_mm ); |
sepp_nepp | 13:253cb4ea3fcc | 76 | aSerial->printf(" .SignalRateRtn_MHz = %3.3fMHz; effectively a measure of target reflectance \n\r", RangeResults.SignalRateRtn_MHz / 65535.01); |
sepp_nepp | 13:253cb4ea3fcc | 77 | aSerial->printf(" .AmbientRateRtn_MHz = %3.3fMHz; effectively a measure of the ambient light \n\r", RangeResults.AmbientRateRtn_MHz / 65535.01 ); |
sepp_nepp | 13:253cb4ea3fcc | 78 | aSerial->printf(" .EffectiveSpadRtnCount = %3.3f; effective SPAD count for the return signal \n\r", RangeResults.EffectiveSpadRtnCount / 256.001 ); |
sepp_nepp | 13:253cb4ea3fcc | 79 | aSerial->printf(" .RangeFractionalPart = %d; Fractional part of range distance. \n\r", RangeResults.RangeFractionalPart >> 6 ); |
sepp_nepp | 13:253cb4ea3fcc | 80 | aSerial->printf(" .RangeStatus = %d[u8]; Status for the current measurement, 0 = value is valid \n\r", RangeResults.RangeStatus ); |
sepp_nepp | 13:253cb4ea3fcc | 81 | aSerial->printf(" .SigmaEstimate = %3.2f; Estimated Sigma - based on ambient & VCSEL rates and signal_total_events \n\r", RangeResults.SigmaEstimate/ 65535.01 ); |
sepp_nepp | 12:81f37e50f8f8 | 82 | }; |
sepp_nepp | 12:81f37e50f8f8 | 83 | |
sepp_nepp | 13:253cb4ea3fcc | 84 | void Report_Deep_Infos(VL53L0X TOF1, Serial *aSerial) |
sepp_nepp | 12:81f37e50f8f8 | 85 | { |
sepp_nepp | 13:253cb4ea3fcc | 86 | aSerial->printf("\n\r Reporting All Top Level Infos of the class \n\r" ); |
sepp_nepp | 13:253cb4ea3fcc | 87 | aSerial->printf("I2cDevAddr = %d. \n\r", TOF1.I2cDevAddr ); |
sepp_nepp | 13:253cb4ea3fcc | 88 | aSerial->printf("comms_type = %d. Type of comms: 1=VL53L0X_COMMS_I2C or VL53L0X_COMMS_SPI \n\r", TOF1.comms_type ); |
sepp_nepp | 13:253cb4ea3fcc | 89 | aSerial->printf("comms_speed = %d. Communication speed [kHz] : typically 400kHz for I2C \n\r", TOF1.comms_speed_khz ); |
sepp_nepp | 12:81f37e50f8f8 | 90 | |
sepp_nepp | 13:253cb4ea3fcc | 91 | aSerial->printf("\n\r Reporting All Infos of the Device_Info structure: \n\r" ); |
sepp_nepp | 13:253cb4ea3fcc | 92 | aSerial->printf("Device_Info.ProductType = 0x%2X. VL53L0X = 1, VL53L1 = 2 \n\r", TOF1.Device_Info.ProductType ); |
sepp_nepp | 13:253cb4ea3fcc | 93 | aSerial->printf("Device_Info.ProductRevision = %d.%d. Revision NR, major.minor \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 94 | TOF1.Device_Info.ProductRevisionMajor, TOF1.Device_Info.ProductRevisionMinor ); |
sepp_nepp | 13:253cb4ea3fcc | 95 | aSerial->printf("Device_Info.Name = %s. Name of Device e.g. Left_Distance\n\r", TOF1.Device_Info.Name ); |
sepp_nepp | 13:253cb4ea3fcc | 96 | aSerial->printf("Device_Info.Type = %s. Type of Device e.g VL53L0X \n\r", TOF1.Device_Info.Type ); |
sepp_nepp | 13:253cb4ea3fcc | 97 | aSerial->printf("Device_Info.ProductId = %s. Product Identifier String \n\r", TOF1.Device_Info.ProductId ); |
sepp_nepp | 13:253cb4ea3fcc | 98 | |
sepp_nepp | 13:253cb4ea3fcc | 99 | aSerial->printf("\n\r Reporting All Fields of CurrentParameters \n\r" ); |
sepp_nepp | 13:253cb4ea3fcc | 100 | aSerial->printf(" .DeviceMode = %d. Defines type of measurement to be done for the next measurement \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 101 | TOF1.CurrentParameters.DeviceMode ); |
sepp_nepp | 13:253cb4ea3fcc | 102 | aSerial->printf(" .Measure_Time_Budget_us= %dus. Allowed total time for a single measurement \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 103 | TOF1.CurrentParameters.MeasurementTimingBudget_us ); |
sepp_nepp | 13:253cb4ea3fcc | 104 | aSerial->printf(" .Measure_Period_ms = %dms. Time between two consecutive measurements \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 105 | TOF1.CurrentParameters.InterMeasurementPeriod_ms ); |
sepp_nepp | 13:253cb4ea3fcc | 106 | aSerial->printf(" .XTalk_Compens_En = %d. Crosstalk compensation enable or not (0, default) \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 107 | TOF1.CurrentParameters.XTalkCompensationEnable ); |
sepp_nepp | 13:253cb4ea3fcc | 108 | aSerial->printf(" .XTalk_CompRange_mm = %dmm. CrossTalk compensation range, seems never used \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 109 | TOF1.CurrentParameters.XTalkCompensationRange_mm ); |
sepp_nepp | 13:253cb4ea3fcc | 110 | aSerial->printf(" .XTalk_CompRate_MHz = %3.2fMHz. CrossTalk compensation rate . \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 111 | (float) TOF1.CurrentParameters.XTalkCompensationRate_MHz / 65536); |
sepp_nepp | 13:253cb4ea3fcc | 112 | aSerial->printf(" .RangeOffset_um = %d. Range offset adjustment (um) last programmed.\n\r", |
sepp_nepp | 12:81f37e50f8f8 | 113 | TOF1.CurrentParameters.RangeOffset_um ); |
sepp_nepp | 13:253cb4ea3fcc | 114 | aSerial->printf(" .LimitChecks ... = SIGMA_FINAL, SIGNAL_RATE_FINAL, SIGNAL_REF_CLIP, IGNORE_THRESHOLD, SIGNAL_RATE_MSRC, SIGNAL_RATE_PRE.\n\r"); |
sepp_nepp | 13:253cb4ea3fcc | 115 | aSerial->printf(" .LimitChecksEnable[x] = %d %d %d %d %d %d. The Limit Checks enabled or not.\n\r", |
sepp_nepp | 12:81f37e50f8f8 | 116 | TOF1.CurrentParameters.LimitChecksEnable[0],TOF1.CurrentParameters.LimitChecksEnable[1] ,TOF1.CurrentParameters.LimitChecksEnable[2], |
sepp_nepp | 12:81f37e50f8f8 | 117 | TOF1.CurrentParameters.LimitChecksEnable[3],TOF1.CurrentParameters.LimitChecksEnable[4] ,TOF1.CurrentParameters.LimitChecksEnable[5] ); |
sepp_nepp | 13:253cb4ea3fcc | 118 | aSerial->printf(" .LimitChecksStatus[x] = %d %d %d %d %d %d. Status of checks of last measurement.\n\r", |
sepp_nepp | 12:81f37e50f8f8 | 119 | TOF1.CurrentParameters.LimitChecksStatus[0],TOF1.CurrentParameters.LimitChecksStatus[1] ,TOF1.CurrentParameters.LimitChecksStatus[2], |
sepp_nepp | 12:81f37e50f8f8 | 120 | TOF1.CurrentParameters.LimitChecksStatus[3],TOF1.CurrentParameters.LimitChecksStatus[4] ,TOF1.CurrentParameters.LimitChecksStatus[5] ); |
sepp_nepp | 13:253cb4ea3fcc | 121 | aSerial->printf(" .LimitChecksValue[x] = %d %d %d %d %d %d [FP1616]. The Limit Check values \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 122 | TOF1.CurrentParameters.LimitChecksValue[0],TOF1.CurrentParameters.LimitChecksValue[1] ,TOF1.CurrentParameters.LimitChecksValue[2], |
sepp_nepp | 12:81f37e50f8f8 | 123 | TOF1.CurrentParameters.LimitChecksValue[3],TOF1.CurrentParameters.LimitChecksValue[4] ,TOF1.CurrentParameters.LimitChecksValue[5] ); |
sepp_nepp | 13:253cb4ea3fcc | 124 | aSerial->printf(" .WrapAroundCheckEnable = %d. Wrap Around Check enabled or not \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 125 | TOF1.CurrentParameters.WrapAroundCheckEnable ); |
sepp_nepp | 12:81f37e50f8f8 | 126 | |
sepp_nepp | 13:253cb4ea3fcc | 127 | aSerial->printf("\n\r Reporting All Fields of VL53L0X_DevData_t Data structure \n\r" ); |
sepp_nepp | 13:253cb4ea3fcc | 128 | aSerial->printf(" .OscFrequency_MHz = %3.2fMHz; Frequency used \n\r", (float) TOF1.Data.OscFrequency_MHz/65536 ); |
sepp_nepp | 13:253cb4ea3fcc | 129 | aSerial->printf(" .LastEncodedTimeout = %d[u16]; Last encoded Time out used for timing budget \n\r", TOF1.Data.LastEncodedTimeout ); |
sepp_nepp | 13:253cb4ea3fcc | 130 | aSerial->printf(" .Pin0GpioFunctionality = %d[u8]; functionality of the GPIO: pin0 \n\r", TOF1.Data.Pin0GpioFunctionality ); |
sepp_nepp | 13:253cb4ea3fcc | 131 | aSerial->printf(" .FinalRangeTimeout_us = %d[u32]; Execution time of the final ranging \n\r", TOF1.Data.FinalRangeTimeout_us ); |
sepp_nepp | 13:253cb4ea3fcc | 132 | aSerial->printf(" .FinalRangeVcselPulsePeriod= %d[u8]; Vcsel pulse period (pll clocks) for the final range measurement \n\r", TOF1.Data.FinalRangeVcselPulsePeriod ); |
sepp_nepp | 13:253cb4ea3fcc | 133 | aSerial->printf(" .PreRangeTimeout_us = %d[u32]; Execution time of the final range \n\r", TOF1.Data.PreRangeTimeout_us ); |
sepp_nepp | 13:253cb4ea3fcc | 134 | aSerial->printf(" .PreRangeVcselPulsePeriod = %d[u8]; Vcsel pulse period (pll clocks) for the pre-range measurement \n\r", TOF1.Data.PreRangeVcselPulsePeriod ); |
sepp_nepp | 13:253cb4ea3fcc | 135 | aSerial->printf(" .ReadDataFromDeviceDone = %2d; reads from device has been done (>0) or not. \n\r", TOF1.Data.ReadDataFromDeviceDone ); |
sepp_nepp | 13:253cb4ea3fcc | 136 | aSerial->printf(" .ModuleId = %X; Module ID \n\r", TOF1.Data.ModuleId ); |
sepp_nepp | 13:253cb4ea3fcc | 137 | aSerial->printf(" .Revision = %d[u8]; test Revision \n\r", TOF1.Data.Revision ); |
sepp_nepp | 13:253cb4ea3fcc | 138 | aSerial->printf(" .ProductId = %s[char*]; Product Identifier String \n\r", TOF1.Data.ProductId ); |
sepp_nepp | 13:253cb4ea3fcc | 139 | aSerial->printf(" .ReferenceSpadCount = %d[u8]; used for ref spad management \n\r", TOF1.Data.ReferenceSpadCount ); |
sepp_nepp | 13:253cb4ea3fcc | 140 | aSerial->printf(" .ReferenceSpadType = %d[u8]; used for ref spad management \n\r", TOF1.Data.ReferenceSpadType ); |
sepp_nepp | 13:253cb4ea3fcc | 141 | aSerial->printf(" .RefSpadsInitialised = %d[u8]; reports if ref spads are initialised. \n\r", TOF1.Data.RefSpadsInitialised ); |
sepp_nepp | 13:253cb4ea3fcc | 142 | aSerial->printf(" .PartUIDUpper = %d[u32]; Unique Part ID Upper \n\r", TOF1.Data.PartUIDUpper ); |
sepp_nepp | 13:253cb4ea3fcc | 143 | aSerial->printf(" .PartUIDLower = %d[u32]; Unique Part ID Lower \n\r", TOF1.Data.PartUIDLower ); |
sepp_nepp | 13:253cb4ea3fcc | 144 | aSerial->printf(" .SignalRateMeasFixed400mm = %3.3f; Peak Signal rate at 400 mm \n\r", 1.0 / 65535.0 * TOF1.Data.SignalRateMeasFixed400mm ); |
sepp_nepp | 13:253cb4ea3fcc | 145 | aSerial->printf(" .RefSpadEnables[x] = %X %X %X %X %X %X[hex8]; Reference Spad Enables \n\r", |
sepp_nepp | 12:81f37e50f8f8 | 146 | TOF1.Data.RefSpadEnables[0], TOF1.Data.RefSpadEnables[1], TOF1.Data.RefSpadEnables[2], |
sepp_nepp | 12:81f37e50f8f8 | 147 | TOF1.Data.RefSpadEnables[3], TOF1.Data.RefSpadEnables[4], TOF1.Data.RefSpadEnables[5] ); |
sepp_nepp | 13:253cb4ea3fcc | 148 | aSerial->printf(" .RefGoodSpadMap[x] = %X %X %X %X %X %X[hex8]; Reference Spad Good Spad Map\n\r", |
sepp_nepp | 12:81f37e50f8f8 | 149 | TOF1.Data.RefGoodSpadMap[0], TOF1.Data.RefGoodSpadMap[1], TOF1.Data.RefGoodSpadMap[2], |
sepp_nepp | 12:81f37e50f8f8 | 150 | TOF1.Data.RefGoodSpadMap[3], TOF1.Data.RefGoodSpadMap[4], TOF1.Data.RefGoodSpadMap[5] ); |
sepp_nepp | 13:253cb4ea3fcc | 151 | aSerial->printf(" .Part2PartOffsetNVM_um = %d[i32]; backed up NVM value \n\r", TOF1.Data.Part2PartOffsetNVM_um ); |
sepp_nepp | 13:253cb4ea3fcc | 152 | aSerial->printf(" .Part2PartOffsetAdjustNVM_um= %d[i32]; backed up NVM value of additional offset adjustment \n\r", TOF1.Data.Part2PartOffsetAdjustNVM_um ); |
sepp_nepp | 13:253cb4ea3fcc | 153 | aSerial->printf(" .SequenceConfig = %d[u8]; Internal value for the sequence config \n\r", TOF1.Data.SequenceConfig ); |
sepp_nepp | 13:253cb4ea3fcc | 154 | aSerial->printf(" .RangeFractionalEnable = %d[u8]; Enable/Disable fractional part of range data \n\r", TOF1.Data.RangeFractionalEnable); |
sepp_nepp | 13:253cb4ea3fcc | 155 | aSerial->printf(" .PalState = %d[u8]; Current state of the PAL \n\r", TOF1.Data.PalState ); |
sepp_nepp | 13:253cb4ea3fcc | 156 | aSerial->printf(" .PowerMode = %d[u8]; Current Power Mode; Stdby1/2, Idle1/2 \n\r", TOF1.Data.PowerMode ); |
sepp_nepp | 13:253cb4ea3fcc | 157 | aSerial->printf(" .SigmaEstRefArray = %d[u16]; Reference array sigma value in 1/100th of [mm] \n\r", TOF1.Data.SigmaEstRefArray ); |
sepp_nepp | 13:253cb4ea3fcc | 158 | aSerial->printf(" .SigmaEstEffPulseWidth = %d[u16]; Effective Pulse width for sigma estimate in 1/100th of ns \n\r", TOF1.Data.SigmaEstEffPulseWidth ); |
sepp_nepp | 13:253cb4ea3fcc | 159 | aSerial->printf(" .SigmaEstEffAmbWidth = %d. Effective Ambient width for sigma estimate in 1/100th of ns \n\r", TOF1.Data.SigmaEstEffAmbWidth ); |
sepp_nepp | 13:253cb4ea3fcc | 160 | aSerial->printf(" .StopVariable = %d[u8]; StopVariable used during the stop sequence \n\r", TOF1.Data.StopVariable ); |
sepp_nepp | 13:253cb4ea3fcc | 161 | aSerial->printf(" .targetRefRate = %d. Target Ambient Rate for Ref spad management \n\r", TOF1.Data.targetRefRate ); |
sepp_nepp | 13:253cb4ea3fcc | 162 | aSerial->printf(" .LastSignalRef_MHz = %3.3fMHz; Latest Signal ref \n\r", TOF1.Data.LastSignalRef_MHz / 65535.01 ); |
sepp_nepp | 13:253cb4ea3fcc | 163 | aSerial->printf(" .UseInternalTuningSetting = %d[u8]; Indicate if we use Tuning Settings table \n\r", TOF1.Data.UseInternalTuningSettings ); |
sepp_nepp | 13:253cb4ea3fcc | 164 | aSerial->printf(" .LinearityCorrectiveGain = %d[u8]; Linearity Corrective Gain value in x1000 \n\r", TOF1.Data.LinearityCorrectiveGain ); |
sepp_nepp | 13:253cb4ea3fcc | 165 | aSerial->printf(" .DmaxCalRange_mm = %dmm; Dmax Calibration Range \n\r", TOF1.Data.DmaxCalRange_mm ); |
sepp_nepp | 13:253cb4ea3fcc | 166 | aSerial->printf(" .DmaxCalSignalRateRtn_MHz = %3.3fMHz; Dmax Calibration Signal Rate Return \n\r", TOF1.Data.DmaxCalSignalRateRtn_MHz / 65535.01 ); |
sepp_nepp | 12:81f37e50f8f8 | 167 | } |
sepp_nepp | 12:81f37e50f8f8 | 168 | |
sepp_nepp | 6:fb11b746ceb5 | 169 | int VL53L0X::read_id(uint8_t *id) |
sepp_nepp | 8:2fd7cb217068 | 170 | { int status = 0; |
sepp_nepp | 6:fb11b746ceb5 | 171 | uint16_t rl_id = 0; |
sepp_nepp | 6:fb11b746ceb5 | 172 | |
sepp_nepp | 7:3a1115c2556b | 173 | status = VL53L0X_read_word(VL53L0X_REG_IDENTIFICATION_MODEL_ID, &rl_id); |
sepp_nepp | 6:fb11b746ceb5 | 174 | if (rl_id == 0xEEAA) { |
sepp_nepp | 6:fb11b746ceb5 | 175 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 176 | } |
sepp_nepp | 6:fb11b746ceb5 | 177 | return -1; |
sepp_nepp | 6:fb11b746ceb5 | 178 | } |
sepp_nepp | 6:fb11b746ceb5 | 179 | |
sepp_nepp | 6:fb11b746ceb5 | 180 | int VL53L0X::init_sensor(uint8_t new_addr) |
sepp_nepp | 6:fb11b746ceb5 | 181 | { int status; |
sepp_nepp | 6:fb11b746ceb5 | 182 | |
sepp_nepp | 6:fb11b746ceb5 | 183 | VL53L0X_off(); |
sepp_nepp | 6:fb11b746ceb5 | 184 | VL53L0X_on(); |
sepp_nepp | 6:fb11b746ceb5 | 185 | |
sepp_nepp | 6:fb11b746ceb5 | 186 | // Verify if the device is actually present |
sepp_nepp | 6:fb11b746ceb5 | 187 | uint8_t id = 0; |
sepp_nepp | 6:fb11b746ceb5 | 188 | status = read_id(&id); |
sepp_nepp | 6:fb11b746ceb5 | 189 | if (status != 0) { |
sepp_nepp | 13:253cb4ea3fcc | 190 | //aSerial->printf("VL53L0X sensor is not present!\n\r"); |
sepp_nepp | 6:fb11b746ceb5 | 191 | return 99; } // device is not present |
sepp_nepp | 6:fb11b746ceb5 | 192 | |
sepp_nepp | 7:3a1115c2556b | 193 | status = VL53L0X_data_init(); |
sepp_nepp | 6:fb11b746ceb5 | 194 | if (status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 195 | //aSerial->printf("Failed to init VL53L0X sensor!\n\r"); |
sepp_nepp | 6:fb11b746ceb5 | 196 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 197 | } |
sepp_nepp | 6:fb11b746ceb5 | 198 | |
sepp_nepp | 6:fb11b746ceb5 | 199 | // deduce silicon version |
sepp_nepp | 10:cd1758e186a4 | 200 | status = VL53L0X_get_device_info(); |
sepp_nepp | 6:fb11b746ceb5 | 201 | |
sepp_nepp | 6:fb11b746ceb5 | 202 | status = prepare(); |
sepp_nepp | 6:fb11b746ceb5 | 203 | if (status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 204 | //aSerial->printf("Failed to prepare VL53L0X!\n\r"); |
sepp_nepp | 6:fb11b746ceb5 | 205 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 206 | } |
sepp_nepp | 6:fb11b746ceb5 | 207 | |
sepp_nepp | 6:fb11b746ceb5 | 208 | if (new_addr != VL53L0X_DEFAULT_ADDRESS) { |
sepp_nepp | 6:fb11b746ceb5 | 209 | status = set_device_address(new_addr); |
sepp_nepp | 6:fb11b746ceb5 | 210 | if (status) { |
sepp_nepp | 13:253cb4ea3fcc | 211 | //aSerial->printf("Failed to change I2C address!\n\r"); |
sepp_nepp | 6:fb11b746ceb5 | 212 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 213 | } |
sepp_nepp | 6:fb11b746ceb5 | 214 | } |
sepp_nepp | 6:fb11b746ceb5 | 215 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 216 | } |
sepp_nepp | 6:fb11b746ceb5 | 217 | |
sepp_nepp | 7:3a1115c2556b | 218 | VL53L0X_Error VL53L0X::VL53L0X_data_init(void) |
sepp_nepp | 8:2fd7cb217068 | 219 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 220 | VL53L0X_DeviceParameters_t CurrentParameters; |
sepp_nepp | 6:fb11b746ceb5 | 221 | int i; |
sepp_nepp | 6:fb11b746ceb5 | 222 | uint8_t StopVariable; |
sepp_nepp | 6:fb11b746ceb5 | 223 | |
sepp_nepp | 6:fb11b746ceb5 | 224 | /* by default the I2C is running at 1V8 if you want to change it you |
sepp_nepp | 6:fb11b746ceb5 | 225 | * need to include this define at compilation level. */ |
sepp_nepp | 6:fb11b746ceb5 | 226 | #ifdef USE_I2C_2V8 |
sepp_nepp | 11:d8dbe3b87f9f | 227 | Status = VL53L0X_UpdateByte(VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV,0xFE,0x01); |
sepp_nepp | 6:fb11b746ceb5 | 228 | #endif |
sepp_nepp | 6:fb11b746ceb5 | 229 | |
sepp_nepp | 6:fb11b746ceb5 | 230 | /* Set I2C standard mode */ |
sepp_nepp | 6:fb11b746ceb5 | 231 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 232 | status = VL53L0X_write_byte( 0x88, 0x00); } |
sepp_nepp | 6:fb11b746ceb5 | 233 | |
sepp_nepp | 8:2fd7cb217068 | 234 | Data.ReadDataFromDeviceDone = 0; |
sepp_nepp | 8:2fd7cb217068 | 235 | Data.ReadDataFromDeviceDone = 0; |
sepp_nepp | 6:fb11b746ceb5 | 236 | |
sepp_nepp | 6:fb11b746ceb5 | 237 | #ifdef USE_IQC_STATION |
sepp_nepp | 6:fb11b746ceb5 | 238 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 239 | Status = VL53L0X_apply_offset_adjustment(); |
sepp_nepp | 6:fb11b746ceb5 | 240 | } |
sepp_nepp | 6:fb11b746ceb5 | 241 | #endif |
sepp_nepp | 6:fb11b746ceb5 | 242 | |
sepp_nepp | 6:fb11b746ceb5 | 243 | /* Default value is 1000 for Linearity Corrective Gain */ |
sepp_nepp | 8:2fd7cb217068 | 244 | Data.LinearityCorrectiveGain = 1000; |
sepp_nepp | 6:fb11b746ceb5 | 245 | |
sepp_nepp | 6:fb11b746ceb5 | 246 | /* Dmax default Parameter */ |
sepp_nepp | 11:d8dbe3b87f9f | 247 | Data.DmaxCalRange_mm = 400; |
sepp_nepp | 11:d8dbe3b87f9f | 248 | Data.DmaxCalSignalRateRtn_MHz = (FixPoint1616_t)((0x00016B85)); /* 1.42 No Cover Glass*/ |
sepp_nepp | 6:fb11b746ceb5 | 249 | |
sepp_nepp | 6:fb11b746ceb5 | 250 | /* Set Default static parameters |
sepp_nepp | 11:d8dbe3b87f9f | 251 | *set first temporary values 9.44_MHz * 65536 = 618660 */ |
sepp_nepp | 11:d8dbe3b87f9f | 252 | Data.OscFrequency_MHz = 618660; |
sepp_nepp | 11:d8dbe3b87f9f | 253 | |
sepp_nepp | 11:d8dbe3b87f9f | 254 | /* Set Default XTalkCompensationRate_MHz to 0 */ |
sepp_nepp | 11:d8dbe3b87f9f | 255 | CurrentParameters.XTalkCompensationRate_MHz = 0; |
sepp_nepp | 6:fb11b746ceb5 | 256 | |
sepp_nepp | 6:fb11b746ceb5 | 257 | /* Get default parameters */ |
sepp_nepp | 7:3a1115c2556b | 258 | status = VL53L0X_get_device_parameters( &CurrentParameters); |
sepp_nepp | 6:fb11b746ceb5 | 259 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 260 | /* initialize PAL values */ |
sepp_nepp | 6:fb11b746ceb5 | 261 | CurrentParameters.DeviceMode = VL53L0X_DEVICEMODE_SINGLE_RANGING; |
sepp_nepp | 10:cd1758e186a4 | 262 | CurrentParameters = CurrentParameters; |
sepp_nepp | 6:fb11b746ceb5 | 263 | } |
sepp_nepp | 6:fb11b746ceb5 | 264 | |
sepp_nepp | 6:fb11b746ceb5 | 265 | /* Sigma estimator variable */ |
sepp_nepp | 8:2fd7cb217068 | 266 | Data.SigmaEstRefArray = 100; |
sepp_nepp | 8:2fd7cb217068 | 267 | Data.SigmaEstEffPulseWidth = 900; |
sepp_nepp | 8:2fd7cb217068 | 268 | Data.SigmaEstEffAmbWidth = 500; |
sepp_nepp | 11:d8dbe3b87f9f | 269 | Data.targetRefRate = 0x0A00; /* 20 MHz in 9:7 format */ |
sepp_nepp | 6:fb11b746ceb5 | 270 | |
sepp_nepp | 6:fb11b746ceb5 | 271 | /* Use internal default settings */ |
sepp_nepp | 8:2fd7cb217068 | 272 | Data.UseInternalTuningSettings = 1; |
sepp_nepp | 7:3a1115c2556b | 273 | |
sepp_nepp | 7:3a1115c2556b | 274 | status |= VL53L0X_write_byte( 0x80, 0x01); |
sepp_nepp | 7:3a1115c2556b | 275 | status |= VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 276 | status |= VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 7:3a1115c2556b | 277 | status |= VL53L0X_read_byte( 0x91, &StopVariable); |
sepp_nepp | 8:2fd7cb217068 | 278 | Data.StopVariable = StopVariable; |
sepp_nepp | 7:3a1115c2556b | 279 | status |= VL53L0X_write_byte( 0x00, 0x01); |
sepp_nepp | 7:3a1115c2556b | 280 | status |= VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 7:3a1115c2556b | 281 | status |= VL53L0X_write_byte( 0x80, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 282 | |
sepp_nepp | 6:fb11b746ceb5 | 283 | /* Enable all check */ |
sepp_nepp | 6:fb11b746ceb5 | 284 | for (i = 0; i < VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS; i++) { |
sepp_nepp | 6:fb11b746ceb5 | 285 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 286 | status |= VL53L0X_set_limit_check_enable( i, 1); |
sepp_nepp | 8:2fd7cb217068 | 287 | } else { break; } |
sepp_nepp | 6:fb11b746ceb5 | 288 | } |
sepp_nepp | 6:fb11b746ceb5 | 289 | |
sepp_nepp | 6:fb11b746ceb5 | 290 | /* Disable the following checks */ |
sepp_nepp | 6:fb11b746ceb5 | 291 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 292 | status = VL53L0X_set_limit_check_enable(VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP, 0); |
sepp_nepp | 6:fb11b746ceb5 | 293 | |
sepp_nepp | 6:fb11b746ceb5 | 294 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 295 | status = VL53L0X_set_limit_check_enable(VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD, 0); |
sepp_nepp | 6:fb11b746ceb5 | 296 | |
sepp_nepp | 6:fb11b746ceb5 | 297 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 298 | status = VL53L0X_set_limit_check_enable(VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC, 0); |
sepp_nepp | 6:fb11b746ceb5 | 299 | |
sepp_nepp | 6:fb11b746ceb5 | 300 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 301 | status = VL53L0X_set_limit_check_enable(VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE, 0); |
sepp_nepp | 6:fb11b746ceb5 | 302 | |
sepp_nepp | 6:fb11b746ceb5 | 303 | /* Limit default values */ |
sepp_nepp | 6:fb11b746ceb5 | 304 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 305 | status = VL53L0X_set_limit_check_value(VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 306 | (FixPoint1616_t)(18 * 65536)); |
sepp_nepp | 6:fb11b746ceb5 | 307 | } |
sepp_nepp | 6:fb11b746ceb5 | 308 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 309 | status = VL53L0X_set_limit_check_value(VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE, |
sepp_nepp | 12:81f37e50f8f8 | 310 | (FixPoint1616_t)(25 * 65536 / 100)); /* 0.25 * 65536 */ |
sepp_nepp | 6:fb11b746ceb5 | 311 | } |
sepp_nepp | 6:fb11b746ceb5 | 312 | |
sepp_nepp | 6:fb11b746ceb5 | 313 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 314 | status = VL53L0X_set_limit_check_value(VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP, |
sepp_nepp | 6:fb11b746ceb5 | 315 | (FixPoint1616_t)(35 * 65536)); |
sepp_nepp | 6:fb11b746ceb5 | 316 | } |
sepp_nepp | 6:fb11b746ceb5 | 317 | |
sepp_nepp | 6:fb11b746ceb5 | 318 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 319 | status = VL53L0X_set_limit_check_value(VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD, |
sepp_nepp | 6:fb11b746ceb5 | 320 | (FixPoint1616_t)(0 * 65536)); |
sepp_nepp | 6:fb11b746ceb5 | 321 | } |
sepp_nepp | 6:fb11b746ceb5 | 322 | |
sepp_nepp | 6:fb11b746ceb5 | 323 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 324 | Data.SequenceConfig = 0xFF; |
sepp_nepp | 7:3a1115c2556b | 325 | status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,0xFF); |
sepp_nepp | 6:fb11b746ceb5 | 326 | |
sepp_nepp | 6:fb11b746ceb5 | 327 | /* Set PAL state to tell that we are waiting for call to VL53L0X_StaticInit */ |
sepp_nepp | 8:2fd7cb217068 | 328 | Data.PalState = VL53L0X_STATE_WAIT_STATICINIT; |
sepp_nepp | 6:fb11b746ceb5 | 329 | } |
sepp_nepp | 6:fb11b746ceb5 | 330 | |
sepp_nepp | 6:fb11b746ceb5 | 331 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 332 | Data.RefSpadsInitialised = 0; |
sepp_nepp | 6:fb11b746ceb5 | 333 | } |
sepp_nepp | 6:fb11b746ceb5 | 334 | |
sepp_nepp | 6:fb11b746ceb5 | 335 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 336 | } |
sepp_nepp | 6:fb11b746ceb5 | 337 | |
sepp_nepp | 6:fb11b746ceb5 | 338 | int VL53L0X::prepare() |
sepp_nepp | 8:2fd7cb217068 | 339 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 340 | uint32_t ref_spad_count; |
sepp_nepp | 6:fb11b746ceb5 | 341 | uint8_t is_aperture_spads; |
sepp_nepp | 6:fb11b746ceb5 | 342 | uint8_t vhv_settings; |
sepp_nepp | 6:fb11b746ceb5 | 343 | uint8_t phase_cal; |
sepp_nepp | 6:fb11b746ceb5 | 344 | |
sepp_nepp | 6:fb11b746ceb5 | 345 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 346 | status = VL53L0X_static_init(); // Device Initialization |
sepp_nepp | 6:fb11b746ceb5 | 347 | } |
sepp_nepp | 6:fb11b746ceb5 | 348 | |
sepp_nepp | 6:fb11b746ceb5 | 349 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 350 | status = VL53L0X_perform_ref_calibration(&vhv_settings, &phase_cal); // Device Initialization |
sepp_nepp | 6:fb11b746ceb5 | 351 | } |
sepp_nepp | 6:fb11b746ceb5 | 352 | |
sepp_nepp | 6:fb11b746ceb5 | 353 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 354 | status = VL53L0X_perform_ref_spad_management(&ref_spad_count, &is_aperture_spads); // Device Initialization |
sepp_nepp | 6:fb11b746ceb5 | 355 | } |
sepp_nepp | 6:fb11b746ceb5 | 356 | |
sepp_nepp | 6:fb11b746ceb5 | 357 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 358 | } |
sepp_nepp | 6:fb11b746ceb5 | 359 | |
sepp_nepp | 6:fb11b746ceb5 | 360 | int VL53L0X::start_measurement(OperatingMode operating_mode, void (*fptr)(void), |
sepp_nepp | 6:fb11b746ceb5 | 361 | VL53L0X_RangingConfig rangingConfig) |
sepp_nepp | 6:fb11b746ceb5 | 362 | { int Status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 363 | int ClrStatus; |
sepp_nepp | 6:fb11b746ceb5 | 364 | |
sepp_nepp | 6:fb11b746ceb5 | 365 | uint8_t VhvSettings; |
sepp_nepp | 6:fb11b746ceb5 | 366 | uint8_t PhaseCal; |
sepp_nepp | 6:fb11b746ceb5 | 367 | // default settings, for normal range. |
sepp_nepp | 6:fb11b746ceb5 | 368 | FixPoint1616_t signalLimit = (FixPoint1616_t)(0.25 * 65536); |
sepp_nepp | 13:253cb4ea3fcc | 369 | FixPoint1616_t sigmaLimit = (FixPoint1616_t)(25 * 65536); |
sepp_nepp | 6:fb11b746ceb5 | 370 | uint32_t timingBudget = 33000; |
sepp_nepp | 6:fb11b746ceb5 | 371 | uint8_t preRangeVcselPeriod = 14; |
sepp_nepp | 6:fb11b746ceb5 | 372 | uint8_t finalRangeVcselPeriod = 10; |
sepp_nepp | 6:fb11b746ceb5 | 373 | |
sepp_nepp | 6:fb11b746ceb5 | 374 | if (operating_mode == range_continuous_interrupt) { |
sepp_nepp | 6:fb11b746ceb5 | 375 | if (_gpio1Int == NULL) { |
sepp_nepp | 13:253cb4ea3fcc | 376 | //aSerial->printf("GPIO1 Error\r\n"); |
sepp_nepp | 6:fb11b746ceb5 | 377 | return 1; |
sepp_nepp | 6:fb11b746ceb5 | 378 | } |
sepp_nepp | 6:fb11b746ceb5 | 379 | |
sepp_nepp | 7:3a1115c2556b | 380 | Status = VL53L0X_stop_measurement(); // it is safer to do this while sensor is stopped |
sepp_nepp | 6:fb11b746ceb5 | 381 | |
sepp_nepp | 6:fb11b746ceb5 | 382 | // Status = VL53L0X_SetInterruptThresholds(Device, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING, 0, 300); |
sepp_nepp | 6:fb11b746ceb5 | 383 | |
sepp_nepp | 7:3a1115c2556b | 384 | Status = VL53L0X_set_gpio_config(0, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING, |
sepp_nepp | 6:fb11b746ceb5 | 385 | VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY, |
sepp_nepp | 6:fb11b746ceb5 | 386 | VL53L0X_INTERRUPTPOLARITY_HIGH); |
sepp_nepp | 6:fb11b746ceb5 | 387 | |
sepp_nepp | 6:fb11b746ceb5 | 388 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 389 | attach_interrupt_measure_detection_irq(fptr); |
sepp_nepp | 6:fb11b746ceb5 | 390 | enable_interrupt_measure_detection_irq(); |
sepp_nepp | 6:fb11b746ceb5 | 391 | } |
sepp_nepp | 6:fb11b746ceb5 | 392 | |
sepp_nepp | 6:fb11b746ceb5 | 393 | ClrStatus = clear_interrupt(VL53L0X_REG_RESULT_INTERRUPT_STATUS | VL53L0X_REG_RESULT_RANGE_STATUS); |
sepp_nepp | 6:fb11b746ceb5 | 394 | if (ClrStatus) { Status = 97; } // VL53L0X_ClearErrorInterrupt fail |
sepp_nepp | 6:fb11b746ceb5 | 395 | |
sepp_nepp | 6:fb11b746ceb5 | 396 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 397 | CurrentParameters.DeviceMode = VL53L0X_DEVICEMODE_CONTINUOUS_RANGING; // Setup in continuous ranging mode |
sepp_nepp | 7:3a1115c2556b | 398 | Status = VL53L0X_start_measurement(); |
sepp_nepp | 6:fb11b746ceb5 | 399 | } |
sepp_nepp | 6:fb11b746ceb5 | 400 | } |
sepp_nepp | 6:fb11b746ceb5 | 401 | |
sepp_nepp | 6:fb11b746ceb5 | 402 | if (operating_mode == range_single_shot_polling) { |
sepp_nepp | 6:fb11b746ceb5 | 403 | // singelshot, polled ranging |
sepp_nepp | 6:fb11b746ceb5 | 404 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 405 | // no need to do this when we use VL53L0X_PerformSingleRangingMeasurement |
sepp_nepp | 13:253cb4ea3fcc | 406 | CurrentParameters.DeviceMode = VL53L0X_DEVICEMODE_SINGLE_RANGING; // Setup in single ranging mode |
sepp_nepp | 13:253cb4ea3fcc | 407 | // Enable/Disable Sigma and Signal check |
sepp_nepp | 8:2fd7cb217068 | 408 | Status = VL53L0X_set_limit_check_enable(VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, 1); |
sepp_nepp | 6:fb11b746ceb5 | 409 | } |
sepp_nepp | 6:fb11b746ceb5 | 410 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 411 | Status = VL53L0X_set_limit_check_enable(VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE, 1); |
sepp_nepp | 6:fb11b746ceb5 | 412 | } |
sepp_nepp | 6:fb11b746ceb5 | 413 | |
sepp_nepp | 6:fb11b746ceb5 | 414 | /* Preselected Ranging configurations */ |
sepp_nepp | 6:fb11b746ceb5 | 415 | switch(rangingConfig) { |
sepp_nepp | 6:fb11b746ceb5 | 416 | case Range_Config_DEFAULT: |
sepp_nepp | 6:fb11b746ceb5 | 417 | // default settings, for normal range. |
sepp_nepp | 6:fb11b746ceb5 | 418 | signalLimit = (FixPoint1616_t)(0.25 * 65536); |
sepp_nepp | 13:253cb4ea3fcc | 419 | sigmaLimit = (FixPoint1616_t)(16 * 65536); |
sepp_nepp | 6:fb11b746ceb5 | 420 | timingBudget = 33000; |
sepp_nepp | 6:fb11b746ceb5 | 421 | preRangeVcselPeriod = 14; |
sepp_nepp | 6:fb11b746ceb5 | 422 | finalRangeVcselPeriod = 10; |
sepp_nepp | 6:fb11b746ceb5 | 423 | break; |
sepp_nepp | 6:fb11b746ceb5 | 424 | case Range_Config_LONG_RANGE: // *** from mass market cube expansion v1.1, ranging with satellites. |
sepp_nepp | 6:fb11b746ceb5 | 425 | signalLimit = (FixPoint1616_t)(0.1 * 65536); |
sepp_nepp | 6:fb11b746ceb5 | 426 | sigmaLimit = (FixPoint1616_t)(60 * 65536); |
sepp_nepp | 6:fb11b746ceb5 | 427 | timingBudget = 33000; |
sepp_nepp | 6:fb11b746ceb5 | 428 | preRangeVcselPeriod = 18; |
sepp_nepp | 6:fb11b746ceb5 | 429 | finalRangeVcselPeriod = 14; |
sepp_nepp | 6:fb11b746ceb5 | 430 | break; |
sepp_nepp | 6:fb11b746ceb5 | 431 | case Range_Config_HIGH_ACCURACY: |
sepp_nepp | 6:fb11b746ceb5 | 432 | signalLimit = (FixPoint1616_t)(0.25*65536); |
sepp_nepp | 6:fb11b746ceb5 | 433 | sigmaLimit = (FixPoint1616_t)(18*65536); |
sepp_nepp | 6:fb11b746ceb5 | 434 | timingBudget = 200000; |
sepp_nepp | 6:fb11b746ceb5 | 435 | preRangeVcselPeriod = 14; |
sepp_nepp | 6:fb11b746ceb5 | 436 | finalRangeVcselPeriod = 10; |
sepp_nepp | 6:fb11b746ceb5 | 437 | break; |
sepp_nepp | 6:fb11b746ceb5 | 438 | case Range_Config_HIGH_SPEED: |
sepp_nepp | 6:fb11b746ceb5 | 439 | signalLimit = (FixPoint1616_t)(0.25*65536); |
sepp_nepp | 13:253cb4ea3fcc | 440 | sigmaLimit = (FixPoint1616_t)(60*65536); |
sepp_nepp | 6:fb11b746ceb5 | 441 | timingBudget = 20000; |
sepp_nepp | 6:fb11b746ceb5 | 442 | preRangeVcselPeriod = 14; |
sepp_nepp | 6:fb11b746ceb5 | 443 | finalRangeVcselPeriod = 10; |
sepp_nepp | 6:fb11b746ceb5 | 444 | break; |
sepp_nepp | 6:fb11b746ceb5 | 445 | default: |
sepp_nepp | 6:fb11b746ceb5 | 446 | Status = 96; // Config Not Supported |
sepp_nepp | 6:fb11b746ceb5 | 447 | } |
sepp_nepp | 6:fb11b746ceb5 | 448 | |
sepp_nepp | 6:fb11b746ceb5 | 449 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 450 | Status = VL53L0X_set_limit_check_value(VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE, signalLimit);} |
sepp_nepp | 6:fb11b746ceb5 | 451 | |
sepp_nepp | 6:fb11b746ceb5 | 452 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 453 | Status = VL53L0X_set_limit_check_value(VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, sigmaLimit);} |
sepp_nepp | 6:fb11b746ceb5 | 454 | |
sepp_nepp | 6:fb11b746ceb5 | 455 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 456 | Status = VL53L0X_set_measurement_timing_budget_us( timingBudget);} |
sepp_nepp | 6:fb11b746ceb5 | 457 | |
sepp_nepp | 6:fb11b746ceb5 | 458 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 459 | Status = VL53L0X_set_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, preRangeVcselPeriod);} |
sepp_nepp | 6:fb11b746ceb5 | 460 | |
sepp_nepp | 6:fb11b746ceb5 | 461 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 462 | Status = VL53L0X_set_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_FINAL_RANGE, finalRangeVcselPeriod);} |
sepp_nepp | 6:fb11b746ceb5 | 463 | |
sepp_nepp | 6:fb11b746ceb5 | 464 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 465 | Status = VL53L0X_perform_ref_calibration( &VhvSettings, &PhaseCal);} |
sepp_nepp | 6:fb11b746ceb5 | 466 | |
sepp_nepp | 6:fb11b746ceb5 | 467 | } |
sepp_nepp | 6:fb11b746ceb5 | 468 | |
sepp_nepp | 6:fb11b746ceb5 | 469 | if (operating_mode == range_continuous_polling) { |
sepp_nepp | 6:fb11b746ceb5 | 470 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 471 | CurrentParameters.DeviceMode = VL53L0X_DEVICEMODE_CONTINUOUS_RANGING; // Setup in continuous ranging mode |
sepp_nepp | 7:3a1115c2556b | 472 | Status = VL53L0X_start_measurement(); |
sepp_nepp | 6:fb11b746ceb5 | 473 | } |
sepp_nepp | 6:fb11b746ceb5 | 474 | } |
sepp_nepp | 6:fb11b746ceb5 | 475 | return Status; |
sepp_nepp | 6:fb11b746ceb5 | 476 | } |
sepp_nepp | 6:fb11b746ceb5 | 477 | |
sepp_nepp | 6:fb11b746ceb5 | 478 | int VL53L0X::range_meas_int_continuous_mode(void (*fptr)(void)) |
sepp_nepp | 8:2fd7cb217068 | 479 | { int status, clr_status; |
sepp_nepp | 6:fb11b746ceb5 | 480 | |
sepp_nepp | 7:3a1115c2556b | 481 | status = VL53L0X_stop_measurement(); // it is safer to do this while sensor is stopped |
sepp_nepp | 6:fb11b746ceb5 | 482 | |
sepp_nepp | 6:fb11b746ceb5 | 483 | // status = VL53L0X_SetInterruptThresholds(Device, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING, 0, 300); |
sepp_nepp | 6:fb11b746ceb5 | 484 | |
sepp_nepp | 7:3a1115c2556b | 485 | status = VL53L0X_set_gpio_config( 0, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING, |
sepp_nepp | 13:253cb4ea3fcc | 486 | VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY, VL53L0X_INTERRUPTPOLARITY_HIGH); |
sepp_nepp | 6:fb11b746ceb5 | 487 | |
sepp_nepp | 6:fb11b746ceb5 | 488 | if (!status) { |
sepp_nepp | 6:fb11b746ceb5 | 489 | attach_interrupt_measure_detection_irq(fptr); |
sepp_nepp | 6:fb11b746ceb5 | 490 | enable_interrupt_measure_detection_irq(); |
sepp_nepp | 6:fb11b746ceb5 | 491 | } |
sepp_nepp | 6:fb11b746ceb5 | 492 | |
sepp_nepp | 6:fb11b746ceb5 | 493 | clr_status = clear_interrupt(VL53L0X_REG_RESULT_INTERRUPT_STATUS | VL53L0X_REG_RESULT_RANGE_STATUS); |
sepp_nepp | 6:fb11b746ceb5 | 494 | if (clr_status!=0) { status = 98; } // VL53L0X_ClearErrorInterrupt_fail; |
sepp_nepp | 6:fb11b746ceb5 | 495 | |
sepp_nepp | 6:fb11b746ceb5 | 496 | if (!status) { |
sepp_nepp | 6:fb11b746ceb5 | 497 | status = range_start_continuous_mode(); |
sepp_nepp | 6:fb11b746ceb5 | 498 | } |
sepp_nepp | 6:fb11b746ceb5 | 499 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 500 | } |
sepp_nepp | 6:fb11b746ceb5 | 501 | |
sepp_nepp | 7:3a1115c2556b | 502 | VL53L0X_Error VL53L0X::wait_measurement_data_ready(void) |
sepp_nepp | 8:2fd7cb217068 | 503 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 504 | uint8_t new_dat_ready = 0; |
sepp_nepp | 6:fb11b746ceb5 | 505 | uint32_t loop_nb; |
sepp_nepp | 6:fb11b746ceb5 | 506 | |
sepp_nepp | 6:fb11b746ceb5 | 507 | // Wait until it finished |
sepp_nepp | 6:fb11b746ceb5 | 508 | // use timeout to avoid deadlock |
sepp_nepp | 6:fb11b746ceb5 | 509 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 510 | loop_nb = 0; |
sepp_nepp | 6:fb11b746ceb5 | 511 | do { |
sepp_nepp | 7:3a1115c2556b | 512 | status = VL53L0X_get_measurement_data_ready( &new_dat_ready); |
sepp_nepp | 6:fb11b746ceb5 | 513 | if ((new_dat_ready == 0x01) || status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 514 | break; |
sepp_nepp | 6:fb11b746ceb5 | 515 | } |
sepp_nepp | 6:fb11b746ceb5 | 516 | loop_nb = loop_nb + 1; |
sepp_nepp | 7:3a1115c2556b | 517 | VL53L0X_polling_delay(); |
sepp_nepp | 6:fb11b746ceb5 | 518 | } while (loop_nb < VL53L0X_DEFAULT_MAX_LOOP); |
sepp_nepp | 6:fb11b746ceb5 | 519 | |
sepp_nepp | 6:fb11b746ceb5 | 520 | if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) { |
sepp_nepp | 6:fb11b746ceb5 | 521 | status = VL53L0X_ERROR_TIME_OUT; |
sepp_nepp | 6:fb11b746ceb5 | 522 | } |
sepp_nepp | 6:fb11b746ceb5 | 523 | } |
sepp_nepp | 6:fb11b746ceb5 | 524 | |
sepp_nepp | 6:fb11b746ceb5 | 525 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 526 | } |
sepp_nepp | 6:fb11b746ceb5 | 527 | |
sepp_nepp | 8:2fd7cb217068 | 528 | int VL53L0X::get_distance(uint32_t *p_data) |
sepp_nepp | 6:fb11b746ceb5 | 529 | { |
sepp_nepp | 8:2fd7cb217068 | 530 | int status = 0; |
sepp_nepp | 8:2fd7cb217068 | 531 | VL53L0X_RangingMeasurementData_t p_ranging_measurement_data; |
sepp_nepp | 8:2fd7cb217068 | 532 | |
sepp_nepp | 13:253cb4ea3fcc | 533 | status = start_measurement(range_single_shot_polling, NULL, Range_Config_DEFAULT); |
sepp_nepp | 8:2fd7cb217068 | 534 | if (!status) { |
sepp_nepp | 8:2fd7cb217068 | 535 | status = get_measurement(range_single_shot_polling, &p_ranging_measurement_data); |
sepp_nepp | 8:2fd7cb217068 | 536 | } |
sepp_nepp | 11:d8dbe3b87f9f | 537 | if (p_ranging_measurement_data.RangeStatus == 0) { // we have a valid range. |
sepp_nepp | 11:d8dbe3b87f9f | 538 | *p_data = p_ranging_measurement_data.Range_mm; |
sepp_nepp | 8:2fd7cb217068 | 539 | } else { |
sepp_nepp | 8:2fd7cb217068 | 540 | *p_data = 0; |
sepp_nepp | 8:2fd7cb217068 | 541 | status = VL53L0X_ERROR_RANGE_ERROR; |
sepp_nepp | 8:2fd7cb217068 | 542 | } |
sepp_nepp | 8:2fd7cb217068 | 543 | stop_measurement(range_single_shot_polling); |
sepp_nepp | 8:2fd7cb217068 | 544 | return status; |
sepp_nepp | 8:2fd7cb217068 | 545 | } |
sepp_nepp | 8:2fd7cb217068 | 546 | |
sepp_nepp | 8:2fd7cb217068 | 547 | VL53L0X_Error VL53L0X::wait_stop_completed(void) |
sepp_nepp | 8:2fd7cb217068 | 548 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 549 | uint32_t stop_completed = 0; |
sepp_nepp | 6:fb11b746ceb5 | 550 | uint32_t loop_nb; |
sepp_nepp | 6:fb11b746ceb5 | 551 | |
sepp_nepp | 6:fb11b746ceb5 | 552 | // Wait until it finished |
sepp_nepp | 6:fb11b746ceb5 | 553 | // use timeout to avoid deadlock |
sepp_nepp | 6:fb11b746ceb5 | 554 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 555 | loop_nb = 0; |
sepp_nepp | 6:fb11b746ceb5 | 556 | do { |
sepp_nepp | 7:3a1115c2556b | 557 | status = VL53L0X_get_stop_completed_status( &stop_completed); |
sepp_nepp | 6:fb11b746ceb5 | 558 | if ((stop_completed == 0x00) || status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 559 | break; |
sepp_nepp | 6:fb11b746ceb5 | 560 | } |
sepp_nepp | 6:fb11b746ceb5 | 561 | loop_nb = loop_nb + 1; |
sepp_nepp | 7:3a1115c2556b | 562 | VL53L0X_polling_delay(); |
sepp_nepp | 6:fb11b746ceb5 | 563 | } while (loop_nb < VL53L0X_DEFAULT_MAX_LOOP); |
sepp_nepp | 6:fb11b746ceb5 | 564 | |
sepp_nepp | 6:fb11b746ceb5 | 565 | if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) { |
sepp_nepp | 6:fb11b746ceb5 | 566 | status = VL53L0X_ERROR_TIME_OUT; |
sepp_nepp | 6:fb11b746ceb5 | 567 | } |
sepp_nepp | 6:fb11b746ceb5 | 568 | } |
sepp_nepp | 6:fb11b746ceb5 | 569 | |
sepp_nepp | 6:fb11b746ceb5 | 570 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 571 | } |
sepp_nepp | 6:fb11b746ceb5 | 572 | |
sepp_nepp | 6:fb11b746ceb5 | 573 | int VL53L0X::get_measurement(OperatingMode operating_mode, VL53L0X_RangingMeasurementData_t *p_data) |
sepp_nepp | 8:2fd7cb217068 | 574 | { int Status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 575 | |
sepp_nepp | 6:fb11b746ceb5 | 576 | if (operating_mode == range_single_shot_polling) { |
sepp_nepp | 7:3a1115c2556b | 577 | Status = VL53L0X_perform_single_ranging_measurement( p_data); |
sepp_nepp | 6:fb11b746ceb5 | 578 | } |
sepp_nepp | 6:fb11b746ceb5 | 579 | |
sepp_nepp | 6:fb11b746ceb5 | 580 | if (operating_mode == range_continuous_polling) { |
sepp_nepp | 6:fb11b746ceb5 | 581 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 582 | Status = VL53L0X_measurement_poll_for_completion(); |
sepp_nepp | 6:fb11b746ceb5 | 583 | } |
sepp_nepp | 6:fb11b746ceb5 | 584 | |
sepp_nepp | 6:fb11b746ceb5 | 585 | if (Status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 586 | Status = VL53L0X_get_ranging_measurement_data( p_data); |
sepp_nepp | 6:fb11b746ceb5 | 587 | |
sepp_nepp | 6:fb11b746ceb5 | 588 | // Clear the interrupt |
sepp_nepp | 7:3a1115c2556b | 589 | VL53L0X_clear_interrupt_mask( VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY); |
sepp_nepp | 7:3a1115c2556b | 590 | VL53L0X_polling_delay(); |
sepp_nepp | 6:fb11b746ceb5 | 591 | } |
sepp_nepp | 6:fb11b746ceb5 | 592 | } |
sepp_nepp | 6:fb11b746ceb5 | 593 | |
sepp_nepp | 6:fb11b746ceb5 | 594 | if (operating_mode == range_continuous_interrupt) { |
sepp_nepp | 7:3a1115c2556b | 595 | Status = VL53L0X_get_ranging_measurement_data( p_data); |
sepp_nepp | 7:3a1115c2556b | 596 | VL53L0X_clear_interrupt_mask( VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR | VL53L0X_REG_RESULT_INTERRUPT_STATUS); |
sepp_nepp | 6:fb11b746ceb5 | 597 | } |
sepp_nepp | 6:fb11b746ceb5 | 598 | |
sepp_nepp | 6:fb11b746ceb5 | 599 | return Status; |
sepp_nepp | 6:fb11b746ceb5 | 600 | } |
sepp_nepp | 6:fb11b746ceb5 | 601 | |
sepp_nepp | 6:fb11b746ceb5 | 602 | int VL53L0X::stop_measurement(OperatingMode operating_mode) |
sepp_nepp | 8:2fd7cb217068 | 603 | { int status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 604 | |
sepp_nepp | 6:fb11b746ceb5 | 605 | // don't need to stop for a singleshot range! |
sepp_nepp | 6:fb11b746ceb5 | 606 | if (operating_mode == range_single_shot_polling) { |
sepp_nepp | 6:fb11b746ceb5 | 607 | } |
sepp_nepp | 6:fb11b746ceb5 | 608 | |
sepp_nepp | 6:fb11b746ceb5 | 609 | if (operating_mode == range_continuous_interrupt || operating_mode == range_continuous_polling) { |
sepp_nepp | 6:fb11b746ceb5 | 610 | // continuous mode |
sepp_nepp | 6:fb11b746ceb5 | 611 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 612 | //aSerial->printf("Call of VL53L0X_StopMeasurement\n"); |
sepp_nepp | 7:3a1115c2556b | 613 | status = VL53L0X_stop_measurement(); |
sepp_nepp | 6:fb11b746ceb5 | 614 | } |
sepp_nepp | 6:fb11b746ceb5 | 615 | |
sepp_nepp | 6:fb11b746ceb5 | 616 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 617 | //aSerial->printf("Wait Stop to be competed\n"); |
sepp_nepp | 7:3a1115c2556b | 618 | status = wait_stop_completed(); |
sepp_nepp | 6:fb11b746ceb5 | 619 | } |
sepp_nepp | 6:fb11b746ceb5 | 620 | |
sepp_nepp | 6:fb11b746ceb5 | 621 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 622 | status = VL53L0X_clear_interrupt_mask(VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY); |
sepp_nepp | 6:fb11b746ceb5 | 623 | } |
sepp_nepp | 6:fb11b746ceb5 | 624 | |
sepp_nepp | 6:fb11b746ceb5 | 625 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 626 | } |
sepp_nepp | 6:fb11b746ceb5 | 627 | |
sepp_nepp | 6:fb11b746ceb5 | 628 | int VL53L0X::handle_irq(OperatingMode operating_mode, VL53L0X_RangingMeasurementData_t *data) |
sepp_nepp | 8:2fd7cb217068 | 629 | { int status; |
sepp_nepp | 6:fb11b746ceb5 | 630 | status = get_measurement(operating_mode, data); |
sepp_nepp | 6:fb11b746ceb5 | 631 | enable_interrupt_measure_detection_irq(); |
sepp_nepp | 6:fb11b746ceb5 | 632 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 633 | } |
sepp_nepp | 6:fb11b746ceb5 | 634 | |
sepp_nepp | 6:fb11b746ceb5 | 635 | int VL53L0X::range_start_continuous_mode() |
sepp_nepp | 13:253cb4ea3fcc | 636 | { CurrentParameters.DeviceMode = VL53L0X_DEVICEMODE_CONTINUOUS_RANGING; |
sepp_nepp | 13:253cb4ea3fcc | 637 | |
sepp_nepp | 13:253cb4ea3fcc | 638 | return VL53L0X_start_measurement(); |
sepp_nepp | 13:253cb4ea3fcc | 639 | |
sepp_nepp | 6:fb11b746ceb5 | 640 | } |
sepp_nepp | 6:fb11b746ceb5 | 641 | |
sepp_nepp | 7:3a1115c2556b | 642 | VL53L0X_Error VL53L0X::VL53L0X_device_read_strobe(void) |
sepp_nepp | 8:2fd7cb217068 | 643 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 644 | uint8_t strobe; |
sepp_nepp | 6:fb11b746ceb5 | 645 | uint32_t loop_nb; |
sepp_nepp | 6:fb11b746ceb5 | 646 | |
sepp_nepp | 7:3a1115c2556b | 647 | status |= VL53L0X_write_byte( 0x83, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 648 | |
sepp_nepp | 6:fb11b746ceb5 | 649 | /* polling |
sepp_nepp | 6:fb11b746ceb5 | 650 | * use timeout to avoid deadlock*/ |
sepp_nepp | 6:fb11b746ceb5 | 651 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 652 | loop_nb = 0; |
sepp_nepp | 6:fb11b746ceb5 | 653 | do { |
sepp_nepp | 7:3a1115c2556b | 654 | status = VL53L0X_read_byte( 0x83, &strobe); |
sepp_nepp | 6:fb11b746ceb5 | 655 | if ((strobe != 0x00) || status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 656 | break; |
sepp_nepp | 6:fb11b746ceb5 | 657 | } |
sepp_nepp | 6:fb11b746ceb5 | 658 | |
sepp_nepp | 6:fb11b746ceb5 | 659 | loop_nb = loop_nb + 1; |
sepp_nepp | 6:fb11b746ceb5 | 660 | } while (loop_nb < VL53L0X_DEFAULT_MAX_LOOP); |
sepp_nepp | 6:fb11b746ceb5 | 661 | |
sepp_nepp | 6:fb11b746ceb5 | 662 | if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) { |
sepp_nepp | 6:fb11b746ceb5 | 663 | status = VL53L0X_ERROR_TIME_OUT; |
sepp_nepp | 6:fb11b746ceb5 | 664 | } |
sepp_nepp | 6:fb11b746ceb5 | 665 | } |
sepp_nepp | 6:fb11b746ceb5 | 666 | |
sepp_nepp | 7:3a1115c2556b | 667 | status |= VL53L0X_write_byte( 0x83, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 668 | |
sepp_nepp | 6:fb11b746ceb5 | 669 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 670 | } |
sepp_nepp | 6:fb11b746ceb5 | 671 | |
sepp_nepp | 7:3a1115c2556b | 672 | VL53L0X_Error VL53L0X::VL53L0X_get_info_from_device( uint8_t option) |
sepp_nepp | 8:2fd7cb217068 | 673 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 674 | uint8_t byte; |
sepp_nepp | 6:fb11b746ceb5 | 675 | uint32_t tmp_dword; |
sepp_nepp | 6:fb11b746ceb5 | 676 | uint8_t module_id; |
sepp_nepp | 6:fb11b746ceb5 | 677 | uint8_t revision; |
sepp_nepp | 6:fb11b746ceb5 | 678 | uint8_t reference_spad_count = 0; |
sepp_nepp | 6:fb11b746ceb5 | 679 | uint8_t reference_spad_type = 0; |
sepp_nepp | 6:fb11b746ceb5 | 680 | uint32_t part_uid_upper = 0; |
sepp_nepp | 6:fb11b746ceb5 | 681 | uint32_t part_uid_lower = 0; |
sepp_nepp | 6:fb11b746ceb5 | 682 | uint32_t offset_fixed1104_mm = 0; |
sepp_nepp | 6:fb11b746ceb5 | 683 | int16_t offset_micro_meters = 0; |
sepp_nepp | 6:fb11b746ceb5 | 684 | uint32_t dist_meas_tgt_fixed1104_mm = 400 << 4; |
sepp_nepp | 6:fb11b746ceb5 | 685 | uint32_t dist_meas_fixed1104_400_mm = 0; |
sepp_nepp | 6:fb11b746ceb5 | 686 | uint32_t signal_rate_meas_fixed1104_400_mm = 0; |
sepp_nepp | 6:fb11b746ceb5 | 687 | char product_id[19]; |
sepp_nepp | 6:fb11b746ceb5 | 688 | char *product_id_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 689 | uint8_t read_data_from_device_done; |
sepp_nepp | 6:fb11b746ceb5 | 690 | FixPoint1616_t signal_rate_meas_fixed400_mm_fix = 0; |
sepp_nepp | 6:fb11b746ceb5 | 691 | uint8_t nvm_ref_good_spad_map[VL53L0X_REF_SPAD_BUFFER_SIZE]; |
sepp_nepp | 6:fb11b746ceb5 | 692 | int i; |
sepp_nepp | 6:fb11b746ceb5 | 693 | |
sepp_nepp | 8:2fd7cb217068 | 694 | read_data_from_device_done = Data.ReadDataFromDeviceDone; |
sepp_nepp | 8:2fd7cb217068 | 695 | read_data_from_device_done = Data.ReadDataFromDeviceDone; |
sepp_nepp | 8:2fd7cb217068 | 696 | read_data_from_device_done = Data.ReadDataFromDeviceDone; |
sepp_nepp | 6:fb11b746ceb5 | 697 | |
sepp_nepp | 6:fb11b746ceb5 | 698 | /* This access is done only once after that a GetDeviceInfo or |
sepp_nepp | 6:fb11b746ceb5 | 699 | * datainit is done*/ |
sepp_nepp | 6:fb11b746ceb5 | 700 | if (read_data_from_device_done != 7) { |
sepp_nepp | 6:fb11b746ceb5 | 701 | |
sepp_nepp | 7:3a1115c2556b | 702 | status |= VL53L0X_write_byte( 0x80, 0x01); |
sepp_nepp | 7:3a1115c2556b | 703 | status |= VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 704 | status |= VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 7:3a1115c2556b | 705 | status |= VL53L0X_write_byte( 0xFF, 0x06); |
sepp_nepp | 11:d8dbe3b87f9f | 706 | status |= VL53L0X_read_byte ( 0x83, &byte); |
sepp_nepp | 7:3a1115c2556b | 707 | status |= VL53L0X_write_byte( 0x83, byte | 4); |
sepp_nepp | 7:3a1115c2556b | 708 | status |= VL53L0X_write_byte( 0xFF, 0x07); |
sepp_nepp | 7:3a1115c2556b | 709 | status |= VL53L0X_write_byte( 0x81, 0x01); |
sepp_nepp | 7:3a1115c2556b | 710 | |
sepp_nepp | 7:3a1115c2556b | 711 | status |= VL53L0X_polling_delay(); |
sepp_nepp | 7:3a1115c2556b | 712 | |
sepp_nepp | 7:3a1115c2556b | 713 | status |= VL53L0X_write_byte( 0x80, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 714 | |
sepp_nepp | 6:fb11b746ceb5 | 715 | if (((option & 1) == 1) && |
sepp_nepp | 6:fb11b746ceb5 | 716 | ((read_data_from_device_done & 1) == 0)) { |
sepp_nepp | 7:3a1115c2556b | 717 | status |= VL53L0X_write_byte( 0x94, 0x6b); |
sepp_nepp | 7:3a1115c2556b | 718 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 719 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 6:fb11b746ceb5 | 720 | |
sepp_nepp | 6:fb11b746ceb5 | 721 | reference_spad_count = (uint8_t)((tmp_dword >> 8) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 722 | reference_spad_type = (uint8_t)((tmp_dword >> 15) & 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 723 | |
sepp_nepp | 7:3a1115c2556b | 724 | status |= VL53L0X_write_byte( 0x94, 0x24); |
sepp_nepp | 7:3a1115c2556b | 725 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 726 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 6:fb11b746ceb5 | 727 | |
sepp_nepp | 11:d8dbe3b87f9f | 728 | nvm_ref_good_spad_map[0] = (uint8_t)((tmp_dword >> 24) & 0xff); |
sepp_nepp | 11:d8dbe3b87f9f | 729 | nvm_ref_good_spad_map[1] = (uint8_t)((tmp_dword >> 16) & 0xff); |
sepp_nepp | 11:d8dbe3b87f9f | 730 | nvm_ref_good_spad_map[2] = (uint8_t)((tmp_dword >> 8) & 0xff); |
sepp_nepp | 6:fb11b746ceb5 | 731 | nvm_ref_good_spad_map[3] = (uint8_t)(tmp_dword & 0xff); |
sepp_nepp | 6:fb11b746ceb5 | 732 | |
sepp_nepp | 7:3a1115c2556b | 733 | status |= VL53L0X_write_byte( 0x94, 0x25); |
sepp_nepp | 7:3a1115c2556b | 734 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 735 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 6:fb11b746ceb5 | 736 | |
sepp_nepp | 11:d8dbe3b87f9f | 737 | nvm_ref_good_spad_map[4] = (uint8_t)((tmp_dword >> 24) & 0xff); |
sepp_nepp | 11:d8dbe3b87f9f | 738 | nvm_ref_good_spad_map[5] = (uint8_t)((tmp_dword >> 16) & 0xff); |
sepp_nepp | 6:fb11b746ceb5 | 739 | } |
sepp_nepp | 6:fb11b746ceb5 | 740 | |
sepp_nepp | 6:fb11b746ceb5 | 741 | if (((option & 2) == 2) && |
sepp_nepp | 6:fb11b746ceb5 | 742 | ((read_data_from_device_done & 2) == 0)) { |
sepp_nepp | 6:fb11b746ceb5 | 743 | |
sepp_nepp | 7:3a1115c2556b | 744 | status |= VL53L0X_write_byte( 0x94, 0x02); |
sepp_nepp | 7:3a1115c2556b | 745 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 746 | status |= VL53L0X_read_byte( 0x90, &module_id); |
sepp_nepp | 7:3a1115c2556b | 747 | |
sepp_nepp | 7:3a1115c2556b | 748 | status |= VL53L0X_write_byte( 0x94, 0x7B); |
sepp_nepp | 7:3a1115c2556b | 749 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 750 | status |= VL53L0X_read_byte( 0x90, &revision); |
sepp_nepp | 7:3a1115c2556b | 751 | |
sepp_nepp | 7:3a1115c2556b | 752 | status |= VL53L0X_write_byte( 0x94, 0x77); |
sepp_nepp | 7:3a1115c2556b | 753 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 754 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 6:fb11b746ceb5 | 755 | |
sepp_nepp | 6:fb11b746ceb5 | 756 | product_id[0] = (char)((tmp_dword >> 25) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 757 | product_id[1] = (char)((tmp_dword >> 18) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 758 | product_id[2] = (char)((tmp_dword >> 11) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 759 | product_id[3] = (char)((tmp_dword >> 4) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 760 | |
sepp_nepp | 6:fb11b746ceb5 | 761 | byte = (uint8_t)((tmp_dword & 0x00f) << 3); |
sepp_nepp | 6:fb11b746ceb5 | 762 | |
sepp_nepp | 7:3a1115c2556b | 763 | status |= VL53L0X_write_byte( 0x94, 0x78); |
sepp_nepp | 7:3a1115c2556b | 764 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 765 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 6:fb11b746ceb5 | 766 | |
sepp_nepp | 6:fb11b746ceb5 | 767 | product_id[4] = (char)(byte + |
sepp_nepp | 6:fb11b746ceb5 | 768 | ((tmp_dword >> 29) & 0x07f)); |
sepp_nepp | 6:fb11b746ceb5 | 769 | product_id[5] = (char)((tmp_dword >> 22) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 770 | product_id[6] = (char)((tmp_dword >> 15) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 771 | product_id[7] = (char)((tmp_dword >> 8) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 772 | product_id[8] = (char)((tmp_dword >> 1) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 773 | |
sepp_nepp | 6:fb11b746ceb5 | 774 | byte = (uint8_t)((tmp_dword & 0x001) << 6); |
sepp_nepp | 6:fb11b746ceb5 | 775 | |
sepp_nepp | 7:3a1115c2556b | 776 | status |= VL53L0X_write_byte( 0x94, 0x79); |
sepp_nepp | 7:3a1115c2556b | 777 | |
sepp_nepp | 7:3a1115c2556b | 778 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 779 | |
sepp_nepp | 7:3a1115c2556b | 780 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 6:fb11b746ceb5 | 781 | |
sepp_nepp | 6:fb11b746ceb5 | 782 | product_id[9] = (char)(byte + |
sepp_nepp | 6:fb11b746ceb5 | 783 | ((tmp_dword >> 26) & 0x07f)); |
sepp_nepp | 6:fb11b746ceb5 | 784 | product_id[10] = (char)((tmp_dword >> 19) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 785 | product_id[11] = (char)((tmp_dword >> 12) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 786 | product_id[12] = (char)((tmp_dword >> 5) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 787 | |
sepp_nepp | 6:fb11b746ceb5 | 788 | byte = (uint8_t)((tmp_dword & 0x01f) << 2); |
sepp_nepp | 6:fb11b746ceb5 | 789 | |
sepp_nepp | 7:3a1115c2556b | 790 | status |= VL53L0X_write_byte( 0x94, 0x7A); |
sepp_nepp | 7:3a1115c2556b | 791 | |
sepp_nepp | 7:3a1115c2556b | 792 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 793 | |
sepp_nepp | 7:3a1115c2556b | 794 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 6:fb11b746ceb5 | 795 | |
sepp_nepp | 6:fb11b746ceb5 | 796 | product_id[13] = (char)(byte + |
sepp_nepp | 6:fb11b746ceb5 | 797 | ((tmp_dword >> 30) & 0x07f)); |
sepp_nepp | 6:fb11b746ceb5 | 798 | product_id[14] = (char)((tmp_dword >> 23) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 799 | product_id[15] = (char)((tmp_dword >> 16) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 800 | product_id[16] = (char)((tmp_dword >> 9) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 801 | product_id[17] = (char)((tmp_dword >> 2) & 0x07f); |
sepp_nepp | 6:fb11b746ceb5 | 802 | product_id[18] = '\0'; |
sepp_nepp | 6:fb11b746ceb5 | 803 | |
sepp_nepp | 6:fb11b746ceb5 | 804 | } |
sepp_nepp | 6:fb11b746ceb5 | 805 | |
sepp_nepp | 6:fb11b746ceb5 | 806 | if (((option & 4) == 4) && |
sepp_nepp | 6:fb11b746ceb5 | 807 | ((read_data_from_device_done & 4) == 0)) { |
sepp_nepp | 6:fb11b746ceb5 | 808 | |
sepp_nepp | 7:3a1115c2556b | 809 | status |= VL53L0X_write_byte( 0x94, 0x7B); |
sepp_nepp | 7:3a1115c2556b | 810 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 811 | status |= VL53L0X_read_dword( 0x90, &part_uid_upper); |
sepp_nepp | 7:3a1115c2556b | 812 | status |= VL53L0X_write_byte( 0x94, 0x7C); |
sepp_nepp | 7:3a1115c2556b | 813 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 814 | status |= VL53L0X_read_dword( 0x90, &part_uid_lower); |
sepp_nepp | 7:3a1115c2556b | 815 | |
sepp_nepp | 7:3a1115c2556b | 816 | status |= VL53L0X_write_byte( 0x94, 0x73); |
sepp_nepp | 7:3a1115c2556b | 817 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 818 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 11:d8dbe3b87f9f | 819 | signal_rate_meas_fixed1104_400_mm = (tmp_dword & 0x0000000ff) << 8; |
sepp_nepp | 6:fb11b746ceb5 | 820 | |
sepp_nepp | 7:3a1115c2556b | 821 | status |= VL53L0X_write_byte( 0x94, 0x74); |
sepp_nepp | 7:3a1115c2556b | 822 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 823 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 11:d8dbe3b87f9f | 824 | signal_rate_meas_fixed1104_400_mm |= ((tmp_dword & 0xff000000) >> 24); |
sepp_nepp | 6:fb11b746ceb5 | 825 | |
sepp_nepp | 7:3a1115c2556b | 826 | status |= VL53L0X_write_byte( 0x94, 0x75); |
sepp_nepp | 7:3a1115c2556b | 827 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 828 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 11:d8dbe3b87f9f | 829 | dist_meas_fixed1104_400_mm = (tmp_dword & 0x0000000ff) << 8; |
sepp_nepp | 6:fb11b746ceb5 | 830 | |
sepp_nepp | 7:3a1115c2556b | 831 | status |= VL53L0X_write_byte( 0x94, 0x76); |
sepp_nepp | 7:3a1115c2556b | 832 | status |= VL53L0X_device_read_strobe(); |
sepp_nepp | 7:3a1115c2556b | 833 | status |= VL53L0X_read_dword( 0x90, &tmp_dword); |
sepp_nepp | 11:d8dbe3b87f9f | 834 | dist_meas_fixed1104_400_mm |= ((tmp_dword & 0xff000000) >> 24); |
sepp_nepp | 6:fb11b746ceb5 | 835 | } |
sepp_nepp | 6:fb11b746ceb5 | 836 | |
sepp_nepp | 7:3a1115c2556b | 837 | status |= VL53L0X_write_byte( 0x81, 0x00); |
sepp_nepp | 7:3a1115c2556b | 838 | status |= VL53L0X_write_byte( 0xFF, 0x06); |
sepp_nepp | 7:3a1115c2556b | 839 | status |= VL53L0X_read_byte( 0x83, &byte); |
sepp_nepp | 7:3a1115c2556b | 840 | status |= VL53L0X_write_byte( 0x83, byte & 0xfb); |
sepp_nepp | 7:3a1115c2556b | 841 | status |= VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 842 | status |= VL53L0X_write_byte( 0x00, 0x01); |
sepp_nepp | 7:3a1115c2556b | 843 | status |= VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 7:3a1115c2556b | 844 | status |= VL53L0X_write_byte( 0x80, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 845 | } |
sepp_nepp | 6:fb11b746ceb5 | 846 | |
sepp_nepp | 6:fb11b746ceb5 | 847 | if ((status == VL53L0X_ERROR_NONE) && |
sepp_nepp | 6:fb11b746ceb5 | 848 | (read_data_from_device_done != 7)) { |
sepp_nepp | 6:fb11b746ceb5 | 849 | /* Assign to variable if status is ok */ |
sepp_nepp | 6:fb11b746ceb5 | 850 | if (((option & 1) == 1) && |
sepp_nepp | 6:fb11b746ceb5 | 851 | ((read_data_from_device_done & 1) == 0)) { |
sepp_nepp | 8:2fd7cb217068 | 852 | Data.ReferenceSpadCount = reference_spad_count; |
sepp_nepp | 8:2fd7cb217068 | 853 | Data.ReferenceSpadType = reference_spad_type; |
sepp_nepp | 6:fb11b746ceb5 | 854 | |
sepp_nepp | 6:fb11b746ceb5 | 855 | for (i = 0; i < VL53L0X_REF_SPAD_BUFFER_SIZE; i++) { |
sepp_nepp | 11:d8dbe3b87f9f | 856 | Data.RefGoodSpadMap[i] = |
sepp_nepp | 6:fb11b746ceb5 | 857 | nvm_ref_good_spad_map[i]; |
sepp_nepp | 6:fb11b746ceb5 | 858 | } |
sepp_nepp | 6:fb11b746ceb5 | 859 | } |
sepp_nepp | 6:fb11b746ceb5 | 860 | |
sepp_nepp | 6:fb11b746ceb5 | 861 | if (((option & 2) == 2) && |
sepp_nepp | 6:fb11b746ceb5 | 862 | ((read_data_from_device_done & 2) == 0)) { |
sepp_nepp | 8:2fd7cb217068 | 863 | Data.ModuleId = module_id; |
sepp_nepp | 8:2fd7cb217068 | 864 | Data.Revision = revision; |
sepp_nepp | 8:2fd7cb217068 | 865 | product_id_tmp = Data.ProductId; |
sepp_nepp | 6:fb11b746ceb5 | 866 | VL53L0X_COPYSTRING(product_id_tmp, product_id); |
sepp_nepp | 6:fb11b746ceb5 | 867 | } |
sepp_nepp | 6:fb11b746ceb5 | 868 | |
sepp_nepp | 6:fb11b746ceb5 | 869 | if (((option & 4) == 4) && |
sepp_nepp | 6:fb11b746ceb5 | 870 | ((read_data_from_device_done & 4) == 0)) { |
sepp_nepp | 8:2fd7cb217068 | 871 | Data.PartUIDUpper = part_uid_upper; |
sepp_nepp | 8:2fd7cb217068 | 872 | Data.PartUIDLower = part_uid_lower; |
sepp_nepp | 6:fb11b746ceb5 | 873 | signal_rate_meas_fixed400_mm_fix = |
sepp_nepp | 11:d8dbe3b87f9f | 874 | VL53L0X_FP97TOFP1616(signal_rate_meas_fixed1104_400_mm); |
sepp_nepp | 8:2fd7cb217068 | 875 | Data.SignalRateMeasFixed400mm = signal_rate_meas_fixed400_mm_fix; |
sepp_nepp | 6:fb11b746ceb5 | 876 | |
sepp_nepp | 6:fb11b746ceb5 | 877 | offset_micro_meters = 0; |
sepp_nepp | 6:fb11b746ceb5 | 878 | if (dist_meas_fixed1104_400_mm != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 879 | offset_fixed1104_mm = |
sepp_nepp | 6:fb11b746ceb5 | 880 | dist_meas_fixed1104_400_mm - |
sepp_nepp | 6:fb11b746ceb5 | 881 | dist_meas_tgt_fixed1104_mm; |
sepp_nepp | 6:fb11b746ceb5 | 882 | offset_micro_meters = (offset_fixed1104_mm |
sepp_nepp | 6:fb11b746ceb5 | 883 | * 1000) >> 4; |
sepp_nepp | 6:fb11b746ceb5 | 884 | offset_micro_meters *= -1; |
sepp_nepp | 6:fb11b746ceb5 | 885 | } |
sepp_nepp | 6:fb11b746ceb5 | 886 | |
sepp_nepp | 11:d8dbe3b87f9f | 887 | Data.Part2PartOffsetAdjustNVM_um = offset_micro_meters; |
sepp_nepp | 6:fb11b746ceb5 | 888 | } |
sepp_nepp | 6:fb11b746ceb5 | 889 | byte = (uint8_t)(read_data_from_device_done | option); |
sepp_nepp | 8:2fd7cb217068 | 890 | Data.ReadDataFromDeviceDone = byte; |
sepp_nepp | 6:fb11b746ceb5 | 891 | } |
sepp_nepp | 6:fb11b746ceb5 | 892 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 893 | } |
sepp_nepp | 6:fb11b746ceb5 | 894 | |
sepp_nepp | 13:253cb4ea3fcc | 895 | VL53L0X_Error VL53L0X::VL53L0X_get_offset_calibration_data_micro_meter(int32_t *p_offset_calibration_data_micro_meter) |
sepp_nepp | 8:2fd7cb217068 | 896 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 897 | uint16_t range_offset_register; |
sepp_nepp | 6:fb11b746ceb5 | 898 | int16_t c_max_offset = 2047; |
sepp_nepp | 6:fb11b746ceb5 | 899 | int16_t c_offset_range = 4096; |
sepp_nepp | 6:fb11b746ceb5 | 900 | |
sepp_nepp | 13:253cb4ea3fcc | 901 | /* Note, that offset has 10.2 format */ |
sepp_nepp | 8:2fd7cb217068 | 902 | status = VL53L0X_read_word(VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM, |
sepp_nepp | 6:fb11b746ceb5 | 903 | &range_offset_register); |
sepp_nepp | 6:fb11b746ceb5 | 904 | |
sepp_nepp | 6:fb11b746ceb5 | 905 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 906 | range_offset_register = (range_offset_register & 0x0fff); |
sepp_nepp | 6:fb11b746ceb5 | 907 | |
sepp_nepp | 6:fb11b746ceb5 | 908 | /* Apply 12 bit 2's compliment conversion */ |
sepp_nepp | 6:fb11b746ceb5 | 909 | if (range_offset_register > c_max_offset) { |
sepp_nepp | 6:fb11b746ceb5 | 910 | *p_offset_calibration_data_micro_meter = |
sepp_nepp | 13:253cb4ea3fcc | 911 | (int16_t)(range_offset_register - c_offset_range) * 250; |
sepp_nepp | 6:fb11b746ceb5 | 912 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 913 | *p_offset_calibration_data_micro_meter = |
sepp_nepp | 13:253cb4ea3fcc | 914 | (int16_t)range_offset_register * 250; } |
sepp_nepp | 6:fb11b746ceb5 | 915 | } |
sepp_nepp | 6:fb11b746ceb5 | 916 | |
sepp_nepp | 6:fb11b746ceb5 | 917 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 918 | } |
sepp_nepp | 6:fb11b746ceb5 | 919 | |
sepp_nepp | 13:253cb4ea3fcc | 920 | VL53L0X_Error VL53L0X::VL53L0X_set_offset_calibration_data_micro_meter(int32_t offset_calibration_data_micro_meter) |
sepp_nepp | 8:2fd7cb217068 | 921 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 922 | int32_t c_max_offset_micro_meter = 511000; |
sepp_nepp | 6:fb11b746ceb5 | 923 | int32_t c_min_offset_micro_meter = -512000; |
sepp_nepp | 6:fb11b746ceb5 | 924 | int16_t c_offset_range = 4096; |
sepp_nepp | 6:fb11b746ceb5 | 925 | uint32_t encoded_offset_val; |
sepp_nepp | 6:fb11b746ceb5 | 926 | |
sepp_nepp | 6:fb11b746ceb5 | 927 | if (offset_calibration_data_micro_meter > c_max_offset_micro_meter) { |
sepp_nepp | 6:fb11b746ceb5 | 928 | offset_calibration_data_micro_meter = c_max_offset_micro_meter; |
sepp_nepp | 6:fb11b746ceb5 | 929 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 930 | if (offset_calibration_data_micro_meter < c_min_offset_micro_meter) { |
sepp_nepp | 6:fb11b746ceb5 | 931 | offset_calibration_data_micro_meter = c_min_offset_micro_meter; |
sepp_nepp | 6:fb11b746ceb5 | 932 | } |
sepp_nepp | 6:fb11b746ceb5 | 933 | } |
sepp_nepp | 6:fb11b746ceb5 | 934 | |
sepp_nepp | 6:fb11b746ceb5 | 935 | /* The offset register is 10.2 format and units are mm |
sepp_nepp | 13:253cb4ea3fcc | 936 | * therefore conversion is applied by a division of 250. */ |
sepp_nepp | 6:fb11b746ceb5 | 937 | if (offset_calibration_data_micro_meter >= 0) { |
sepp_nepp | 13:253cb4ea3fcc | 938 | encoded_offset_val = offset_calibration_data_micro_meter / 250; |
sepp_nepp | 6:fb11b746ceb5 | 939 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 940 | encoded_offset_val = |
sepp_nepp | 13:253cb4ea3fcc | 941 | c_offset_range + offset_calibration_data_micro_meter / 250; |
sepp_nepp | 6:fb11b746ceb5 | 942 | } |
sepp_nepp | 6:fb11b746ceb5 | 943 | |
sepp_nepp | 8:2fd7cb217068 | 944 | status = VL53L0X_write_word(VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM, |
sepp_nepp | 6:fb11b746ceb5 | 945 | encoded_offset_val); |
sepp_nepp | 6:fb11b746ceb5 | 946 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 947 | } |
sepp_nepp | 6:fb11b746ceb5 | 948 | |
sepp_nepp | 7:3a1115c2556b | 949 | VL53L0X_Error VL53L0X::VL53L0X_apply_offset_adjustment(void) |
sepp_nepp | 8:2fd7cb217068 | 950 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 951 | int32_t corrected_offset_micro_meters; |
sepp_nepp | 6:fb11b746ceb5 | 952 | int32_t current_offset_micro_meters; |
sepp_nepp | 6:fb11b746ceb5 | 953 | |
sepp_nepp | 8:2fd7cb217068 | 954 | /* if we run on this function we can read all the NVM info used by the API */ |
sepp_nepp | 7:3a1115c2556b | 955 | status = VL53L0X_get_info_from_device( 7); |
sepp_nepp | 6:fb11b746ceb5 | 956 | |
sepp_nepp | 6:fb11b746ceb5 | 957 | /* Read back current device offset */ |
sepp_nepp | 6:fb11b746ceb5 | 958 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 959 | status = VL53L0X_get_offset_calibration_data_micro_meter(¤t_offset_micro_meters); |
sepp_nepp | 6:fb11b746ceb5 | 960 | } |
sepp_nepp | 6:fb11b746ceb5 | 961 | |
sepp_nepp | 6:fb11b746ceb5 | 962 | /* Apply Offset Adjustment derived from 400mm measurements */ |
sepp_nepp | 6:fb11b746ceb5 | 963 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 964 | |
sepp_nepp | 6:fb11b746ceb5 | 965 | /* Store initial device offset */ |
sepp_nepp | 11:d8dbe3b87f9f | 966 | Data.Part2PartOffsetNVM_um = current_offset_micro_meters; |
sepp_nepp | 6:fb11b746ceb5 | 967 | |
sepp_nepp | 6:fb11b746ceb5 | 968 | corrected_offset_micro_meters = current_offset_micro_meters + |
sepp_nepp | 11:d8dbe3b87f9f | 969 | (int32_t)Data.Part2PartOffsetAdjustNVM_um; |
sepp_nepp | 8:2fd7cb217068 | 970 | |
sepp_nepp | 8:2fd7cb217068 | 971 | status = VL53L0X_set_offset_calibration_data_micro_meter(corrected_offset_micro_meters); |
sepp_nepp | 6:fb11b746ceb5 | 972 | |
sepp_nepp | 6:fb11b746ceb5 | 973 | /* store current, adjusted offset */ |
sepp_nepp | 6:fb11b746ceb5 | 974 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 975 | CurrentParameters.RangeOffset_um = corrected_offset_micro_meters; |
sepp_nepp | 6:fb11b746ceb5 | 976 | } |
sepp_nepp | 6:fb11b746ceb5 | 977 | } |
sepp_nepp | 6:fb11b746ceb5 | 978 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 979 | } |
sepp_nepp | 6:fb11b746ceb5 | 980 | |
sepp_nepp | 11:d8dbe3b87f9f | 981 | VL53L0X_Error VL53L0X::VL53L0X_get_inter_measurement_period_ms(uint32_t *p_inter_measurement_period_ms) |
sepp_nepp | 8:2fd7cb217068 | 982 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 983 | uint16_t osc_calibrate_val; |
sepp_nepp | 11:d8dbe3b87f9f | 984 | uint32_t im_period_ms; |
sepp_nepp | 6:fb11b746ceb5 | 985 | |
sepp_nepp | 6:fb11b746ceb5 | 986 | |
sepp_nepp | 6:fb11b746ceb5 | 987 | |
sepp_nepp | 7:3a1115c2556b | 988 | status = VL53L0X_read_word( VL53L0X_REG_OSC_CALIBRATE_VAL, |
sepp_nepp | 6:fb11b746ceb5 | 989 | &osc_calibrate_val); |
sepp_nepp | 6:fb11b746ceb5 | 990 | |
sepp_nepp | 6:fb11b746ceb5 | 991 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 992 | status = VL53L0X_read_dword(VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD, |
sepp_nepp | 11:d8dbe3b87f9f | 993 | &im_period_ms); |
sepp_nepp | 6:fb11b746ceb5 | 994 | } |
sepp_nepp | 6:fb11b746ceb5 | 995 | |
sepp_nepp | 6:fb11b746ceb5 | 996 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 997 | if (osc_calibrate_val != 0) { |
sepp_nepp | 11:d8dbe3b87f9f | 998 | *p_inter_measurement_period_ms = |
sepp_nepp | 11:d8dbe3b87f9f | 999 | im_period_ms / osc_calibrate_val; |
sepp_nepp | 6:fb11b746ceb5 | 1000 | } |
sepp_nepp | 11:d8dbe3b87f9f | 1001 | CurrentParameters.InterMeasurementPeriod_ms = *p_inter_measurement_period_ms; |
sepp_nepp | 6:fb11b746ceb5 | 1002 | } |
sepp_nepp | 6:fb11b746ceb5 | 1003 | |
sepp_nepp | 6:fb11b746ceb5 | 1004 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1005 | } |
sepp_nepp | 6:fb11b746ceb5 | 1006 | |
sepp_nepp | 11:d8dbe3b87f9f | 1007 | VL53L0X_Error VL53L0X::VL53L0X_get_x_talk_compensation_rate_MHz(FixPoint1616_t *p_xtalk_compensation_rate_MHz) |
sepp_nepp | 8:2fd7cb217068 | 1008 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1009 | uint16_t value; |
sepp_nepp | 6:fb11b746ceb5 | 1010 | FixPoint1616_t temp_fix1616; |
sepp_nepp | 6:fb11b746ceb5 | 1011 | |
sepp_nepp | 11:d8dbe3b87f9f | 1012 | status = VL53L0X_read_word(VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MHz, (uint16_t *)&value); |
sepp_nepp | 6:fb11b746ceb5 | 1013 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1014 | if (value == 0) { |
sepp_nepp | 6:fb11b746ceb5 | 1015 | /* the Xtalk is disabled return value from memory */ |
sepp_nepp | 11:d8dbe3b87f9f | 1016 | temp_fix1616 = CurrentParameters.XTalkCompensationRate_MHz ; |
sepp_nepp | 11:d8dbe3b87f9f | 1017 | *p_xtalk_compensation_rate_MHz = temp_fix1616; |
sepp_nepp | 10:cd1758e186a4 | 1018 | CurrentParameters.XTalkCompensationEnable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1019 | } else { |
sepp_nepp | 11:d8dbe3b87f9f | 1020 | temp_fix1616 = VL53L0X_FP313TOFP1616(value); |
sepp_nepp | 11:d8dbe3b87f9f | 1021 | *p_xtalk_compensation_rate_MHz = temp_fix1616; |
sepp_nepp | 11:d8dbe3b87f9f | 1022 | CurrentParameters.XTalkCompensationRate_MHz = temp_fix1616; |
sepp_nepp | 10:cd1758e186a4 | 1023 | CurrentParameters.XTalkCompensationEnable = 1; |
sepp_nepp | 6:fb11b746ceb5 | 1024 | } |
sepp_nepp | 6:fb11b746ceb5 | 1025 | } |
sepp_nepp | 6:fb11b746ceb5 | 1026 | |
sepp_nepp | 6:fb11b746ceb5 | 1027 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1028 | } |
sepp_nepp | 6:fb11b746ceb5 | 1029 | |
sepp_nepp | 7:3a1115c2556b | 1030 | VL53L0X_Error VL53L0X::VL53L0X_get_limit_check_value( uint16_t limit_check_id, |
sepp_nepp | 6:fb11b746ceb5 | 1031 | FixPoint1616_t *p_limit_check_value) |
sepp_nepp | 8:2fd7cb217068 | 1032 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1033 | uint8_t enable_zero_value = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1034 | uint16_t temp16; |
sepp_nepp | 6:fb11b746ceb5 | 1035 | FixPoint1616_t temp_fix1616; |
sepp_nepp | 6:fb11b746ceb5 | 1036 | |
sepp_nepp | 6:fb11b746ceb5 | 1037 | switch (limit_check_id) { |
sepp_nepp | 6:fb11b746ceb5 | 1038 | |
sepp_nepp | 6:fb11b746ceb5 | 1039 | case VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 1040 | /* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 1041 | temp_fix1616 = CurrentParameters.LimitChecksValue[VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE]; |
sepp_nepp | 6:fb11b746ceb5 | 1042 | enable_zero_value = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1043 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1044 | |
sepp_nepp | 6:fb11b746ceb5 | 1045 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE: |
sepp_nepp | 13:253cb4ea3fcc | 1046 | status = VL53L0X_read_word(VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT, &temp16); |
sepp_nepp | 6:fb11b746ceb5 | 1047 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 1048 | temp_fix1616 = VL53L0X_FP97TOFP1616(temp16); |
sepp_nepp | 6:fb11b746ceb5 | 1049 | } |
sepp_nepp | 6:fb11b746ceb5 | 1050 | enable_zero_value = 1; |
sepp_nepp | 6:fb11b746ceb5 | 1051 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1052 | |
sepp_nepp | 6:fb11b746ceb5 | 1053 | case VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP: |
sepp_nepp | 6:fb11b746ceb5 | 1054 | /* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 1055 | temp_fix1616 = CurrentParameters.LimitChecksValue[VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP]; |
sepp_nepp | 6:fb11b746ceb5 | 1056 | enable_zero_value = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1057 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1058 | |
sepp_nepp | 6:fb11b746ceb5 | 1059 | case VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD: |
sepp_nepp | 6:fb11b746ceb5 | 1060 | /* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 1061 | temp_fix1616 = CurrentParameters.LimitChecksValue[VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD]; |
sepp_nepp | 6:fb11b746ceb5 | 1062 | enable_zero_value = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1063 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1064 | |
sepp_nepp | 6:fb11b746ceb5 | 1065 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC: |
sepp_nepp | 6:fb11b746ceb5 | 1066 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE: |
sepp_nepp | 8:2fd7cb217068 | 1067 | status = VL53L0X_read_word(VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT, |
sepp_nepp | 6:fb11b746ceb5 | 1068 | &temp16); |
sepp_nepp | 6:fb11b746ceb5 | 1069 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 1070 | temp_fix1616 = VL53L0X_FP97TOFP1616(temp16); |
sepp_nepp | 6:fb11b746ceb5 | 1071 | } |
sepp_nepp | 6:fb11b746ceb5 | 1072 | |
sepp_nepp | 6:fb11b746ceb5 | 1073 | enable_zero_value = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1074 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1075 | |
sepp_nepp | 6:fb11b746ceb5 | 1076 | default: |
sepp_nepp | 6:fb11b746ceb5 | 1077 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1078 | |
sepp_nepp | 6:fb11b746ceb5 | 1079 | } |
sepp_nepp | 6:fb11b746ceb5 | 1080 | |
sepp_nepp | 6:fb11b746ceb5 | 1081 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1082 | if (enable_zero_value == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 1083 | |
sepp_nepp | 6:fb11b746ceb5 | 1084 | if (temp_fix1616 == 0) { |
sepp_nepp | 6:fb11b746ceb5 | 1085 | /* disabled: return value from memory */ |
sepp_nepp | 10:cd1758e186a4 | 1086 | temp_fix1616 = CurrentParameters.LimitChecksValue[limit_check_id]; |
sepp_nepp | 6:fb11b746ceb5 | 1087 | *p_limit_check_value = temp_fix1616; |
sepp_nepp | 10:cd1758e186a4 | 1088 | CurrentParameters.LimitChecksEnable[limit_check_id] = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1089 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1090 | *p_limit_check_value = temp_fix1616; |
sepp_nepp | 10:cd1758e186a4 | 1091 | CurrentParameters.LimitChecksValue[limit_check_id] = temp_fix1616; |
sepp_nepp | 10:cd1758e186a4 | 1092 | CurrentParameters.LimitChecksEnable[limit_check_id] = 1; |
sepp_nepp | 6:fb11b746ceb5 | 1093 | } |
sepp_nepp | 13:253cb4ea3fcc | 1094 | } else { *p_limit_check_value = temp_fix1616; } |
sepp_nepp | 6:fb11b746ceb5 | 1095 | } |
sepp_nepp | 6:fb11b746ceb5 | 1096 | |
sepp_nepp | 6:fb11b746ceb5 | 1097 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1098 | } |
sepp_nepp | 6:fb11b746ceb5 | 1099 | |
sepp_nepp | 7:3a1115c2556b | 1100 | VL53L0X_Error VL53L0X::VL53L0X_get_limit_check_enable( uint16_t limit_check_id, |
sepp_nepp | 6:fb11b746ceb5 | 1101 | uint8_t *p_limit_check_enable) |
sepp_nepp | 8:2fd7cb217068 | 1102 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1103 | uint8_t temp8; |
sepp_nepp | 6:fb11b746ceb5 | 1104 | |
sepp_nepp | 6:fb11b746ceb5 | 1105 | if (limit_check_id >= VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS) { |
sepp_nepp | 6:fb11b746ceb5 | 1106 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1107 | *p_limit_check_enable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1108 | } else { |
sepp_nepp | 10:cd1758e186a4 | 1109 | temp8 = CurrentParameters.LimitChecksEnable[limit_check_id]; |
sepp_nepp | 6:fb11b746ceb5 | 1110 | *p_limit_check_enable = temp8; |
sepp_nepp | 6:fb11b746ceb5 | 1111 | } |
sepp_nepp | 6:fb11b746ceb5 | 1112 | |
sepp_nepp | 6:fb11b746ceb5 | 1113 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1114 | } |
sepp_nepp | 6:fb11b746ceb5 | 1115 | |
sepp_nepp | 8:2fd7cb217068 | 1116 | VL53L0X_Error VL53L0X::VL53L0X_get_wrap_around_check_enable(uint8_t *p_wrap_around_check_enable) |
sepp_nepp | 8:2fd7cb217068 | 1117 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1118 | uint8_t data; |
sepp_nepp | 6:fb11b746ceb5 | 1119 | |
sepp_nepp | 7:3a1115c2556b | 1120 | status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, &data); |
sepp_nepp | 6:fb11b746ceb5 | 1121 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1122 | Data.SequenceConfig = data; |
sepp_nepp | 6:fb11b746ceb5 | 1123 | if (data & (0x01 << 7)) { |
sepp_nepp | 6:fb11b746ceb5 | 1124 | *p_wrap_around_check_enable = 0x01; |
sepp_nepp | 6:fb11b746ceb5 | 1125 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1126 | *p_wrap_around_check_enable = 0x00; |
sepp_nepp | 6:fb11b746ceb5 | 1127 | } |
sepp_nepp | 6:fb11b746ceb5 | 1128 | } |
sepp_nepp | 6:fb11b746ceb5 | 1129 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 10:cd1758e186a4 | 1130 | CurrentParameters.WrapAroundCheckEnable = *p_wrap_around_check_enable; |
sepp_nepp | 6:fb11b746ceb5 | 1131 | } |
sepp_nepp | 6:fb11b746ceb5 | 1132 | |
sepp_nepp | 6:fb11b746ceb5 | 1133 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1134 | } |
sepp_nepp | 6:fb11b746ceb5 | 1135 | |
sepp_nepp | 8:2fd7cb217068 | 1136 | VL53L0X_Error VL53L0X::sequence_step_enabled(VL53L0X_SequenceStepId sequence_step_id, uint8_t sequence_config, |
sepp_nepp | 6:fb11b746ceb5 | 1137 | uint8_t *p_sequence_step_enabled) |
sepp_nepp | 8:2fd7cb217068 | 1138 | { VL53L0X_Error Status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1139 | *p_sequence_step_enabled = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1140 | |
sepp_nepp | 6:fb11b746ceb5 | 1141 | switch (sequence_step_id) { |
sepp_nepp | 6:fb11b746ceb5 | 1142 | case VL53L0X_SEQUENCESTEP_TCC: |
sepp_nepp | 6:fb11b746ceb5 | 1143 | *p_sequence_step_enabled = (sequence_config & 0x10) >> 4; |
sepp_nepp | 6:fb11b746ceb5 | 1144 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1145 | case VL53L0X_SEQUENCESTEP_DSS: |
sepp_nepp | 6:fb11b746ceb5 | 1146 | *p_sequence_step_enabled = (sequence_config & 0x08) >> 3; |
sepp_nepp | 6:fb11b746ceb5 | 1147 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1148 | case VL53L0X_SEQUENCESTEP_MSRC: |
sepp_nepp | 6:fb11b746ceb5 | 1149 | *p_sequence_step_enabled = (sequence_config & 0x04) >> 2; |
sepp_nepp | 6:fb11b746ceb5 | 1150 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1151 | case VL53L0X_SEQUENCESTEP_PRE_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 1152 | *p_sequence_step_enabled = (sequence_config & 0x40) >> 6; |
sepp_nepp | 6:fb11b746ceb5 | 1153 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1154 | case VL53L0X_SEQUENCESTEP_FINAL_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 1155 | *p_sequence_step_enabled = (sequence_config & 0x80) >> 7; |
sepp_nepp | 6:fb11b746ceb5 | 1156 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1157 | default: |
sepp_nepp | 6:fb11b746ceb5 | 1158 | Status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1159 | } |
sepp_nepp | 6:fb11b746ceb5 | 1160 | return Status; |
sepp_nepp | 6:fb11b746ceb5 | 1161 | } |
sepp_nepp | 6:fb11b746ceb5 | 1162 | |
sepp_nepp | 8:2fd7cb217068 | 1163 | VL53L0X_Error VL53L0X::VL53L0X_get_sequence_step_enables(VL53L0X_SchedulerSequenceSteps_t *p_scheduler_sequence_steps) |
sepp_nepp | 8:2fd7cb217068 | 1164 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1165 | uint8_t sequence_config = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1166 | |
sepp_nepp | 7:3a1115c2556b | 1167 | status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, |
sepp_nepp | 6:fb11b746ceb5 | 1168 | &sequence_config); |
sepp_nepp | 6:fb11b746ceb5 | 1169 | |
sepp_nepp | 6:fb11b746ceb5 | 1170 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1171 | status = sequence_step_enabled(VL53L0X_SEQUENCESTEP_TCC, sequence_config, |
sepp_nepp | 6:fb11b746ceb5 | 1172 | &p_scheduler_sequence_steps->TccOn); |
sepp_nepp | 6:fb11b746ceb5 | 1173 | } |
sepp_nepp | 6:fb11b746ceb5 | 1174 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1175 | status = sequence_step_enabled(VL53L0X_SEQUENCESTEP_DSS, sequence_config, |
sepp_nepp | 6:fb11b746ceb5 | 1176 | &p_scheduler_sequence_steps->DssOn); |
sepp_nepp | 6:fb11b746ceb5 | 1177 | } |
sepp_nepp | 6:fb11b746ceb5 | 1178 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1179 | status = sequence_step_enabled(VL53L0X_SEQUENCESTEP_MSRC, sequence_config, |
sepp_nepp | 6:fb11b746ceb5 | 1180 | &p_scheduler_sequence_steps->MsrcOn); |
sepp_nepp | 6:fb11b746ceb5 | 1181 | } |
sepp_nepp | 6:fb11b746ceb5 | 1182 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1183 | status = sequence_step_enabled(VL53L0X_SEQUENCESTEP_PRE_RANGE, sequence_config, |
sepp_nepp | 6:fb11b746ceb5 | 1184 | &p_scheduler_sequence_steps->PreRangeOn); |
sepp_nepp | 6:fb11b746ceb5 | 1185 | } |
sepp_nepp | 6:fb11b746ceb5 | 1186 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1187 | status = sequence_step_enabled(VL53L0X_SEQUENCESTEP_FINAL_RANGE, sequence_config, |
sepp_nepp | 6:fb11b746ceb5 | 1188 | &p_scheduler_sequence_steps->FinalRangeOn); |
sepp_nepp | 6:fb11b746ceb5 | 1189 | } |
sepp_nepp | 6:fb11b746ceb5 | 1190 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1191 | } |
sepp_nepp | 6:fb11b746ceb5 | 1192 | |
sepp_nepp | 6:fb11b746ceb5 | 1193 | uint8_t VL53L0X::VL53L0X_decode_vcsel_period(uint8_t vcsel_period_reg) |
sepp_nepp | 13:253cb4ea3fcc | 1194 | { /*! Converts the encoded VCSEL period register value into the real period in PLL clocks */ |
sepp_nepp | 6:fb11b746ceb5 | 1195 | uint8_t vcsel_period_pclks = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1196 | |
sepp_nepp | 6:fb11b746ceb5 | 1197 | vcsel_period_pclks = (vcsel_period_reg + 1) << 1; |
sepp_nepp | 6:fb11b746ceb5 | 1198 | |
sepp_nepp | 6:fb11b746ceb5 | 1199 | return vcsel_period_pclks; |
sepp_nepp | 6:fb11b746ceb5 | 1200 | } |
sepp_nepp | 6:fb11b746ceb5 | 1201 | |
sepp_nepp | 6:fb11b746ceb5 | 1202 | uint8_t VL53L0X::lv53l0x_encode_vcsel_period(uint8_t vcsel_period_pclks) |
sepp_nepp | 13:253cb4ea3fcc | 1203 | { /*! Converts the encoded VCSEL period register value into the real period in PLL clocks */ |
sepp_nepp | 6:fb11b746ceb5 | 1204 | |
sepp_nepp | 6:fb11b746ceb5 | 1205 | uint8_t vcsel_period_reg = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1206 | |
sepp_nepp | 6:fb11b746ceb5 | 1207 | vcsel_period_reg = (vcsel_period_pclks >> 1) - 1; |
sepp_nepp | 6:fb11b746ceb5 | 1208 | |
sepp_nepp | 6:fb11b746ceb5 | 1209 | return vcsel_period_reg; |
sepp_nepp | 6:fb11b746ceb5 | 1210 | } |
sepp_nepp | 6:fb11b746ceb5 | 1211 | |
sepp_nepp | 8:2fd7cb217068 | 1212 | VL53L0X_Error VL53L0X::wrapped_VL53L0X_set_vcsel_pulse_period(VL53L0X_VcselPeriod vcsel_period_type, uint8_t vcsel_pulse_period_pclk) |
sepp_nepp | 8:2fd7cb217068 | 1213 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1214 | uint8_t vcsel_period_reg; |
sepp_nepp | 6:fb11b746ceb5 | 1215 | uint8_t min_pre_vcsel_period_pclk = 12; |
sepp_nepp | 6:fb11b746ceb5 | 1216 | uint8_t max_pre_vcsel_period_pclk = 18; |
sepp_nepp | 6:fb11b746ceb5 | 1217 | uint8_t min_final_vcsel_period_pclk = 8; |
sepp_nepp | 6:fb11b746ceb5 | 1218 | uint8_t max_final_vcsel_period_pclk = 14; |
sepp_nepp | 11:d8dbe3b87f9f | 1219 | uint32_t measurement_timing_budget_us; |
sepp_nepp | 11:d8dbe3b87f9f | 1220 | uint32_t final_range_timeout_us; |
sepp_nepp | 11:d8dbe3b87f9f | 1221 | uint32_t pre_range_timeout_us; |
sepp_nepp | 11:d8dbe3b87f9f | 1222 | uint32_t msrc_timeout_us; |
sepp_nepp | 6:fb11b746ceb5 | 1223 | uint8_t phase_cal_int = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1224 | |
sepp_nepp | 6:fb11b746ceb5 | 1225 | /* Check if valid clock period requested */ |
sepp_nepp | 6:fb11b746ceb5 | 1226 | |
sepp_nepp | 6:fb11b746ceb5 | 1227 | if ((vcsel_pulse_period_pclk % 2) != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 1228 | /* Value must be an even number */ |
sepp_nepp | 6:fb11b746ceb5 | 1229 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1230 | } else if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_PRE_RANGE && |
sepp_nepp | 6:fb11b746ceb5 | 1231 | (vcsel_pulse_period_pclk < min_pre_vcsel_period_pclk || |
sepp_nepp | 6:fb11b746ceb5 | 1232 | vcsel_pulse_period_pclk > max_pre_vcsel_period_pclk)) { |
sepp_nepp | 6:fb11b746ceb5 | 1233 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1234 | } else if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_FINAL_RANGE && |
sepp_nepp | 6:fb11b746ceb5 | 1235 | (vcsel_pulse_period_pclk < min_final_vcsel_period_pclk || |
sepp_nepp | 6:fb11b746ceb5 | 1236 | vcsel_pulse_period_pclk > max_final_vcsel_period_pclk)) { |
sepp_nepp | 6:fb11b746ceb5 | 1237 | |
sepp_nepp | 6:fb11b746ceb5 | 1238 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1239 | } |
sepp_nepp | 6:fb11b746ceb5 | 1240 | |
sepp_nepp | 6:fb11b746ceb5 | 1241 | /* Apply specific settings for the requested clock period */ |
sepp_nepp | 6:fb11b746ceb5 | 1242 | |
sepp_nepp | 13:253cb4ea3fcc | 1243 | if (status != VL53L0X_ERROR_NONE) { return status; } |
sepp_nepp | 6:fb11b746ceb5 | 1244 | |
sepp_nepp | 6:fb11b746ceb5 | 1245 | if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_PRE_RANGE) { |
sepp_nepp | 6:fb11b746ceb5 | 1246 | |
sepp_nepp | 6:fb11b746ceb5 | 1247 | /* Set phase check limits */ |
sepp_nepp | 6:fb11b746ceb5 | 1248 | if (vcsel_pulse_period_pclk == 12) { |
sepp_nepp | 6:fb11b746ceb5 | 1249 | |
sepp_nepp | 8:2fd7cb217068 | 1250 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH, |
sepp_nepp | 6:fb11b746ceb5 | 1251 | 0x18); |
sepp_nepp | 8:2fd7cb217068 | 1252 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW, |
sepp_nepp | 6:fb11b746ceb5 | 1253 | 0x08); |
sepp_nepp | 6:fb11b746ceb5 | 1254 | } else if (vcsel_pulse_period_pclk == 14) { |
sepp_nepp | 6:fb11b746ceb5 | 1255 | |
sepp_nepp | 8:2fd7cb217068 | 1256 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH, |
sepp_nepp | 6:fb11b746ceb5 | 1257 | 0x30); |
sepp_nepp | 8:2fd7cb217068 | 1258 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW, |
sepp_nepp | 6:fb11b746ceb5 | 1259 | 0x08); |
sepp_nepp | 6:fb11b746ceb5 | 1260 | } else if (vcsel_pulse_period_pclk == 16) { |
sepp_nepp | 6:fb11b746ceb5 | 1261 | |
sepp_nepp | 8:2fd7cb217068 | 1262 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH, |
sepp_nepp | 6:fb11b746ceb5 | 1263 | 0x40); |
sepp_nepp | 8:2fd7cb217068 | 1264 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW, |
sepp_nepp | 6:fb11b746ceb5 | 1265 | 0x08); |
sepp_nepp | 6:fb11b746ceb5 | 1266 | } else if (vcsel_pulse_period_pclk == 18) { |
sepp_nepp | 6:fb11b746ceb5 | 1267 | |
sepp_nepp | 8:2fd7cb217068 | 1268 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH, |
sepp_nepp | 6:fb11b746ceb5 | 1269 | 0x50); |
sepp_nepp | 8:2fd7cb217068 | 1270 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW, |
sepp_nepp | 6:fb11b746ceb5 | 1271 | 0x08); |
sepp_nepp | 6:fb11b746ceb5 | 1272 | } |
sepp_nepp | 6:fb11b746ceb5 | 1273 | } else if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_FINAL_RANGE) { |
sepp_nepp | 6:fb11b746ceb5 | 1274 | if (vcsel_pulse_period_pclk == 8) { |
sepp_nepp | 11:d8dbe3b87f9f | 1275 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,0x10); |
sepp_nepp | 11:d8dbe3b87f9f | 1276 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,0x08); |
sepp_nepp | 8:2fd7cb217068 | 1277 | status |= VL53L0X_write_byte(VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x02); |
sepp_nepp | 8:2fd7cb217068 | 1278 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x0C); |
sepp_nepp | 7:3a1115c2556b | 1279 | status |= VL53L0X_write_byte( 0xff, 0x01); |
sepp_nepp | 11:d8dbe3b87f9f | 1280 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_LIM,0x30); |
sepp_nepp | 7:3a1115c2556b | 1281 | status |= VL53L0X_write_byte( 0xff, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 1282 | } else if (vcsel_pulse_period_pclk == 10) { |
sepp_nepp | 11:d8dbe3b87f9f | 1283 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,0x28); |
sepp_nepp | 11:d8dbe3b87f9f | 1284 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,0x08); |
sepp_nepp | 8:2fd7cb217068 | 1285 | status |= VL53L0X_write_byte(VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x03); |
sepp_nepp | 8:2fd7cb217068 | 1286 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x09); |
sepp_nepp | 7:3a1115c2556b | 1287 | status |= VL53L0X_write_byte( 0xff, 0x01); |
sepp_nepp | 11:d8dbe3b87f9f | 1288 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_LIM,0x20); |
sepp_nepp | 7:3a1115c2556b | 1289 | status |= VL53L0X_write_byte( 0xff, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 1290 | } else if (vcsel_pulse_period_pclk == 12) { |
sepp_nepp | 13:253cb4ea3fcc | 1291 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH, 0x38); |
sepp_nepp | 13:253cb4ea3fcc | 1292 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW, 0x08); |
sepp_nepp | 8:2fd7cb217068 | 1293 | status |= VL53L0X_write_byte(VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x03); |
sepp_nepp | 8:2fd7cb217068 | 1294 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x08); |
sepp_nepp | 7:3a1115c2556b | 1295 | status |= VL53L0X_write_byte( 0xff, 0x01); |
sepp_nepp | 13:253cb4ea3fcc | 1296 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_LIM,0x20); |
sepp_nepp | 7:3a1115c2556b | 1297 | status |= VL53L0X_write_byte( 0xff, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 1298 | } else if (vcsel_pulse_period_pclk == 14) { |
sepp_nepp | 13:253cb4ea3fcc | 1299 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,0x048); |
sepp_nepp | 11:d8dbe3b87f9f | 1300 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,0x08); |
sepp_nepp | 8:2fd7cb217068 | 1301 | status |= VL53L0X_write_byte(VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x03); |
sepp_nepp | 8:2fd7cb217068 | 1302 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x07); |
sepp_nepp | 7:3a1115c2556b | 1303 | status |= VL53L0X_write_byte( 0xff, 0x01); |
sepp_nepp | 11:d8dbe3b87f9f | 1304 | status |= VL53L0X_write_byte(VL53L0X_REG_ALGO_PHASECAL_LIM,0x20); |
sepp_nepp | 7:3a1115c2556b | 1305 | status |= VL53L0X_write_byte( 0xff, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 1306 | } |
sepp_nepp | 6:fb11b746ceb5 | 1307 | } |
sepp_nepp | 6:fb11b746ceb5 | 1308 | |
sepp_nepp | 6:fb11b746ceb5 | 1309 | /* Re-calculate and apply timeouts, in macro periods */ |
sepp_nepp | 6:fb11b746ceb5 | 1310 | |
sepp_nepp | 6:fb11b746ceb5 | 1311 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 1312 | vcsel_period_reg = lv53l0x_encode_vcsel_period((uint8_t) vcsel_pulse_period_pclk); |
sepp_nepp | 6:fb11b746ceb5 | 1313 | |
sepp_nepp | 6:fb11b746ceb5 | 1314 | /* When the VCSEL period for the pre or final range is changed, |
sepp_nepp | 6:fb11b746ceb5 | 1315 | * the corresponding timeout must be read from the device using |
sepp_nepp | 6:fb11b746ceb5 | 1316 | * the current VCSEL period, then the new VCSEL period can be |
sepp_nepp | 6:fb11b746ceb5 | 1317 | * applied. The timeout then must be written back to the device |
sepp_nepp | 6:fb11b746ceb5 | 1318 | * using the new VCSEL period. |
sepp_nepp | 6:fb11b746ceb5 | 1319 | * |
sepp_nepp | 6:fb11b746ceb5 | 1320 | * For the MSRC timeout, the same applies - this timeout being |
sepp_nepp | 6:fb11b746ceb5 | 1321 | * dependant on the pre-range vcsel period. |
sepp_nepp | 6:fb11b746ceb5 | 1322 | */ |
sepp_nepp | 6:fb11b746ceb5 | 1323 | switch (vcsel_period_type) { |
sepp_nepp | 6:fb11b746ceb5 | 1324 | case VL53L0X_VCSEL_PERIOD_PRE_RANGE: |
sepp_nepp | 8:2fd7cb217068 | 1325 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_PRE_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 1326 | &pre_range_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 1327 | |
sepp_nepp | 6:fb11b746ceb5 | 1328 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 1329 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_MSRC, |
sepp_nepp | 11:d8dbe3b87f9f | 1330 | &msrc_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 1331 | |
sepp_nepp | 6:fb11b746ceb5 | 1332 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 1333 | status = VL53L0X_write_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD, |
sepp_nepp | 6:fb11b746ceb5 | 1334 | vcsel_period_reg); |
sepp_nepp | 6:fb11b746ceb5 | 1335 | |
sepp_nepp | 6:fb11b746ceb5 | 1336 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 7:3a1115c2556b | 1337 | status = set_sequence_step_timeout(VL53L0X_SEQUENCESTEP_PRE_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 1338 | pre_range_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 1339 | |
sepp_nepp | 6:fb11b746ceb5 | 1340 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 7:3a1115c2556b | 1341 | status = set_sequence_step_timeout(VL53L0X_SEQUENCESTEP_MSRC, |
sepp_nepp | 11:d8dbe3b87f9f | 1342 | msrc_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 1343 | |
sepp_nepp | 8:2fd7cb217068 | 1344 | Data.PreRangeVcselPulsePeriod = vcsel_pulse_period_pclk; |
sepp_nepp | 6:fb11b746ceb5 | 1345 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1346 | case VL53L0X_VCSEL_PERIOD_FINAL_RANGE: |
sepp_nepp | 7:3a1115c2556b | 1347 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 1348 | &final_range_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 1349 | |
sepp_nepp | 6:fb11b746ceb5 | 1350 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 1351 | status = VL53L0X_write_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD, |
sepp_nepp | 6:fb11b746ceb5 | 1352 | vcsel_period_reg); |
sepp_nepp | 6:fb11b746ceb5 | 1353 | |
sepp_nepp | 6:fb11b746ceb5 | 1354 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 8:2fd7cb217068 | 1355 | status = set_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 1356 | final_range_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 1357 | |
sepp_nepp | 8:2fd7cb217068 | 1358 | Data.FinalRangeVcselPulsePeriod = vcsel_pulse_period_pclk; |
sepp_nepp | 6:fb11b746ceb5 | 1359 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1360 | default: |
sepp_nepp | 6:fb11b746ceb5 | 1361 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1362 | } |
sepp_nepp | 6:fb11b746ceb5 | 1363 | } |
sepp_nepp | 6:fb11b746ceb5 | 1364 | |
sepp_nepp | 6:fb11b746ceb5 | 1365 | /* Finally, the timing budget must be re-applied */ |
sepp_nepp | 6:fb11b746ceb5 | 1366 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 1367 | measurement_timing_budget_us = CurrentParameters.MeasurementTimingBudget_us ; |
sepp_nepp | 11:d8dbe3b87f9f | 1368 | status = VL53L0X_set_measurement_timing_budget_us(measurement_timing_budget_us); |
sepp_nepp | 6:fb11b746ceb5 | 1369 | } |
sepp_nepp | 6:fb11b746ceb5 | 1370 | |
sepp_nepp | 6:fb11b746ceb5 | 1371 | /* Perform the phase calibration. This is needed after changing on |
sepp_nepp | 13:253cb4ea3fcc | 1372 | * vcsel period. get_data_enable = 0, restore_config = 1 */ |
sepp_nepp | 6:fb11b746ceb5 | 1373 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 7:3a1115c2556b | 1374 | status = VL53L0X_perform_phase_calibration(&phase_cal_int, 0, 1); |
sepp_nepp | 6:fb11b746ceb5 | 1375 | |
sepp_nepp | 6:fb11b746ceb5 | 1376 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1377 | } |
sepp_nepp | 6:fb11b746ceb5 | 1378 | |
sepp_nepp | 8:2fd7cb217068 | 1379 | VL53L0X_Error VL53L0X::VL53L0X_set_vcsel_pulse_period(VL53L0X_VcselPeriod vcsel_period_type, uint8_t vcsel_pulse_period) |
sepp_nepp | 8:2fd7cb217068 | 1380 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 13:253cb4ea3fcc | 1381 | |
sepp_nepp | 13:253cb4ea3fcc | 1382 | status = wrapped_VL53L0X_set_vcsel_pulse_period( vcsel_period_type, vcsel_pulse_period); |
sepp_nepp | 13:253cb4ea3fcc | 1383 | |
sepp_nepp | 6:fb11b746ceb5 | 1384 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1385 | } |
sepp_nepp | 6:fb11b746ceb5 | 1386 | |
sepp_nepp | 13:253cb4ea3fcc | 1387 | VL53L0X_Error VL53L0X::VL53L0X_get_vcsel_pulse_period(VL53L0X_VcselPeriod vcsel_period_type, uint8_t *p_vcsel_pulse_period_pclk) |
sepp_nepp | 8:2fd7cb217068 | 1388 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1389 | uint8_t vcsel_period_reg; |
sepp_nepp | 6:fb11b746ceb5 | 1390 | |
sepp_nepp | 6:fb11b746ceb5 | 1391 | switch (vcsel_period_type) { |
sepp_nepp | 6:fb11b746ceb5 | 1392 | case VL53L0X_VCSEL_PERIOD_PRE_RANGE: |
sepp_nepp | 8:2fd7cb217068 | 1393 | status = VL53L0X_read_byte(VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD, |
sepp_nepp | 6:fb11b746ceb5 | 1394 | &vcsel_period_reg); |
sepp_nepp | 6:fb11b746ceb5 | 1395 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1396 | case VL53L0X_VCSEL_PERIOD_FINAL_RANGE: |
sepp_nepp | 8:2fd7cb217068 | 1397 | status = VL53L0X_read_byte(VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD, |
sepp_nepp | 6:fb11b746ceb5 | 1398 | &vcsel_period_reg); |
sepp_nepp | 6:fb11b746ceb5 | 1399 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1400 | default: |
sepp_nepp | 6:fb11b746ceb5 | 1401 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1402 | } |
sepp_nepp | 6:fb11b746ceb5 | 1403 | |
sepp_nepp | 6:fb11b746ceb5 | 1404 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 13:253cb4ea3fcc | 1405 | *p_vcsel_pulse_period_pclk = VL53L0X_decode_vcsel_period(vcsel_period_reg); |
sepp_nepp | 13:253cb4ea3fcc | 1406 | |
sepp_nepp | 6:fb11b746ceb5 | 1407 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1408 | } |
sepp_nepp | 6:fb11b746ceb5 | 1409 | |
sepp_nepp | 6:fb11b746ceb5 | 1410 | uint32_t VL53L0X::VL53L0X_decode_timeout(uint16_t encoded_timeout) |
sepp_nepp | 13:253cb4ea3fcc | 1411 | { /*! Decode 16-bit timeout register value - format (LSByte * 2^MSByte) + 1 */ |
sepp_nepp | 6:fb11b746ceb5 | 1412 | uint32_t timeout_macro_clks = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1413 | |
sepp_nepp | 6:fb11b746ceb5 | 1414 | timeout_macro_clks = ((uint32_t)(encoded_timeout & 0x00FF) |
sepp_nepp | 6:fb11b746ceb5 | 1415 | << (uint32_t)((encoded_timeout & 0xFF00) >> 8)) + 1; |
sepp_nepp | 6:fb11b746ceb5 | 1416 | |
sepp_nepp | 6:fb11b746ceb5 | 1417 | return timeout_macro_clks; |
sepp_nepp | 6:fb11b746ceb5 | 1418 | } |
sepp_nepp | 6:fb11b746ceb5 | 1419 | |
sepp_nepp | 7:3a1115c2556b | 1420 | uint32_t VL53L0X::VL53L0X_calc_macro_period_ps( uint8_t vcsel_period_pclks) |
sepp_nepp | 8:2fd7cb217068 | 1421 | { uint64_t pll_period_ps; |
sepp_nepp | 6:fb11b746ceb5 | 1422 | uint32_t macro_period_vclks; |
sepp_nepp | 6:fb11b746ceb5 | 1423 | uint32_t macro_period_ps; |
sepp_nepp | 6:fb11b746ceb5 | 1424 | |
sepp_nepp | 13:253cb4ea3fcc | 1425 | /* The above calculation will produce rounding errors, therefore set fixed value*/ |
sepp_nepp | 6:fb11b746ceb5 | 1426 | pll_period_ps = 1655; |
sepp_nepp | 6:fb11b746ceb5 | 1427 | macro_period_vclks = 2304; |
sepp_nepp | 6:fb11b746ceb5 | 1428 | macro_period_ps = (uint32_t)(macro_period_vclks |
sepp_nepp | 6:fb11b746ceb5 | 1429 | * vcsel_period_pclks * pll_period_ps); |
sepp_nepp | 6:fb11b746ceb5 | 1430 | return macro_period_ps; |
sepp_nepp | 6:fb11b746ceb5 | 1431 | } |
sepp_nepp | 6:fb11b746ceb5 | 1432 | |
sepp_nepp | 6:fb11b746ceb5 | 1433 | /* To convert register value into us */ |
sepp_nepp | 8:2fd7cb217068 | 1434 | uint32_t VL53L0X::VL53L0X_calc_timeout_us(uint16_t timeout_period_mclks, |
sepp_nepp | 6:fb11b746ceb5 | 1435 | uint8_t vcsel_period_pclks) |
sepp_nepp | 8:2fd7cb217068 | 1436 | { uint32_t macro_period_ps; |
sepp_nepp | 6:fb11b746ceb5 | 1437 | uint32_t macro_period_ns; |
sepp_nepp | 6:fb11b746ceb5 | 1438 | uint32_t actual_timeout_period_us = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1439 | |
sepp_nepp | 7:3a1115c2556b | 1440 | macro_period_ps = VL53L0X_calc_macro_period_ps( vcsel_period_pclks); |
sepp_nepp | 6:fb11b746ceb5 | 1441 | macro_period_ns = (macro_period_ps + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 1442 | |
sepp_nepp | 6:fb11b746ceb5 | 1443 | actual_timeout_period_us = |
sepp_nepp | 6:fb11b746ceb5 | 1444 | ((timeout_period_mclks * macro_period_ns) + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 1445 | |
sepp_nepp | 6:fb11b746ceb5 | 1446 | return actual_timeout_period_us; |
sepp_nepp | 6:fb11b746ceb5 | 1447 | } |
sepp_nepp | 6:fb11b746ceb5 | 1448 | |
sepp_nepp | 8:2fd7cb217068 | 1449 | VL53L0X_Error VL53L0X::get_sequence_step_timeout(VL53L0X_SequenceStepId sequence_step_id, |
sepp_nepp | 6:fb11b746ceb5 | 1450 | uint32_t *p_time_out_micro_secs) |
sepp_nepp | 8:2fd7cb217068 | 1451 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1452 | uint8_t current_vcsel_pulse_period_p_clk; |
sepp_nepp | 6:fb11b746ceb5 | 1453 | uint8_t encoded_time_out_byte = 0; |
sepp_nepp | 11:d8dbe3b87f9f | 1454 | uint32_t timeout_us = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1455 | uint16_t pre_range_encoded_time_out = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1456 | uint16_t msrc_time_out_m_clks; |
sepp_nepp | 6:fb11b746ceb5 | 1457 | uint16_t pre_range_time_out_m_clks; |
sepp_nepp | 6:fb11b746ceb5 | 1458 | uint16_t final_range_time_out_m_clks = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1459 | uint16_t final_range_encoded_time_out; |
sepp_nepp | 6:fb11b746ceb5 | 1460 | VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps; |
sepp_nepp | 6:fb11b746ceb5 | 1461 | |
sepp_nepp | 6:fb11b746ceb5 | 1462 | if ((sequence_step_id == VL53L0X_SEQUENCESTEP_TCC) || |
sepp_nepp | 6:fb11b746ceb5 | 1463 | (sequence_step_id == VL53L0X_SEQUENCESTEP_DSS) || |
sepp_nepp | 6:fb11b746ceb5 | 1464 | (sequence_step_id == VL53L0X_SEQUENCESTEP_MSRC)) { |
sepp_nepp | 6:fb11b746ceb5 | 1465 | |
sepp_nepp | 8:2fd7cb217068 | 1466 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 1467 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1468 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1469 | status = VL53L0X_read_byte(VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP, |
sepp_nepp | 6:fb11b746ceb5 | 1470 | &encoded_time_out_byte); |
sepp_nepp | 6:fb11b746ceb5 | 1471 | } |
sepp_nepp | 6:fb11b746ceb5 | 1472 | msrc_time_out_m_clks = VL53L0X_decode_timeout(encoded_time_out_byte); |
sepp_nepp | 6:fb11b746ceb5 | 1473 | |
sepp_nepp | 11:d8dbe3b87f9f | 1474 | timeout_us = VL53L0X_calc_timeout_us(msrc_time_out_m_clks, |
sepp_nepp | 6:fb11b746ceb5 | 1475 | current_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1476 | } else if (sequence_step_id == VL53L0X_SEQUENCESTEP_PRE_RANGE) { |
sepp_nepp | 6:fb11b746ceb5 | 1477 | /* Retrieve PRE-RANGE VCSEL Period */ |
sepp_nepp | 8:2fd7cb217068 | 1478 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 1479 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1480 | |
sepp_nepp | 6:fb11b746ceb5 | 1481 | /* Retrieve PRE-RANGE Timeout in Macro periods (MCLKS) */ |
sepp_nepp | 6:fb11b746ceb5 | 1482 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1483 | |
sepp_nepp | 6:fb11b746ceb5 | 1484 | /* Retrieve PRE-RANGE VCSEL Period */ |
sepp_nepp | 8:2fd7cb217068 | 1485 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 1486 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1487 | |
sepp_nepp | 6:fb11b746ceb5 | 1488 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1489 | status = VL53L0X_read_word(VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI, |
sepp_nepp | 6:fb11b746ceb5 | 1490 | &pre_range_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 1491 | } |
sepp_nepp | 6:fb11b746ceb5 | 1492 | |
sepp_nepp | 8:2fd7cb217068 | 1493 | pre_range_time_out_m_clks = VL53L0X_decode_timeout(pre_range_encoded_time_out); |
sepp_nepp | 8:2fd7cb217068 | 1494 | |
sepp_nepp | 11:d8dbe3b87f9f | 1495 | timeout_us = VL53L0X_calc_timeout_us(pre_range_time_out_m_clks, |
sepp_nepp | 6:fb11b746ceb5 | 1496 | current_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1497 | } |
sepp_nepp | 6:fb11b746ceb5 | 1498 | } else if (sequence_step_id == VL53L0X_SEQUENCESTEP_FINAL_RANGE) { |
sepp_nepp | 6:fb11b746ceb5 | 1499 | |
sepp_nepp | 7:3a1115c2556b | 1500 | VL53L0X_get_sequence_step_enables( &scheduler_sequence_steps); |
sepp_nepp | 6:fb11b746ceb5 | 1501 | pre_range_time_out_m_clks = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1502 | |
sepp_nepp | 6:fb11b746ceb5 | 1503 | if (scheduler_sequence_steps.PreRangeOn) { |
sepp_nepp | 6:fb11b746ceb5 | 1504 | /* Retrieve PRE-RANGE VCSEL Period */ |
sepp_nepp | 8:2fd7cb217068 | 1505 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 1506 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1507 | |
sepp_nepp | 6:fb11b746ceb5 | 1508 | /* Retrieve PRE-RANGE Timeout in Macro periods |
sepp_nepp | 6:fb11b746ceb5 | 1509 | * (MCLKS) */ |
sepp_nepp | 6:fb11b746ceb5 | 1510 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1511 | status = VL53L0X_read_word(VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI, |
sepp_nepp | 6:fb11b746ceb5 | 1512 | &pre_range_encoded_time_out); |
sepp_nepp | 8:2fd7cb217068 | 1513 | pre_range_time_out_m_clks = VL53L0X_decode_timeout(pre_range_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 1514 | } |
sepp_nepp | 6:fb11b746ceb5 | 1515 | } |
sepp_nepp | 6:fb11b746ceb5 | 1516 | |
sepp_nepp | 6:fb11b746ceb5 | 1517 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1518 | /* Retrieve FINAL-RANGE VCSEL Period */ |
sepp_nepp | 8:2fd7cb217068 | 1519 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_FINAL_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 1520 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1521 | } |
sepp_nepp | 6:fb11b746ceb5 | 1522 | |
sepp_nepp | 6:fb11b746ceb5 | 1523 | /* Retrieve FINAL-RANGE Timeout in Macro periods (MCLKS) */ |
sepp_nepp | 6:fb11b746ceb5 | 1524 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1525 | status = VL53L0X_read_word(VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI, |
sepp_nepp | 6:fb11b746ceb5 | 1526 | &final_range_encoded_time_out); |
sepp_nepp | 8:2fd7cb217068 | 1527 | final_range_time_out_m_clks = VL53L0X_decode_timeout(final_range_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 1528 | } |
sepp_nepp | 6:fb11b746ceb5 | 1529 | |
sepp_nepp | 6:fb11b746ceb5 | 1530 | final_range_time_out_m_clks -= pre_range_time_out_m_clks; |
sepp_nepp | 11:d8dbe3b87f9f | 1531 | timeout_us = VL53L0X_calc_timeout_us(final_range_time_out_m_clks, |
sepp_nepp | 6:fb11b746ceb5 | 1532 | current_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 1533 | } |
sepp_nepp | 6:fb11b746ceb5 | 1534 | |
sepp_nepp | 11:d8dbe3b87f9f | 1535 | *p_time_out_micro_secs = timeout_us; |
sepp_nepp | 6:fb11b746ceb5 | 1536 | |
sepp_nepp | 6:fb11b746ceb5 | 1537 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1538 | } |
sepp_nepp | 6:fb11b746ceb5 | 1539 | |
sepp_nepp | 13:253cb4ea3fcc | 1540 | VL53L0X_Error VL53L0X::VL53L0X_get_measurement_timing_budget_us(uint32_t *p_measurement_timing_budget_us) |
sepp_nepp | 8:2fd7cb217068 | 1541 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1542 | VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps; |
sepp_nepp | 11:d8dbe3b87f9f | 1543 | uint32_t final_range_timeout_us; |
sepp_nepp | 11:d8dbe3b87f9f | 1544 | uint32_t msrc_dcc_tcc_timeout_us = 2000; |
sepp_nepp | 11:d8dbe3b87f9f | 1545 | uint32_t start_overhead_us = 1910; |
sepp_nepp | 11:d8dbe3b87f9f | 1546 | uint32_t end_overhead_us = 960; |
sepp_nepp | 11:d8dbe3b87f9f | 1547 | uint32_t msrc_overhead_us = 660; |
sepp_nepp | 11:d8dbe3b87f9f | 1548 | uint32_t tcc_overhead_us = 590; |
sepp_nepp | 11:d8dbe3b87f9f | 1549 | uint32_t dss_overhead_us = 690; |
sepp_nepp | 11:d8dbe3b87f9f | 1550 | uint32_t pre_range_overhead_us = 660; |
sepp_nepp | 11:d8dbe3b87f9f | 1551 | uint32_t final_range_overhead_us = 550; |
sepp_nepp | 11:d8dbe3b87f9f | 1552 | uint32_t pre_range_timeout_us = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1553 | |
sepp_nepp | 6:fb11b746ceb5 | 1554 | /* Start and end overhead times always present */ |
sepp_nepp | 11:d8dbe3b87f9f | 1555 | *p_measurement_timing_budget_us |
sepp_nepp | 11:d8dbe3b87f9f | 1556 | = start_overhead_us + end_overhead_us; |
sepp_nepp | 6:fb11b746ceb5 | 1557 | |
sepp_nepp | 7:3a1115c2556b | 1558 | status = VL53L0X_get_sequence_step_enables( &scheduler_sequence_steps); |
sepp_nepp | 6:fb11b746ceb5 | 1559 | |
sepp_nepp | 13:253cb4ea3fcc | 1560 | if (status != VL53L0X_ERROR_NONE) { return status; } |
sepp_nepp | 6:fb11b746ceb5 | 1561 | |
sepp_nepp | 6:fb11b746ceb5 | 1562 | if (scheduler_sequence_steps.TccOn || |
sepp_nepp | 6:fb11b746ceb5 | 1563 | scheduler_sequence_steps.MsrcOn || |
sepp_nepp | 6:fb11b746ceb5 | 1564 | scheduler_sequence_steps.DssOn) { |
sepp_nepp | 6:fb11b746ceb5 | 1565 | |
sepp_nepp | 8:2fd7cb217068 | 1566 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_MSRC, |
sepp_nepp | 11:d8dbe3b87f9f | 1567 | &msrc_dcc_tcc_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 1568 | |
sepp_nepp | 6:fb11b746ceb5 | 1569 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1570 | if (scheduler_sequence_steps.TccOn) { |
sepp_nepp | 11:d8dbe3b87f9f | 1571 | *p_measurement_timing_budget_us += |
sepp_nepp | 13:253cb4ea3fcc | 1572 | msrc_dcc_tcc_timeout_us + tcc_overhead_us; |
sepp_nepp | 6:fb11b746ceb5 | 1573 | } |
sepp_nepp | 6:fb11b746ceb5 | 1574 | |
sepp_nepp | 6:fb11b746ceb5 | 1575 | if (scheduler_sequence_steps.DssOn) { |
sepp_nepp | 11:d8dbe3b87f9f | 1576 | *p_measurement_timing_budget_us += |
sepp_nepp | 13:253cb4ea3fcc | 1577 | 2 * (msrc_dcc_tcc_timeout_us + dss_overhead_us); |
sepp_nepp | 6:fb11b746ceb5 | 1578 | } else if (scheduler_sequence_steps.MsrcOn) { |
sepp_nepp | 11:d8dbe3b87f9f | 1579 | *p_measurement_timing_budget_us += |
sepp_nepp | 13:253cb4ea3fcc | 1580 | msrc_dcc_tcc_timeout_us + msrc_overhead_us; |
sepp_nepp | 6:fb11b746ceb5 | 1581 | } |
sepp_nepp | 6:fb11b746ceb5 | 1582 | } |
sepp_nepp | 6:fb11b746ceb5 | 1583 | } |
sepp_nepp | 6:fb11b746ceb5 | 1584 | |
sepp_nepp | 6:fb11b746ceb5 | 1585 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1586 | if (scheduler_sequence_steps.PreRangeOn) { |
sepp_nepp | 8:2fd7cb217068 | 1587 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_PRE_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 1588 | &pre_range_timeout_us); |
sepp_nepp | 11:d8dbe3b87f9f | 1589 | *p_measurement_timing_budget_us += |
sepp_nepp | 13:253cb4ea3fcc | 1590 | pre_range_timeout_us + pre_range_overhead_us; |
sepp_nepp | 6:fb11b746ceb5 | 1591 | } |
sepp_nepp | 6:fb11b746ceb5 | 1592 | } |
sepp_nepp | 6:fb11b746ceb5 | 1593 | |
sepp_nepp | 6:fb11b746ceb5 | 1594 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1595 | if (scheduler_sequence_steps.FinalRangeOn) { |
sepp_nepp | 8:2fd7cb217068 | 1596 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 1597 | &final_range_timeout_us); |
sepp_nepp | 11:d8dbe3b87f9f | 1598 | *p_measurement_timing_budget_us += |
sepp_nepp | 13:253cb4ea3fcc | 1599 | (final_range_timeout_us + final_range_overhead_us); |
sepp_nepp | 6:fb11b746ceb5 | 1600 | } |
sepp_nepp | 6:fb11b746ceb5 | 1601 | } |
sepp_nepp | 6:fb11b746ceb5 | 1602 | |
sepp_nepp | 6:fb11b746ceb5 | 1603 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 13:253cb4ea3fcc | 1604 | CurrentParameters.MeasurementTimingBudget_us = *p_measurement_timing_budget_us;} |
sepp_nepp | 13:253cb4ea3fcc | 1605 | |
sepp_nepp | 6:fb11b746ceb5 | 1606 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1607 | } |
sepp_nepp | 6:fb11b746ceb5 | 1608 | |
sepp_nepp | 8:2fd7cb217068 | 1609 | VL53L0X_Error VL53L0X::VL53L0X_get_device_parameters(VL53L0X_DeviceParameters_t *p_device_parameters) |
sepp_nepp | 8:2fd7cb217068 | 1610 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1611 | int i; |
sepp_nepp | 6:fb11b746ceb5 | 1612 | |
sepp_nepp | 13:253cb4ea3fcc | 1613 | p_device_parameters->DeviceMode = CurrentParameters.DeviceMode; |
sepp_nepp | 6:fb11b746ceb5 | 1614 | |
sepp_nepp | 6:fb11b746ceb5 | 1615 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 11:d8dbe3b87f9f | 1616 | status = VL53L0X_get_inter_measurement_period_ms(&(p_device_parameters->InterMeasurementPeriod_ms)); |
sepp_nepp | 6:fb11b746ceb5 | 1617 | |
sepp_nepp | 6:fb11b746ceb5 | 1618 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1619 | p_device_parameters->XTalkCompensationEnable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1620 | } |
sepp_nepp | 6:fb11b746ceb5 | 1621 | |
sepp_nepp | 6:fb11b746ceb5 | 1622 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 11:d8dbe3b87f9f | 1623 | status = VL53L0X_get_x_talk_compensation_rate_MHz(&(p_device_parameters->XTalkCompensationRate_MHz)); |
sepp_nepp | 6:fb11b746ceb5 | 1624 | |
sepp_nepp | 6:fb11b746ceb5 | 1625 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 11:d8dbe3b87f9f | 1626 | status = VL53L0X_get_offset_calibration_data_micro_meter(&(p_device_parameters->RangeOffset_um)); |
sepp_nepp | 6:fb11b746ceb5 | 1627 | |
sepp_nepp | 6:fb11b746ceb5 | 1628 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1629 | for (i = 0; i < VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS; i++) { |
sepp_nepp | 6:fb11b746ceb5 | 1630 | /* get first the values, then the enables. |
sepp_nepp | 6:fb11b746ceb5 | 1631 | * VL53L0X_GetLimitCheckValue will modify the enable |
sepp_nepp | 6:fb11b746ceb5 | 1632 | * flags |
sepp_nepp | 6:fb11b746ceb5 | 1633 | */ |
sepp_nepp | 6:fb11b746ceb5 | 1634 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1635 | status |= VL53L0X_get_limit_check_value( i, |
sepp_nepp | 6:fb11b746ceb5 | 1636 | &(p_device_parameters->LimitChecksValue[i])); |
sepp_nepp | 6:fb11b746ceb5 | 1637 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1638 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1639 | } |
sepp_nepp | 6:fb11b746ceb5 | 1640 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1641 | status |= VL53L0X_get_limit_check_enable( i, |
sepp_nepp | 6:fb11b746ceb5 | 1642 | &(p_device_parameters->LimitChecksEnable[i])); |
sepp_nepp | 6:fb11b746ceb5 | 1643 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1644 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1645 | } |
sepp_nepp | 6:fb11b746ceb5 | 1646 | } |
sepp_nepp | 6:fb11b746ceb5 | 1647 | } |
sepp_nepp | 6:fb11b746ceb5 | 1648 | |
sepp_nepp | 6:fb11b746ceb5 | 1649 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1650 | status = VL53L0X_get_wrap_around_check_enable(&(p_device_parameters->WrapAroundCheckEnable)); |
sepp_nepp | 6:fb11b746ceb5 | 1651 | } |
sepp_nepp | 6:fb11b746ceb5 | 1652 | |
sepp_nepp | 6:fb11b746ceb5 | 1653 | /* Need to be done at the end as it uses VCSELPulsePeriod */ |
sepp_nepp | 6:fb11b746ceb5 | 1654 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 1655 | status = VL53L0X_get_measurement_timing_budget_us(&(p_device_parameters->MeasurementTimingBudget_us)); |
sepp_nepp | 6:fb11b746ceb5 | 1656 | } |
sepp_nepp | 6:fb11b746ceb5 | 1657 | |
sepp_nepp | 6:fb11b746ceb5 | 1658 | |
sepp_nepp | 6:fb11b746ceb5 | 1659 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1660 | } |
sepp_nepp | 6:fb11b746ceb5 | 1661 | |
sepp_nepp | 7:3a1115c2556b | 1662 | VL53L0X_Error VL53L0X::VL53L0X_set_limit_check_value( uint16_t limit_check_id, |
sepp_nepp | 6:fb11b746ceb5 | 1663 | FixPoint1616_t limit_check_value) |
sepp_nepp | 8:2fd7cb217068 | 1664 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1665 | uint8_t temp8; |
sepp_nepp | 6:fb11b746ceb5 | 1666 | |
sepp_nepp | 10:cd1758e186a4 | 1667 | temp8 = CurrentParameters.LimitChecksEnable[limit_check_id]; |
sepp_nepp | 6:fb11b746ceb5 | 1668 | |
sepp_nepp | 6:fb11b746ceb5 | 1669 | if (temp8 == 0) { /* disabled write only internal value */ |
sepp_nepp | 10:cd1758e186a4 | 1670 | CurrentParameters.LimitChecksValue[limit_check_id] = limit_check_value; |
sepp_nepp | 6:fb11b746ceb5 | 1671 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1672 | |
sepp_nepp | 6:fb11b746ceb5 | 1673 | switch (limit_check_id) { |
sepp_nepp | 6:fb11b746ceb5 | 1674 | |
sepp_nepp | 13:253cb4ea3fcc | 1675 | case VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE:/* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 1676 | CurrentParameters.LimitChecksValue[VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE] = limit_check_value; |
sepp_nepp | 6:fb11b746ceb5 | 1677 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1678 | |
sepp_nepp | 6:fb11b746ceb5 | 1679 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE: |
sepp_nepp | 8:2fd7cb217068 | 1680 | status = VL53L0X_write_word(VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT, |
sepp_nepp | 11:d8dbe3b87f9f | 1681 | VL53L0X_FP1616TOFP97(limit_check_value)); |
sepp_nepp | 6:fb11b746ceb5 | 1682 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1683 | |
sepp_nepp | 13:253cb4ea3fcc | 1684 | case VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP:/* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 1685 | CurrentParameters.LimitChecksValue[VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP] = limit_check_value; |
sepp_nepp | 6:fb11b746ceb5 | 1686 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1687 | |
sepp_nepp | 13:253cb4ea3fcc | 1688 | case VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD:/* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 1689 | CurrentParameters.LimitChecksValue[VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD] = limit_check_value; |
sepp_nepp | 6:fb11b746ceb5 | 1690 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1691 | |
sepp_nepp | 6:fb11b746ceb5 | 1692 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC: |
sepp_nepp | 6:fb11b746ceb5 | 1693 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE: |
sepp_nepp | 8:2fd7cb217068 | 1694 | status = VL53L0X_write_word(VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT, |
sepp_nepp | 11:d8dbe3b87f9f | 1695 | VL53L0X_FP1616TOFP97(limit_check_value)); |
sepp_nepp | 6:fb11b746ceb5 | 1696 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1697 | |
sepp_nepp | 6:fb11b746ceb5 | 1698 | default: |
sepp_nepp | 6:fb11b746ceb5 | 1699 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 1700 | } |
sepp_nepp | 6:fb11b746ceb5 | 1701 | |
sepp_nepp | 6:fb11b746ceb5 | 1702 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 10:cd1758e186a4 | 1703 | CurrentParameters.LimitChecksValue[limit_check_id] = limit_check_value; |
sepp_nepp | 6:fb11b746ceb5 | 1704 | } |
sepp_nepp | 6:fb11b746ceb5 | 1705 | } |
sepp_nepp | 6:fb11b746ceb5 | 1706 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1707 | } |
sepp_nepp | 6:fb11b746ceb5 | 1708 | |
sepp_nepp | 10:cd1758e186a4 | 1709 | // instead of passing VL53L0X_DeviceInfo_t *p_VL53L0X_device_info, directly fill Device_Info |
sepp_nepp | 10:cd1758e186a4 | 1710 | VL53L0X_Error VL53L0X::VL53L0X_get_device_info() |
sepp_nepp | 8:2fd7cb217068 | 1711 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 10:cd1758e186a4 | 1712 | uint8_t revision_id; |
sepp_nepp | 10:cd1758e186a4 | 1713 | uint8_t revision; |
sepp_nepp | 6:fb11b746ceb5 | 1714 | char *product_id_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 1715 | |
sepp_nepp | 7:3a1115c2556b | 1716 | status = VL53L0X_get_info_from_device( 2); |
sepp_nepp | 6:fb11b746ceb5 | 1717 | |
sepp_nepp | 6:fb11b746ceb5 | 1718 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 10:cd1758e186a4 | 1719 | if (Data.ModuleId == 0) { |
sepp_nepp | 10:cd1758e186a4 | 1720 | revision = 0; |
sepp_nepp | 10:cd1758e186a4 | 1721 | VL53L0X_COPYSTRING(Device_Info.ProductId, ""); |
sepp_nepp | 6:fb11b746ceb5 | 1722 | } else { |
sepp_nepp | 10:cd1758e186a4 | 1723 | revision = Data.Revision; |
sepp_nepp | 8:2fd7cb217068 | 1724 | product_id_tmp = Data.ProductId; |
sepp_nepp | 10:cd1758e186a4 | 1725 | VL53L0X_COPYSTRING(Device_Info.ProductId, product_id_tmp); |
sepp_nepp | 6:fb11b746ceb5 | 1726 | } |
sepp_nepp | 6:fb11b746ceb5 | 1727 | } |
sepp_nepp | 10:cd1758e186a4 | 1728 | |
sepp_nepp | 10:cd1758e186a4 | 1729 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1730 | if (revision == 0) { |
sepp_nepp | 10:cd1758e186a4 | 1731 | VL53L0X_COPYSTRING(Device_Info.Name, |
sepp_nepp | 6:fb11b746ceb5 | 1732 | VL53L0X_STRING_DEVICE_INFO_NAME_TS0); |
sepp_nepp | 6:fb11b746ceb5 | 1733 | } else if ((revision <= 34) && (revision != 32)) { |
sepp_nepp | 10:cd1758e186a4 | 1734 | VL53L0X_COPYSTRING(Device_Info.Name, |
sepp_nepp | 6:fb11b746ceb5 | 1735 | VL53L0X_STRING_DEVICE_INFO_NAME_TS1); |
sepp_nepp | 6:fb11b746ceb5 | 1736 | } else if (revision < 39) { |
sepp_nepp | 10:cd1758e186a4 | 1737 | VL53L0X_COPYSTRING(Device_Info.Name, |
sepp_nepp | 6:fb11b746ceb5 | 1738 | VL53L0X_STRING_DEVICE_INFO_NAME_TS2); |
sepp_nepp | 10:cd1758e186a4 | 1739 | } else {VL53L0X_COPYSTRING(Device_Info.Name, |
sepp_nepp | 6:fb11b746ceb5 | 1740 | VL53L0X_STRING_DEVICE_INFO_NAME_ES1); |
sepp_nepp | 6:fb11b746ceb5 | 1741 | } |
sepp_nepp | 6:fb11b746ceb5 | 1742 | |
sepp_nepp | 10:cd1758e186a4 | 1743 | VL53L0X_COPYSTRING(Device_Info.Type, VL53L0X_STRING_DEVICE_INFO_TYPE); |
sepp_nepp | 6:fb11b746ceb5 | 1744 | } |
sepp_nepp | 6:fb11b746ceb5 | 1745 | |
sepp_nepp | 6:fb11b746ceb5 | 1746 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1747 | status = VL53L0X_read_byte( VL53L0X_REG_IDENTIFICATION_MODEL_ID, |
sepp_nepp | 10:cd1758e186a4 | 1748 | &Device_Info.ProductType);} |
sepp_nepp | 6:fb11b746ceb5 | 1749 | |
sepp_nepp | 6:fb11b746ceb5 | 1750 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1751 | status = VL53L0X_read_byte(VL53L0X_REG_IDENTIFICATION_REVISION_ID, |
sepp_nepp | 6:fb11b746ceb5 | 1752 | &revision_id); |
sepp_nepp | 10:cd1758e186a4 | 1753 | Device_Info.ProductRevisionMajor = 1; |
sepp_nepp | 10:cd1758e186a4 | 1754 | Device_Info.ProductRevisionMinor = |
sepp_nepp | 6:fb11b746ceb5 | 1755 | (revision_id & 0xF0) >> 4; |
sepp_nepp | 6:fb11b746ceb5 | 1756 | } |
sepp_nepp | 6:fb11b746ceb5 | 1757 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1758 | } |
sepp_nepp | 6:fb11b746ceb5 | 1759 | |
sepp_nepp | 8:2fd7cb217068 | 1760 | VL53L0X_Error VL53L0X::VL53L0X_get_interrupt_mask_status(uint32_t *p_interrupt_mask_status) |
sepp_nepp | 7:3a1115c2556b | 1761 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1762 | uint8_t byte; |
sepp_nepp | 6:fb11b746ceb5 | 1763 | |
sepp_nepp | 7:3a1115c2556b | 1764 | status = VL53L0X_read_byte( VL53L0X_REG_RESULT_INTERRUPT_STATUS, &byte); |
sepp_nepp | 6:fb11b746ceb5 | 1765 | *p_interrupt_mask_status = byte & 0x07; |
sepp_nepp | 6:fb11b746ceb5 | 1766 | |
sepp_nepp | 7:3a1115c2556b | 1767 | if (byte & 0x18) { status = VL53L0X_ERROR_RANGE_ERROR;} |
sepp_nepp | 7:3a1115c2556b | 1768 | |
sepp_nepp | 6:fb11b746ceb5 | 1769 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1770 | } |
sepp_nepp | 6:fb11b746ceb5 | 1771 | |
sepp_nepp | 8:2fd7cb217068 | 1772 | VL53L0X_Error VL53L0X::VL53L0X_get_measurement_data_ready(uint8_t *p_measurement_data_ready) |
sepp_nepp | 7:3a1115c2556b | 1773 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1774 | uint8_t sys_range_status_register; |
sepp_nepp | 6:fb11b746ceb5 | 1775 | uint8_t interrupt_config; |
sepp_nepp | 6:fb11b746ceb5 | 1776 | uint32_t interrupt_mask; |
sepp_nepp | 6:fb11b746ceb5 | 1777 | |
sepp_nepp | 8:2fd7cb217068 | 1778 | interrupt_config = Data.Pin0GpioFunctionality; |
sepp_nepp | 6:fb11b746ceb5 | 1779 | |
sepp_nepp | 6:fb11b746ceb5 | 1780 | if (interrupt_config == |
sepp_nepp | 6:fb11b746ceb5 | 1781 | VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY) { |
sepp_nepp | 7:3a1115c2556b | 1782 | status = VL53L0X_get_interrupt_mask_status( &interrupt_mask); |
sepp_nepp | 6:fb11b746ceb5 | 1783 | if (interrupt_mask == |
sepp_nepp | 6:fb11b746ceb5 | 1784 | VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY) { |
sepp_nepp | 6:fb11b746ceb5 | 1785 | *p_measurement_data_ready = 1; |
sepp_nepp | 6:fb11b746ceb5 | 1786 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1787 | *p_measurement_data_ready = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1788 | } |
sepp_nepp | 6:fb11b746ceb5 | 1789 | } else { |
sepp_nepp | 7:3a1115c2556b | 1790 | status = VL53L0X_read_byte( VL53L0X_REG_RESULT_RANGE_STATUS, |
sepp_nepp | 6:fb11b746ceb5 | 1791 | &sys_range_status_register); |
sepp_nepp | 6:fb11b746ceb5 | 1792 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 1793 | if (sys_range_status_register & 0x01) { |
sepp_nepp | 6:fb11b746ceb5 | 1794 | *p_measurement_data_ready = 1; |
sepp_nepp | 7:3a1115c2556b | 1795 | } else { *p_measurement_data_ready = 0; } |
sepp_nepp | 6:fb11b746ceb5 | 1796 | } |
sepp_nepp | 6:fb11b746ceb5 | 1797 | } |
sepp_nepp | 6:fb11b746ceb5 | 1798 | |
sepp_nepp | 6:fb11b746ceb5 | 1799 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1800 | } |
sepp_nepp | 6:fb11b746ceb5 | 1801 | |
sepp_nepp | 7:3a1115c2556b | 1802 | VL53L0X_Error VL53L0X::VL53L0X_polling_delay(void) |
sepp_nepp | 7:3a1115c2556b | 1803 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1804 | |
sepp_nepp | 6:fb11b746ceb5 | 1805 | // do nothing |
sepp_nepp | 6:fb11b746ceb5 | 1806 | VL53L0X_OsDelay(); |
sepp_nepp | 6:fb11b746ceb5 | 1807 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1808 | } |
sepp_nepp | 6:fb11b746ceb5 | 1809 | |
sepp_nepp | 7:3a1115c2556b | 1810 | VL53L0X_Error VL53L0X::VL53L0X_measurement_poll_for_completion(void) |
sepp_nepp | 7:3a1115c2556b | 1811 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1812 | uint8_t new_data_ready = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1813 | uint32_t loop_nb; |
sepp_nepp | 6:fb11b746ceb5 | 1814 | |
sepp_nepp | 6:fb11b746ceb5 | 1815 | loop_nb = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1816 | |
sepp_nepp | 12:81f37e50f8f8 | 1817 | do { |
sepp_nepp | 12:81f37e50f8f8 | 1818 | status = VL53L0X_get_measurement_data_ready( &new_data_ready); |
sepp_nepp | 6:fb11b746ceb5 | 1819 | if (status != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 1820 | break; /* the error is set */ |
sepp_nepp | 6:fb11b746ceb5 | 1821 | } |
sepp_nepp | 6:fb11b746ceb5 | 1822 | |
sepp_nepp | 6:fb11b746ceb5 | 1823 | if (new_data_ready == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 1824 | break; /* done note that status == 0 */ |
sepp_nepp | 6:fb11b746ceb5 | 1825 | } |
sepp_nepp | 6:fb11b746ceb5 | 1826 | |
sepp_nepp | 6:fb11b746ceb5 | 1827 | loop_nb++; |
sepp_nepp | 6:fb11b746ceb5 | 1828 | if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) { |
sepp_nepp | 6:fb11b746ceb5 | 1829 | status = VL53L0X_ERROR_TIME_OUT; |
sepp_nepp | 6:fb11b746ceb5 | 1830 | break; |
sepp_nepp | 6:fb11b746ceb5 | 1831 | } |
sepp_nepp | 6:fb11b746ceb5 | 1832 | |
sepp_nepp | 7:3a1115c2556b | 1833 | VL53L0X_polling_delay(); |
sepp_nepp | 6:fb11b746ceb5 | 1834 | } while (1); |
sepp_nepp | 6:fb11b746ceb5 | 1835 | |
sepp_nepp | 6:fb11b746ceb5 | 1836 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1837 | } |
sepp_nepp | 6:fb11b746ceb5 | 1838 | |
sepp_nepp | 6:fb11b746ceb5 | 1839 | /* Group PAL Interrupt Functions */ |
sepp_nepp | 7:3a1115c2556b | 1840 | VL53L0X_Error VL53L0X::VL53L0X_clear_interrupt_mask( uint32_t interrupt_mask) |
sepp_nepp | 7:3a1115c2556b | 1841 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1842 | uint8_t loop_count; |
sepp_nepp | 6:fb11b746ceb5 | 1843 | uint8_t byte; |
sepp_nepp | 6:fb11b746ceb5 | 1844 | |
sepp_nepp | 6:fb11b746ceb5 | 1845 | /* clear bit 0 range interrupt, bit 1 error interrupt */ |
sepp_nepp | 6:fb11b746ceb5 | 1846 | loop_count = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1847 | do { |
sepp_nepp | 7:3a1115c2556b | 1848 | status = VL53L0X_write_byte(VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR, 0x01); |
sepp_nepp | 7:3a1115c2556b | 1849 | status |= VL53L0X_write_byte(VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR, 0x00); |
sepp_nepp | 7:3a1115c2556b | 1850 | status |= VL53L0X_read_byte(VL53L0X_REG_RESULT_INTERRUPT_STATUS, &byte); |
sepp_nepp | 6:fb11b746ceb5 | 1851 | loop_count++; |
sepp_nepp | 6:fb11b746ceb5 | 1852 | } while (((byte & 0x07) != 0x00) |
sepp_nepp | 6:fb11b746ceb5 | 1853 | && (loop_count < 3) |
sepp_nepp | 6:fb11b746ceb5 | 1854 | && (status == VL53L0X_ERROR_NONE)); |
sepp_nepp | 6:fb11b746ceb5 | 1855 | |
sepp_nepp | 6:fb11b746ceb5 | 1856 | if (loop_count >= 3) { |
sepp_nepp | 6:fb11b746ceb5 | 1857 | status = VL53L0X_ERROR_INTERRUPT_NOT_CLEARED; |
sepp_nepp | 6:fb11b746ceb5 | 1858 | } |
sepp_nepp | 6:fb11b746ceb5 | 1859 | |
sepp_nepp | 6:fb11b746ceb5 | 1860 | |
sepp_nepp | 6:fb11b746ceb5 | 1861 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1862 | } |
sepp_nepp | 6:fb11b746ceb5 | 1863 | |
sepp_nepp | 8:2fd7cb217068 | 1864 | VL53L0X_Error VL53L0X::VL53L0X_perform_single_ref_calibration(uint8_t vhv_init_byte) |
sepp_nepp | 8:2fd7cb217068 | 1865 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1866 | |
sepp_nepp | 6:fb11b746ceb5 | 1867 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1868 | status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START, |
sepp_nepp | 6:fb11b746ceb5 | 1869 | VL53L0X_REG_SYSRANGE_MODE_START_STOP | |
sepp_nepp | 6:fb11b746ceb5 | 1870 | vhv_init_byte); |
sepp_nepp | 6:fb11b746ceb5 | 1871 | } |
sepp_nepp | 6:fb11b746ceb5 | 1872 | |
sepp_nepp | 6:fb11b746ceb5 | 1873 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1874 | status = VL53L0X_measurement_poll_for_completion();} |
sepp_nepp | 6:fb11b746ceb5 | 1875 | |
sepp_nepp | 6:fb11b746ceb5 | 1876 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1877 | status = VL53L0X_clear_interrupt_mask( 0);} |
sepp_nepp | 6:fb11b746ceb5 | 1878 | |
sepp_nepp | 6:fb11b746ceb5 | 1879 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1880 | status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 1881 | } |
sepp_nepp | 6:fb11b746ceb5 | 1882 | |
sepp_nepp | 6:fb11b746ceb5 | 1883 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1884 | } |
sepp_nepp | 6:fb11b746ceb5 | 1885 | |
sepp_nepp | 7:3a1115c2556b | 1886 | VL53L0X_Error VL53L0X::VL53L0X_ref_calibration_io( uint8_t read_not_write, |
sepp_nepp | 6:fb11b746ceb5 | 1887 | uint8_t vhv_settings, uint8_t phase_cal, |
sepp_nepp | 6:fb11b746ceb5 | 1888 | uint8_t *p_vhv_settings, uint8_t *p_phase_cal, |
sepp_nepp | 6:fb11b746ceb5 | 1889 | const uint8_t vhv_enable, const uint8_t phase_enable) |
sepp_nepp | 8:2fd7cb217068 | 1890 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1891 | uint8_t phase_calint = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1892 | |
sepp_nepp | 6:fb11b746ceb5 | 1893 | /* Read VHV from device */ |
sepp_nepp | 7:3a1115c2556b | 1894 | status |= VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 1895 | status |= VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 7:3a1115c2556b | 1896 | status |= VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 1897 | |
sepp_nepp | 6:fb11b746ceb5 | 1898 | if (read_not_write) { |
sepp_nepp | 6:fb11b746ceb5 | 1899 | if (vhv_enable) { |
sepp_nepp | 7:3a1115c2556b | 1900 | status |= VL53L0X_read_byte( 0xCB, p_vhv_settings);} |
sepp_nepp | 6:fb11b746ceb5 | 1901 | if (phase_enable) { |
sepp_nepp | 7:3a1115c2556b | 1902 | status |= VL53L0X_read_byte( 0xEE, &phase_calint);} |
sepp_nepp | 6:fb11b746ceb5 | 1903 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1904 | if (vhv_enable) { |
sepp_nepp | 7:3a1115c2556b | 1905 | status |= VL53L0X_write_byte( 0xCB, vhv_settings);} |
sepp_nepp | 6:fb11b746ceb5 | 1906 | if (phase_enable) { |
sepp_nepp | 7:3a1115c2556b | 1907 | status |= VL53L0X_update_byte( 0xEE, 0x80, phase_cal);} |
sepp_nepp | 6:fb11b746ceb5 | 1908 | } |
sepp_nepp | 6:fb11b746ceb5 | 1909 | |
sepp_nepp | 7:3a1115c2556b | 1910 | status |= VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 1911 | status |= VL53L0X_write_byte( 0x00, 0x01); |
sepp_nepp | 7:3a1115c2556b | 1912 | status |= VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 1913 | |
sepp_nepp | 6:fb11b746ceb5 | 1914 | *p_phase_cal = (uint8_t)(phase_calint & 0xEF); |
sepp_nepp | 6:fb11b746ceb5 | 1915 | |
sepp_nepp | 6:fb11b746ceb5 | 1916 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1917 | } |
sepp_nepp | 6:fb11b746ceb5 | 1918 | |
sepp_nepp | 8:2fd7cb217068 | 1919 | VL53L0X_Error VL53L0X::VL53L0X_perform_vhv_calibration(uint8_t *p_vhv_settings, const uint8_t get_data_enable, |
sepp_nepp | 6:fb11b746ceb5 | 1920 | const uint8_t restore_config) |
sepp_nepp | 8:2fd7cb217068 | 1921 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1922 | uint8_t sequence_config = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1923 | uint8_t vhv_settings = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1924 | uint8_t phase_cal = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1925 | uint8_t phase_cal_int = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1926 | |
sepp_nepp | 6:fb11b746ceb5 | 1927 | /* store the value of the sequence config, |
sepp_nepp | 6:fb11b746ceb5 | 1928 | * this will be reset before the end of the function |
sepp_nepp | 6:fb11b746ceb5 | 1929 | */ |
sepp_nepp | 6:fb11b746ceb5 | 1930 | |
sepp_nepp | 6:fb11b746ceb5 | 1931 | if (restore_config) { |
sepp_nepp | 8:2fd7cb217068 | 1932 | sequence_config = Data.SequenceConfig; |
sepp_nepp | 6:fb11b746ceb5 | 1933 | } |
sepp_nepp | 6:fb11b746ceb5 | 1934 | |
sepp_nepp | 6:fb11b746ceb5 | 1935 | /* Run VHV */ |
sepp_nepp | 7:3a1115c2556b | 1936 | status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 1937 | |
sepp_nepp | 6:fb11b746ceb5 | 1938 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1939 | status = VL53L0X_perform_single_ref_calibration( 0x40);} |
sepp_nepp | 6:fb11b746ceb5 | 1940 | |
sepp_nepp | 6:fb11b746ceb5 | 1941 | /* Read VHV from device */ |
sepp_nepp | 6:fb11b746ceb5 | 1942 | if ((status == VL53L0X_ERROR_NONE) && (get_data_enable == 1)) { |
sepp_nepp | 7:3a1115c2556b | 1943 | status = VL53L0X_ref_calibration_io( 1, vhv_settings, phase_cal, /* Not used here */ |
sepp_nepp | 7:3a1115c2556b | 1944 | p_vhv_settings, &phase_cal_int, 1, 0); |
sepp_nepp | 7:3a1115c2556b | 1945 | } else {*p_vhv_settings = 0; } |
sepp_nepp | 6:fb11b746ceb5 | 1946 | |
sepp_nepp | 6:fb11b746ceb5 | 1947 | if ((status == VL53L0X_ERROR_NONE) && restore_config) { |
sepp_nepp | 6:fb11b746ceb5 | 1948 | /* restore the previous Sequence Config */ |
sepp_nepp | 7:3a1115c2556b | 1949 | status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, |
sepp_nepp | 6:fb11b746ceb5 | 1950 | sequence_config); |
sepp_nepp | 6:fb11b746ceb5 | 1951 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1952 | Data.SequenceConfig = sequence_config; } |
sepp_nepp | 6:fb11b746ceb5 | 1953 | } |
sepp_nepp | 6:fb11b746ceb5 | 1954 | |
sepp_nepp | 6:fb11b746ceb5 | 1955 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 1956 | } |
sepp_nepp | 6:fb11b746ceb5 | 1957 | |
sepp_nepp | 8:2fd7cb217068 | 1958 | VL53L0X_Error VL53L0X::VL53L0X_perform_phase_calibration(uint8_t *p_phase_cal, const uint8_t get_data_enable, |
sepp_nepp | 6:fb11b746ceb5 | 1959 | const uint8_t restore_config) |
sepp_nepp | 7:3a1115c2556b | 1960 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 1961 | uint8_t sequence_config = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1962 | uint8_t vhv_settings = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1963 | uint8_t phase_cal = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1964 | uint8_t vhv_settingsint; |
sepp_nepp | 6:fb11b746ceb5 | 1965 | |
sepp_nepp | 6:fb11b746ceb5 | 1966 | /* store the value of the sequence config, |
sepp_nepp | 7:3a1115c2556b | 1967 | * this will be reset before the end of the function */ |
sepp_nepp | 6:fb11b746ceb5 | 1968 | |
sepp_nepp | 6:fb11b746ceb5 | 1969 | if (restore_config) { |
sepp_nepp | 8:2fd7cb217068 | 1970 | sequence_config = Data.SequenceConfig; |
sepp_nepp | 6:fb11b746ceb5 | 1971 | } |
sepp_nepp | 6:fb11b746ceb5 | 1972 | |
sepp_nepp | 6:fb11b746ceb5 | 1973 | /* Run PhaseCal */ |
sepp_nepp | 7:3a1115c2556b | 1974 | status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, 0x02); |
sepp_nepp | 6:fb11b746ceb5 | 1975 | |
sepp_nepp | 6:fb11b746ceb5 | 1976 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 1977 | status = VL53L0X_perform_single_ref_calibration( 0x0); |
sepp_nepp | 6:fb11b746ceb5 | 1978 | } |
sepp_nepp | 6:fb11b746ceb5 | 1979 | |
sepp_nepp | 6:fb11b746ceb5 | 1980 | /* Read PhaseCal from device */ |
sepp_nepp | 6:fb11b746ceb5 | 1981 | if ((status == VL53L0X_ERROR_NONE) && (get_data_enable == 1)) { |
sepp_nepp | 7:3a1115c2556b | 1982 | status = VL53L0X_ref_calibration_io( 1, |
sepp_nepp | 6:fb11b746ceb5 | 1983 | vhv_settings, phase_cal, /* Not used here */ |
sepp_nepp | 6:fb11b746ceb5 | 1984 | &vhv_settingsint, p_phase_cal, |
sepp_nepp | 6:fb11b746ceb5 | 1985 | 0, 1); |
sepp_nepp | 6:fb11b746ceb5 | 1986 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 1987 | *p_phase_cal = 0; |
sepp_nepp | 6:fb11b746ceb5 | 1988 | } |
sepp_nepp | 6:fb11b746ceb5 | 1989 | |
sepp_nepp | 6:fb11b746ceb5 | 1990 | if ((status == VL53L0X_ERROR_NONE) && restore_config) { |
sepp_nepp | 6:fb11b746ceb5 | 1991 | /* restore the previous Sequence Config */ |
sepp_nepp | 7:3a1115c2556b | 1992 | status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, |
sepp_nepp | 6:fb11b746ceb5 | 1993 | sequence_config); |
sepp_nepp | 6:fb11b746ceb5 | 1994 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 1995 | Data.SequenceConfig = sequence_config; |
sepp_nepp | 6:fb11b746ceb5 | 1996 | } |
sepp_nepp | 6:fb11b746ceb5 | 1997 | |
sepp_nepp | 6:fb11b746ceb5 | 1998 | } |
sepp_nepp | 6:fb11b746ceb5 | 1999 | |
sepp_nepp | 6:fb11b746ceb5 | 2000 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2001 | } |
sepp_nepp | 6:fb11b746ceb5 | 2002 | |
sepp_nepp | 8:2fd7cb217068 | 2003 | VL53L0X_Error VL53L0X::VL53L0X_perform_ref_calibration(uint8_t *p_vhv_settings, uint8_t *p_phase_cal, uint8_t get_data_enable) |
sepp_nepp | 8:2fd7cb217068 | 2004 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2005 | uint8_t sequence_config = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2006 | |
sepp_nepp | 6:fb11b746ceb5 | 2007 | /* store the value of the sequence config, |
sepp_nepp | 7:3a1115c2556b | 2008 | * this will be reset before the end of the function */ |
sepp_nepp | 7:3a1115c2556b | 2009 | |
sepp_nepp | 8:2fd7cb217068 | 2010 | sequence_config = Data.SequenceConfig; |
sepp_nepp | 6:fb11b746ceb5 | 2011 | |
sepp_nepp | 6:fb11b746ceb5 | 2012 | /* In the following function we don't save the config to optimize |
sepp_nepp | 6:fb11b746ceb5 | 2013 | * writes on device. Config is saved and restored only once. */ |
sepp_nepp | 7:3a1115c2556b | 2014 | status = VL53L0X_perform_vhv_calibration(p_vhv_settings, get_data_enable, 0); |
sepp_nepp | 6:fb11b746ceb5 | 2015 | |
sepp_nepp | 6:fb11b746ceb5 | 2016 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 2017 | status = VL53L0X_perform_phase_calibration(p_phase_cal, get_data_enable, 0); } |
sepp_nepp | 6:fb11b746ceb5 | 2018 | |
sepp_nepp | 6:fb11b746ceb5 | 2019 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 2020 | /* restore the previous Sequence Config */ |
sepp_nepp | 7:3a1115c2556b | 2021 | status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, |
sepp_nepp | 6:fb11b746ceb5 | 2022 | sequence_config); |
sepp_nepp | 6:fb11b746ceb5 | 2023 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 2024 | Data.SequenceConfig = sequence_config; } |
sepp_nepp | 6:fb11b746ceb5 | 2025 | } |
sepp_nepp | 6:fb11b746ceb5 | 2026 | |
sepp_nepp | 6:fb11b746ceb5 | 2027 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2028 | } |
sepp_nepp | 6:fb11b746ceb5 | 2029 | |
sepp_nepp | 6:fb11b746ceb5 | 2030 | void VL53L0X::get_next_good_spad(uint8_t good_spad_array[], uint32_t size, |
sepp_nepp | 6:fb11b746ceb5 | 2031 | uint32_t curr, int32_t *p_next) |
sepp_nepp | 8:2fd7cb217068 | 2032 | { uint32_t start_index; |
sepp_nepp | 6:fb11b746ceb5 | 2033 | uint32_t fine_offset; |
sepp_nepp | 6:fb11b746ceb5 | 2034 | uint32_t c_spads_per_byte = 8; |
sepp_nepp | 6:fb11b746ceb5 | 2035 | uint32_t coarse_index; |
sepp_nepp | 6:fb11b746ceb5 | 2036 | uint32_t fine_index; |
sepp_nepp | 6:fb11b746ceb5 | 2037 | uint8_t data_byte; |
sepp_nepp | 6:fb11b746ceb5 | 2038 | uint8_t success = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2039 | |
sepp_nepp | 7:3a1115c2556b | 2040 | /* Starting with the current good spad, loop through the array to find |
sepp_nepp | 6:fb11b746ceb5 | 2041 | * the next. i.e. the next bit set in the sequence. |
sepp_nepp | 6:fb11b746ceb5 | 2042 | * |
sepp_nepp | 6:fb11b746ceb5 | 2043 | * The coarse index is the byte index of the array and the fine index is |
sepp_nepp | 7:3a1115c2556b | 2044 | * the index of the bit within each byte. */ |
sepp_nepp | 6:fb11b746ceb5 | 2045 | |
sepp_nepp | 6:fb11b746ceb5 | 2046 | *p_next = -1; |
sepp_nepp | 6:fb11b746ceb5 | 2047 | |
sepp_nepp | 6:fb11b746ceb5 | 2048 | start_index = curr / c_spads_per_byte; |
sepp_nepp | 6:fb11b746ceb5 | 2049 | fine_offset = curr % c_spads_per_byte; |
sepp_nepp | 6:fb11b746ceb5 | 2050 | |
sepp_nepp | 6:fb11b746ceb5 | 2051 | for (coarse_index = start_index; ((coarse_index < size) && !success); |
sepp_nepp | 6:fb11b746ceb5 | 2052 | coarse_index++) { |
sepp_nepp | 6:fb11b746ceb5 | 2053 | fine_index = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2054 | data_byte = good_spad_array[coarse_index]; |
sepp_nepp | 6:fb11b746ceb5 | 2055 | |
sepp_nepp | 6:fb11b746ceb5 | 2056 | if (coarse_index == start_index) { |
sepp_nepp | 6:fb11b746ceb5 | 2057 | /* locate the bit position of the provided current |
sepp_nepp | 6:fb11b746ceb5 | 2058 | * spad bit before iterating */ |
sepp_nepp | 6:fb11b746ceb5 | 2059 | data_byte >>= fine_offset; |
sepp_nepp | 6:fb11b746ceb5 | 2060 | fine_index = fine_offset; |
sepp_nepp | 6:fb11b746ceb5 | 2061 | } |
sepp_nepp | 6:fb11b746ceb5 | 2062 | |
sepp_nepp | 6:fb11b746ceb5 | 2063 | while (fine_index < c_spads_per_byte) { |
sepp_nepp | 6:fb11b746ceb5 | 2064 | if ((data_byte & 0x1) == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 2065 | success = 1; |
sepp_nepp | 6:fb11b746ceb5 | 2066 | *p_next = coarse_index * c_spads_per_byte + fine_index; |
sepp_nepp | 6:fb11b746ceb5 | 2067 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2068 | } |
sepp_nepp | 6:fb11b746ceb5 | 2069 | data_byte >>= 1; |
sepp_nepp | 6:fb11b746ceb5 | 2070 | fine_index++; |
sepp_nepp | 6:fb11b746ceb5 | 2071 | } |
sepp_nepp | 6:fb11b746ceb5 | 2072 | } |
sepp_nepp | 6:fb11b746ceb5 | 2073 | } |
sepp_nepp | 6:fb11b746ceb5 | 2074 | |
sepp_nepp | 6:fb11b746ceb5 | 2075 | uint8_t VL53L0X::is_aperture(uint32_t spad_index) |
sepp_nepp | 8:2fd7cb217068 | 2076 | { /* This function reports if a given spad index is an aperture SPAD by |
sepp_nepp | 7:3a1115c2556b | 2077 | * deriving the quadrant.*/ |
sepp_nepp | 6:fb11b746ceb5 | 2078 | uint32_t quadrant; |
sepp_nepp | 6:fb11b746ceb5 | 2079 | uint8_t is_aperture = 1; |
sepp_nepp | 6:fb11b746ceb5 | 2080 | quadrant = spad_index >> 6; |
sepp_nepp | 6:fb11b746ceb5 | 2081 | if (refArrayQuadrants[quadrant] == REF_ARRAY_SPAD_0) { |
sepp_nepp | 6:fb11b746ceb5 | 2082 | is_aperture = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2083 | } |
sepp_nepp | 6:fb11b746ceb5 | 2084 | |
sepp_nepp | 6:fb11b746ceb5 | 2085 | return is_aperture; |
sepp_nepp | 6:fb11b746ceb5 | 2086 | } |
sepp_nepp | 6:fb11b746ceb5 | 2087 | |
sepp_nepp | 6:fb11b746ceb5 | 2088 | VL53L0X_Error VL53L0X::enable_spad_bit(uint8_t spad_array[], uint32_t size, |
sepp_nepp | 6:fb11b746ceb5 | 2089 | uint32_t spad_index) |
sepp_nepp | 7:3a1115c2556b | 2090 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2091 | uint32_t c_spads_per_byte = 8; |
sepp_nepp | 6:fb11b746ceb5 | 2092 | uint32_t coarse_index; |
sepp_nepp | 6:fb11b746ceb5 | 2093 | uint32_t fine_index; |
sepp_nepp | 6:fb11b746ceb5 | 2094 | |
sepp_nepp | 6:fb11b746ceb5 | 2095 | coarse_index = spad_index / c_spads_per_byte; |
sepp_nepp | 6:fb11b746ceb5 | 2096 | fine_index = spad_index % c_spads_per_byte; |
sepp_nepp | 6:fb11b746ceb5 | 2097 | if (coarse_index >= size) { |
sepp_nepp | 6:fb11b746ceb5 | 2098 | status = VL53L0X_ERROR_REF_SPAD_INIT; |
sepp_nepp | 6:fb11b746ceb5 | 2099 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 2100 | spad_array[coarse_index] |= (1 << fine_index); |
sepp_nepp | 6:fb11b746ceb5 | 2101 | } |
sepp_nepp | 6:fb11b746ceb5 | 2102 | |
sepp_nepp | 6:fb11b746ceb5 | 2103 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2104 | } |
sepp_nepp | 6:fb11b746ceb5 | 2105 | |
sepp_nepp | 7:3a1115c2556b | 2106 | VL53L0X_Error VL53L0X::set_ref_spad_map( uint8_t *p_ref_spad_array) |
sepp_nepp | 9:cb4c6d4e5030 | 2107 | { VL53L0X_Error status = VL53L0X_i2c_write(VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0, |
sepp_nepp | 6:fb11b746ceb5 | 2108 | p_ref_spad_array, 6); |
sepp_nepp | 6:fb11b746ceb5 | 2109 | |
sepp_nepp | 6:fb11b746ceb5 | 2110 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2111 | } |
sepp_nepp | 6:fb11b746ceb5 | 2112 | |
sepp_nepp | 7:3a1115c2556b | 2113 | VL53L0X_Error VL53L0X::get_ref_spad_map( uint8_t *p_ref_spad_array) |
sepp_nepp | 8:2fd7cb217068 | 2114 | { VL53L0X_Error status = VL53L0X_read_multi(VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0, |
sepp_nepp | 6:fb11b746ceb5 | 2115 | p_ref_spad_array, |
sepp_nepp | 6:fb11b746ceb5 | 2116 | 6); |
sepp_nepp | 6:fb11b746ceb5 | 2117 | // VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2118 | // uint8_t count=0; |
sepp_nepp | 6:fb11b746ceb5 | 2119 | |
sepp_nepp | 6:fb11b746ceb5 | 2120 | // for (count = 0; count < 6; count++) |
sepp_nepp | 7:3a1115c2556b | 2121 | // status = VL53L0X_RdByte( (VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 + count), &refSpadArray[count]); |
sepp_nepp | 6:fb11b746ceb5 | 2122 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2123 | } |
sepp_nepp | 6:fb11b746ceb5 | 2124 | |
sepp_nepp | 8:2fd7cb217068 | 2125 | VL53L0X_Error VL53L0X::enable_ref_spads(uint8_t aperture_spads, |
sepp_nepp | 6:fb11b746ceb5 | 2126 | uint8_t good_spad_array[], |
sepp_nepp | 6:fb11b746ceb5 | 2127 | uint8_t spad_array[], |
sepp_nepp | 6:fb11b746ceb5 | 2128 | uint32_t size, |
sepp_nepp | 6:fb11b746ceb5 | 2129 | uint32_t start, |
sepp_nepp | 6:fb11b746ceb5 | 2130 | uint32_t offset, |
sepp_nepp | 6:fb11b746ceb5 | 2131 | uint32_t spad_count, |
sepp_nepp | 6:fb11b746ceb5 | 2132 | uint32_t *p_last_spad) |
sepp_nepp | 8:2fd7cb217068 | 2133 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2134 | uint32_t index; |
sepp_nepp | 6:fb11b746ceb5 | 2135 | uint32_t i; |
sepp_nepp | 6:fb11b746ceb5 | 2136 | int32_t next_good_spad = offset; |
sepp_nepp | 6:fb11b746ceb5 | 2137 | uint32_t current_spad; |
sepp_nepp | 6:fb11b746ceb5 | 2138 | uint8_t check_spad_array[6]; |
sepp_nepp | 6:fb11b746ceb5 | 2139 | |
sepp_nepp | 6:fb11b746ceb5 | 2140 | /* |
sepp_nepp | 6:fb11b746ceb5 | 2141 | * This function takes in a spad array which may or may not have SPADS |
sepp_nepp | 6:fb11b746ceb5 | 2142 | * already enabled and appends from a given offset a requested number |
sepp_nepp | 6:fb11b746ceb5 | 2143 | * of new SPAD enables. The 'good spad map' is applied to |
sepp_nepp | 6:fb11b746ceb5 | 2144 | * determine the next SPADs to enable. |
sepp_nepp | 6:fb11b746ceb5 | 2145 | * |
sepp_nepp | 6:fb11b746ceb5 | 2146 | * This function applies to only aperture or only non-aperture spads. |
sepp_nepp | 6:fb11b746ceb5 | 2147 | * Checks are performed to ensure this. |
sepp_nepp | 6:fb11b746ceb5 | 2148 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2149 | |
sepp_nepp | 6:fb11b746ceb5 | 2150 | current_spad = offset; |
sepp_nepp | 6:fb11b746ceb5 | 2151 | for (index = 0; index < spad_count; index++) { |
sepp_nepp | 6:fb11b746ceb5 | 2152 | get_next_good_spad(good_spad_array, size, current_spad, |
sepp_nepp | 6:fb11b746ceb5 | 2153 | &next_good_spad); |
sepp_nepp | 6:fb11b746ceb5 | 2154 | |
sepp_nepp | 6:fb11b746ceb5 | 2155 | if (next_good_spad == -1) { |
sepp_nepp | 6:fb11b746ceb5 | 2156 | status = VL53L0X_ERROR_REF_SPAD_INIT; |
sepp_nepp | 6:fb11b746ceb5 | 2157 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2158 | } |
sepp_nepp | 6:fb11b746ceb5 | 2159 | |
sepp_nepp | 6:fb11b746ceb5 | 2160 | /* Confirm that the next good SPAD is non-aperture */ |
sepp_nepp | 6:fb11b746ceb5 | 2161 | if (is_aperture(start + next_good_spad) != aperture_spads) { |
sepp_nepp | 6:fb11b746ceb5 | 2162 | /* if we can't get the required number of good aperture |
sepp_nepp | 6:fb11b746ceb5 | 2163 | * spads from the current quadrant then this is an error |
sepp_nepp | 6:fb11b746ceb5 | 2164 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2165 | status = VL53L0X_ERROR_REF_SPAD_INIT; |
sepp_nepp | 6:fb11b746ceb5 | 2166 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2167 | } |
sepp_nepp | 6:fb11b746ceb5 | 2168 | current_spad = (uint32_t)next_good_spad; |
sepp_nepp | 6:fb11b746ceb5 | 2169 | enable_spad_bit(spad_array, size, current_spad); |
sepp_nepp | 6:fb11b746ceb5 | 2170 | current_spad++; |
sepp_nepp | 6:fb11b746ceb5 | 2171 | } |
sepp_nepp | 6:fb11b746ceb5 | 2172 | *p_last_spad = current_spad; |
sepp_nepp | 6:fb11b746ceb5 | 2173 | |
sepp_nepp | 6:fb11b746ceb5 | 2174 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 2175 | status = set_ref_spad_map( spad_array); |
sepp_nepp | 6:fb11b746ceb5 | 2176 | } |
sepp_nepp | 6:fb11b746ceb5 | 2177 | |
sepp_nepp | 6:fb11b746ceb5 | 2178 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 2179 | status = get_ref_spad_map( check_spad_array); |
sepp_nepp | 6:fb11b746ceb5 | 2180 | |
sepp_nepp | 6:fb11b746ceb5 | 2181 | i = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2182 | |
sepp_nepp | 6:fb11b746ceb5 | 2183 | /* Compare spad maps. If not equal report error. */ |
sepp_nepp | 6:fb11b746ceb5 | 2184 | while (i < size) { |
sepp_nepp | 6:fb11b746ceb5 | 2185 | if (spad_array[i] != check_spad_array[i]) { |
sepp_nepp | 6:fb11b746ceb5 | 2186 | status = VL53L0X_ERROR_REF_SPAD_INIT; |
sepp_nepp | 6:fb11b746ceb5 | 2187 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2188 | } |
sepp_nepp | 6:fb11b746ceb5 | 2189 | i++; |
sepp_nepp | 6:fb11b746ceb5 | 2190 | } |
sepp_nepp | 6:fb11b746ceb5 | 2191 | } |
sepp_nepp | 6:fb11b746ceb5 | 2192 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2193 | } |
sepp_nepp | 6:fb11b746ceb5 | 2194 | |
sepp_nepp | 7:3a1115c2556b | 2195 | VL53L0X_Error VL53L0X::VL53L0X_set_device_mode( VL53L0X_DeviceModes device_mode) |
sepp_nepp | 8:2fd7cb217068 | 2196 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2197 | |
sepp_nepp | 6:fb11b746ceb5 | 2198 | switch (device_mode) { |
sepp_nepp | 6:fb11b746ceb5 | 2199 | case VL53L0X_DEVICEMODE_SINGLE_RANGING: |
sepp_nepp | 6:fb11b746ceb5 | 2200 | case VL53L0X_DEVICEMODE_CONTINUOUS_RANGING: |
sepp_nepp | 6:fb11b746ceb5 | 2201 | case VL53L0X_DEVICEMODE_CONTINUOUS_TIMED_RANGING: |
sepp_nepp | 6:fb11b746ceb5 | 2202 | case VL53L0X_DEVICEMODE_GPIO_DRIVE: |
sepp_nepp | 6:fb11b746ceb5 | 2203 | case VL53L0X_DEVICEMODE_GPIO_OSC: |
sepp_nepp | 6:fb11b746ceb5 | 2204 | /* Supported modes */ |
sepp_nepp | 10:cd1758e186a4 | 2205 | CurrentParameters.DeviceMode = device_mode; |
sepp_nepp | 6:fb11b746ceb5 | 2206 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2207 | default: |
sepp_nepp | 6:fb11b746ceb5 | 2208 | /* Unsupported mode */ |
sepp_nepp | 6:fb11b746ceb5 | 2209 | status = VL53L0X_ERROR_MODE_NOT_SUPPORTED; |
sepp_nepp | 6:fb11b746ceb5 | 2210 | } |
sepp_nepp | 6:fb11b746ceb5 | 2211 | |
sepp_nepp | 6:fb11b746ceb5 | 2212 | |
sepp_nepp | 6:fb11b746ceb5 | 2213 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2214 | } |
sepp_nepp | 6:fb11b746ceb5 | 2215 | |
sepp_nepp | 8:2fd7cb217068 | 2216 | VL53L0X_Error VL53L0X::VL53L0X_set_interrupt_thresholds(VL53L0X_DeviceModes device_mode, FixPoint1616_t threshold_low, |
sepp_nepp | 6:fb11b746ceb5 | 2217 | FixPoint1616_t threshold_high) |
sepp_nepp | 8:2fd7cb217068 | 2218 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2219 | uint16_t threshold16; |
sepp_nepp | 6:fb11b746ceb5 | 2220 | |
sepp_nepp | 6:fb11b746ceb5 | 2221 | |
sepp_nepp | 6:fb11b746ceb5 | 2222 | /* no dependency on DeviceMode for Ewok */ |
sepp_nepp | 6:fb11b746ceb5 | 2223 | /* Need to divide by 2 because the FW will apply a x2 */ |
sepp_nepp | 6:fb11b746ceb5 | 2224 | threshold16 = (uint16_t)((threshold_low >> 17) & 0x00fff); |
sepp_nepp | 7:3a1115c2556b | 2225 | status = VL53L0X_write_word( VL53L0X_REG_SYSTEM_THRESH_LOW, threshold16); |
sepp_nepp | 6:fb11b746ceb5 | 2226 | |
sepp_nepp | 6:fb11b746ceb5 | 2227 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 2228 | /* Need to divide by 2 because the FW will apply a x2 */ |
sepp_nepp | 6:fb11b746ceb5 | 2229 | threshold16 = (uint16_t)((threshold_high >> 17) & 0x00fff); |
sepp_nepp | 7:3a1115c2556b | 2230 | status = VL53L0X_write_word( VL53L0X_REG_SYSTEM_THRESH_HIGH, |
sepp_nepp | 6:fb11b746ceb5 | 2231 | threshold16); |
sepp_nepp | 6:fb11b746ceb5 | 2232 | } |
sepp_nepp | 6:fb11b746ceb5 | 2233 | |
sepp_nepp | 6:fb11b746ceb5 | 2234 | |
sepp_nepp | 6:fb11b746ceb5 | 2235 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2236 | } |
sepp_nepp | 6:fb11b746ceb5 | 2237 | |
sepp_nepp | 8:2fd7cb217068 | 2238 | VL53L0X_Error VL53L0X::VL53L0X_get_interrupt_thresholds(VL53L0X_DeviceModes device_mode, FixPoint1616_t *p_threshold_low, |
sepp_nepp | 6:fb11b746ceb5 | 2239 | FixPoint1616_t *p_threshold_high) |
sepp_nepp | 8:2fd7cb217068 | 2240 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2241 | uint16_t threshold16; |
sepp_nepp | 6:fb11b746ceb5 | 2242 | |
sepp_nepp | 6:fb11b746ceb5 | 2243 | |
sepp_nepp | 6:fb11b746ceb5 | 2244 | /* no dependency on DeviceMode for Ewok */ |
sepp_nepp | 6:fb11b746ceb5 | 2245 | |
sepp_nepp | 7:3a1115c2556b | 2246 | status = VL53L0X_read_word( VL53L0X_REG_SYSTEM_THRESH_LOW, &threshold16); |
sepp_nepp | 6:fb11b746ceb5 | 2247 | /* Need to multiply by 2 because the FW will apply a x2 */ |
sepp_nepp | 6:fb11b746ceb5 | 2248 | *p_threshold_low = (FixPoint1616_t)((0x00fff & threshold16) << 17); |
sepp_nepp | 6:fb11b746ceb5 | 2249 | |
sepp_nepp | 6:fb11b746ceb5 | 2250 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 2251 | status = VL53L0X_read_word( VL53L0X_REG_SYSTEM_THRESH_HIGH, |
sepp_nepp | 6:fb11b746ceb5 | 2252 | &threshold16); |
sepp_nepp | 6:fb11b746ceb5 | 2253 | /* Need to multiply by 2 because the FW will apply a x2 */ |
sepp_nepp | 6:fb11b746ceb5 | 2254 | *p_threshold_high = |
sepp_nepp | 6:fb11b746ceb5 | 2255 | (FixPoint1616_t)((0x00fff & threshold16) << 17); |
sepp_nepp | 6:fb11b746ceb5 | 2256 | } |
sepp_nepp | 6:fb11b746ceb5 | 2257 | |
sepp_nepp | 6:fb11b746ceb5 | 2258 | |
sepp_nepp | 6:fb11b746ceb5 | 2259 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2260 | } |
sepp_nepp | 6:fb11b746ceb5 | 2261 | |
sepp_nepp | 8:2fd7cb217068 | 2262 | VL53L0X_Error VL53L0X::VL53L0X_load_tuning_settings(uint8_t *p_tuning_setting_buffer) |
sepp_nepp | 8:2fd7cb217068 | 2263 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2264 | int i; |
sepp_nepp | 6:fb11b746ceb5 | 2265 | int index; |
sepp_nepp | 6:fb11b746ceb5 | 2266 | uint8_t msb; |
sepp_nepp | 6:fb11b746ceb5 | 2267 | uint8_t lsb; |
sepp_nepp | 6:fb11b746ceb5 | 2268 | uint8_t select_param; |
sepp_nepp | 9:cb4c6d4e5030 | 2269 | uint16_t number_of_writes; |
sepp_nepp | 6:fb11b746ceb5 | 2270 | uint8_t address; |
sepp_nepp | 6:fb11b746ceb5 | 2271 | uint8_t local_buffer[4]; /* max */ |
sepp_nepp | 6:fb11b746ceb5 | 2272 | uint16_t temp16; |
sepp_nepp | 8:2fd7cb217068 | 2273 | |
sepp_nepp | 6:fb11b746ceb5 | 2274 | index = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2275 | |
sepp_nepp | 6:fb11b746ceb5 | 2276 | while ((*(p_tuning_setting_buffer + index) != 0) && |
sepp_nepp | 6:fb11b746ceb5 | 2277 | (status == VL53L0X_ERROR_NONE)) { |
sepp_nepp | 6:fb11b746ceb5 | 2278 | number_of_writes = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2279 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2280 | if (number_of_writes == 0xFF) { |
sepp_nepp | 6:fb11b746ceb5 | 2281 | /* internal parameters */ |
sepp_nepp | 6:fb11b746ceb5 | 2282 | select_param = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2283 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2284 | switch (select_param) { |
sepp_nepp | 6:fb11b746ceb5 | 2285 | case 0: /* uint16_t SigmaEstRefArray -> 2 bytes */ |
sepp_nepp | 6:fb11b746ceb5 | 2286 | msb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2287 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2288 | lsb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2289 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2290 | temp16 = VL53L0X_MAKEUINT16(lsb, msb); |
sepp_nepp | 8:2fd7cb217068 | 2291 | Data.SigmaEstRefArray = temp16; |
sepp_nepp | 6:fb11b746ceb5 | 2292 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2293 | case 1: /* uint16_t SigmaEstEffPulseWidth -> 2 bytes */ |
sepp_nepp | 6:fb11b746ceb5 | 2294 | msb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2295 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2296 | lsb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2297 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2298 | temp16 = VL53L0X_MAKEUINT16(lsb, msb); |
sepp_nepp | 8:2fd7cb217068 | 2299 | Data.SigmaEstEffPulseWidth = temp16; |
sepp_nepp | 6:fb11b746ceb5 | 2300 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2301 | case 2: /* uint16_t SigmaEstEffAmbWidth -> 2 bytes */ |
sepp_nepp | 6:fb11b746ceb5 | 2302 | msb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2303 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2304 | lsb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2305 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2306 | temp16 = VL53L0X_MAKEUINT16(lsb, msb); |
sepp_nepp | 8:2fd7cb217068 | 2307 | Data.SigmaEstEffAmbWidth = temp16; |
sepp_nepp | 6:fb11b746ceb5 | 2308 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2309 | case 3: /* uint16_t targetRefRate -> 2 bytes */ |
sepp_nepp | 6:fb11b746ceb5 | 2310 | msb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2311 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2312 | lsb = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2313 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2314 | temp16 = VL53L0X_MAKEUINT16(lsb, msb); |
sepp_nepp | 8:2fd7cb217068 | 2315 | Data.targetRefRate = temp16; |
sepp_nepp | 6:fb11b746ceb5 | 2316 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2317 | default: /* invalid parameter */ |
sepp_nepp | 6:fb11b746ceb5 | 2318 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 2319 | } |
sepp_nepp | 6:fb11b746ceb5 | 2320 | |
sepp_nepp | 6:fb11b746ceb5 | 2321 | } else if (number_of_writes <= 4) { |
sepp_nepp | 6:fb11b746ceb5 | 2322 | address = *(p_tuning_setting_buffer + index); |
sepp_nepp | 6:fb11b746ceb5 | 2323 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2324 | |
sepp_nepp | 6:fb11b746ceb5 | 2325 | for (i = 0; i < number_of_writes; i++) { |
sepp_nepp | 6:fb11b746ceb5 | 2326 | local_buffer[i] = *(p_tuning_setting_buffer + |
sepp_nepp | 6:fb11b746ceb5 | 2327 | index); |
sepp_nepp | 6:fb11b746ceb5 | 2328 | index++; |
sepp_nepp | 6:fb11b746ceb5 | 2329 | } |
sepp_nepp | 6:fb11b746ceb5 | 2330 | |
sepp_nepp | 9:cb4c6d4e5030 | 2331 | status = VL53L0X_i2c_write( address, local_buffer, number_of_writes); |
sepp_nepp | 8:2fd7cb217068 | 2332 | |
sepp_nepp | 8:2fd7cb217068 | 2333 | } else { status = VL53L0X_ERROR_INVALID_PARAMS; } |
sepp_nepp | 6:fb11b746ceb5 | 2334 | } |
sepp_nepp | 6:fb11b746ceb5 | 2335 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2336 | } |
sepp_nepp | 6:fb11b746ceb5 | 2337 | |
sepp_nepp | 8:2fd7cb217068 | 2338 | VL53L0X_Error VL53L0X::VL53L0X_check_and_load_interrupt_settings(uint8_t start_not_stopflag) |
sepp_nepp | 8:2fd7cb217068 | 2339 | { uint8_t interrupt_config; |
sepp_nepp | 6:fb11b746ceb5 | 2340 | FixPoint1616_t threshold_low; |
sepp_nepp | 6:fb11b746ceb5 | 2341 | FixPoint1616_t threshold_high; |
sepp_nepp | 6:fb11b746ceb5 | 2342 | VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2343 | |
sepp_nepp | 8:2fd7cb217068 | 2344 | interrupt_config = Data.Pin0GpioFunctionality; |
sepp_nepp | 6:fb11b746ceb5 | 2345 | |
sepp_nepp | 6:fb11b746ceb5 | 2346 | if ((interrupt_config == |
sepp_nepp | 6:fb11b746ceb5 | 2347 | VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW) || |
sepp_nepp | 6:fb11b746ceb5 | 2348 | (interrupt_config == |
sepp_nepp | 6:fb11b746ceb5 | 2349 | VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH) || |
sepp_nepp | 6:fb11b746ceb5 | 2350 | (interrupt_config == |
sepp_nepp | 6:fb11b746ceb5 | 2351 | VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT)) { |
sepp_nepp | 6:fb11b746ceb5 | 2352 | |
sepp_nepp | 8:2fd7cb217068 | 2353 | status = VL53L0X_get_interrupt_thresholds(VL53L0X_DEVICEMODE_CONTINUOUS_RANGING, |
sepp_nepp | 6:fb11b746ceb5 | 2354 | &threshold_low, &threshold_high); |
sepp_nepp | 6:fb11b746ceb5 | 2355 | |
sepp_nepp | 6:fb11b746ceb5 | 2356 | if (((threshold_low > 255 * 65536) || |
sepp_nepp | 6:fb11b746ceb5 | 2357 | (threshold_high > 255 * 65536)) && |
sepp_nepp | 6:fb11b746ceb5 | 2358 | (status == VL53L0X_ERROR_NONE)) { |
sepp_nepp | 6:fb11b746ceb5 | 2359 | |
sepp_nepp | 6:fb11b746ceb5 | 2360 | if (start_not_stopflag != 0) { |
sepp_nepp | 8:2fd7cb217068 | 2361 | status = VL53L0X_load_tuning_settings(InterruptThresholdSettings); |
sepp_nepp | 6:fb11b746ceb5 | 2362 | } else { |
sepp_nepp | 7:3a1115c2556b | 2363 | status |= VL53L0X_write_byte( 0xFF, 0x04); |
sepp_nepp | 7:3a1115c2556b | 2364 | status |= VL53L0X_write_byte( 0x70, 0x00); |
sepp_nepp | 7:3a1115c2556b | 2365 | status |= VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 7:3a1115c2556b | 2366 | status |= VL53L0X_write_byte( 0x80, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 2367 | } |
sepp_nepp | 6:fb11b746ceb5 | 2368 | } |
sepp_nepp | 6:fb11b746ceb5 | 2369 | } |
sepp_nepp | 6:fb11b746ceb5 | 2370 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2371 | } |
sepp_nepp | 6:fb11b746ceb5 | 2372 | |
sepp_nepp | 7:3a1115c2556b | 2373 | VL53L0X_Error VL53L0X::VL53L0X_start_measurement(void) |
sepp_nepp | 8:2fd7cb217068 | 2374 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2375 | VL53L0X_DeviceModes device_mode; |
sepp_nepp | 6:fb11b746ceb5 | 2376 | uint8_t byte; |
sepp_nepp | 6:fb11b746ceb5 | 2377 | uint8_t start_stop_byte = VL53L0X_REG_SYSRANGE_MODE_START_STOP; |
sepp_nepp | 6:fb11b746ceb5 | 2378 | uint32_t loop_nb; |
sepp_nepp | 6:fb11b746ceb5 | 2379 | |
sepp_nepp | 6:fb11b746ceb5 | 2380 | |
sepp_nepp | 6:fb11b746ceb5 | 2381 | /* Get Current DeviceMode */ |
sepp_nepp | 13:253cb4ea3fcc | 2382 | device_mode = CurrentParameters.DeviceMode; |
sepp_nepp | 7:3a1115c2556b | 2383 | |
sepp_nepp | 7:3a1115c2556b | 2384 | status = VL53L0X_write_byte( 0x80, 0x01); |
sepp_nepp | 7:3a1115c2556b | 2385 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 2386 | status = VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 8:2fd7cb217068 | 2387 | status = VL53L0X_write_byte( 0x91, Data.StopVariable); |
sepp_nepp | 7:3a1115c2556b | 2388 | status = VL53L0X_write_byte( 0x00, 0x01); |
sepp_nepp | 7:3a1115c2556b | 2389 | status = VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 7:3a1115c2556b | 2390 | status = VL53L0X_write_byte( 0x80, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 2391 | |
sepp_nepp | 6:fb11b746ceb5 | 2392 | switch (device_mode) { |
sepp_nepp | 6:fb11b746ceb5 | 2393 | case VL53L0X_DEVICEMODE_SINGLE_RANGING: |
sepp_nepp | 7:3a1115c2556b | 2394 | status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 2395 | |
sepp_nepp | 6:fb11b746ceb5 | 2396 | byte = start_stop_byte; |
sepp_nepp | 6:fb11b746ceb5 | 2397 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 2398 | /* Wait until start bit has been cleared */ |
sepp_nepp | 6:fb11b746ceb5 | 2399 | loop_nb = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2400 | do { |
sepp_nepp | 6:fb11b746ceb5 | 2401 | if (loop_nb > 0) |
sepp_nepp | 8:2fd7cb217068 | 2402 | status = VL53L0X_read_byte(VL53L0X_REG_SYSRANGE_START, &byte); |
sepp_nepp | 6:fb11b746ceb5 | 2403 | loop_nb = loop_nb + 1; |
sepp_nepp | 6:fb11b746ceb5 | 2404 | } while (((byte & start_stop_byte) == start_stop_byte) |
sepp_nepp | 6:fb11b746ceb5 | 2405 | && (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 6:fb11b746ceb5 | 2406 | && (loop_nb < VL53L0X_DEFAULT_MAX_LOOP)); |
sepp_nepp | 6:fb11b746ceb5 | 2407 | |
sepp_nepp | 6:fb11b746ceb5 | 2408 | if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) { |
sepp_nepp | 6:fb11b746ceb5 | 2409 | status = VL53L0X_ERROR_TIME_OUT; |
sepp_nepp | 6:fb11b746ceb5 | 2410 | } |
sepp_nepp | 6:fb11b746ceb5 | 2411 | } |
sepp_nepp | 6:fb11b746ceb5 | 2412 | |
sepp_nepp | 6:fb11b746ceb5 | 2413 | break; |
sepp_nepp | 9:cb4c6d4e5030 | 2414 | case VL53L0X_DEVICEMODE_CONTINUOUS_RANGING: /* Back-to-back mode */ |
sepp_nepp | 6:fb11b746ceb5 | 2415 | |
sepp_nepp | 6:fb11b746ceb5 | 2416 | /* Check if need to apply interrupt settings */ |
sepp_nepp | 9:cb4c6d4e5030 | 2417 | if (status == VL53L0X_ERROR_NONE) |
sepp_nepp | 9:cb4c6d4e5030 | 2418 | { status = VL53L0X_check_and_load_interrupt_settings( 1); } |
sepp_nepp | 6:fb11b746ceb5 | 2419 | |
sepp_nepp | 8:2fd7cb217068 | 2420 | status = VL53L0X_write_byte(VL53L0X_REG_SYSRANGE_START, |
sepp_nepp | 6:fb11b746ceb5 | 2421 | VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK); |
sepp_nepp | 6:fb11b746ceb5 | 2422 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 2423 | /* Set PAL State to Running */ |
sepp_nepp | 8:2fd7cb217068 | 2424 | Data.PalState = VL53L0X_STATE_RUNNING; |
sepp_nepp | 6:fb11b746ceb5 | 2425 | } |
sepp_nepp | 6:fb11b746ceb5 | 2426 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2427 | case VL53L0X_DEVICEMODE_CONTINUOUS_TIMED_RANGING: |
sepp_nepp | 6:fb11b746ceb5 | 2428 | /* Continuous mode */ |
sepp_nepp | 6:fb11b746ceb5 | 2429 | /* Check if need to apply interrupt settings */ |
sepp_nepp | 6:fb11b746ceb5 | 2430 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 2431 | status = VL53L0X_check_and_load_interrupt_settings( 1); |
sepp_nepp | 6:fb11b746ceb5 | 2432 | } |
sepp_nepp | 6:fb11b746ceb5 | 2433 | |
sepp_nepp | 8:2fd7cb217068 | 2434 | status = VL53L0X_write_byte(VL53L0X_REG_SYSRANGE_START, |
sepp_nepp | 6:fb11b746ceb5 | 2435 | VL53L0X_REG_SYSRANGE_MODE_TIMED); |
sepp_nepp | 6:fb11b746ceb5 | 2436 | |
sepp_nepp | 9:cb4c6d4e5030 | 2437 | if (status == VL53L0X_ERROR_NONE)/* Set PAL State to Running */ |
sepp_nepp | 9:cb4c6d4e5030 | 2438 | { Data.PalState = VL53L0X_STATE_RUNNING; } |
sepp_nepp | 6:fb11b746ceb5 | 2439 | break; |
sepp_nepp | 6:fb11b746ceb5 | 2440 | default: |
sepp_nepp | 6:fb11b746ceb5 | 2441 | /* Selected mode not supported */ |
sepp_nepp | 6:fb11b746ceb5 | 2442 | status = VL53L0X_ERROR_MODE_NOT_SUPPORTED; |
sepp_nepp | 6:fb11b746ceb5 | 2443 | } |
sepp_nepp | 9:cb4c6d4e5030 | 2444 | |
sepp_nepp | 6:fb11b746ceb5 | 2445 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2446 | } |
sepp_nepp | 6:fb11b746ceb5 | 2447 | |
sepp_nepp | 6:fb11b746ceb5 | 2448 | /* Group PAL Measurement Functions */ |
sepp_nepp | 7:3a1115c2556b | 2449 | VL53L0X_Error VL53L0X::VL53L0X_perform_single_measurement(void) |
sepp_nepp | 8:2fd7cb217068 | 2450 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 9:cb4c6d4e5030 | 2451 | VL53L0X_DeviceModes device_mode; |
sepp_nepp | 6:fb11b746ceb5 | 2452 | |
sepp_nepp | 6:fb11b746ceb5 | 2453 | /* Get Current DeviceMode */ |
sepp_nepp | 13:253cb4ea3fcc | 2454 | device_mode = CurrentParameters.DeviceMode; |
sepp_nepp | 6:fb11b746ceb5 | 2455 | |
sepp_nepp | 6:fb11b746ceb5 | 2456 | /* Start immediately to run a single ranging measurement in case of |
sepp_nepp | 6:fb11b746ceb5 | 2457 | * single ranging or single histogram */ |
sepp_nepp | 9:cb4c6d4e5030 | 2458 | if (status == VL53L0X_ERROR_NONE && device_mode == VL53L0X_DEVICEMODE_SINGLE_RANGING) { |
sepp_nepp | 9:cb4c6d4e5030 | 2459 | status = VL53L0X_start_measurement(); } |
sepp_nepp | 6:fb11b746ceb5 | 2460 | |
sepp_nepp | 6:fb11b746ceb5 | 2461 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 2462 | status = VL53L0X_measurement_poll_for_completion(); } |
sepp_nepp | 6:fb11b746ceb5 | 2463 | |
sepp_nepp | 6:fb11b746ceb5 | 2464 | /* Change PAL State in case of single ranging or single histogram */ |
sepp_nepp | 7:3a1115c2556b | 2465 | if (status == VL53L0X_ERROR_NONE && device_mode == VL53L0X_DEVICEMODE_SINGLE_RANGING) { |
sepp_nepp | 8:2fd7cb217068 | 2466 | Data.PalState = VL53L0X_STATE_IDLE; } |
sepp_nepp | 7:3a1115c2556b | 2467 | |
sepp_nepp | 6:fb11b746ceb5 | 2468 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2469 | } |
sepp_nepp | 6:fb11b746ceb5 | 2470 | |
sepp_nepp | 8:2fd7cb217068 | 2471 | VL53L0X_Error VL53L0X::VL53L0X_get_x_talk_compensation_enable(uint8_t *p_x_talk_compensation_enable) |
sepp_nepp | 7:3a1115c2556b | 2472 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2473 | uint8_t temp8; |
sepp_nepp | 7:3a1115c2556b | 2474 | |
sepp_nepp | 10:cd1758e186a4 | 2475 | temp8 = CurrentParameters.XTalkCompensationEnable ; |
sepp_nepp | 6:fb11b746ceb5 | 2476 | *p_x_talk_compensation_enable = temp8; |
sepp_nepp | 6:fb11b746ceb5 | 2477 | |
sepp_nepp | 6:fb11b746ceb5 | 2478 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2479 | } |
sepp_nepp | 6:fb11b746ceb5 | 2480 | |
sepp_nepp | 8:2fd7cb217068 | 2481 | VL53L0X_Error VL53L0X::VL53L0X_get_total_xtalk_rate(VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data, |
sepp_nepp | 11:d8dbe3b87f9f | 2482 | FixPoint1616_t *p_total_xtalk_rate_MHz) |
sepp_nepp | 8:2fd7cb217068 | 2483 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2484 | |
sepp_nepp | 6:fb11b746ceb5 | 2485 | uint8_t xtalk_comp_enable; |
sepp_nepp | 11:d8dbe3b87f9f | 2486 | FixPoint1616_t total_xtalk_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 2487 | FixPoint1616_t xtalk_per_spad_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 2488 | |
sepp_nepp | 11:d8dbe3b87f9f | 2489 | *p_total_xtalk_rate_MHz = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2490 | |
sepp_nepp | 7:3a1115c2556b | 2491 | status = VL53L0X_get_x_talk_compensation_enable( &xtalk_comp_enable); |
sepp_nepp | 6:fb11b746ceb5 | 2492 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 2493 | |
sepp_nepp | 6:fb11b746ceb5 | 2494 | if (xtalk_comp_enable) { |
sepp_nepp | 6:fb11b746ceb5 | 2495 | |
sepp_nepp | 11:d8dbe3b87f9f | 2496 | xtalk_per_spad_MHz = CurrentParameters.XTalkCompensationRate_MHz ; |
sepp_nepp | 6:fb11b746ceb5 | 2497 | |
sepp_nepp | 6:fb11b746ceb5 | 2498 | /* FixPoint1616 * FixPoint 8:8 = FixPoint0824 */ |
sepp_nepp | 11:d8dbe3b87f9f | 2499 | total_xtalk_MHz = |
sepp_nepp | 6:fb11b746ceb5 | 2500 | p_ranging_measurement_data->EffectiveSpadRtnCount * |
sepp_nepp | 11:d8dbe3b87f9f | 2501 | xtalk_per_spad_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2502 | |
sepp_nepp | 6:fb11b746ceb5 | 2503 | /* FixPoint0824 >> 8 = FixPoint1616 */ |
sepp_nepp | 11:d8dbe3b87f9f | 2504 | *p_total_xtalk_rate_MHz = |
sepp_nepp | 11:d8dbe3b87f9f | 2505 | (total_xtalk_MHz + 0x80) >> 8; |
sepp_nepp | 6:fb11b746ceb5 | 2506 | } |
sepp_nepp | 6:fb11b746ceb5 | 2507 | } |
sepp_nepp | 6:fb11b746ceb5 | 2508 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2509 | } |
sepp_nepp | 6:fb11b746ceb5 | 2510 | |
sepp_nepp | 8:2fd7cb217068 | 2511 | VL53L0X_Error VL53L0X::VL53L0X_get_total_signal_rate(VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data, |
sepp_nepp | 11:d8dbe3b87f9f | 2512 | FixPoint1616_t *p_total_signal_rate_MHz) |
sepp_nepp | 8:2fd7cb217068 | 2513 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 11:d8dbe3b87f9f | 2514 | FixPoint1616_t total_xtalk_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 2515 | |
sepp_nepp | 11:d8dbe3b87f9f | 2516 | *p_total_signal_rate_MHz = |
sepp_nepp | 11:d8dbe3b87f9f | 2517 | p_ranging_measurement_data->SignalRateRtn_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 2518 | |
sepp_nepp | 11:d8dbe3b87f9f | 2519 | status = VL53L0X_get_total_xtalk_rate(p_ranging_measurement_data, &total_xtalk_MHz); |
sepp_nepp | 6:fb11b746ceb5 | 2520 | |
sepp_nepp | 6:fb11b746ceb5 | 2521 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 2522 | *p_total_signal_rate_MHz += total_xtalk_MHz; } |
sepp_nepp | 6:fb11b746ceb5 | 2523 | |
sepp_nepp | 6:fb11b746ceb5 | 2524 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2525 | } |
sepp_nepp | 6:fb11b746ceb5 | 2526 | |
sepp_nepp | 6:fb11b746ceb5 | 2527 | /* To convert ms into register value */ |
sepp_nepp | 8:2fd7cb217068 | 2528 | uint32_t VL53L0X::VL53L0X_calc_timeout_mclks(uint32_t timeout_period_us, |
sepp_nepp | 6:fb11b746ceb5 | 2529 | uint8_t vcsel_period_pclks) |
sepp_nepp | 8:2fd7cb217068 | 2530 | { uint32_t macro_period_ps; |
sepp_nepp | 6:fb11b746ceb5 | 2531 | uint32_t macro_period_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2532 | uint32_t timeout_period_mclks = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2533 | |
sepp_nepp | 7:3a1115c2556b | 2534 | macro_period_ps = VL53L0X_calc_macro_period_ps( vcsel_period_pclks); |
sepp_nepp | 6:fb11b746ceb5 | 2535 | macro_period_ns = (macro_period_ps + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2536 | |
sepp_nepp | 9:cb4c6d4e5030 | 2537 | timeout_period_mclks = (uint32_t)(((timeout_period_us * 1000) |
sepp_nepp | 6:fb11b746ceb5 | 2538 | + (macro_period_ns / 2)) / macro_period_ns); |
sepp_nepp | 6:fb11b746ceb5 | 2539 | |
sepp_nepp | 6:fb11b746ceb5 | 2540 | return timeout_period_mclks; |
sepp_nepp | 6:fb11b746ceb5 | 2541 | } |
sepp_nepp | 6:fb11b746ceb5 | 2542 | |
sepp_nepp | 6:fb11b746ceb5 | 2543 | uint32_t VL53L0X::VL53L0X_isqrt(uint32_t num) |
sepp_nepp | 9:cb4c6d4e5030 | 2544 | { /* Implements an integer square root |
sepp_nepp | 9:cb4c6d4e5030 | 2545 | * From: http://en.wikipedia.org/wiki/Methods_of_computing_square_roots */ |
sepp_nepp | 6:fb11b746ceb5 | 2546 | |
sepp_nepp | 6:fb11b746ceb5 | 2547 | uint32_t res = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2548 | uint32_t bit = 1 << 30; |
sepp_nepp | 9:cb4c6d4e5030 | 2549 | /* The second-to-top bit is set: 1 << 14 for 16-bits, 1 << 30 for 32 bits */ |
sepp_nepp | 6:fb11b746ceb5 | 2550 | |
sepp_nepp | 6:fb11b746ceb5 | 2551 | /* "bit" starts at the highest power of four <= the argument. */ |
sepp_nepp | 9:cb4c6d4e5030 | 2552 | while (bit > num) { bit >>= 2; } |
sepp_nepp | 6:fb11b746ceb5 | 2553 | |
sepp_nepp | 6:fb11b746ceb5 | 2554 | while (bit != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 2555 | if (num >= res + bit) { |
sepp_nepp | 6:fb11b746ceb5 | 2556 | num -= res + bit; |
sepp_nepp | 6:fb11b746ceb5 | 2557 | res = (res >> 1) + bit; |
sepp_nepp | 9:cb4c6d4e5030 | 2558 | } |
sepp_nepp | 9:cb4c6d4e5030 | 2559 | else { res >>= 1; } |
sepp_nepp | 6:fb11b746ceb5 | 2560 | bit >>= 2; |
sepp_nepp | 6:fb11b746ceb5 | 2561 | } |
sepp_nepp | 6:fb11b746ceb5 | 2562 | return res; |
sepp_nepp | 6:fb11b746ceb5 | 2563 | } |
sepp_nepp | 6:fb11b746ceb5 | 2564 | |
sepp_nepp | 11:d8dbe3b87f9f | 2565 | VL53L0X_Error VL53L0X::VL53L0X_calc_dmax(FixPoint1616_t total_signal_rate_MHz, |
sepp_nepp | 11:d8dbe3b87f9f | 2566 | FixPoint1616_t total_corr_signal_rate_MHz, |
sepp_nepp | 6:fb11b746ceb5 | 2567 | FixPoint1616_t pw_mult, |
sepp_nepp | 6:fb11b746ceb5 | 2568 | uint32_t sigma_estimate_p1, |
sepp_nepp | 6:fb11b746ceb5 | 2569 | FixPoint1616_t sigma_estimate_p2, |
sepp_nepp | 6:fb11b746ceb5 | 2570 | uint32_t peak_vcsel_duration_us, |
sepp_nepp | 6:fb11b746ceb5 | 2571 | uint32_t *pd_max_mm) |
sepp_nepp | 8:2fd7cb217068 | 2572 | { const uint32_t c_sigma_limit = 18; |
sepp_nepp | 6:fb11b746ceb5 | 2573 | const FixPoint1616_t c_signal_limit = 0x4000; /* 0.25 */ |
sepp_nepp | 6:fb11b746ceb5 | 2574 | const FixPoint1616_t c_sigma_est_ref = 0x00000042; /* 0.001 */ |
sepp_nepp | 6:fb11b746ceb5 | 2575 | const uint32_t c_amb_eff_width_sigma_est_ns = 6; |
sepp_nepp | 6:fb11b746ceb5 | 2576 | const uint32_t c_amb_eff_width_d_max_ns = 7; |
sepp_nepp | 6:fb11b746ceb5 | 2577 | uint32_t dmax_cal_range_mm; |
sepp_nepp | 11:d8dbe3b87f9f | 2578 | FixPoint1616_t dmax_cal_signal_rate_rtn_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2579 | FixPoint1616_t min_signal_needed; |
sepp_nepp | 6:fb11b746ceb5 | 2580 | FixPoint1616_t min_signal_needed_p1; |
sepp_nepp | 6:fb11b746ceb5 | 2581 | FixPoint1616_t min_signal_needed_p2; |
sepp_nepp | 6:fb11b746ceb5 | 2582 | FixPoint1616_t min_signal_needed_p3; |
sepp_nepp | 6:fb11b746ceb5 | 2583 | FixPoint1616_t min_signal_needed_p4; |
sepp_nepp | 6:fb11b746ceb5 | 2584 | FixPoint1616_t sigma_limit_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 2585 | FixPoint1616_t sigma_est_sq_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 2586 | FixPoint1616_t signal_limit_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 2587 | FixPoint1616_t signal_at0_mm; |
sepp_nepp | 6:fb11b746ceb5 | 2588 | FixPoint1616_t dmax_dark; |
sepp_nepp | 6:fb11b746ceb5 | 2589 | FixPoint1616_t dmax_ambient; |
sepp_nepp | 6:fb11b746ceb5 | 2590 | FixPoint1616_t dmax_dark_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 2591 | FixPoint1616_t sigma_est_p2_tmp; |
sepp_nepp | 11:d8dbe3b87f9f | 2592 | uint32_t signal_rate_temp_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2593 | |
sepp_nepp | 6:fb11b746ceb5 | 2594 | VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 2595 | |
sepp_nepp | 11:d8dbe3b87f9f | 2596 | dmax_cal_range_mm = Data.DmaxCalRange_mm; |
sepp_nepp | 11:d8dbe3b87f9f | 2597 | |
sepp_nepp | 11:d8dbe3b87f9f | 2598 | dmax_cal_signal_rate_rtn_MHz = Data.DmaxCalSignalRateRtn_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2599 | |
sepp_nepp | 6:fb11b746ceb5 | 2600 | /* uint32 * FixPoint1616 = FixPoint1616 */ |
sepp_nepp | 11:d8dbe3b87f9f | 2601 | signal_at0_mm = dmax_cal_range_mm * dmax_cal_signal_rate_rtn_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2602 | |
sepp_nepp | 6:fb11b746ceb5 | 2603 | /* FixPoint1616 >> 8 = FixPoint2408 */ |
sepp_nepp | 6:fb11b746ceb5 | 2604 | signal_at0_mm = (signal_at0_mm + 0x80) >> 8; |
sepp_nepp | 6:fb11b746ceb5 | 2605 | signal_at0_mm *= dmax_cal_range_mm; |
sepp_nepp | 6:fb11b746ceb5 | 2606 | |
sepp_nepp | 6:fb11b746ceb5 | 2607 | min_signal_needed_p1 = 0; |
sepp_nepp | 11:d8dbe3b87f9f | 2608 | if (total_corr_signal_rate_MHz > 0) { |
sepp_nepp | 6:fb11b746ceb5 | 2609 | |
sepp_nepp | 9:cb4c6d4e5030 | 2610 | /* Shift by 10 bits to increase resolution prior to the division */ |
sepp_nepp | 11:d8dbe3b87f9f | 2611 | signal_rate_temp_MHz = total_signal_rate_MHz << 10; |
sepp_nepp | 6:fb11b746ceb5 | 2612 | |
sepp_nepp | 6:fb11b746ceb5 | 2613 | /* Add rounding value prior to division */ |
sepp_nepp | 11:d8dbe3b87f9f | 2614 | min_signal_needed_p1 = signal_rate_temp_MHz + |
sepp_nepp | 11:d8dbe3b87f9f | 2615 | (total_corr_signal_rate_MHz / 2); |
sepp_nepp | 6:fb11b746ceb5 | 2616 | |
sepp_nepp | 6:fb11b746ceb5 | 2617 | /* FixPoint0626/FixPoint1616 = FixPoint2210 */ |
sepp_nepp | 11:d8dbe3b87f9f | 2618 | min_signal_needed_p1 /= total_corr_signal_rate_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2619 | |
sepp_nepp | 6:fb11b746ceb5 | 2620 | /* Apply a factored version of the speed of light. |
sepp_nepp | 6:fb11b746ceb5 | 2621 | Correction to be applied at the end */ |
sepp_nepp | 6:fb11b746ceb5 | 2622 | min_signal_needed_p1 *= 3; |
sepp_nepp | 6:fb11b746ceb5 | 2623 | |
sepp_nepp | 6:fb11b746ceb5 | 2624 | /* FixPoint2210 * FixPoint2210 = FixPoint1220 */ |
sepp_nepp | 6:fb11b746ceb5 | 2625 | min_signal_needed_p1 *= min_signal_needed_p1; |
sepp_nepp | 6:fb11b746ceb5 | 2626 | |
sepp_nepp | 6:fb11b746ceb5 | 2627 | /* FixPoint1220 >> 16 = FixPoint2804 */ |
sepp_nepp | 6:fb11b746ceb5 | 2628 | min_signal_needed_p1 = (min_signal_needed_p1 + 0x8000) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2629 | } |
sepp_nepp | 6:fb11b746ceb5 | 2630 | min_signal_needed_p2 = pw_mult * sigma_estimate_p1; |
sepp_nepp | 6:fb11b746ceb5 | 2631 | |
sepp_nepp | 6:fb11b746ceb5 | 2632 | /* FixPoint1616 >> 16 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2633 | min_signal_needed_p2 = (min_signal_needed_p2 + 0x8000) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2634 | |
sepp_nepp | 6:fb11b746ceb5 | 2635 | /* uint32 * uint32 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2636 | min_signal_needed_p2 *= min_signal_needed_p2; |
sepp_nepp | 6:fb11b746ceb5 | 2637 | |
sepp_nepp | 6:fb11b746ceb5 | 2638 | /* Check sigmaEstimateP2 |
sepp_nepp | 6:fb11b746ceb5 | 2639 | * If this value is too high there is not enough signal rate |
sepp_nepp | 6:fb11b746ceb5 | 2640 | * to calculate dmax value so set a suitable value to ensure |
sepp_nepp | 9:cb4c6d4e5030 | 2641 | * a very small dmax. */ |
sepp_nepp | 6:fb11b746ceb5 | 2642 | sigma_est_p2_tmp = (sigma_estimate_p2 + 0x8000) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2643 | sigma_est_p2_tmp = (sigma_est_p2_tmp + c_amb_eff_width_sigma_est_ns / 2) / |
sepp_nepp | 6:fb11b746ceb5 | 2644 | c_amb_eff_width_sigma_est_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2645 | sigma_est_p2_tmp *= c_amb_eff_width_d_max_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2646 | |
sepp_nepp | 6:fb11b746ceb5 | 2647 | if (sigma_est_p2_tmp > 0xffff) { |
sepp_nepp | 6:fb11b746ceb5 | 2648 | min_signal_needed_p3 = 0xfff00000; |
sepp_nepp | 6:fb11b746ceb5 | 2649 | } else { |
sepp_nepp | 9:cb4c6d4e5030 | 2650 | /* DMAX uses a different ambient width from sigma, so apply correction. |
sepp_nepp | 9:cb4c6d4e5030 | 2651 | * Perform division before multiplication to prevent overflow. */ |
sepp_nepp | 6:fb11b746ceb5 | 2652 | sigma_estimate_p2 = (sigma_estimate_p2 + c_amb_eff_width_sigma_est_ns / 2) / |
sepp_nepp | 6:fb11b746ceb5 | 2653 | c_amb_eff_width_sigma_est_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2654 | sigma_estimate_p2 *= c_amb_eff_width_d_max_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2655 | |
sepp_nepp | 6:fb11b746ceb5 | 2656 | /* FixPoint1616 >> 16 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2657 | min_signal_needed_p3 = (sigma_estimate_p2 + 0x8000) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2658 | min_signal_needed_p3 *= min_signal_needed_p3; |
sepp_nepp | 6:fb11b746ceb5 | 2659 | } |
sepp_nepp | 6:fb11b746ceb5 | 2660 | |
sepp_nepp | 6:fb11b746ceb5 | 2661 | /* FixPoint1814 / uint32 = FixPoint1814 */ |
sepp_nepp | 6:fb11b746ceb5 | 2662 | sigma_limit_tmp = ((c_sigma_limit << 14) + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2663 | |
sepp_nepp | 6:fb11b746ceb5 | 2664 | /* FixPoint1814 * FixPoint1814 = FixPoint3628 := FixPoint0428 */ |
sepp_nepp | 6:fb11b746ceb5 | 2665 | sigma_limit_tmp *= sigma_limit_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 2666 | |
sepp_nepp | 6:fb11b746ceb5 | 2667 | /* FixPoint1616 * FixPoint1616 = FixPoint3232 */ |
sepp_nepp | 6:fb11b746ceb5 | 2668 | sigma_est_sq_tmp = c_sigma_est_ref * c_sigma_est_ref; |
sepp_nepp | 6:fb11b746ceb5 | 2669 | |
sepp_nepp | 6:fb11b746ceb5 | 2670 | /* FixPoint3232 >> 4 = FixPoint0428 */ |
sepp_nepp | 6:fb11b746ceb5 | 2671 | sigma_est_sq_tmp = (sigma_est_sq_tmp + 0x08) >> 4; |
sepp_nepp | 6:fb11b746ceb5 | 2672 | |
sepp_nepp | 6:fb11b746ceb5 | 2673 | /* FixPoint0428 - FixPoint0428 = FixPoint0428 */ |
sepp_nepp | 6:fb11b746ceb5 | 2674 | sigma_limit_tmp -= sigma_est_sq_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 2675 | |
sepp_nepp | 6:fb11b746ceb5 | 2676 | /* uint32_t * FixPoint0428 = FixPoint0428 */ |
sepp_nepp | 6:fb11b746ceb5 | 2677 | min_signal_needed_p4 = 4 * 12 * sigma_limit_tmp; |
sepp_nepp | 6:fb11b746ceb5 | 2678 | |
sepp_nepp | 6:fb11b746ceb5 | 2679 | /* FixPoint0428 >> 14 = FixPoint1814 */ |
sepp_nepp | 6:fb11b746ceb5 | 2680 | min_signal_needed_p4 = (min_signal_needed_p4 + 0x2000) >> 14; |
sepp_nepp | 6:fb11b746ceb5 | 2681 | |
sepp_nepp | 6:fb11b746ceb5 | 2682 | /* uint32 + uint32 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2683 | min_signal_needed = (min_signal_needed_p2 + min_signal_needed_p3); |
sepp_nepp | 6:fb11b746ceb5 | 2684 | |
sepp_nepp | 6:fb11b746ceb5 | 2685 | /* uint32 / uint32 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2686 | min_signal_needed += (peak_vcsel_duration_us / 2); |
sepp_nepp | 6:fb11b746ceb5 | 2687 | min_signal_needed /= peak_vcsel_duration_us; |
sepp_nepp | 6:fb11b746ceb5 | 2688 | |
sepp_nepp | 6:fb11b746ceb5 | 2689 | /* uint32 << 14 = FixPoint1814 */ |
sepp_nepp | 6:fb11b746ceb5 | 2690 | min_signal_needed <<= 14; |
sepp_nepp | 6:fb11b746ceb5 | 2691 | |
sepp_nepp | 6:fb11b746ceb5 | 2692 | /* FixPoint1814 / FixPoint1814 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2693 | min_signal_needed += (min_signal_needed_p4 / 2); |
sepp_nepp | 6:fb11b746ceb5 | 2694 | min_signal_needed /= min_signal_needed_p4; |
sepp_nepp | 6:fb11b746ceb5 | 2695 | |
sepp_nepp | 6:fb11b746ceb5 | 2696 | /* FixPoint3200 * FixPoint2804 := FixPoint2804*/ |
sepp_nepp | 6:fb11b746ceb5 | 2697 | min_signal_needed *= min_signal_needed_p1; |
sepp_nepp | 6:fb11b746ceb5 | 2698 | |
sepp_nepp | 6:fb11b746ceb5 | 2699 | /* Apply correction by dividing by 1000000. |
sepp_nepp | 6:fb11b746ceb5 | 2700 | * This assumes 10E16 on the numerator of the equation |
sepp_nepp | 6:fb11b746ceb5 | 2701 | * and 10E-22 on the denominator. |
sepp_nepp | 6:fb11b746ceb5 | 2702 | * We do this because 32bit fix point calculation can't |
sepp_nepp | 6:fb11b746ceb5 | 2703 | * handle the larger and smaller elements of this equation, |
sepp_nepp | 6:fb11b746ceb5 | 2704 | * i.e. speed of light and pulse widths. |
sepp_nepp | 6:fb11b746ceb5 | 2705 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2706 | min_signal_needed = (min_signal_needed + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2707 | min_signal_needed <<= 4; |
sepp_nepp | 6:fb11b746ceb5 | 2708 | |
sepp_nepp | 6:fb11b746ceb5 | 2709 | min_signal_needed = (min_signal_needed + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2710 | |
sepp_nepp | 6:fb11b746ceb5 | 2711 | /* FixPoint1616 >> 8 = FixPoint2408 */ |
sepp_nepp | 6:fb11b746ceb5 | 2712 | signal_limit_tmp = (c_signal_limit + 0x80) >> 8; |
sepp_nepp | 6:fb11b746ceb5 | 2713 | |
sepp_nepp | 6:fb11b746ceb5 | 2714 | /* FixPoint2408/FixPoint2408 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2715 | if (signal_limit_tmp != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 2716 | dmax_dark_tmp = (signal_at0_mm + (signal_limit_tmp / 2)) |
sepp_nepp | 6:fb11b746ceb5 | 2717 | / signal_limit_tmp; |
sepp_nepp | 9:cb4c6d4e5030 | 2718 | } else { dmax_dark_tmp = 0; } |
sepp_nepp | 6:fb11b746ceb5 | 2719 | |
sepp_nepp | 6:fb11b746ceb5 | 2720 | dmax_dark = VL53L0X_isqrt(dmax_dark_tmp); |
sepp_nepp | 6:fb11b746ceb5 | 2721 | |
sepp_nepp | 6:fb11b746ceb5 | 2722 | /* FixPoint2408/FixPoint2408 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2723 | if (min_signal_needed != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 2724 | dmax_ambient = (signal_at0_mm + min_signal_needed / 2) |
sepp_nepp | 6:fb11b746ceb5 | 2725 | / min_signal_needed; |
sepp_nepp | 9:cb4c6d4e5030 | 2726 | } else { dmax_ambient = 0; } |
sepp_nepp | 6:fb11b746ceb5 | 2727 | |
sepp_nepp | 6:fb11b746ceb5 | 2728 | dmax_ambient = VL53L0X_isqrt(dmax_ambient); |
sepp_nepp | 6:fb11b746ceb5 | 2729 | |
sepp_nepp | 6:fb11b746ceb5 | 2730 | *pd_max_mm = dmax_dark; |
sepp_nepp | 9:cb4c6d4e5030 | 2731 | if (dmax_dark > dmax_ambient) { *pd_max_mm = dmax_ambient; } |
sepp_nepp | 6:fb11b746ceb5 | 2732 | |
sepp_nepp | 6:fb11b746ceb5 | 2733 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 2734 | } |
sepp_nepp | 6:fb11b746ceb5 | 2735 | |
sepp_nepp | 8:2fd7cb217068 | 2736 | VL53L0X_Error VL53L0X::VL53L0X_calc_sigma_estimate(VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data, |
sepp_nepp | 12:81f37e50f8f8 | 2737 | FixPoint1616_t *p_sigma_estimate, uint32_t *p_dmax_mm) |
sepp_nepp | 8:2fd7cb217068 | 2738 | { /* Expressed in 100ths of a ns, i.e. centi-ns */ |
sepp_nepp | 6:fb11b746ceb5 | 2739 | const uint32_t c_pulse_effective_width_centi_ns = 800; |
sepp_nepp | 6:fb11b746ceb5 | 2740 | /* Expressed in 100ths of a ns, i.e. centi-ns */ |
sepp_nepp | 6:fb11b746ceb5 | 2741 | const uint32_t c_ambient_effective_width_centi_ns = 600; |
sepp_nepp | 6:fb11b746ceb5 | 2742 | const FixPoint1616_t c_dflt_final_range_integration_time_milli_secs = 0x00190000; /* 25ms */ |
sepp_nepp | 6:fb11b746ceb5 | 2743 | const uint32_t c_vcsel_pulse_width_ps = 4700; /* pico secs */ |
sepp_nepp | 6:fb11b746ceb5 | 2744 | const FixPoint1616_t c_sigma_est_max = 0x028F87AE; |
sepp_nepp | 6:fb11b746ceb5 | 2745 | const FixPoint1616_t c_sigma_est_rtn_max = 0xF000; |
sepp_nepp | 6:fb11b746ceb5 | 2746 | const FixPoint1616_t c_amb_to_signal_ratio_max = 0xF0000000 / |
sepp_nepp | 6:fb11b746ceb5 | 2747 | c_ambient_effective_width_centi_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2748 | /* Time Of Flight per mm (6.6 pico secs) */ |
sepp_nepp | 6:fb11b746ceb5 | 2749 | const FixPoint1616_t c_tof_per_mm_ps = 0x0006999A; |
sepp_nepp | 6:fb11b746ceb5 | 2750 | const uint32_t c_16bit_rounding_param = 0x00008000; |
sepp_nepp | 6:fb11b746ceb5 | 2751 | const FixPoint1616_t c_max_x_talk_kcps = 0x00320000; |
sepp_nepp | 6:fb11b746ceb5 | 2752 | const uint32_t c_pll_period_ps = 1655; |
sepp_nepp | 6:fb11b746ceb5 | 2753 | |
sepp_nepp | 6:fb11b746ceb5 | 2754 | uint32_t vcsel_total_events_rtn; |
sepp_nepp | 6:fb11b746ceb5 | 2755 | uint32_t final_range_timeout_micro_secs; |
sepp_nepp | 6:fb11b746ceb5 | 2756 | uint32_t pre_range_timeout_micro_secs; |
sepp_nepp | 6:fb11b746ceb5 | 2757 | uint32_t final_range_integration_time_milli_secs; |
sepp_nepp | 6:fb11b746ceb5 | 2758 | FixPoint1616_t sigma_estimate_p1; |
sepp_nepp | 6:fb11b746ceb5 | 2759 | FixPoint1616_t sigma_estimate_p2; |
sepp_nepp | 6:fb11b746ceb5 | 2760 | FixPoint1616_t sigma_estimate_p3; |
sepp_nepp | 6:fb11b746ceb5 | 2761 | FixPoint1616_t delta_t_ps; |
sepp_nepp | 6:fb11b746ceb5 | 2762 | FixPoint1616_t pw_mult; |
sepp_nepp | 6:fb11b746ceb5 | 2763 | FixPoint1616_t sigma_est_rtn; |
sepp_nepp | 6:fb11b746ceb5 | 2764 | FixPoint1616_t sigma_estimate; |
sepp_nepp | 6:fb11b746ceb5 | 2765 | FixPoint1616_t x_talk_correction; |
sepp_nepp | 6:fb11b746ceb5 | 2766 | FixPoint1616_t ambient_rate_kcps; |
sepp_nepp | 6:fb11b746ceb5 | 2767 | FixPoint1616_t peak_signal_rate_kcps; |
sepp_nepp | 11:d8dbe3b87f9f | 2768 | FixPoint1616_t x_talk_comp_rate_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2769 | uint32_t x_talk_comp_rate_kcps; |
sepp_nepp | 6:fb11b746ceb5 | 2770 | VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 11:d8dbe3b87f9f | 2771 | FixPoint1616_t diff1_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 2772 | FixPoint1616_t diff2_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2773 | FixPoint1616_t sqr1; |
sepp_nepp | 6:fb11b746ceb5 | 2774 | FixPoint1616_t sqr2; |
sepp_nepp | 6:fb11b746ceb5 | 2775 | FixPoint1616_t sqr_sum; |
sepp_nepp | 6:fb11b746ceb5 | 2776 | FixPoint1616_t sqrt_result_centi_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2777 | FixPoint1616_t sqrt_result; |
sepp_nepp | 11:d8dbe3b87f9f | 2778 | FixPoint1616_t total_signal_rate_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 2779 | FixPoint1616_t corrected_signal_rate_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2780 | FixPoint1616_t sigma_est_ref; |
sepp_nepp | 6:fb11b746ceb5 | 2781 | uint32_t vcsel_width; |
sepp_nepp | 6:fb11b746ceb5 | 2782 | uint32_t final_range_macro_pclks; |
sepp_nepp | 6:fb11b746ceb5 | 2783 | uint32_t pre_range_macro_pclks; |
sepp_nepp | 6:fb11b746ceb5 | 2784 | uint32_t peak_vcsel_duration_us; |
sepp_nepp | 6:fb11b746ceb5 | 2785 | uint8_t final_range_vcsel_pclks; |
sepp_nepp | 6:fb11b746ceb5 | 2786 | uint8_t pre_range_vcsel_pclks; |
sepp_nepp | 6:fb11b746ceb5 | 2787 | /*! \addtogroup calc_sigma_estimate |
sepp_nepp | 6:fb11b746ceb5 | 2788 | * @{ |
sepp_nepp | 6:fb11b746ceb5 | 2789 | * |
sepp_nepp | 6:fb11b746ceb5 | 2790 | * Estimates the range sigma |
sepp_nepp | 6:fb11b746ceb5 | 2791 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2792 | |
sepp_nepp | 11:d8dbe3b87f9f | 2793 | x_talk_comp_rate_MHz = CurrentParameters.XTalkCompensationRate_MHz ; |
sepp_nepp | 6:fb11b746ceb5 | 2794 | |
sepp_nepp | 6:fb11b746ceb5 | 2795 | /* |
sepp_nepp | 11:d8dbe3b87f9f | 2796 | * We work in kcps rather than MHz as this helps keep within the |
sepp_nepp | 6:fb11b746ceb5 | 2797 | * confines of the 32 Fix1616 type. |
sepp_nepp | 6:fb11b746ceb5 | 2798 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2799 | |
sepp_nepp | 12:81f37e50f8f8 | 2800 | ambient_rate_kcps = (p_ranging_measurement_data->AmbientRateRtn_MHz * 1000) >> 16; |
sepp_nepp | 12:81f37e50f8f8 | 2801 | |
sepp_nepp | 12:81f37e50f8f8 | 2802 | corrected_signal_rate_MHz = p_ranging_measurement_data->SignalRateRtn_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 2803 | |
sepp_nepp | 11:d8dbe3b87f9f | 2804 | status = VL53L0X_get_total_signal_rate(p_ranging_measurement_data, &total_signal_rate_MHz); |
sepp_nepp | 11:d8dbe3b87f9f | 2805 | status = VL53L0X_get_total_xtalk_rate(p_ranging_measurement_data, &x_talk_comp_rate_MHz); |
sepp_nepp | 6:fb11b746ceb5 | 2806 | |
sepp_nepp | 6:fb11b746ceb5 | 2807 | /* Signal rate measurement provided by device is the |
sepp_nepp | 6:fb11b746ceb5 | 2808 | * peak signal rate, not average. |
sepp_nepp | 6:fb11b746ceb5 | 2809 | */ |
sepp_nepp | 11:d8dbe3b87f9f | 2810 | peak_signal_rate_kcps = (total_signal_rate_MHz * 1000); |
sepp_nepp | 6:fb11b746ceb5 | 2811 | peak_signal_rate_kcps = (peak_signal_rate_kcps + 0x8000) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2812 | |
sepp_nepp | 11:d8dbe3b87f9f | 2813 | x_talk_comp_rate_kcps = x_talk_comp_rate_MHz * 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2814 | |
sepp_nepp | 6:fb11b746ceb5 | 2815 | if (x_talk_comp_rate_kcps > c_max_x_talk_kcps) { |
sepp_nepp | 6:fb11b746ceb5 | 2816 | x_talk_comp_rate_kcps = c_max_x_talk_kcps; |
sepp_nepp | 6:fb11b746ceb5 | 2817 | } |
sepp_nepp | 6:fb11b746ceb5 | 2818 | |
sepp_nepp | 6:fb11b746ceb5 | 2819 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 2820 | |
sepp_nepp | 6:fb11b746ceb5 | 2821 | /* Calculate final range macro periods */ |
sepp_nepp | 11:d8dbe3b87f9f | 2822 | final_range_timeout_micro_secs = Data.FinalRangeTimeout_us; |
sepp_nepp | 8:2fd7cb217068 | 2823 | final_range_vcsel_pclks = Data.FinalRangeVcselPulsePeriod; |
sepp_nepp | 7:3a1115c2556b | 2824 | final_range_macro_pclks = VL53L0X_calc_timeout_mclks( final_range_timeout_micro_secs, final_range_vcsel_pclks); |
sepp_nepp | 6:fb11b746ceb5 | 2825 | |
sepp_nepp | 6:fb11b746ceb5 | 2826 | /* Calculate pre-range macro periods */ |
sepp_nepp | 11:d8dbe3b87f9f | 2827 | pre_range_timeout_micro_secs = Data.PreRangeTimeout_us; |
sepp_nepp | 8:2fd7cb217068 | 2828 | pre_range_vcsel_pclks = Data.PreRangeVcselPulsePeriod; |
sepp_nepp | 7:3a1115c2556b | 2829 | |
sepp_nepp | 7:3a1115c2556b | 2830 | pre_range_macro_pclks = VL53L0X_calc_timeout_mclks(pre_range_timeout_micro_secs, pre_range_vcsel_pclks); |
sepp_nepp | 6:fb11b746ceb5 | 2831 | |
sepp_nepp | 6:fb11b746ceb5 | 2832 | vcsel_width = 3; |
sepp_nepp | 6:fb11b746ceb5 | 2833 | if (final_range_vcsel_pclks == 8) { |
sepp_nepp | 6:fb11b746ceb5 | 2834 | vcsel_width = 2; |
sepp_nepp | 6:fb11b746ceb5 | 2835 | } |
sepp_nepp | 6:fb11b746ceb5 | 2836 | |
sepp_nepp | 6:fb11b746ceb5 | 2837 | peak_vcsel_duration_us = vcsel_width * 2048 * |
sepp_nepp | 6:fb11b746ceb5 | 2838 | (pre_range_macro_pclks + final_range_macro_pclks); |
sepp_nepp | 6:fb11b746ceb5 | 2839 | peak_vcsel_duration_us = (peak_vcsel_duration_us + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2840 | peak_vcsel_duration_us *= c_pll_period_ps; |
sepp_nepp | 6:fb11b746ceb5 | 2841 | peak_vcsel_duration_us = (peak_vcsel_duration_us + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2842 | |
sepp_nepp | 6:fb11b746ceb5 | 2843 | /* Fix1616 >> 8 = Fix2408 */ |
sepp_nepp | 11:d8dbe3b87f9f | 2844 | total_signal_rate_MHz = (total_signal_rate_MHz + 0x80) >> 8; |
sepp_nepp | 6:fb11b746ceb5 | 2845 | |
sepp_nepp | 6:fb11b746ceb5 | 2846 | /* Fix2408 * uint32 = Fix2408 */ |
sepp_nepp | 11:d8dbe3b87f9f | 2847 | vcsel_total_events_rtn = total_signal_rate_MHz * |
sepp_nepp | 6:fb11b746ceb5 | 2848 | peak_vcsel_duration_us; |
sepp_nepp | 6:fb11b746ceb5 | 2849 | |
sepp_nepp | 6:fb11b746ceb5 | 2850 | /* Fix2408 >> 8 = uint32 */ |
sepp_nepp | 6:fb11b746ceb5 | 2851 | vcsel_total_events_rtn = (vcsel_total_events_rtn + 0x80) >> 8; |
sepp_nepp | 6:fb11b746ceb5 | 2852 | |
sepp_nepp | 6:fb11b746ceb5 | 2853 | /* Fix2408 << 8 = Fix1616 = */ |
sepp_nepp | 11:d8dbe3b87f9f | 2854 | total_signal_rate_MHz <<= 8; |
sepp_nepp | 6:fb11b746ceb5 | 2855 | } |
sepp_nepp | 6:fb11b746ceb5 | 2856 | |
sepp_nepp | 12:81f37e50f8f8 | 2857 | if (status != VL53L0X_ERROR_NONE) { return status; } |
sepp_nepp | 6:fb11b746ceb5 | 2858 | |
sepp_nepp | 6:fb11b746ceb5 | 2859 | if (peak_signal_rate_kcps == 0) { |
sepp_nepp | 6:fb11b746ceb5 | 2860 | *p_sigma_estimate = c_sigma_est_max; |
sepp_nepp | 12:81f37e50f8f8 | 2861 | p_ranging_measurement_data->SigmaEstimate = c_sigma_est_max; |
sepp_nepp | 6:fb11b746ceb5 | 2862 | *p_dmax_mm = 0; |
sepp_nepp | 6:fb11b746ceb5 | 2863 | } else { |
sepp_nepp | 12:81f37e50f8f8 | 2864 | if (vcsel_total_events_rtn < 1) { vcsel_total_events_rtn = 1; } |
sepp_nepp | 6:fb11b746ceb5 | 2865 | |
sepp_nepp | 6:fb11b746ceb5 | 2866 | sigma_estimate_p1 = c_pulse_effective_width_centi_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2867 | |
sepp_nepp | 6:fb11b746ceb5 | 2868 | /* ((FixPoint1616 << 16)* uint32)/uint32 = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2869 | sigma_estimate_p2 = (ambient_rate_kcps << 16) / peak_signal_rate_kcps; |
sepp_nepp | 6:fb11b746ceb5 | 2870 | if (sigma_estimate_p2 > c_amb_to_signal_ratio_max) { |
sepp_nepp | 6:fb11b746ceb5 | 2871 | /* Clip to prevent overflow. Will ensure safe |
sepp_nepp | 6:fb11b746ceb5 | 2872 | * max result. */ |
sepp_nepp | 6:fb11b746ceb5 | 2873 | sigma_estimate_p2 = c_amb_to_signal_ratio_max; |
sepp_nepp | 6:fb11b746ceb5 | 2874 | } |
sepp_nepp | 6:fb11b746ceb5 | 2875 | sigma_estimate_p2 *= c_ambient_effective_width_centi_ns; |
sepp_nepp | 6:fb11b746ceb5 | 2876 | |
sepp_nepp | 6:fb11b746ceb5 | 2877 | sigma_estimate_p3 = 2 * VL53L0X_isqrt(vcsel_total_events_rtn * 12); |
sepp_nepp | 6:fb11b746ceb5 | 2878 | |
sepp_nepp | 6:fb11b746ceb5 | 2879 | /* uint32 * FixPoint1616 = FixPoint1616 */ |
sepp_nepp | 12:81f37e50f8f8 | 2880 | delta_t_ps = p_ranging_measurement_data->Range_mm * c_tof_per_mm_ps; |
sepp_nepp | 12:81f37e50f8f8 | 2881 | |
sepp_nepp | 12:81f37e50f8f8 | 2882 | /* vcselRate - xtalkCompRate |
sepp_nepp | 6:fb11b746ceb5 | 2883 | * (uint32 << 16) - FixPoint1616 = FixPoint1616. |
sepp_nepp | 11:d8dbe3b87f9f | 2884 | * Divide result by 1000 to convert to MHz. |
sepp_nepp | 12:81f37e50f8f8 | 2885 | * 500 is added to ensure rounding when integer division truncates. */ |
sepp_nepp | 11:d8dbe3b87f9f | 2886 | diff1_MHz = (((peak_signal_rate_kcps << 16) - |
sepp_nepp | 6:fb11b746ceb5 | 2887 | 2 * x_talk_comp_rate_kcps) + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2888 | |
sepp_nepp | 6:fb11b746ceb5 | 2889 | /* vcselRate + xtalkCompRate */ |
sepp_nepp | 11:d8dbe3b87f9f | 2890 | diff2_MHz = ((peak_signal_rate_kcps << 16) + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2891 | |
sepp_nepp | 12:81f37e50f8f8 | 2892 | /* Shift by 8 bits to increase resolution prior to the division */ |
sepp_nepp | 11:d8dbe3b87f9f | 2893 | diff1_MHz <<= 8; |
sepp_nepp | 6:fb11b746ceb5 | 2894 | |
sepp_nepp | 6:fb11b746ceb5 | 2895 | /* FixPoint0824/FixPoint1616 = FixPoint2408 */ |
sepp_nepp | 11:d8dbe3b87f9f | 2896 | x_talk_correction = diff1_MHz / diff2_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 2897 | |
sepp_nepp | 6:fb11b746ceb5 | 2898 | /* FixPoint2408 << 8 = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2899 | x_talk_correction <<= 8; |
sepp_nepp | 6:fb11b746ceb5 | 2900 | |
sepp_nepp | 6:fb11b746ceb5 | 2901 | if (p_ranging_measurement_data->RangeStatus != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 2902 | pw_mult = 1 << 16; |
sepp_nepp | 6:fb11b746ceb5 | 2903 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 2904 | /* FixPoint1616/uint32 = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2905 | pw_mult = delta_t_ps / c_vcsel_pulse_width_ps; /* smaller than 1.0f */ |
sepp_nepp | 6:fb11b746ceb5 | 2906 | |
sepp_nepp | 12:81f37e50f8f8 | 2907 | /* FixPoint1616 * FixPoint1616 = FixPoint3232, however both |
sepp_nepp | 12:81f37e50f8f8 | 2908 | * values are small enough such that32 bits will not be exceeded. */ |
sepp_nepp | 6:fb11b746ceb5 | 2909 | pw_mult *= ((1 << 16) - x_talk_correction); |
sepp_nepp | 6:fb11b746ceb5 | 2910 | |
sepp_nepp | 6:fb11b746ceb5 | 2911 | /* (FixPoint3232 >> 16) = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2912 | pw_mult = (pw_mult + c_16bit_rounding_param) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2913 | |
sepp_nepp | 6:fb11b746ceb5 | 2914 | /* FixPoint1616 + FixPoint1616 = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2915 | pw_mult += (1 << 16); |
sepp_nepp | 6:fb11b746ceb5 | 2916 | |
sepp_nepp | 12:81f37e50f8f8 | 2917 | /* At this point the value will be 1.xx, therefore if we square |
sepp_nepp | 6:fb11b746ceb5 | 2918 | * the value this will exceed 32 bits. To address this perform |
sepp_nepp | 12:81f37e50f8f8 | 2919 | * a single shift to the right before the multiplication. */ |
sepp_nepp | 6:fb11b746ceb5 | 2920 | pw_mult >>= 1; |
sepp_nepp | 6:fb11b746ceb5 | 2921 | /* FixPoint1715 * FixPoint1715 = FixPoint3430 */ |
sepp_nepp | 6:fb11b746ceb5 | 2922 | pw_mult = pw_mult * pw_mult; |
sepp_nepp | 6:fb11b746ceb5 | 2923 | |
sepp_nepp | 6:fb11b746ceb5 | 2924 | /* (FixPoint3430 >> 14) = Fix1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2925 | pw_mult >>= 14; |
sepp_nepp | 6:fb11b746ceb5 | 2926 | } |
sepp_nepp | 6:fb11b746ceb5 | 2927 | |
sepp_nepp | 6:fb11b746ceb5 | 2928 | /* FixPoint1616 * uint32 = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2929 | sqr1 = pw_mult * sigma_estimate_p1; |
sepp_nepp | 6:fb11b746ceb5 | 2930 | |
sepp_nepp | 6:fb11b746ceb5 | 2931 | /* (FixPoint1616 >> 16) = FixPoint3200 */ |
sepp_nepp | 6:fb11b746ceb5 | 2932 | sqr1 = (sqr1 + 0x8000) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2933 | |
sepp_nepp | 6:fb11b746ceb5 | 2934 | /* FixPoint3200 * FixPoint3200 = FixPoint6400 */ |
sepp_nepp | 6:fb11b746ceb5 | 2935 | sqr1 *= sqr1; |
sepp_nepp | 6:fb11b746ceb5 | 2936 | |
sepp_nepp | 6:fb11b746ceb5 | 2937 | sqr2 = sigma_estimate_p2; |
sepp_nepp | 6:fb11b746ceb5 | 2938 | |
sepp_nepp | 6:fb11b746ceb5 | 2939 | /* (FixPoint1616 >> 16) = FixPoint3200 */ |
sepp_nepp | 6:fb11b746ceb5 | 2940 | sqr2 = (sqr2 + 0x8000) >> 16; |
sepp_nepp | 6:fb11b746ceb5 | 2941 | |
sepp_nepp | 6:fb11b746ceb5 | 2942 | /* FixPoint3200 * FixPoint3200 = FixPoint6400 */ |
sepp_nepp | 6:fb11b746ceb5 | 2943 | sqr2 *= sqr2; |
sepp_nepp | 6:fb11b746ceb5 | 2944 | |
sepp_nepp | 6:fb11b746ceb5 | 2945 | /* FixPoint64000 + FixPoint6400 = FixPoint6400 */ |
sepp_nepp | 6:fb11b746ceb5 | 2946 | sqr_sum = sqr1 + sqr2; |
sepp_nepp | 6:fb11b746ceb5 | 2947 | |
sepp_nepp | 6:fb11b746ceb5 | 2948 | /* SQRT(FixPoin6400) = FixPoint3200 */ |
sepp_nepp | 6:fb11b746ceb5 | 2949 | sqrt_result_centi_ns = VL53L0X_isqrt(sqr_sum); |
sepp_nepp | 6:fb11b746ceb5 | 2950 | |
sepp_nepp | 6:fb11b746ceb5 | 2951 | /* (FixPoint3200 << 16) = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2952 | sqrt_result_centi_ns <<= 16; |
sepp_nepp | 6:fb11b746ceb5 | 2953 | |
sepp_nepp | 12:81f37e50f8f8 | 2954 | /* Note that the Speed Of Light is expressed in um per 1E-10 |
sepp_nepp | 6:fb11b746ceb5 | 2955 | * seconds (2997) Therefore to get mm/ns we have to divide by |
sepp_nepp | 6:fb11b746ceb5 | 2956 | * 10000 |
sepp_nepp | 6:fb11b746ceb5 | 2957 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2958 | sigma_est_rtn = (((sqrt_result_centi_ns + 50) / 100) / |
sepp_nepp | 6:fb11b746ceb5 | 2959 | sigma_estimate_p3); |
sepp_nepp | 6:fb11b746ceb5 | 2960 | sigma_est_rtn *= VL53L0X_SPEED_OF_LIGHT_IN_AIR; |
sepp_nepp | 6:fb11b746ceb5 | 2961 | |
sepp_nepp | 6:fb11b746ceb5 | 2962 | /* Add 5000 before dividing by 10000 to ensure rounding. */ |
sepp_nepp | 6:fb11b746ceb5 | 2963 | sigma_est_rtn += 5000; |
sepp_nepp | 6:fb11b746ceb5 | 2964 | sigma_est_rtn /= 10000; |
sepp_nepp | 6:fb11b746ceb5 | 2965 | |
sepp_nepp | 6:fb11b746ceb5 | 2966 | if (sigma_est_rtn > c_sigma_est_rtn_max) { |
sepp_nepp | 6:fb11b746ceb5 | 2967 | /* Clip to prevent overflow. Will ensure safe |
sepp_nepp | 6:fb11b746ceb5 | 2968 | * max result. */ |
sepp_nepp | 6:fb11b746ceb5 | 2969 | sigma_est_rtn = c_sigma_est_rtn_max; |
sepp_nepp | 6:fb11b746ceb5 | 2970 | } |
sepp_nepp | 6:fb11b746ceb5 | 2971 | final_range_integration_time_milli_secs = |
sepp_nepp | 6:fb11b746ceb5 | 2972 | (final_range_timeout_micro_secs + pre_range_timeout_micro_secs + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2973 | |
sepp_nepp | 6:fb11b746ceb5 | 2974 | /* sigmaEstRef = 1mm * 25ms/final range integration time (inc pre-range) |
sepp_nepp | 6:fb11b746ceb5 | 2975 | * sqrt(FixPoint1616/int) = FixPoint2408) |
sepp_nepp | 6:fb11b746ceb5 | 2976 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2977 | sigma_est_ref = |
sepp_nepp | 6:fb11b746ceb5 | 2978 | VL53L0X_isqrt((c_dflt_final_range_integration_time_milli_secs + |
sepp_nepp | 6:fb11b746ceb5 | 2979 | final_range_integration_time_milli_secs / 2) / |
sepp_nepp | 6:fb11b746ceb5 | 2980 | final_range_integration_time_milli_secs); |
sepp_nepp | 6:fb11b746ceb5 | 2981 | |
sepp_nepp | 6:fb11b746ceb5 | 2982 | /* FixPoint2408 << 8 = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2983 | sigma_est_ref <<= 8; |
sepp_nepp | 6:fb11b746ceb5 | 2984 | sigma_est_ref = (sigma_est_ref + 500) / 1000; |
sepp_nepp | 6:fb11b746ceb5 | 2985 | |
sepp_nepp | 6:fb11b746ceb5 | 2986 | /* FixPoint1616 * FixPoint1616 = FixPoint3232 */ |
sepp_nepp | 6:fb11b746ceb5 | 2987 | sqr1 = sigma_est_rtn * sigma_est_rtn; |
sepp_nepp | 6:fb11b746ceb5 | 2988 | /* FixPoint1616 * FixPoint1616 = FixPoint3232 */ |
sepp_nepp | 6:fb11b746ceb5 | 2989 | sqr2 = sigma_est_ref * sigma_est_ref; |
sepp_nepp | 6:fb11b746ceb5 | 2990 | |
sepp_nepp | 6:fb11b746ceb5 | 2991 | /* sqrt(FixPoint3232) = FixPoint1616 */ |
sepp_nepp | 6:fb11b746ceb5 | 2992 | sqrt_result = VL53L0X_isqrt((sqr1 + sqr2)); |
sepp_nepp | 6:fb11b746ceb5 | 2993 | /* |
sepp_nepp | 6:fb11b746ceb5 | 2994 | * Note that the Shift by 4 bits increases resolution prior to |
sepp_nepp | 6:fb11b746ceb5 | 2995 | * the sqrt, therefore the result must be shifted by 2 bits to |
sepp_nepp | 6:fb11b746ceb5 | 2996 | * the right to revert back to the FixPoint1616 format. |
sepp_nepp | 6:fb11b746ceb5 | 2997 | */ |
sepp_nepp | 6:fb11b746ceb5 | 2998 | |
sepp_nepp | 6:fb11b746ceb5 | 2999 | sigma_estimate = 1000 * sqrt_result; |
sepp_nepp | 6:fb11b746ceb5 | 3000 | |
sepp_nepp | 6:fb11b746ceb5 | 3001 | if ((peak_signal_rate_kcps < 1) || (vcsel_total_events_rtn < 1) || |
sepp_nepp | 6:fb11b746ceb5 | 3002 | (sigma_estimate > c_sigma_est_max)) { |
sepp_nepp | 6:fb11b746ceb5 | 3003 | sigma_estimate = c_sigma_est_max; |
sepp_nepp | 6:fb11b746ceb5 | 3004 | } |
sepp_nepp | 6:fb11b746ceb5 | 3005 | |
sepp_nepp | 6:fb11b746ceb5 | 3006 | *p_sigma_estimate = (uint32_t)(sigma_estimate); |
sepp_nepp | 12:81f37e50f8f8 | 3007 | p_ranging_measurement_data->SigmaEstimate = *p_sigma_estimate; |
sepp_nepp | 11:d8dbe3b87f9f | 3008 | status = VL53L0X_calc_dmax(total_signal_rate_MHz, |
sepp_nepp | 11:d8dbe3b87f9f | 3009 | corrected_signal_rate_MHz, |
sepp_nepp | 6:fb11b746ceb5 | 3010 | pw_mult, |
sepp_nepp | 6:fb11b746ceb5 | 3011 | sigma_estimate_p1, |
sepp_nepp | 6:fb11b746ceb5 | 3012 | sigma_estimate_p2, |
sepp_nepp | 6:fb11b746ceb5 | 3013 | peak_vcsel_duration_us, |
sepp_nepp | 6:fb11b746ceb5 | 3014 | p_dmax_mm); |
sepp_nepp | 6:fb11b746ceb5 | 3015 | } |
sepp_nepp | 6:fb11b746ceb5 | 3016 | |
sepp_nepp | 6:fb11b746ceb5 | 3017 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3018 | } |
sepp_nepp | 6:fb11b746ceb5 | 3019 | |
sepp_nepp | 8:2fd7cb217068 | 3020 | VL53L0X_Error VL53L0X::VL53L0X_get_pal_range_status(uint8_t device_range_status, |
sepp_nepp | 6:fb11b746ceb5 | 3021 | FixPoint1616_t signal_rate, |
sepp_nepp | 6:fb11b746ceb5 | 3022 | uint16_t effective_spad_rtn_count, |
sepp_nepp | 6:fb11b746ceb5 | 3023 | VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data, |
sepp_nepp | 6:fb11b746ceb5 | 3024 | uint8_t *p_pal_range_status) |
sepp_nepp | 8:2fd7cb217068 | 3025 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3026 | uint8_t none_flag; |
sepp_nepp | 6:fb11b746ceb5 | 3027 | uint8_t sigma_limitflag = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3028 | uint8_t signal_ref_clipflag = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3029 | uint8_t range_ignore_thresholdflag = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3030 | uint8_t sigma_limit_check_enable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3031 | uint8_t signal_rate_final_range_limit_check_enable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3032 | uint8_t signal_ref_clip_limit_check_enable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3033 | uint8_t range_ignore_threshold_limit_check_enable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3034 | FixPoint1616_t sigma_estimate; |
sepp_nepp | 6:fb11b746ceb5 | 3035 | FixPoint1616_t sigma_limit_value; |
sepp_nepp | 6:fb11b746ceb5 | 3036 | FixPoint1616_t signal_ref_clip_value; |
sepp_nepp | 6:fb11b746ceb5 | 3037 | FixPoint1616_t range_ignore_threshold_value; |
sepp_nepp | 6:fb11b746ceb5 | 3038 | FixPoint1616_t signal_rate_per_spad; |
sepp_nepp | 6:fb11b746ceb5 | 3039 | uint8_t device_range_status_internal = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3040 | uint16_t tmp_word = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3041 | uint8_t temp8; |
sepp_nepp | 6:fb11b746ceb5 | 3042 | uint32_t dmax_mm = 0; |
sepp_nepp | 11:d8dbe3b87f9f | 3043 | FixPoint1616_t last_signal_ref_MHz; |
sepp_nepp | 9:cb4c6d4e5030 | 3044 | |
sepp_nepp | 9:cb4c6d4e5030 | 3045 | /* VL53L0X has a good ranging when the value of the |
sepp_nepp | 6:fb11b746ceb5 | 3046 | * DeviceRangeStatus = 11. This function will replace the value 0 with |
sepp_nepp | 6:fb11b746ceb5 | 3047 | * the value 11 in the DeviceRangeStatus. |
sepp_nepp | 6:fb11b746ceb5 | 3048 | * In addition, the SigmaEstimator is not included in the VL53L0X |
sepp_nepp | 9:cb4c6d4e5030 | 3049 | * DeviceRangeStatus, this will be added in the PalRangeStatus. */ |
sepp_nepp | 6:fb11b746ceb5 | 3050 | |
sepp_nepp | 6:fb11b746ceb5 | 3051 | device_range_status_internal = ((device_range_status & 0x78) >> 3); |
sepp_nepp | 6:fb11b746ceb5 | 3052 | |
sepp_nepp | 6:fb11b746ceb5 | 3053 | if (device_range_status_internal == 0 || |
sepp_nepp | 6:fb11b746ceb5 | 3054 | device_range_status_internal == 5 || |
sepp_nepp | 6:fb11b746ceb5 | 3055 | device_range_status_internal == 7 || |
sepp_nepp | 6:fb11b746ceb5 | 3056 | device_range_status_internal == 12 || |
sepp_nepp | 6:fb11b746ceb5 | 3057 | device_range_status_internal == 13 || |
sepp_nepp | 6:fb11b746ceb5 | 3058 | device_range_status_internal == 14 || |
sepp_nepp | 6:fb11b746ceb5 | 3059 | device_range_status_internal == 15 |
sepp_nepp | 6:fb11b746ceb5 | 3060 | ) { |
sepp_nepp | 6:fb11b746ceb5 | 3061 | none_flag = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3062 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3063 | none_flag = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3064 | } |
sepp_nepp | 6:fb11b746ceb5 | 3065 | |
sepp_nepp | 12:81f37e50f8f8 | 3066 | /* Check if Sigma limit is enabled, if yes then do comparison with limit |
sepp_nepp | 12:81f37e50f8f8 | 3067 | * value and put the result back into pPalRangeStatus. */ |
sepp_nepp | 6:fb11b746ceb5 | 3068 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3069 | status = VL53L0X_get_limit_check_enable(VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 3070 | &sigma_limit_check_enable); |
sepp_nepp | 6:fb11b746ceb5 | 3071 | } |
sepp_nepp | 6:fb11b746ceb5 | 3072 | |
sepp_nepp | 6:fb11b746ceb5 | 3073 | if ((sigma_limit_check_enable != 0) && (status == VL53L0X_ERROR_NONE)) { |
sepp_nepp | 12:81f37e50f8f8 | 3074 | /* compute the Sigma and check with limit */ |
sepp_nepp | 12:81f37e50f8f8 | 3075 | status = VL53L0X_calc_sigma_estimate(p_ranging_measurement_data, &sigma_estimate, &dmax_mm); |
sepp_nepp | 12:81f37e50f8f8 | 3076 | if (status == VL53L0X_ERROR_NONE) { p_ranging_measurement_data->RangeDMax_mm = dmax_mm; } |
sepp_nepp | 6:fb11b746ceb5 | 3077 | |
sepp_nepp | 6:fb11b746ceb5 | 3078 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3079 | status = VL53L0X_get_limit_check_value(VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 3080 | &sigma_limit_value); |
sepp_nepp | 6:fb11b746ceb5 | 3081 | |
sepp_nepp | 12:81f37e50f8f8 | 3082 | if ((sigma_limit_value > 0) && (sigma_estimate > sigma_limit_value)) |
sepp_nepp | 12:81f37e50f8f8 | 3083 | { sigma_limitflag = 1; } /* Limit Fail */ |
sepp_nepp | 6:fb11b746ceb5 | 3084 | } |
sepp_nepp | 6:fb11b746ceb5 | 3085 | } |
sepp_nepp | 6:fb11b746ceb5 | 3086 | |
sepp_nepp | 12:81f37e50f8f8 | 3087 | /* Check if Signal ref clip limit is enabled, if yes then do comparison |
sepp_nepp | 12:81f37e50f8f8 | 3088 | * with limit value and put the result back into pPalRangeStatus. */ |
sepp_nepp | 6:fb11b746ceb5 | 3089 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3090 | status = VL53L0X_get_limit_check_enable(VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP, |
sepp_nepp | 6:fb11b746ceb5 | 3091 | &signal_ref_clip_limit_check_enable); |
sepp_nepp | 6:fb11b746ceb5 | 3092 | } |
sepp_nepp | 6:fb11b746ceb5 | 3093 | |
sepp_nepp | 6:fb11b746ceb5 | 3094 | if ((signal_ref_clip_limit_check_enable != 0) && |
sepp_nepp | 6:fb11b746ceb5 | 3095 | (status == VL53L0X_ERROR_NONE)) { |
sepp_nepp | 6:fb11b746ceb5 | 3096 | |
sepp_nepp | 8:2fd7cb217068 | 3097 | status = VL53L0X_get_limit_check_value(VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP, |
sepp_nepp | 6:fb11b746ceb5 | 3098 | &signal_ref_clip_value); |
sepp_nepp | 6:fb11b746ceb5 | 3099 | |
sepp_nepp | 11:d8dbe3b87f9f | 3100 | /* Read LastSignalRef_MHz from device */ |
sepp_nepp | 6:fb11b746ceb5 | 3101 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3102 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 3103 | } |
sepp_nepp | 6:fb11b746ceb5 | 3104 | |
sepp_nepp | 6:fb11b746ceb5 | 3105 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3106 | status = VL53L0X_read_word(VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF, |
sepp_nepp | 6:fb11b746ceb5 | 3107 | &tmp_word); |
sepp_nepp | 6:fb11b746ceb5 | 3108 | } |
sepp_nepp | 6:fb11b746ceb5 | 3109 | |
sepp_nepp | 6:fb11b746ceb5 | 3110 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3111 | status = VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 3112 | } |
sepp_nepp | 6:fb11b746ceb5 | 3113 | |
sepp_nepp | 11:d8dbe3b87f9f | 3114 | last_signal_ref_MHz = VL53L0X_FP97TOFP1616(tmp_word); |
sepp_nepp | 11:d8dbe3b87f9f | 3115 | Data.LastSignalRef_MHz = last_signal_ref_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 3116 | |
sepp_nepp | 6:fb11b746ceb5 | 3117 | if ((signal_ref_clip_value > 0) && |
sepp_nepp | 11:d8dbe3b87f9f | 3118 | (last_signal_ref_MHz > signal_ref_clip_value)) { |
sepp_nepp | 6:fb11b746ceb5 | 3119 | /* Limit Fail */ |
sepp_nepp | 6:fb11b746ceb5 | 3120 | signal_ref_clipflag = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3121 | } |
sepp_nepp | 6:fb11b746ceb5 | 3122 | } |
sepp_nepp | 6:fb11b746ceb5 | 3123 | |
sepp_nepp | 6:fb11b746ceb5 | 3124 | /* |
sepp_nepp | 6:fb11b746ceb5 | 3125 | * Check if Signal ref clip limit is enabled, if yes then do comparison |
sepp_nepp | 6:fb11b746ceb5 | 3126 | * with limit value and put the result back into pPalRangeStatus. |
sepp_nepp | 6:fb11b746ceb5 | 3127 | * EffectiveSpadRtnCount has a format 8.8 |
sepp_nepp | 6:fb11b746ceb5 | 3128 | * If (Return signal rate < (1.5 x Xtalk x number of Spads)) : FAIL |
sepp_nepp | 6:fb11b746ceb5 | 3129 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3130 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3131 | status = VL53L0X_get_limit_check_enable(VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD, |
sepp_nepp | 6:fb11b746ceb5 | 3132 | &range_ignore_threshold_limit_check_enable); |
sepp_nepp | 6:fb11b746ceb5 | 3133 | } |
sepp_nepp | 6:fb11b746ceb5 | 3134 | |
sepp_nepp | 6:fb11b746ceb5 | 3135 | if ((range_ignore_threshold_limit_check_enable != 0) && |
sepp_nepp | 6:fb11b746ceb5 | 3136 | (status == VL53L0X_ERROR_NONE)) { |
sepp_nepp | 6:fb11b746ceb5 | 3137 | |
sepp_nepp | 6:fb11b746ceb5 | 3138 | /* Compute the signal rate per spad */ |
sepp_nepp | 6:fb11b746ceb5 | 3139 | if (effective_spad_rtn_count == 0) { |
sepp_nepp | 6:fb11b746ceb5 | 3140 | signal_rate_per_spad = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3141 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3142 | signal_rate_per_spad = (FixPoint1616_t)((256 * signal_rate) |
sepp_nepp | 6:fb11b746ceb5 | 3143 | / effective_spad_rtn_count); |
sepp_nepp | 6:fb11b746ceb5 | 3144 | } |
sepp_nepp | 6:fb11b746ceb5 | 3145 | |
sepp_nepp | 8:2fd7cb217068 | 3146 | status = VL53L0X_get_limit_check_value(VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD, |
sepp_nepp | 6:fb11b746ceb5 | 3147 | &range_ignore_threshold_value); |
sepp_nepp | 6:fb11b746ceb5 | 3148 | |
sepp_nepp | 6:fb11b746ceb5 | 3149 | if ((range_ignore_threshold_value > 0) && |
sepp_nepp | 6:fb11b746ceb5 | 3150 | (signal_rate_per_spad < range_ignore_threshold_value)) { |
sepp_nepp | 6:fb11b746ceb5 | 3151 | /* Limit Fail add 2^6 to range status */ |
sepp_nepp | 6:fb11b746ceb5 | 3152 | range_ignore_thresholdflag = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3153 | } |
sepp_nepp | 6:fb11b746ceb5 | 3154 | } |
sepp_nepp | 6:fb11b746ceb5 | 3155 | |
sepp_nepp | 6:fb11b746ceb5 | 3156 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3157 | if (none_flag == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 3158 | *p_pal_range_status = 255; /* NONE */ |
sepp_nepp | 6:fb11b746ceb5 | 3159 | } else if (device_range_status_internal == 1 || |
sepp_nepp | 6:fb11b746ceb5 | 3160 | device_range_status_internal == 2 || |
sepp_nepp | 6:fb11b746ceb5 | 3161 | device_range_status_internal == 3) { |
sepp_nepp | 6:fb11b746ceb5 | 3162 | *p_pal_range_status = 5; /* HW fail */ |
sepp_nepp | 6:fb11b746ceb5 | 3163 | } else if (device_range_status_internal == 6 || |
sepp_nepp | 6:fb11b746ceb5 | 3164 | device_range_status_internal == 9) { |
sepp_nepp | 6:fb11b746ceb5 | 3165 | *p_pal_range_status = 4; /* Phase fail */ |
sepp_nepp | 6:fb11b746ceb5 | 3166 | } else if (device_range_status_internal == 8 || |
sepp_nepp | 6:fb11b746ceb5 | 3167 | device_range_status_internal == 10 || |
sepp_nepp | 6:fb11b746ceb5 | 3168 | signal_ref_clipflag == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 3169 | *p_pal_range_status = 3; /* Min range */ |
sepp_nepp | 6:fb11b746ceb5 | 3170 | } else if (device_range_status_internal == 4 || |
sepp_nepp | 6:fb11b746ceb5 | 3171 | range_ignore_thresholdflag == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 3172 | *p_pal_range_status = 2; /* Signal Fail */ |
sepp_nepp | 6:fb11b746ceb5 | 3173 | } else if (sigma_limitflag == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 3174 | *p_pal_range_status = 1; /* Sigma Fail */ |
sepp_nepp | 6:fb11b746ceb5 | 3175 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3176 | *p_pal_range_status = 0; /* Range Valid */ |
sepp_nepp | 6:fb11b746ceb5 | 3177 | } |
sepp_nepp | 6:fb11b746ceb5 | 3178 | } |
sepp_nepp | 6:fb11b746ceb5 | 3179 | |
sepp_nepp | 6:fb11b746ceb5 | 3180 | /* DMAX only relevant during range error */ |
sepp_nepp | 6:fb11b746ceb5 | 3181 | if (*p_pal_range_status == 0) { |
sepp_nepp | 11:d8dbe3b87f9f | 3182 | p_ranging_measurement_data->RangeDMax_mm = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3183 | } |
sepp_nepp | 6:fb11b746ceb5 | 3184 | |
sepp_nepp | 6:fb11b746ceb5 | 3185 | /* fill the Limit Check Status */ |
sepp_nepp | 6:fb11b746ceb5 | 3186 | |
sepp_nepp | 8:2fd7cb217068 | 3187 | status = VL53L0X_get_limit_check_enable(VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 3188 | &signal_rate_final_range_limit_check_enable); |
sepp_nepp | 6:fb11b746ceb5 | 3189 | |
sepp_nepp | 6:fb11b746ceb5 | 3190 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3191 | if ((sigma_limit_check_enable == 0) || (sigma_limitflag == 1)) { |
sepp_nepp | 6:fb11b746ceb5 | 3192 | temp8 = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3193 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3194 | temp8 = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3195 | } |
sepp_nepp | 10:cd1758e186a4 | 3196 | CurrentParameters.LimitChecksStatus[VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE] = temp8; |
sepp_nepp | 6:fb11b746ceb5 | 3197 | |
sepp_nepp | 6:fb11b746ceb5 | 3198 | if ((device_range_status_internal == 4) || |
sepp_nepp | 6:fb11b746ceb5 | 3199 | (signal_rate_final_range_limit_check_enable == 0)) { |
sepp_nepp | 6:fb11b746ceb5 | 3200 | temp8 = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3201 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3202 | temp8 = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3203 | } |
sepp_nepp | 10:cd1758e186a4 | 3204 | CurrentParameters.LimitChecksStatus[VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE] = temp8; |
sepp_nepp | 6:fb11b746ceb5 | 3205 | |
sepp_nepp | 6:fb11b746ceb5 | 3206 | if ((signal_ref_clip_limit_check_enable == 0) || |
sepp_nepp | 6:fb11b746ceb5 | 3207 | (signal_ref_clipflag == 1)) { |
sepp_nepp | 6:fb11b746ceb5 | 3208 | temp8 = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3209 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3210 | temp8 = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3211 | } |
sepp_nepp | 6:fb11b746ceb5 | 3212 | |
sepp_nepp | 10:cd1758e186a4 | 3213 | CurrentParameters.LimitChecksStatus[VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP] = temp8; |
sepp_nepp | 6:fb11b746ceb5 | 3214 | |
sepp_nepp | 6:fb11b746ceb5 | 3215 | if ((range_ignore_threshold_limit_check_enable == 0) || |
sepp_nepp | 6:fb11b746ceb5 | 3216 | (range_ignore_thresholdflag == 1)) { |
sepp_nepp | 6:fb11b746ceb5 | 3217 | temp8 = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3218 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3219 | temp8 = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3220 | } |
sepp_nepp | 6:fb11b746ceb5 | 3221 | |
sepp_nepp | 10:cd1758e186a4 | 3222 | CurrentParameters.LimitChecksStatus[VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD] = temp8; |
sepp_nepp | 6:fb11b746ceb5 | 3223 | } |
sepp_nepp | 6:fb11b746ceb5 | 3224 | |
sepp_nepp | 6:fb11b746ceb5 | 3225 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3226 | } |
sepp_nepp | 6:fb11b746ceb5 | 3227 | |
sepp_nepp | 8:2fd7cb217068 | 3228 | VL53L0X_Error VL53L0X::VL53L0X_get_ranging_measurement_data(VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data) |
sepp_nepp | 8:2fd7cb217068 | 3229 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3230 | uint8_t device_range_status; |
sepp_nepp | 6:fb11b746ceb5 | 3231 | uint8_t range_fractional_enable; |
sepp_nepp | 6:fb11b746ceb5 | 3232 | uint8_t pal_range_status; |
sepp_nepp | 6:fb11b746ceb5 | 3233 | uint8_t x_talk_compensation_enable; |
sepp_nepp | 6:fb11b746ceb5 | 3234 | uint16_t ambient_rate; |
sepp_nepp | 6:fb11b746ceb5 | 3235 | FixPoint1616_t signal_rate; |
sepp_nepp | 11:d8dbe3b87f9f | 3236 | uint16_t x_talk_compensation_rate_MHz; |
sepp_nepp | 6:fb11b746ceb5 | 3237 | uint16_t effective_spad_rtn_count; |
sepp_nepp | 6:fb11b746ceb5 | 3238 | uint16_t tmpuint16; |
sepp_nepp | 6:fb11b746ceb5 | 3239 | uint16_t xtalk_range_milli_meter; |
sepp_nepp | 6:fb11b746ceb5 | 3240 | uint16_t linearity_corrective_gain; |
sepp_nepp | 6:fb11b746ceb5 | 3241 | uint8_t localBuffer[12]; |
sepp_nepp | 11:d8dbe3b87f9f | 3242 | |
sepp_nepp | 6:fb11b746ceb5 | 3243 | /* use multi read even if some registers are not useful, result will |
sepp_nepp | 9:cb4c6d4e5030 | 3244 | * be more efficient start reading at 0x14 dec20 |
sepp_nepp | 9:cb4c6d4e5030 | 3245 | * end reading at 0x21 dec33 total 14 bytes to read */ |
sepp_nepp | 7:3a1115c2556b | 3246 | status = VL53L0X_read_multi( 0x14, localBuffer, 12); |
sepp_nepp | 6:fb11b746ceb5 | 3247 | |
sepp_nepp | 6:fb11b746ceb5 | 3248 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3249 | |
sepp_nepp | 6:fb11b746ceb5 | 3250 | tmpuint16 = VL53L0X_MAKEUINT16(localBuffer[11], localBuffer[10]); |
sepp_nepp | 6:fb11b746ceb5 | 3251 | /* cut1.1 if SYSTEM__RANGE_CONFIG if 1 range is 2bits fractional |
sepp_nepp | 6:fb11b746ceb5 | 3252 | *(format 11.2) else no fractional */ |
sepp_nepp | 6:fb11b746ceb5 | 3253 | |
sepp_nepp | 11:d8dbe3b87f9f | 3254 | signal_rate = VL53L0X_FP97TOFP1616(VL53L0X_MAKEUINT16(localBuffer[7], localBuffer[6])); |
sepp_nepp | 11:d8dbe3b87f9f | 3255 | /* peak_signal_count_rate_rtn_MHz */ |
sepp_nepp | 11:d8dbe3b87f9f | 3256 | p_ranging_measurement_data->SignalRateRtn_MHz = signal_rate; |
sepp_nepp | 6:fb11b746ceb5 | 3257 | |
sepp_nepp | 6:fb11b746ceb5 | 3258 | ambient_rate = VL53L0X_MAKEUINT16(localBuffer[9], localBuffer[8]); |
sepp_nepp | 11:d8dbe3b87f9f | 3259 | p_ranging_measurement_data->AmbientRateRtn_MHz = |
sepp_nepp | 11:d8dbe3b87f9f | 3260 | VL53L0X_FP97TOFP1616(ambient_rate); |
sepp_nepp | 6:fb11b746ceb5 | 3261 | |
sepp_nepp | 6:fb11b746ceb5 | 3262 | effective_spad_rtn_count = VL53L0X_MAKEUINT16(localBuffer[3], |
sepp_nepp | 6:fb11b746ceb5 | 3263 | localBuffer[2]); |
sepp_nepp | 6:fb11b746ceb5 | 3264 | /* EffectiveSpadRtnCount is 8.8 format */ |
sepp_nepp | 6:fb11b746ceb5 | 3265 | p_ranging_measurement_data->EffectiveSpadRtnCount = |
sepp_nepp | 6:fb11b746ceb5 | 3266 | effective_spad_rtn_count; |
sepp_nepp | 6:fb11b746ceb5 | 3267 | |
sepp_nepp | 6:fb11b746ceb5 | 3268 | device_range_status = localBuffer[0]; |
sepp_nepp | 6:fb11b746ceb5 | 3269 | |
sepp_nepp | 6:fb11b746ceb5 | 3270 | /* Get Linearity Corrective Gain */ |
sepp_nepp | 8:2fd7cb217068 | 3271 | linearity_corrective_gain = Data.LinearityCorrectiveGain; |
sepp_nepp | 6:fb11b746ceb5 | 3272 | |
sepp_nepp | 6:fb11b746ceb5 | 3273 | /* Get ranging configuration */ |
sepp_nepp | 8:2fd7cb217068 | 3274 | range_fractional_enable = Data.RangeFractionalEnable; |
sepp_nepp | 6:fb11b746ceb5 | 3275 | |
sepp_nepp | 6:fb11b746ceb5 | 3276 | if (linearity_corrective_gain != 1000) { |
sepp_nepp | 6:fb11b746ceb5 | 3277 | |
sepp_nepp | 9:cb4c6d4e5030 | 3278 | tmpuint16 = (uint16_t)((linearity_corrective_gain * tmpuint16 + 500) / 1000); |
sepp_nepp | 6:fb11b746ceb5 | 3279 | |
sepp_nepp | 6:fb11b746ceb5 | 3280 | /* Implement Xtalk */ |
sepp_nepp | 11:d8dbe3b87f9f | 3281 | x_talk_compensation_rate_MHz = CurrentParameters.XTalkCompensationRate_MHz ; |
sepp_nepp | 10:cd1758e186a4 | 3282 | x_talk_compensation_enable = CurrentParameters.XTalkCompensationEnable ; |
sepp_nepp | 6:fb11b746ceb5 | 3283 | |
sepp_nepp | 6:fb11b746ceb5 | 3284 | if (x_talk_compensation_enable) { |
sepp_nepp | 6:fb11b746ceb5 | 3285 | |
sepp_nepp | 6:fb11b746ceb5 | 3286 | if ((signal_rate |
sepp_nepp | 11:d8dbe3b87f9f | 3287 | - ((x_talk_compensation_rate_MHz |
sepp_nepp | 6:fb11b746ceb5 | 3288 | * effective_spad_rtn_count) >> 8)) |
sepp_nepp | 6:fb11b746ceb5 | 3289 | <= 0) { |
sepp_nepp | 6:fb11b746ceb5 | 3290 | if (range_fractional_enable) { |
sepp_nepp | 6:fb11b746ceb5 | 3291 | xtalk_range_milli_meter = 8888; |
sepp_nepp | 6:fb11b746ceb5 | 3292 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3293 | xtalk_range_milli_meter = 8888 << 2; |
sepp_nepp | 6:fb11b746ceb5 | 3294 | } |
sepp_nepp | 6:fb11b746ceb5 | 3295 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3296 | xtalk_range_milli_meter = |
sepp_nepp | 6:fb11b746ceb5 | 3297 | (tmpuint16 * signal_rate) |
sepp_nepp | 6:fb11b746ceb5 | 3298 | / (signal_rate |
sepp_nepp | 11:d8dbe3b87f9f | 3299 | - ((x_talk_compensation_rate_MHz |
sepp_nepp | 6:fb11b746ceb5 | 3300 | * effective_spad_rtn_count) |
sepp_nepp | 6:fb11b746ceb5 | 3301 | >> 8)); |
sepp_nepp | 6:fb11b746ceb5 | 3302 | } |
sepp_nepp | 6:fb11b746ceb5 | 3303 | tmpuint16 = xtalk_range_milli_meter; |
sepp_nepp | 6:fb11b746ceb5 | 3304 | } |
sepp_nepp | 6:fb11b746ceb5 | 3305 | } |
sepp_nepp | 6:fb11b746ceb5 | 3306 | |
sepp_nepp | 6:fb11b746ceb5 | 3307 | if (range_fractional_enable) { |
sepp_nepp | 11:d8dbe3b87f9f | 3308 | p_ranging_measurement_data->Range_mm = |
sepp_nepp | 6:fb11b746ceb5 | 3309 | (uint16_t)((tmpuint16) >> 2); |
sepp_nepp | 6:fb11b746ceb5 | 3310 | p_ranging_measurement_data->RangeFractionalPart = |
sepp_nepp | 6:fb11b746ceb5 | 3311 | (uint8_t)((tmpuint16 & 0x03) << 6); |
sepp_nepp | 6:fb11b746ceb5 | 3312 | } else { |
sepp_nepp | 11:d8dbe3b87f9f | 3313 | p_ranging_measurement_data->Range_mm = tmpuint16; |
sepp_nepp | 6:fb11b746ceb5 | 3314 | p_ranging_measurement_data->RangeFractionalPart = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3315 | } |
sepp_nepp | 6:fb11b746ceb5 | 3316 | |
sepp_nepp | 9:cb4c6d4e5030 | 3317 | /* For a standard definition of RangeStatus, this should |
sepp_nepp | 6:fb11b746ceb5 | 3318 | * return 0 in case of good result after a ranging |
sepp_nepp | 6:fb11b746ceb5 | 3319 | * The range status depends on the device so call a device |
sepp_nepp | 6:fb11b746ceb5 | 3320 | * specific function to obtain the right Status. |
sepp_nepp | 6:fb11b746ceb5 | 3321 | */ |
sepp_nepp | 7:3a1115c2556b | 3322 | status |= VL53L0X_get_pal_range_status( device_range_status, |
sepp_nepp | 6:fb11b746ceb5 | 3323 | signal_rate, effective_spad_rtn_count, |
sepp_nepp | 6:fb11b746ceb5 | 3324 | p_ranging_measurement_data, &pal_range_status); |
sepp_nepp | 6:fb11b746ceb5 | 3325 | |
sepp_nepp | 6:fb11b746ceb5 | 3326 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3327 | p_ranging_measurement_data->RangeStatus = pal_range_status;} |
sepp_nepp | 6:fb11b746ceb5 | 3328 | |
sepp_nepp | 6:fb11b746ceb5 | 3329 | } |
sepp_nepp | 6:fb11b746ceb5 | 3330 | |
sepp_nepp | 11:d8dbe3b87f9f | 3331 | if (status == VL53L0X_ERROR_NONE) { /* Copy last read data into Device buffer */ |
sepp_nepp | 11:d8dbe3b87f9f | 3332 | LastRangeMeasure.Range_mm = p_ranging_measurement_data->Range_mm; |
sepp_nepp | 11:d8dbe3b87f9f | 3333 | LastRangeMeasure.RangeFractionalPart = p_ranging_measurement_data->RangeFractionalPart; |
sepp_nepp | 11:d8dbe3b87f9f | 3334 | LastRangeMeasure.RangeDMax_mm = p_ranging_measurement_data->RangeDMax_mm; |
sepp_nepp | 11:d8dbe3b87f9f | 3335 | LastRangeMeasure.SignalRateRtn_MHz = p_ranging_measurement_data->SignalRateRtn_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 3336 | LastRangeMeasure.AmbientRateRtn_MHz = p_ranging_measurement_data->AmbientRateRtn_MHz; |
sepp_nepp | 11:d8dbe3b87f9f | 3337 | LastRangeMeasure.EffectiveSpadRtnCount = p_ranging_measurement_data->EffectiveSpadRtnCount; |
sepp_nepp | 11:d8dbe3b87f9f | 3338 | LastRangeMeasure.RangeStatus = p_ranging_measurement_data->RangeStatus; |
sepp_nepp | 6:fb11b746ceb5 | 3339 | } |
sepp_nepp | 9:cb4c6d4e5030 | 3340 | |
sepp_nepp | 6:fb11b746ceb5 | 3341 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3342 | } |
sepp_nepp | 6:fb11b746ceb5 | 3343 | |
sepp_nepp | 8:2fd7cb217068 | 3344 | VL53L0X_Error VL53L0X::VL53L0X_perform_single_ranging_measurement(VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data) |
sepp_nepp | 8:2fd7cb217068 | 3345 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3346 | |
sepp_nepp | 6:fb11b746ceb5 | 3347 | /* This function will do a complete single ranging |
sepp_nepp | 6:fb11b746ceb5 | 3348 | * Here we fix the mode! */ |
sepp_nepp | 13:253cb4ea3fcc | 3349 | CurrentParameters.DeviceMode = VL53L0X_DEVICEMODE_SINGLE_RANGING; |
sepp_nepp | 6:fb11b746ceb5 | 3350 | |
sepp_nepp | 6:fb11b746ceb5 | 3351 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 3352 | status = VL53L0X_perform_single_measurement(); } |
sepp_nepp | 6:fb11b746ceb5 | 3353 | |
sepp_nepp | 6:fb11b746ceb5 | 3354 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 3355 | status = VL53L0X_get_ranging_measurement_data(p_ranging_measurement_data); } |
sepp_nepp | 6:fb11b746ceb5 | 3356 | |
sepp_nepp | 6:fb11b746ceb5 | 3357 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 3358 | status = VL53L0X_clear_interrupt_mask( 0);} |
sepp_nepp | 9:cb4c6d4e5030 | 3359 | |
sepp_nepp | 6:fb11b746ceb5 | 3360 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3361 | } |
sepp_nepp | 6:fb11b746ceb5 | 3362 | |
sepp_nepp | 8:2fd7cb217068 | 3363 | VL53L0X_Error VL53L0X::perform_ref_signal_measurement(uint16_t *p_ref_signal_rate) |
sepp_nepp | 8:2fd7cb217068 | 3364 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3365 | VL53L0X_RangingMeasurementData_t ranging_measurement_data; |
sepp_nepp | 6:fb11b746ceb5 | 3366 | |
sepp_nepp | 6:fb11b746ceb5 | 3367 | uint8_t sequence_config = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3368 | |
sepp_nepp | 6:fb11b746ceb5 | 3369 | /* store the value of the sequence config, |
sepp_nepp | 9:cb4c6d4e5030 | 3370 | * this will be reset before the end of the function*/ |
sepp_nepp | 8:2fd7cb217068 | 3371 | sequence_config = Data.SequenceConfig; |
sepp_nepp | 6:fb11b746ceb5 | 3372 | |
sepp_nepp | 6:fb11b746ceb5 | 3373 | /* |
sepp_nepp | 6:fb11b746ceb5 | 3374 | * This function performs a reference signal rate measurement. |
sepp_nepp | 6:fb11b746ceb5 | 3375 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3376 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 3377 | status = VL53L0X_write_byte(VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, 0xC0);} |
sepp_nepp | 6:fb11b746ceb5 | 3378 | |
sepp_nepp | 6:fb11b746ceb5 | 3379 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 3380 | status = VL53L0X_perform_single_ranging_measurement(&ranging_measurement_data); } |
sepp_nepp | 6:fb11b746ceb5 | 3381 | |
sepp_nepp | 6:fb11b746ceb5 | 3382 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 3383 | status = VL53L0X_write_byte( 0xFF, 0x01); } |
sepp_nepp | 6:fb11b746ceb5 | 3384 | |
sepp_nepp | 6:fb11b746ceb5 | 3385 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3386 | status = VL53L0X_read_word(VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF, |
sepp_nepp | 9:cb4c6d4e5030 | 3387 | p_ref_signal_rate);} |
sepp_nepp | 6:fb11b746ceb5 | 3388 | |
sepp_nepp | 6:fb11b746ceb5 | 3389 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 9:cb4c6d4e5030 | 3390 | status = VL53L0X_write_byte( 0xFF, 0x00);} |
sepp_nepp | 6:fb11b746ceb5 | 3391 | |
sepp_nepp | 6:fb11b746ceb5 | 3392 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3393 | /* restore the previous Sequence Config */ |
sepp_nepp | 7:3a1115c2556b | 3394 | status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, |
sepp_nepp | 6:fb11b746ceb5 | 3395 | sequence_config); |
sepp_nepp | 6:fb11b746ceb5 | 3396 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3397 | Data.SequenceConfig = sequence_config; |
sepp_nepp | 6:fb11b746ceb5 | 3398 | } |
sepp_nepp | 6:fb11b746ceb5 | 3399 | } |
sepp_nepp | 6:fb11b746ceb5 | 3400 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3401 | } |
sepp_nepp | 6:fb11b746ceb5 | 3402 | |
sepp_nepp | 8:2fd7cb217068 | 3403 | VL53L0X_Error VL53L0X::wrapped_VL53L0X_perform_ref_spad_management(uint32_t *ref_spad_count, |
sepp_nepp | 6:fb11b746ceb5 | 3404 | uint8_t *is_aperture_spads) |
sepp_nepp | 8:2fd7cb217068 | 3405 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3406 | uint8_t last_spad_array[6]; |
sepp_nepp | 6:fb11b746ceb5 | 3407 | uint8_t start_select = 0xB4; |
sepp_nepp | 6:fb11b746ceb5 | 3408 | uint32_t minimum_spad_count = 3; |
sepp_nepp | 6:fb11b746ceb5 | 3409 | uint32_t max_spad_count = 44; |
sepp_nepp | 6:fb11b746ceb5 | 3410 | uint32_t current_spad_index = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3411 | uint32_t last_spad_index = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3412 | int32_t next_good_spad = 0; |
sepp_nepp | 11:d8dbe3b87f9f | 3413 | uint16_t target_ref_rate = 0x0A00; /* 20 MHz in 9:7 format */ |
sepp_nepp | 6:fb11b746ceb5 | 3414 | uint16_t peak_signal_rate_ref; |
sepp_nepp | 6:fb11b746ceb5 | 3415 | uint32_t need_apt_spads = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3416 | uint32_t index = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3417 | uint32_t spad_array_size = 6; |
sepp_nepp | 6:fb11b746ceb5 | 3418 | uint32_t signal_rate_diff = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3419 | uint32_t last_signal_rate_diff = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3420 | uint8_t complete = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3421 | uint8_t vhv_settings = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3422 | uint8_t phase_cal = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3423 | uint32_t ref_spad_count_int = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3424 | uint8_t is_aperture_spads_int = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3425 | |
sepp_nepp | 6:fb11b746ceb5 | 3426 | /* |
sepp_nepp | 6:fb11b746ceb5 | 3427 | * The reference SPAD initialization procedure determines the minimum |
sepp_nepp | 6:fb11b746ceb5 | 3428 | * amount of reference spads to be enables to achieve a target reference |
sepp_nepp | 6:fb11b746ceb5 | 3429 | * signal rate and should be performed once during initialization. |
sepp_nepp | 6:fb11b746ceb5 | 3430 | * |
sepp_nepp | 6:fb11b746ceb5 | 3431 | * Either aperture or non-aperture spads are applied but never both. |
sepp_nepp | 6:fb11b746ceb5 | 3432 | * Firstly non-aperture spads are set, begining with 5 spads, and |
sepp_nepp | 6:fb11b746ceb5 | 3433 | * increased one spad at a time until the closest measurement to the |
sepp_nepp | 6:fb11b746ceb5 | 3434 | * target rate is achieved. |
sepp_nepp | 6:fb11b746ceb5 | 3435 | * |
sepp_nepp | 6:fb11b746ceb5 | 3436 | * If the target rate is exceeded when 5 non-aperture spads are enabled, |
sepp_nepp | 6:fb11b746ceb5 | 3437 | * initialization is performed instead with aperture spads. |
sepp_nepp | 6:fb11b746ceb5 | 3438 | * |
sepp_nepp | 6:fb11b746ceb5 | 3439 | * When setting spads, a 'Good Spad Map' is applied. |
sepp_nepp | 6:fb11b746ceb5 | 3440 | * |
sepp_nepp | 6:fb11b746ceb5 | 3441 | * This procedure operates within a SPAD window of interest of a maximum |
sepp_nepp | 6:fb11b746ceb5 | 3442 | * 44 spads. |
sepp_nepp | 6:fb11b746ceb5 | 3443 | * The start point is currently fixed to 180, which lies towards the end |
sepp_nepp | 6:fb11b746ceb5 | 3444 | * of the non-aperture quadrant and runs in to the adjacent aperture |
sepp_nepp | 6:fb11b746ceb5 | 3445 | * quadrant. |
sepp_nepp | 6:fb11b746ceb5 | 3446 | */ |
sepp_nepp | 8:2fd7cb217068 | 3447 | target_ref_rate = Data.targetRefRate; |
sepp_nepp | 6:fb11b746ceb5 | 3448 | |
sepp_nepp | 6:fb11b746ceb5 | 3449 | /* |
sepp_nepp | 6:fb11b746ceb5 | 3450 | * Initialize Spad arrays. |
sepp_nepp | 6:fb11b746ceb5 | 3451 | * Currently the good spad map is initialised to 'All good'. |
sepp_nepp | 6:fb11b746ceb5 | 3452 | * This is a short term implementation. The good spad map will be |
sepp_nepp | 6:fb11b746ceb5 | 3453 | * provided as an input. |
sepp_nepp | 6:fb11b746ceb5 | 3454 | * Note that there are 6 bytes. Only the first 44 bits will be used to |
sepp_nepp | 6:fb11b746ceb5 | 3455 | * represent spads. |
sepp_nepp | 6:fb11b746ceb5 | 3456 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3457 | for (index = 0; index < spad_array_size; index++) { |
sepp_nepp | 11:d8dbe3b87f9f | 3458 | Data.RefSpadEnables[index] = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3459 | } |
sepp_nepp | 6:fb11b746ceb5 | 3460 | |
sepp_nepp | 7:3a1115c2556b | 3461 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 3462 | |
sepp_nepp | 6:fb11b746ceb5 | 3463 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3464 | status = VL53L0X_write_byte(VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 3465 | } |
sepp_nepp | 6:fb11b746ceb5 | 3466 | |
sepp_nepp | 6:fb11b746ceb5 | 3467 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3468 | status = VL53L0X_write_byte(VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD, 0x2C); |
sepp_nepp | 6:fb11b746ceb5 | 3469 | } |
sepp_nepp | 6:fb11b746ceb5 | 3470 | |
sepp_nepp | 6:fb11b746ceb5 | 3471 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3472 | status = VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 3473 | } |
sepp_nepp | 6:fb11b746ceb5 | 3474 | |
sepp_nepp | 6:fb11b746ceb5 | 3475 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3476 | status = VL53L0X_write_byte(VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT, |
sepp_nepp | 6:fb11b746ceb5 | 3477 | start_select); |
sepp_nepp | 6:fb11b746ceb5 | 3478 | } |
sepp_nepp | 6:fb11b746ceb5 | 3479 | |
sepp_nepp | 6:fb11b746ceb5 | 3480 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3481 | status = VL53L0X_write_byte(VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE, 0); |
sepp_nepp | 6:fb11b746ceb5 | 3482 | } |
sepp_nepp | 6:fb11b746ceb5 | 3483 | |
sepp_nepp | 6:fb11b746ceb5 | 3484 | /* Perform ref calibration */ |
sepp_nepp | 6:fb11b746ceb5 | 3485 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3486 | status = VL53L0X_perform_ref_calibration( &vhv_settings, |
sepp_nepp | 6:fb11b746ceb5 | 3487 | &phase_cal, 0); |
sepp_nepp | 6:fb11b746ceb5 | 3488 | } |
sepp_nepp | 6:fb11b746ceb5 | 3489 | |
sepp_nepp | 6:fb11b746ceb5 | 3490 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3491 | /* Enable Minimum NON-APERTURE Spads */ |
sepp_nepp | 6:fb11b746ceb5 | 3492 | current_spad_index = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3493 | last_spad_index = current_spad_index; |
sepp_nepp | 6:fb11b746ceb5 | 3494 | need_apt_spads = 0; |
sepp_nepp | 8:2fd7cb217068 | 3495 | status = enable_ref_spads(need_apt_spads, |
sepp_nepp | 11:d8dbe3b87f9f | 3496 | Data.RefGoodSpadMap, |
sepp_nepp | 11:d8dbe3b87f9f | 3497 | Data.RefSpadEnables, |
sepp_nepp | 6:fb11b746ceb5 | 3498 | spad_array_size, |
sepp_nepp | 6:fb11b746ceb5 | 3499 | start_select, |
sepp_nepp | 6:fb11b746ceb5 | 3500 | current_spad_index, |
sepp_nepp | 6:fb11b746ceb5 | 3501 | minimum_spad_count, |
sepp_nepp | 6:fb11b746ceb5 | 3502 | &last_spad_index); |
sepp_nepp | 6:fb11b746ceb5 | 3503 | } |
sepp_nepp | 6:fb11b746ceb5 | 3504 | |
sepp_nepp | 6:fb11b746ceb5 | 3505 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3506 | current_spad_index = last_spad_index; |
sepp_nepp | 6:fb11b746ceb5 | 3507 | |
sepp_nepp | 8:2fd7cb217068 | 3508 | status = perform_ref_signal_measurement(&peak_signal_rate_ref); |
sepp_nepp | 6:fb11b746ceb5 | 3509 | if ((status == VL53L0X_ERROR_NONE) && |
sepp_nepp | 6:fb11b746ceb5 | 3510 | (peak_signal_rate_ref > target_ref_rate)) { |
sepp_nepp | 6:fb11b746ceb5 | 3511 | /* Signal rate measurement too high, |
sepp_nepp | 6:fb11b746ceb5 | 3512 | * switch to APERTURE SPADs */ |
sepp_nepp | 6:fb11b746ceb5 | 3513 | |
sepp_nepp | 6:fb11b746ceb5 | 3514 | for (index = 0; index < spad_array_size; index++) { |
sepp_nepp | 11:d8dbe3b87f9f | 3515 | Data.RefSpadEnables[index] = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3516 | } |
sepp_nepp | 6:fb11b746ceb5 | 3517 | |
sepp_nepp | 6:fb11b746ceb5 | 3518 | /* Increment to the first APERTURE spad */ |
sepp_nepp | 6:fb11b746ceb5 | 3519 | while ((is_aperture(start_select + current_spad_index) |
sepp_nepp | 6:fb11b746ceb5 | 3520 | == 0) && (current_spad_index < max_spad_count)) { |
sepp_nepp | 6:fb11b746ceb5 | 3521 | current_spad_index++; |
sepp_nepp | 6:fb11b746ceb5 | 3522 | } |
sepp_nepp | 6:fb11b746ceb5 | 3523 | |
sepp_nepp | 6:fb11b746ceb5 | 3524 | need_apt_spads = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3525 | |
sepp_nepp | 7:3a1115c2556b | 3526 | status = enable_ref_spads(need_apt_spads, |
sepp_nepp | 11:d8dbe3b87f9f | 3527 | Data.RefGoodSpadMap, |
sepp_nepp | 11:d8dbe3b87f9f | 3528 | Data.RefSpadEnables, |
sepp_nepp | 6:fb11b746ceb5 | 3529 | spad_array_size, |
sepp_nepp | 6:fb11b746ceb5 | 3530 | start_select, |
sepp_nepp | 6:fb11b746ceb5 | 3531 | current_spad_index, |
sepp_nepp | 6:fb11b746ceb5 | 3532 | minimum_spad_count, |
sepp_nepp | 6:fb11b746ceb5 | 3533 | &last_spad_index); |
sepp_nepp | 6:fb11b746ceb5 | 3534 | |
sepp_nepp | 6:fb11b746ceb5 | 3535 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3536 | current_spad_index = last_spad_index; |
sepp_nepp | 8:2fd7cb217068 | 3537 | status = perform_ref_signal_measurement(&peak_signal_rate_ref); |
sepp_nepp | 6:fb11b746ceb5 | 3538 | |
sepp_nepp | 6:fb11b746ceb5 | 3539 | if ((status == VL53L0X_ERROR_NONE) && |
sepp_nepp | 6:fb11b746ceb5 | 3540 | (peak_signal_rate_ref > target_ref_rate)) { |
sepp_nepp | 6:fb11b746ceb5 | 3541 | /* Signal rate still too high after |
sepp_nepp | 6:fb11b746ceb5 | 3542 | * setting the minimum number of |
sepp_nepp | 6:fb11b746ceb5 | 3543 | * APERTURE spads. Can do no more |
sepp_nepp | 6:fb11b746ceb5 | 3544 | * therefore set the min number of |
sepp_nepp | 6:fb11b746ceb5 | 3545 | * aperture spads as the result. |
sepp_nepp | 6:fb11b746ceb5 | 3546 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3547 | is_aperture_spads_int = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3548 | ref_spad_count_int = minimum_spad_count; |
sepp_nepp | 6:fb11b746ceb5 | 3549 | } |
sepp_nepp | 6:fb11b746ceb5 | 3550 | } |
sepp_nepp | 6:fb11b746ceb5 | 3551 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3552 | need_apt_spads = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3553 | } |
sepp_nepp | 6:fb11b746ceb5 | 3554 | } |
sepp_nepp | 6:fb11b746ceb5 | 3555 | |
sepp_nepp | 6:fb11b746ceb5 | 3556 | if ((status == VL53L0X_ERROR_NONE) && |
sepp_nepp | 6:fb11b746ceb5 | 3557 | (peak_signal_rate_ref < target_ref_rate)) { |
sepp_nepp | 6:fb11b746ceb5 | 3558 | /* At this point, the minimum number of either aperture |
sepp_nepp | 6:fb11b746ceb5 | 3559 | * or non-aperture spads have been set. Proceed to add |
sepp_nepp | 6:fb11b746ceb5 | 3560 | * spads and perform measurements until the target |
sepp_nepp | 6:fb11b746ceb5 | 3561 | * reference is reached. |
sepp_nepp | 6:fb11b746ceb5 | 3562 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3563 | is_aperture_spads_int = need_apt_spads; |
sepp_nepp | 6:fb11b746ceb5 | 3564 | ref_spad_count_int = minimum_spad_count; |
sepp_nepp | 6:fb11b746ceb5 | 3565 | |
sepp_nepp | 11:d8dbe3b87f9f | 3566 | memcpy(last_spad_array, Data.RefSpadEnables, |
sepp_nepp | 6:fb11b746ceb5 | 3567 | spad_array_size); |
sepp_nepp | 6:fb11b746ceb5 | 3568 | last_signal_rate_diff = abs(peak_signal_rate_ref - |
sepp_nepp | 6:fb11b746ceb5 | 3569 | target_ref_rate); |
sepp_nepp | 6:fb11b746ceb5 | 3570 | complete = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3571 | |
sepp_nepp | 6:fb11b746ceb5 | 3572 | while (!complete) { |
sepp_nepp | 11:d8dbe3b87f9f | 3573 | get_next_good_spad(Data.RefGoodSpadMap, |
sepp_nepp | 6:fb11b746ceb5 | 3574 | spad_array_size, current_spad_index, |
sepp_nepp | 6:fb11b746ceb5 | 3575 | &next_good_spad); |
sepp_nepp | 6:fb11b746ceb5 | 3576 | |
sepp_nepp | 6:fb11b746ceb5 | 3577 | if (next_good_spad == -1) { |
sepp_nepp | 6:fb11b746ceb5 | 3578 | status = VL53L0X_ERROR_REF_SPAD_INIT; |
sepp_nepp | 6:fb11b746ceb5 | 3579 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3580 | } |
sepp_nepp | 6:fb11b746ceb5 | 3581 | |
sepp_nepp | 6:fb11b746ceb5 | 3582 | /* Cannot combine Aperture and Non-Aperture spads, so |
sepp_nepp | 6:fb11b746ceb5 | 3583 | * ensure the current spad is of the correct type. |
sepp_nepp | 6:fb11b746ceb5 | 3584 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3585 | if (is_aperture((uint32_t)start_select + next_good_spad) != |
sepp_nepp | 6:fb11b746ceb5 | 3586 | need_apt_spads) { |
sepp_nepp | 6:fb11b746ceb5 | 3587 | /* At this point we have enabled the maximum |
sepp_nepp | 6:fb11b746ceb5 | 3588 | * number of Aperture spads. |
sepp_nepp | 6:fb11b746ceb5 | 3589 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3590 | complete = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3591 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3592 | } |
sepp_nepp | 6:fb11b746ceb5 | 3593 | |
sepp_nepp | 6:fb11b746ceb5 | 3594 | (ref_spad_count_int)++; |
sepp_nepp | 6:fb11b746ceb5 | 3595 | |
sepp_nepp | 6:fb11b746ceb5 | 3596 | current_spad_index = next_good_spad; |
sepp_nepp | 11:d8dbe3b87f9f | 3597 | status = enable_spad_bit(Data.RefSpadEnables, |
sepp_nepp | 6:fb11b746ceb5 | 3598 | spad_array_size, current_spad_index); |
sepp_nepp | 6:fb11b746ceb5 | 3599 | |
sepp_nepp | 6:fb11b746ceb5 | 3600 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3601 | current_spad_index++; |
sepp_nepp | 6:fb11b746ceb5 | 3602 | /* Proceed to apply the additional spad and |
sepp_nepp | 6:fb11b746ceb5 | 3603 | * perform measurement. */ |
sepp_nepp | 11:d8dbe3b87f9f | 3604 | status = set_ref_spad_map(Data.RefSpadEnables); |
sepp_nepp | 6:fb11b746ceb5 | 3605 | } |
sepp_nepp | 6:fb11b746ceb5 | 3606 | |
sepp_nepp | 6:fb11b746ceb5 | 3607 | if (status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3608 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3609 | } |
sepp_nepp | 6:fb11b746ceb5 | 3610 | |
sepp_nepp | 7:3a1115c2556b | 3611 | status = perform_ref_signal_measurement(&peak_signal_rate_ref); |
sepp_nepp | 6:fb11b746ceb5 | 3612 | |
sepp_nepp | 6:fb11b746ceb5 | 3613 | if (status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3614 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3615 | } |
sepp_nepp | 6:fb11b746ceb5 | 3616 | |
sepp_nepp | 6:fb11b746ceb5 | 3617 | signal_rate_diff = abs(peak_signal_rate_ref - target_ref_rate); |
sepp_nepp | 6:fb11b746ceb5 | 3618 | |
sepp_nepp | 6:fb11b746ceb5 | 3619 | if (peak_signal_rate_ref > target_ref_rate) { |
sepp_nepp | 6:fb11b746ceb5 | 3620 | /* Select the spad map that provides the |
sepp_nepp | 6:fb11b746ceb5 | 3621 | * measurement closest to the target rate, |
sepp_nepp | 6:fb11b746ceb5 | 3622 | * either above or below it. |
sepp_nepp | 6:fb11b746ceb5 | 3623 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3624 | if (signal_rate_diff > last_signal_rate_diff) { |
sepp_nepp | 6:fb11b746ceb5 | 3625 | /* Previous spad map produced a closer |
sepp_nepp | 6:fb11b746ceb5 | 3626 | * measurement, so choose this. */ |
sepp_nepp | 7:3a1115c2556b | 3627 | status = set_ref_spad_map(last_spad_array); |
sepp_nepp | 11:d8dbe3b87f9f | 3628 | memcpy(Data.RefSpadEnables, |
sepp_nepp | 6:fb11b746ceb5 | 3629 | last_spad_array, spad_array_size); |
sepp_nepp | 6:fb11b746ceb5 | 3630 | (ref_spad_count_int)--; |
sepp_nepp | 6:fb11b746ceb5 | 3631 | } |
sepp_nepp | 6:fb11b746ceb5 | 3632 | complete = 1; |
sepp_nepp | 6:fb11b746ceb5 | 3633 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3634 | /* Continue to add spads */ |
sepp_nepp | 6:fb11b746ceb5 | 3635 | last_signal_rate_diff = signal_rate_diff; |
sepp_nepp | 6:fb11b746ceb5 | 3636 | memcpy(last_spad_array, |
sepp_nepp | 11:d8dbe3b87f9f | 3637 | Data.RefSpadEnables, |
sepp_nepp | 6:fb11b746ceb5 | 3638 | spad_array_size); |
sepp_nepp | 6:fb11b746ceb5 | 3639 | } |
sepp_nepp | 6:fb11b746ceb5 | 3640 | |
sepp_nepp | 6:fb11b746ceb5 | 3641 | } /* while */ |
sepp_nepp | 6:fb11b746ceb5 | 3642 | } |
sepp_nepp | 6:fb11b746ceb5 | 3643 | |
sepp_nepp | 6:fb11b746ceb5 | 3644 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3645 | *ref_spad_count = ref_spad_count_int; |
sepp_nepp | 6:fb11b746ceb5 | 3646 | *is_aperture_spads = is_aperture_spads_int; |
sepp_nepp | 8:2fd7cb217068 | 3647 | Data.RefSpadsInitialised = 1; |
sepp_nepp | 8:2fd7cb217068 | 3648 | Data.ReferenceSpadCount = (uint8_t)(*ref_spad_count); |
sepp_nepp | 9:cb4c6d4e5030 | 3649 | Data.ReferenceSpadType = *is_aperture_spads; |
sepp_nepp | 6:fb11b746ceb5 | 3650 | } |
sepp_nepp | 6:fb11b746ceb5 | 3651 | |
sepp_nepp | 6:fb11b746ceb5 | 3652 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3653 | } |
sepp_nepp | 6:fb11b746ceb5 | 3654 | |
sepp_nepp | 8:2fd7cb217068 | 3655 | VL53L0X_Error VL53L0X::VL53L0X_set_reference_spads(uint32_t count, uint8_t is_aperture_spads) |
sepp_nepp | 8:2fd7cb217068 | 3656 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3657 | uint32_t current_spad_index = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3658 | uint8_t start_select = 0xB4; |
sepp_nepp | 6:fb11b746ceb5 | 3659 | uint32_t spad_array_size = 6; |
sepp_nepp | 6:fb11b746ceb5 | 3660 | uint32_t max_spad_count = 44; |
sepp_nepp | 6:fb11b746ceb5 | 3661 | uint32_t last_spad_index; |
sepp_nepp | 6:fb11b746ceb5 | 3662 | uint32_t index; |
sepp_nepp | 6:fb11b746ceb5 | 3663 | |
sepp_nepp | 6:fb11b746ceb5 | 3664 | /* |
sepp_nepp | 6:fb11b746ceb5 | 3665 | * This function applies a requested number of reference spads, either |
sepp_nepp | 6:fb11b746ceb5 | 3666 | * aperture or |
sepp_nepp | 6:fb11b746ceb5 | 3667 | * non-aperture, as requested. |
sepp_nepp | 6:fb11b746ceb5 | 3668 | * The good spad map will be applied. |
sepp_nepp | 6:fb11b746ceb5 | 3669 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3670 | |
sepp_nepp | 7:3a1115c2556b | 3671 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 3672 | |
sepp_nepp | 6:fb11b746ceb5 | 3673 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3674 | status = VL53L0X_write_byte(VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 3675 | } |
sepp_nepp | 6:fb11b746ceb5 | 3676 | |
sepp_nepp | 6:fb11b746ceb5 | 3677 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3678 | status = VL53L0X_write_byte( VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD, 0x2C); |
sepp_nepp | 6:fb11b746ceb5 | 3679 | } |
sepp_nepp | 6:fb11b746ceb5 | 3680 | |
sepp_nepp | 6:fb11b746ceb5 | 3681 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3682 | status = VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 3683 | } |
sepp_nepp | 6:fb11b746ceb5 | 3684 | |
sepp_nepp | 6:fb11b746ceb5 | 3685 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3686 | status = VL53L0X_write_byte(VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT, |
sepp_nepp | 6:fb11b746ceb5 | 3687 | start_select); |
sepp_nepp | 6:fb11b746ceb5 | 3688 | } |
sepp_nepp | 6:fb11b746ceb5 | 3689 | |
sepp_nepp | 6:fb11b746ceb5 | 3690 | for (index = 0; index < spad_array_size; index++) { |
sepp_nepp | 11:d8dbe3b87f9f | 3691 | Data.RefSpadEnables[index] = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3692 | } |
sepp_nepp | 6:fb11b746ceb5 | 3693 | |
sepp_nepp | 6:fb11b746ceb5 | 3694 | if (is_aperture_spads) { |
sepp_nepp | 6:fb11b746ceb5 | 3695 | /* Increment to the first APERTURE spad */ |
sepp_nepp | 6:fb11b746ceb5 | 3696 | while ((is_aperture(start_select + current_spad_index) == 0) && |
sepp_nepp | 6:fb11b746ceb5 | 3697 | (current_spad_index < max_spad_count)) { |
sepp_nepp | 6:fb11b746ceb5 | 3698 | current_spad_index++; |
sepp_nepp | 6:fb11b746ceb5 | 3699 | } |
sepp_nepp | 6:fb11b746ceb5 | 3700 | } |
sepp_nepp | 7:3a1115c2556b | 3701 | status = enable_ref_spads(is_aperture_spads, |
sepp_nepp | 11:d8dbe3b87f9f | 3702 | Data.RefGoodSpadMap, |
sepp_nepp | 11:d8dbe3b87f9f | 3703 | Data.RefSpadEnables, |
sepp_nepp | 6:fb11b746ceb5 | 3704 | spad_array_size, |
sepp_nepp | 6:fb11b746ceb5 | 3705 | start_select, |
sepp_nepp | 6:fb11b746ceb5 | 3706 | current_spad_index, |
sepp_nepp | 6:fb11b746ceb5 | 3707 | count, |
sepp_nepp | 6:fb11b746ceb5 | 3708 | &last_spad_index); |
sepp_nepp | 6:fb11b746ceb5 | 3709 | |
sepp_nepp | 6:fb11b746ceb5 | 3710 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3711 | Data.RefSpadsInitialised = 1; |
sepp_nepp | 8:2fd7cb217068 | 3712 | Data.ReferenceSpadCount = (uint8_t)(count); |
sepp_nepp | 8:2fd7cb217068 | 3713 | Data.ReferenceSpadType = is_aperture_spads; |
sepp_nepp | 6:fb11b746ceb5 | 3714 | } |
sepp_nepp | 6:fb11b746ceb5 | 3715 | |
sepp_nepp | 6:fb11b746ceb5 | 3716 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3717 | } |
sepp_nepp | 6:fb11b746ceb5 | 3718 | |
sepp_nepp | 7:3a1115c2556b | 3719 | VL53L0X_Error VL53L0X::VL53L0X_perform_ref_calibration( uint8_t *p_vhv_settings, |
sepp_nepp | 6:fb11b746ceb5 | 3720 | uint8_t *p_phase_cal) |
sepp_nepp | 8:2fd7cb217068 | 3721 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3722 | |
sepp_nepp | 7:3a1115c2556b | 3723 | status = VL53L0X_perform_ref_calibration( p_vhv_settings, p_phase_cal, 1); |
sepp_nepp | 6:fb11b746ceb5 | 3724 | |
sepp_nepp | 6:fb11b746ceb5 | 3725 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3726 | } |
sepp_nepp | 6:fb11b746ceb5 | 3727 | |
sepp_nepp | 8:2fd7cb217068 | 3728 | VL53L0X_Error VL53L0X::VL53L0X_perform_ref_spad_management(uint32_t *ref_spad_count, uint8_t *is_aperture_spads) |
sepp_nepp | 8:2fd7cb217068 | 3729 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3730 | |
sepp_nepp | 7:3a1115c2556b | 3731 | status = wrapped_VL53L0X_perform_ref_spad_management( ref_spad_count, |
sepp_nepp | 6:fb11b746ceb5 | 3732 | is_aperture_spads); |
sepp_nepp | 6:fb11b746ceb5 | 3733 | |
sepp_nepp | 6:fb11b746ceb5 | 3734 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3735 | } |
sepp_nepp | 6:fb11b746ceb5 | 3736 | |
sepp_nepp | 6:fb11b746ceb5 | 3737 | /* Group PAL Init Functions */ |
sepp_nepp | 7:3a1115c2556b | 3738 | VL53L0X_Error VL53L0X::VL53L0X_set_device_address( uint8_t device_address) |
sepp_nepp | 7:3a1115c2556b | 3739 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3740 | |
sepp_nepp | 7:3a1115c2556b | 3741 | status = VL53L0X_write_byte( VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS, |
sepp_nepp | 6:fb11b746ceb5 | 3742 | device_address / 2); |
sepp_nepp | 6:fb11b746ceb5 | 3743 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3744 | } |
sepp_nepp | 6:fb11b746ceb5 | 3745 | |
sepp_nepp | 7:3a1115c2556b | 3746 | VL53L0X_Error VL53L0X::VL53L0X_set_gpio_config( uint8_t pin, |
sepp_nepp | 6:fb11b746ceb5 | 3747 | VL53L0X_DeviceModes device_mode, VL53L0X_GpioFunctionality functionality, |
sepp_nepp | 6:fb11b746ceb5 | 3748 | VL53L0X_InterruptPolarity polarity) |
sepp_nepp | 7:3a1115c2556b | 3749 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3750 | uint8_t data; |
sepp_nepp | 6:fb11b746ceb5 | 3751 | |
sepp_nepp | 6:fb11b746ceb5 | 3752 | if (pin != 0) { |
sepp_nepp | 6:fb11b746ceb5 | 3753 | status = VL53L0X_ERROR_GPIO_NOT_EXISTING; |
sepp_nepp | 6:fb11b746ceb5 | 3754 | } else if (device_mode == VL53L0X_DEVICEMODE_GPIO_DRIVE) { |
sepp_nepp | 6:fb11b746ceb5 | 3755 | if (polarity == VL53L0X_INTERRUPTPOLARITY_LOW) { |
sepp_nepp | 6:fb11b746ceb5 | 3756 | data = 0x10; |
sepp_nepp | 7:3a1115c2556b | 3757 | } else {data = 1;} |
sepp_nepp | 7:3a1115c2556b | 3758 | |
sepp_nepp | 7:3a1115c2556b | 3759 | status = VL53L0X_write_byte(VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH, data); |
sepp_nepp | 6:fb11b746ceb5 | 3760 | |
sepp_nepp | 6:fb11b746ceb5 | 3761 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3762 | if (device_mode == VL53L0X_DEVICEMODE_GPIO_OSC) { |
sepp_nepp | 6:fb11b746ceb5 | 3763 | |
sepp_nepp | 7:3a1115c2556b | 3764 | status |= VL53L0X_write_byte( 0xff, 0x01); |
sepp_nepp | 7:3a1115c2556b | 3765 | status |= VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 7:3a1115c2556b | 3766 | status |= VL53L0X_write_byte( 0xff, 0x00); |
sepp_nepp | 7:3a1115c2556b | 3767 | status |= VL53L0X_write_byte( 0x80, 0x01); |
sepp_nepp | 7:3a1115c2556b | 3768 | status |= VL53L0X_write_byte( 0x85, 0x02); |
sepp_nepp | 7:3a1115c2556b | 3769 | status |= VL53L0X_write_byte( 0xff, 0x04); |
sepp_nepp | 7:3a1115c2556b | 3770 | status |= VL53L0X_write_byte( 0xcd, 0x00); |
sepp_nepp | 7:3a1115c2556b | 3771 | status |= VL53L0X_write_byte( 0xcc, 0x11); |
sepp_nepp | 7:3a1115c2556b | 3772 | status |= VL53L0X_write_byte( 0xff, 0x07); |
sepp_nepp | 7:3a1115c2556b | 3773 | status |= VL53L0X_write_byte( 0xbe, 0x00); |
sepp_nepp | 7:3a1115c2556b | 3774 | status |= VL53L0X_write_byte( 0xff, 0x06); |
sepp_nepp | 7:3a1115c2556b | 3775 | status |= VL53L0X_write_byte( 0xcc, 0x09); |
sepp_nepp | 7:3a1115c2556b | 3776 | status |= VL53L0X_write_byte( 0xff, 0x00); |
sepp_nepp | 7:3a1115c2556b | 3777 | status |= VL53L0X_write_byte( 0xff, 0x01); |
sepp_nepp | 7:3a1115c2556b | 3778 | status |= VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 3779 | |
sepp_nepp | 6:fb11b746ceb5 | 3780 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3781 | |
sepp_nepp | 6:fb11b746ceb5 | 3782 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3783 | switch (functionality) { |
sepp_nepp | 6:fb11b746ceb5 | 3784 | case VL53L0X_GPIOFUNCTIONALITY_OFF: |
sepp_nepp | 6:fb11b746ceb5 | 3785 | data = 0x00; |
sepp_nepp | 6:fb11b746ceb5 | 3786 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3787 | case VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW: |
sepp_nepp | 6:fb11b746ceb5 | 3788 | data = 0x01; |
sepp_nepp | 6:fb11b746ceb5 | 3789 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3790 | case VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH: |
sepp_nepp | 6:fb11b746ceb5 | 3791 | data = 0x02; |
sepp_nepp | 6:fb11b746ceb5 | 3792 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3793 | case VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT: |
sepp_nepp | 6:fb11b746ceb5 | 3794 | data = 0x03; |
sepp_nepp | 6:fb11b746ceb5 | 3795 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3796 | case VL53L0X_GPIOFUNCTIONALITY_NEW_MEASURE_READY: |
sepp_nepp | 6:fb11b746ceb5 | 3797 | data = 0x04; |
sepp_nepp | 6:fb11b746ceb5 | 3798 | break; |
sepp_nepp | 6:fb11b746ceb5 | 3799 | default: |
sepp_nepp | 11:d8dbe3b87f9f | 3800 | status = VL53L0X_ERROR_GPIO_FUNCTIONALITY_NOT_SUPPORTED; |
sepp_nepp | 6:fb11b746ceb5 | 3801 | } |
sepp_nepp | 6:fb11b746ceb5 | 3802 | } |
sepp_nepp | 6:fb11b746ceb5 | 3803 | |
sepp_nepp | 6:fb11b746ceb5 | 3804 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3805 | status = VL53L0X_write_byte(VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO, data); |
sepp_nepp | 6:fb11b746ceb5 | 3806 | } |
sepp_nepp | 6:fb11b746ceb5 | 3807 | |
sepp_nepp | 6:fb11b746ceb5 | 3808 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3809 | if (polarity == VL53L0X_INTERRUPTPOLARITY_LOW) { |
sepp_nepp | 6:fb11b746ceb5 | 3810 | data = 0; |
sepp_nepp | 7:3a1115c2556b | 3811 | } else { data = (uint8_t)(1 << 4); } |
sepp_nepp | 7:3a1115c2556b | 3812 | status = VL53L0X_update_byte(VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH, 0xEF, data); |
sepp_nepp | 6:fb11b746ceb5 | 3813 | } |
sepp_nepp | 6:fb11b746ceb5 | 3814 | |
sepp_nepp | 6:fb11b746ceb5 | 3815 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3816 | Data.Pin0GpioFunctionality = functionality; } |
sepp_nepp | 7:3a1115c2556b | 3817 | |
sepp_nepp | 7:3a1115c2556b | 3818 | if (status == VL53L0X_ERROR_NONE) { status = VL53L0X_clear_interrupt_mask( 0); } |
sepp_nepp | 6:fb11b746ceb5 | 3819 | } |
sepp_nepp | 6:fb11b746ceb5 | 3820 | } |
sepp_nepp | 6:fb11b746ceb5 | 3821 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3822 | } |
sepp_nepp | 6:fb11b746ceb5 | 3823 | |
sepp_nepp | 7:3a1115c2556b | 3824 | VL53L0X_Error VL53L0X::VL53L0X_get_fraction_enable( uint8_t *p_enabled) |
sepp_nepp | 8:2fd7cb217068 | 3825 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 7:3a1115c2556b | 3826 | status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_RANGE_CONFIG, p_enabled); |
sepp_nepp | 7:3a1115c2556b | 3827 | if (status == VL53L0X_ERROR_NONE) { *p_enabled = (*p_enabled & 1); } |
sepp_nepp | 6:fb11b746ceb5 | 3828 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3829 | } |
sepp_nepp | 6:fb11b746ceb5 | 3830 | |
sepp_nepp | 6:fb11b746ceb5 | 3831 | uint16_t VL53L0X::VL53L0X_encode_timeout(uint32_t timeout_macro_clks) |
sepp_nepp | 7:3a1115c2556b | 3832 | { /*!Encode timeout in macro periods in (LSByte * 2^MSByte) + 1 format*/ |
sepp_nepp | 6:fb11b746ceb5 | 3833 | |
sepp_nepp | 6:fb11b746ceb5 | 3834 | uint16_t encoded_timeout = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3835 | uint32_t ls_byte = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3836 | uint16_t ms_byte = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3837 | |
sepp_nepp | 6:fb11b746ceb5 | 3838 | if (timeout_macro_clks > 0) { |
sepp_nepp | 6:fb11b746ceb5 | 3839 | ls_byte = timeout_macro_clks - 1; |
sepp_nepp | 6:fb11b746ceb5 | 3840 | |
sepp_nepp | 6:fb11b746ceb5 | 3841 | while ((ls_byte & 0xFFFFFF00) > 0) { |
sepp_nepp | 6:fb11b746ceb5 | 3842 | ls_byte = ls_byte >> 1; |
sepp_nepp | 6:fb11b746ceb5 | 3843 | ms_byte++; |
sepp_nepp | 6:fb11b746ceb5 | 3844 | } |
sepp_nepp | 7:3a1115c2556b | 3845 | encoded_timeout = (ms_byte << 8) + (uint16_t)(ls_byte & 0x000000FF); |
sepp_nepp | 6:fb11b746ceb5 | 3846 | } |
sepp_nepp | 6:fb11b746ceb5 | 3847 | return encoded_timeout; |
sepp_nepp | 6:fb11b746ceb5 | 3848 | } |
sepp_nepp | 6:fb11b746ceb5 | 3849 | |
sepp_nepp | 8:2fd7cb217068 | 3850 | VL53L0X_Error VL53L0X::set_sequence_step_timeout(VL53L0X_SequenceStepId sequence_step_id, |
sepp_nepp | 6:fb11b746ceb5 | 3851 | uint32_t timeout_micro_secs) |
sepp_nepp | 8:2fd7cb217068 | 3852 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 3853 | uint8_t current_vcsel_pulse_period_p_clk; |
sepp_nepp | 6:fb11b746ceb5 | 3854 | uint8_t msrc_encoded_time_out; |
sepp_nepp | 6:fb11b746ceb5 | 3855 | uint16_t pre_range_encoded_time_out; |
sepp_nepp | 6:fb11b746ceb5 | 3856 | uint16_t pre_range_time_out_m_clks; |
sepp_nepp | 6:fb11b746ceb5 | 3857 | uint16_t msrc_range_time_out_m_clks; |
sepp_nepp | 6:fb11b746ceb5 | 3858 | uint32_t final_range_time_out_m_clks; |
sepp_nepp | 6:fb11b746ceb5 | 3859 | uint16_t final_range_encoded_time_out; |
sepp_nepp | 6:fb11b746ceb5 | 3860 | VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps; |
sepp_nepp | 6:fb11b746ceb5 | 3861 | |
sepp_nepp | 6:fb11b746ceb5 | 3862 | if ((sequence_step_id == VL53L0X_SEQUENCESTEP_TCC) || |
sepp_nepp | 6:fb11b746ceb5 | 3863 | (sequence_step_id == VL53L0X_SEQUENCESTEP_DSS) || |
sepp_nepp | 6:fb11b746ceb5 | 3864 | (sequence_step_id == VL53L0X_SEQUENCESTEP_MSRC)) { |
sepp_nepp | 6:fb11b746ceb5 | 3865 | |
sepp_nepp | 8:2fd7cb217068 | 3866 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 3867 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 3868 | |
sepp_nepp | 6:fb11b746ceb5 | 3869 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 3870 | msrc_range_time_out_m_clks = VL53L0X_calc_timeout_mclks(timeout_micro_secs, |
sepp_nepp | 6:fb11b746ceb5 | 3871 | (uint8_t)current_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 3872 | |
sepp_nepp | 6:fb11b746ceb5 | 3873 | if (msrc_range_time_out_m_clks > 256) { |
sepp_nepp | 6:fb11b746ceb5 | 3874 | msrc_encoded_time_out = 255; |
sepp_nepp | 6:fb11b746ceb5 | 3875 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3876 | msrc_encoded_time_out = |
sepp_nepp | 6:fb11b746ceb5 | 3877 | (uint8_t)msrc_range_time_out_m_clks - 1; |
sepp_nepp | 6:fb11b746ceb5 | 3878 | } |
sepp_nepp | 8:2fd7cb217068 | 3879 | Data.LastEncodedTimeout = msrc_encoded_time_out; |
sepp_nepp | 6:fb11b746ceb5 | 3880 | } |
sepp_nepp | 6:fb11b746ceb5 | 3881 | |
sepp_nepp | 6:fb11b746ceb5 | 3882 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3883 | status = VL53L0X_write_byte(VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP, |
sepp_nepp | 6:fb11b746ceb5 | 3884 | msrc_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 3885 | } |
sepp_nepp | 6:fb11b746ceb5 | 3886 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3887 | |
sepp_nepp | 6:fb11b746ceb5 | 3888 | if (sequence_step_id == VL53L0X_SEQUENCESTEP_PRE_RANGE) { |
sepp_nepp | 6:fb11b746ceb5 | 3889 | |
sepp_nepp | 6:fb11b746ceb5 | 3890 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3891 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 3892 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 3893 | pre_range_time_out_m_clks = |
sepp_nepp | 7:3a1115c2556b | 3894 | VL53L0X_calc_timeout_mclks(timeout_micro_secs, |
sepp_nepp | 6:fb11b746ceb5 | 3895 | (uint8_t)current_vcsel_pulse_period_p_clk); |
sepp_nepp | 8:2fd7cb217068 | 3896 | pre_range_encoded_time_out = VL53L0X_encode_timeout(pre_range_time_out_m_clks); |
sepp_nepp | 8:2fd7cb217068 | 3897 | Data.LastEncodedTimeout = pre_range_encoded_time_out; |
sepp_nepp | 6:fb11b746ceb5 | 3898 | } |
sepp_nepp | 6:fb11b746ceb5 | 3899 | |
sepp_nepp | 6:fb11b746ceb5 | 3900 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3901 | status = VL53L0X_write_word(VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI, |
sepp_nepp | 6:fb11b746ceb5 | 3902 | pre_range_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 3903 | } |
sepp_nepp | 6:fb11b746ceb5 | 3904 | |
sepp_nepp | 6:fb11b746ceb5 | 3905 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 3906 | Data.PreRangeTimeout_us = timeout_micro_secs; |
sepp_nepp | 6:fb11b746ceb5 | 3907 | } |
sepp_nepp | 6:fb11b746ceb5 | 3908 | } else if (sequence_step_id == VL53L0X_SEQUENCESTEP_FINAL_RANGE) { |
sepp_nepp | 6:fb11b746ceb5 | 3909 | |
sepp_nepp | 6:fb11b746ceb5 | 3910 | /* For the final range timeout, the pre-range timeout |
sepp_nepp | 6:fb11b746ceb5 | 3911 | * must be added. To do this both final and pre-range |
sepp_nepp | 6:fb11b746ceb5 | 3912 | * timeouts must be expressed in macro periods MClks |
sepp_nepp | 9:cb4c6d4e5030 | 3913 | * because they have different vcsel periods. */ |
sepp_nepp | 6:fb11b746ceb5 | 3914 | |
sepp_nepp | 7:3a1115c2556b | 3915 | VL53L0X_get_sequence_step_enables(&scheduler_sequence_steps); |
sepp_nepp | 6:fb11b746ceb5 | 3916 | pre_range_time_out_m_clks = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3917 | if (scheduler_sequence_steps.PreRangeOn) { |
sepp_nepp | 6:fb11b746ceb5 | 3918 | |
sepp_nepp | 6:fb11b746ceb5 | 3919 | /* Retrieve PRE-RANGE VCSEL Period */ |
sepp_nepp | 7:3a1115c2556b | 3920 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 3921 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 3922 | |
sepp_nepp | 6:fb11b746ceb5 | 3923 | /* Retrieve PRE-RANGE Timeout in Macro periods |
sepp_nepp | 6:fb11b746ceb5 | 3924 | * (MCLKS) */ |
sepp_nepp | 6:fb11b746ceb5 | 3925 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3926 | status = VL53L0X_read_word( 0x51, &pre_range_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 3927 | pre_range_time_out_m_clks = |
sepp_nepp | 7:3a1115c2556b | 3928 | VL53L0X_decode_timeout( pre_range_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 3929 | } |
sepp_nepp | 6:fb11b746ceb5 | 3930 | } |
sepp_nepp | 6:fb11b746ceb5 | 3931 | |
sepp_nepp | 6:fb11b746ceb5 | 3932 | /* Calculate FINAL RANGE Timeout in Macro Periods |
sepp_nepp | 6:fb11b746ceb5 | 3933 | * (MCLKS) and add PRE-RANGE value |
sepp_nepp | 6:fb11b746ceb5 | 3934 | */ |
sepp_nepp | 6:fb11b746ceb5 | 3935 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3936 | status = VL53L0X_get_vcsel_pulse_period( VL53L0X_VCSEL_PERIOD_FINAL_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 3937 | ¤t_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 3938 | } |
sepp_nepp | 6:fb11b746ceb5 | 3939 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 3940 | final_range_time_out_m_clks = |
sepp_nepp | 7:3a1115c2556b | 3941 | VL53L0X_calc_timeout_mclks( timeout_micro_secs, |
sepp_nepp | 6:fb11b746ceb5 | 3942 | (uint8_t) current_vcsel_pulse_period_p_clk); |
sepp_nepp | 6:fb11b746ceb5 | 3943 | |
sepp_nepp | 6:fb11b746ceb5 | 3944 | final_range_time_out_m_clks += pre_range_time_out_m_clks; |
sepp_nepp | 6:fb11b746ceb5 | 3945 | final_range_encoded_time_out = |
sepp_nepp | 6:fb11b746ceb5 | 3946 | VL53L0X_encode_timeout(final_range_time_out_m_clks); |
sepp_nepp | 6:fb11b746ceb5 | 3947 | |
sepp_nepp | 6:fb11b746ceb5 | 3948 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 3949 | status = VL53L0X_write_word( 0x71, final_range_encoded_time_out); |
sepp_nepp | 6:fb11b746ceb5 | 3950 | } |
sepp_nepp | 6:fb11b746ceb5 | 3951 | |
sepp_nepp | 6:fb11b746ceb5 | 3952 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 3953 | Data.FinalRangeTimeout_us = timeout_micro_secs; |
sepp_nepp | 6:fb11b746ceb5 | 3954 | } |
sepp_nepp | 6:fb11b746ceb5 | 3955 | } |
sepp_nepp | 6:fb11b746ceb5 | 3956 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 3957 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 3958 | } |
sepp_nepp | 6:fb11b746ceb5 | 3959 | } |
sepp_nepp | 6:fb11b746ceb5 | 3960 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 3961 | } |
sepp_nepp | 6:fb11b746ceb5 | 3962 | |
sepp_nepp | 11:d8dbe3b87f9f | 3963 | VL53L0X_Error VL53L0X::wrapped_VL53L0X_set_measurement_timing_budget_us(uint32_t measurement_timing_budget_us) |
sepp_nepp | 8:2fd7cb217068 | 3964 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 11:d8dbe3b87f9f | 3965 | uint32_t final_range_timing_budget_us; |
sepp_nepp | 6:fb11b746ceb5 | 3966 | VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps; |
sepp_nepp | 11:d8dbe3b87f9f | 3967 | uint32_t msrc_dcc_tcc_timeout_us = 2000; |
sepp_nepp | 11:d8dbe3b87f9f | 3968 | uint32_t start_overhead_us = 1910; |
sepp_nepp | 11:d8dbe3b87f9f | 3969 | uint32_t end_overhead_us = 960; |
sepp_nepp | 11:d8dbe3b87f9f | 3970 | uint32_t msrc_overhead_us = 660; |
sepp_nepp | 11:d8dbe3b87f9f | 3971 | uint32_t tcc_overhead_us = 590; |
sepp_nepp | 11:d8dbe3b87f9f | 3972 | uint32_t dss_overhead_us = 690; |
sepp_nepp | 11:d8dbe3b87f9f | 3973 | uint32_t pre_range_overhead_us = 660; |
sepp_nepp | 11:d8dbe3b87f9f | 3974 | uint32_t final_range_overhead_us = 550; |
sepp_nepp | 11:d8dbe3b87f9f | 3975 | uint32_t pre_range_timeout_us = 0; |
sepp_nepp | 11:d8dbe3b87f9f | 3976 | uint32_t c_min_timing_budget_us = 20000; |
sepp_nepp | 6:fb11b746ceb5 | 3977 | uint32_t sub_timeout = 0; |
sepp_nepp | 6:fb11b746ceb5 | 3978 | |
sepp_nepp | 11:d8dbe3b87f9f | 3979 | if (measurement_timing_budget_us < c_min_timing_budget_us) |
sepp_nepp | 7:3a1115c2556b | 3980 | { status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 7:3a1115c2556b | 3981 | return status; |
sepp_nepp | 7:3a1115c2556b | 3982 | } |
sepp_nepp | 6:fb11b746ceb5 | 3983 | |
sepp_nepp | 11:d8dbe3b87f9f | 3984 | final_range_timing_budget_us = |
sepp_nepp | 13:253cb4ea3fcc | 3985 | measurement_timing_budget_us - (start_overhead_us + end_overhead_us); |
sepp_nepp | 6:fb11b746ceb5 | 3986 | |
sepp_nepp | 7:3a1115c2556b | 3987 | status = VL53L0X_get_sequence_step_enables( &scheduler_sequence_steps); |
sepp_nepp | 6:fb11b746ceb5 | 3988 | |
sepp_nepp | 6:fb11b746ceb5 | 3989 | if (status == VL53L0X_ERROR_NONE && |
sepp_nepp | 6:fb11b746ceb5 | 3990 | (scheduler_sequence_steps.TccOn || |
sepp_nepp | 6:fb11b746ceb5 | 3991 | scheduler_sequence_steps.MsrcOn || |
sepp_nepp | 6:fb11b746ceb5 | 3992 | scheduler_sequence_steps.DssOn)) { |
sepp_nepp | 6:fb11b746ceb5 | 3993 | |
sepp_nepp | 6:fb11b746ceb5 | 3994 | /* TCC, MSRC and DSS all share the same timeout */ |
sepp_nepp | 7:3a1115c2556b | 3995 | status = get_sequence_step_timeout( VL53L0X_SEQUENCESTEP_MSRC, |
sepp_nepp | 11:d8dbe3b87f9f | 3996 | &msrc_dcc_tcc_timeout_us); |
sepp_nepp | 6:fb11b746ceb5 | 3997 | |
sepp_nepp | 6:fb11b746ceb5 | 3998 | /* Subtract the TCC, MSRC and DSS timeouts if they are |
sepp_nepp | 6:fb11b746ceb5 | 3999 | * enabled. */ |
sepp_nepp | 6:fb11b746ceb5 | 4000 | |
sepp_nepp | 6:fb11b746ceb5 | 4001 | if (status != VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 4002 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4003 | } |
sepp_nepp | 6:fb11b746ceb5 | 4004 | |
sepp_nepp | 6:fb11b746ceb5 | 4005 | /* TCC */ |
sepp_nepp | 6:fb11b746ceb5 | 4006 | if (scheduler_sequence_steps.TccOn) { |
sepp_nepp | 6:fb11b746ceb5 | 4007 | |
sepp_nepp | 11:d8dbe3b87f9f | 4008 | sub_timeout = msrc_dcc_tcc_timeout_us |
sepp_nepp | 11:d8dbe3b87f9f | 4009 | + tcc_overhead_us; |
sepp_nepp | 6:fb11b746ceb5 | 4010 | |
sepp_nepp | 6:fb11b746ceb5 | 4011 | if (sub_timeout < |
sepp_nepp | 11:d8dbe3b87f9f | 4012 | final_range_timing_budget_us) { |
sepp_nepp | 11:d8dbe3b87f9f | 4013 | final_range_timing_budget_us -= |
sepp_nepp | 6:fb11b746ceb5 | 4014 | sub_timeout; |
sepp_nepp | 6:fb11b746ceb5 | 4015 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 4016 | /* Requested timeout too big. */ |
sepp_nepp | 6:fb11b746ceb5 | 4017 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4018 | } |
sepp_nepp | 6:fb11b746ceb5 | 4019 | } |
sepp_nepp | 6:fb11b746ceb5 | 4020 | |
sepp_nepp | 7:3a1115c2556b | 4021 | if (status != VL53L0X_ERROR_NONE) {return status;} |
sepp_nepp | 6:fb11b746ceb5 | 4022 | |
sepp_nepp | 6:fb11b746ceb5 | 4023 | /* DSS */ |
sepp_nepp | 6:fb11b746ceb5 | 4024 | if (scheduler_sequence_steps.DssOn) { |
sepp_nepp | 6:fb11b746ceb5 | 4025 | |
sepp_nepp | 11:d8dbe3b87f9f | 4026 | sub_timeout = 2 * (msrc_dcc_tcc_timeout_us + |
sepp_nepp | 11:d8dbe3b87f9f | 4027 | dss_overhead_us); |
sepp_nepp | 11:d8dbe3b87f9f | 4028 | |
sepp_nepp | 11:d8dbe3b87f9f | 4029 | if (sub_timeout < final_range_timing_budget_us) { |
sepp_nepp | 11:d8dbe3b87f9f | 4030 | final_range_timing_budget_us |
sepp_nepp | 6:fb11b746ceb5 | 4031 | -= sub_timeout; |
sepp_nepp | 6:fb11b746ceb5 | 4032 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 4033 | /* Requested timeout too big. */ |
sepp_nepp | 6:fb11b746ceb5 | 4034 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4035 | } |
sepp_nepp | 6:fb11b746ceb5 | 4036 | } else if (scheduler_sequence_steps.MsrcOn) { |
sepp_nepp | 6:fb11b746ceb5 | 4037 | /* MSRC */ |
sepp_nepp | 11:d8dbe3b87f9f | 4038 | sub_timeout = msrc_dcc_tcc_timeout_us + |
sepp_nepp | 11:d8dbe3b87f9f | 4039 | msrc_overhead_us; |
sepp_nepp | 11:d8dbe3b87f9f | 4040 | |
sepp_nepp | 11:d8dbe3b87f9f | 4041 | if (sub_timeout < final_range_timing_budget_us) { |
sepp_nepp | 11:d8dbe3b87f9f | 4042 | final_range_timing_budget_us |
sepp_nepp | 6:fb11b746ceb5 | 4043 | -= sub_timeout; |
sepp_nepp | 6:fb11b746ceb5 | 4044 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 4045 | /* Requested timeout too big. */ |
sepp_nepp | 6:fb11b746ceb5 | 4046 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4047 | } |
sepp_nepp | 6:fb11b746ceb5 | 4048 | } |
sepp_nepp | 6:fb11b746ceb5 | 4049 | } |
sepp_nepp | 6:fb11b746ceb5 | 4050 | |
sepp_nepp | 9:cb4c6d4e5030 | 4051 | if (status != VL53L0X_ERROR_NONE) { return status; } |
sepp_nepp | 6:fb11b746ceb5 | 4052 | |
sepp_nepp | 6:fb11b746ceb5 | 4053 | if (scheduler_sequence_steps.PreRangeOn) { |
sepp_nepp | 6:fb11b746ceb5 | 4054 | |
sepp_nepp | 6:fb11b746ceb5 | 4055 | /* Subtract the Pre-range timeout if enabled. */ |
sepp_nepp | 6:fb11b746ceb5 | 4056 | |
sepp_nepp | 8:2fd7cb217068 | 4057 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_PRE_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 4058 | &pre_range_timeout_us); |
sepp_nepp | 11:d8dbe3b87f9f | 4059 | |
sepp_nepp | 11:d8dbe3b87f9f | 4060 | sub_timeout = pre_range_timeout_us + |
sepp_nepp | 11:d8dbe3b87f9f | 4061 | pre_range_overhead_us; |
sepp_nepp | 11:d8dbe3b87f9f | 4062 | |
sepp_nepp | 11:d8dbe3b87f9f | 4063 | if (sub_timeout < final_range_timing_budget_us) { |
sepp_nepp | 11:d8dbe3b87f9f | 4064 | final_range_timing_budget_us -= sub_timeout; |
sepp_nepp | 6:fb11b746ceb5 | 4065 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 4066 | /* Requested timeout too big. */ |
sepp_nepp | 6:fb11b746ceb5 | 4067 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4068 | } |
sepp_nepp | 6:fb11b746ceb5 | 4069 | } |
sepp_nepp | 6:fb11b746ceb5 | 4070 | |
sepp_nepp | 6:fb11b746ceb5 | 4071 | if (status == VL53L0X_ERROR_NONE && |
sepp_nepp | 6:fb11b746ceb5 | 4072 | scheduler_sequence_steps.FinalRangeOn) { |
sepp_nepp | 6:fb11b746ceb5 | 4073 | |
sepp_nepp | 11:d8dbe3b87f9f | 4074 | final_range_timing_budget_us -= |
sepp_nepp | 11:d8dbe3b87f9f | 4075 | final_range_overhead_us; |
sepp_nepp | 6:fb11b746ceb5 | 4076 | |
sepp_nepp | 6:fb11b746ceb5 | 4077 | /* Final Range Timeout |
sepp_nepp | 6:fb11b746ceb5 | 4078 | * Note that the final range timeout is determined by the timing |
sepp_nepp | 6:fb11b746ceb5 | 4079 | * budget and the sum of all other timeouts within the sequence. |
sepp_nepp | 6:fb11b746ceb5 | 4080 | * If there is no room for the final range timeout, then an error |
sepp_nepp | 6:fb11b746ceb5 | 4081 | * will be set. Otherwise the remaining time will be applied to |
sepp_nepp | 6:fb11b746ceb5 | 4082 | * the final range. |
sepp_nepp | 6:fb11b746ceb5 | 4083 | */ |
sepp_nepp | 7:3a1115c2556b | 4084 | status = set_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE, |
sepp_nepp | 11:d8dbe3b87f9f | 4085 | final_range_timing_budget_us); |
sepp_nepp | 11:d8dbe3b87f9f | 4086 | CurrentParameters.MeasurementTimingBudget_us = measurement_timing_budget_us; |
sepp_nepp | 6:fb11b746ceb5 | 4087 | } |
sepp_nepp | 6:fb11b746ceb5 | 4088 | |
sepp_nepp | 6:fb11b746ceb5 | 4089 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4090 | } |
sepp_nepp | 6:fb11b746ceb5 | 4091 | |
sepp_nepp | 11:d8dbe3b87f9f | 4092 | VL53L0X_Error VL53L0X::VL53L0X_set_measurement_timing_budget_us(uint32_t measurement_timing_budget_us) |
sepp_nepp | 7:3a1115c2556b | 4093 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 11:d8dbe3b87f9f | 4094 | status = wrapped_VL53L0X_set_measurement_timing_budget_us(measurement_timing_budget_us); |
sepp_nepp | 6:fb11b746ceb5 | 4095 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4096 | } |
sepp_nepp | 6:fb11b746ceb5 | 4097 | |
sepp_nepp | 8:2fd7cb217068 | 4098 | VL53L0X_Error VL53L0X::VL53L0X_set_sequence_step_enable(VL53L0X_SequenceStepId sequence_step_id, uint8_t sequence_step_enabled) |
sepp_nepp | 8:2fd7cb217068 | 4099 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 4100 | uint8_t sequence_config = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4101 | uint8_t sequence_config_new = 0; |
sepp_nepp | 11:d8dbe3b87f9f | 4102 | uint32_t measurement_timing_budget_us; |
sepp_nepp | 6:fb11b746ceb5 | 4103 | |
sepp_nepp | 7:3a1115c2556b | 4104 | status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, &sequence_config); |
sepp_nepp | 6:fb11b746ceb5 | 4105 | |
sepp_nepp | 6:fb11b746ceb5 | 4106 | sequence_config_new = sequence_config; |
sepp_nepp | 6:fb11b746ceb5 | 4107 | |
sepp_nepp | 6:fb11b746ceb5 | 4108 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 4109 | if (sequence_step_enabled == 1) { |
sepp_nepp | 6:fb11b746ceb5 | 4110 | |
sepp_nepp | 6:fb11b746ceb5 | 4111 | /* Enable requested sequence step |
sepp_nepp | 6:fb11b746ceb5 | 4112 | */ |
sepp_nepp | 6:fb11b746ceb5 | 4113 | switch (sequence_step_id) { |
sepp_nepp | 6:fb11b746ceb5 | 4114 | case VL53L0X_SEQUENCESTEP_TCC: |
sepp_nepp | 6:fb11b746ceb5 | 4115 | sequence_config_new |= 0x10; |
sepp_nepp | 6:fb11b746ceb5 | 4116 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4117 | case VL53L0X_SEQUENCESTEP_DSS: |
sepp_nepp | 6:fb11b746ceb5 | 4118 | sequence_config_new |= 0x28; |
sepp_nepp | 6:fb11b746ceb5 | 4119 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4120 | case VL53L0X_SEQUENCESTEP_MSRC: |
sepp_nepp | 6:fb11b746ceb5 | 4121 | sequence_config_new |= 0x04; |
sepp_nepp | 6:fb11b746ceb5 | 4122 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4123 | case VL53L0X_SEQUENCESTEP_PRE_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 4124 | sequence_config_new |= 0x40; |
sepp_nepp | 6:fb11b746ceb5 | 4125 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4126 | case VL53L0X_SEQUENCESTEP_FINAL_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 4127 | sequence_config_new |= 0x80; |
sepp_nepp | 6:fb11b746ceb5 | 4128 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4129 | default: |
sepp_nepp | 6:fb11b746ceb5 | 4130 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4131 | } |
sepp_nepp | 6:fb11b746ceb5 | 4132 | } else { |
sepp_nepp | 7:3a1115c2556b | 4133 | /* Disable requested sequence step */ |
sepp_nepp | 6:fb11b746ceb5 | 4134 | switch (sequence_step_id) { |
sepp_nepp | 6:fb11b746ceb5 | 4135 | case VL53L0X_SEQUENCESTEP_TCC: |
sepp_nepp | 6:fb11b746ceb5 | 4136 | sequence_config_new &= 0xef; |
sepp_nepp | 6:fb11b746ceb5 | 4137 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4138 | case VL53L0X_SEQUENCESTEP_DSS: |
sepp_nepp | 6:fb11b746ceb5 | 4139 | sequence_config_new &= 0xd7; |
sepp_nepp | 6:fb11b746ceb5 | 4140 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4141 | case VL53L0X_SEQUENCESTEP_MSRC: |
sepp_nepp | 6:fb11b746ceb5 | 4142 | sequence_config_new &= 0xfb; |
sepp_nepp | 6:fb11b746ceb5 | 4143 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4144 | case VL53L0X_SEQUENCESTEP_PRE_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 4145 | sequence_config_new &= 0xbf; |
sepp_nepp | 6:fb11b746ceb5 | 4146 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4147 | case VL53L0X_SEQUENCESTEP_FINAL_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 4148 | sequence_config_new &= 0x7f; |
sepp_nepp | 6:fb11b746ceb5 | 4149 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4150 | default: |
sepp_nepp | 6:fb11b746ceb5 | 4151 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4152 | } |
sepp_nepp | 6:fb11b746ceb5 | 4153 | } |
sepp_nepp | 6:fb11b746ceb5 | 4154 | } |
sepp_nepp | 6:fb11b746ceb5 | 4155 | |
sepp_nepp | 6:fb11b746ceb5 | 4156 | if (sequence_config_new != sequence_config) { |
sepp_nepp | 6:fb11b746ceb5 | 4157 | /* Apply New Setting */ |
sepp_nepp | 6:fb11b746ceb5 | 4158 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4159 | status = VL53L0X_write_byte(VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, sequence_config_new); |
sepp_nepp | 6:fb11b746ceb5 | 4160 | } |
sepp_nepp | 6:fb11b746ceb5 | 4161 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4162 | Data.SequenceConfig = sequence_config_new;} |
sepp_nepp | 6:fb11b746ceb5 | 4163 | |
sepp_nepp | 6:fb11b746ceb5 | 4164 | /* Recalculate timing budget */ |
sepp_nepp | 6:fb11b746ceb5 | 4165 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 4166 | measurement_timing_budget_us = CurrentParameters.MeasurementTimingBudget_us ; |
sepp_nepp | 11:d8dbe3b87f9f | 4167 | VL53L0X_set_measurement_timing_budget_us(measurement_timing_budget_us); |
sepp_nepp | 6:fb11b746ceb5 | 4168 | } |
sepp_nepp | 6:fb11b746ceb5 | 4169 | } |
sepp_nepp | 6:fb11b746ceb5 | 4170 | |
sepp_nepp | 6:fb11b746ceb5 | 4171 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4172 | } |
sepp_nepp | 6:fb11b746ceb5 | 4173 | |
sepp_nepp | 7:3a1115c2556b | 4174 | VL53L0X_Error VL53L0X::VL53L0X_set_limit_check_enable( uint16_t limit_check_id, |
sepp_nepp | 6:fb11b746ceb5 | 4175 | uint8_t limit_check_enable) |
sepp_nepp | 8:2fd7cb217068 | 4176 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 4177 | FixPoint1616_t temp_fix1616 = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4178 | uint8_t limit_check_enable_int = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4179 | uint8_t limit_check_disable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4180 | uint8_t temp8; |
sepp_nepp | 6:fb11b746ceb5 | 4181 | |
sepp_nepp | 6:fb11b746ceb5 | 4182 | if (limit_check_id >= VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS) { |
sepp_nepp | 6:fb11b746ceb5 | 4183 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4184 | } else { |
sepp_nepp | 6:fb11b746ceb5 | 4185 | if (limit_check_enable == 0) { |
sepp_nepp | 6:fb11b746ceb5 | 4186 | temp_fix1616 = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4187 | limit_check_enable_int = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4188 | limit_check_disable = 1; |
sepp_nepp | 6:fb11b746ceb5 | 4189 | } else { |
sepp_nepp | 10:cd1758e186a4 | 4190 | temp_fix1616 = CurrentParameters.LimitChecksValue[limit_check_id]; |
sepp_nepp | 6:fb11b746ceb5 | 4191 | limit_check_disable = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4192 | /* this to be sure to have either 0 or 1 */ |
sepp_nepp | 6:fb11b746ceb5 | 4193 | limit_check_enable_int = 1; |
sepp_nepp | 6:fb11b746ceb5 | 4194 | } |
sepp_nepp | 6:fb11b746ceb5 | 4195 | |
sepp_nepp | 6:fb11b746ceb5 | 4196 | switch (limit_check_id) { |
sepp_nepp | 6:fb11b746ceb5 | 4197 | |
sepp_nepp | 6:fb11b746ceb5 | 4198 | case VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 4199 | /* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 4200 | CurrentParameters.LimitChecksEnable[VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE] = limit_check_enable_int; |
sepp_nepp | 6:fb11b746ceb5 | 4201 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4202 | |
sepp_nepp | 6:fb11b746ceb5 | 4203 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE: |
sepp_nepp | 7:3a1115c2556b | 4204 | status = VL53L0X_write_word( VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT, |
sepp_nepp | 11:d8dbe3b87f9f | 4205 | VL53L0X_FP1616TOFP97(temp_fix1616)); |
sepp_nepp | 6:fb11b746ceb5 | 4206 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4207 | |
sepp_nepp | 7:3a1115c2556b | 4208 | case VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP:/* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 4209 | CurrentParameters.LimitChecksEnable[VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP] = limit_check_enable_int; |
sepp_nepp | 6:fb11b746ceb5 | 4210 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4211 | |
sepp_nepp | 7:3a1115c2556b | 4212 | case VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD:/* internal computation: */ |
sepp_nepp | 10:cd1758e186a4 | 4213 | CurrentParameters.LimitChecksEnable[VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD] = limit_check_enable_int; |
sepp_nepp | 6:fb11b746ceb5 | 4214 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4215 | |
sepp_nepp | 6:fb11b746ceb5 | 4216 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC: |
sepp_nepp | 6:fb11b746ceb5 | 4217 | temp8 = (uint8_t)(limit_check_disable << 1); |
sepp_nepp | 7:3a1115c2556b | 4218 | status = VL53L0X_update_byte(VL53L0X_REG_MSRC_CONFIG_CONTROL, |
sepp_nepp | 6:fb11b746ceb5 | 4219 | 0xFE, temp8); |
sepp_nepp | 6:fb11b746ceb5 | 4220 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4221 | |
sepp_nepp | 6:fb11b746ceb5 | 4222 | case VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE: |
sepp_nepp | 6:fb11b746ceb5 | 4223 | |
sepp_nepp | 6:fb11b746ceb5 | 4224 | temp8 = (uint8_t)(limit_check_disable << 4); |
sepp_nepp | 7:3a1115c2556b | 4225 | status = VL53L0X_update_byte(VL53L0X_REG_MSRC_CONFIG_CONTROL, |
sepp_nepp | 6:fb11b746ceb5 | 4226 | 0xEF, temp8); |
sepp_nepp | 6:fb11b746ceb5 | 4227 | break; |
sepp_nepp | 6:fb11b746ceb5 | 4228 | |
sepp_nepp | 6:fb11b746ceb5 | 4229 | default: |
sepp_nepp | 6:fb11b746ceb5 | 4230 | status = VL53L0X_ERROR_INVALID_PARAMS; |
sepp_nepp | 6:fb11b746ceb5 | 4231 | } |
sepp_nepp | 6:fb11b746ceb5 | 4232 | } |
sepp_nepp | 6:fb11b746ceb5 | 4233 | |
sepp_nepp | 6:fb11b746ceb5 | 4234 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 4235 | if (limit_check_enable == 0) { |
sepp_nepp | 10:cd1758e186a4 | 4236 | CurrentParameters.LimitChecksEnable[limit_check_id] = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4237 | } else { |
sepp_nepp | 10:cd1758e186a4 | 4238 | CurrentParameters.LimitChecksEnable[limit_check_id] = 1; |
sepp_nepp | 6:fb11b746ceb5 | 4239 | } |
sepp_nepp | 6:fb11b746ceb5 | 4240 | } |
sepp_nepp | 6:fb11b746ceb5 | 4241 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4242 | } |
sepp_nepp | 6:fb11b746ceb5 | 4243 | |
sepp_nepp | 7:3a1115c2556b | 4244 | VL53L0X_Error VL53L0X::VL53L0X_static_init(void) |
sepp_nepp | 8:2fd7cb217068 | 4245 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 4246 | VL53L0X_DeviceParameters_t current_parameters = {0}; |
sepp_nepp | 6:fb11b746ceb5 | 4247 | uint8_t *p_tuning_setting_buffer; |
sepp_nepp | 6:fb11b746ceb5 | 4248 | uint16_t tempword = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4249 | uint8_t tempbyte = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4250 | uint8_t use_internal_tuning_settings = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4251 | uint32_t count = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4252 | uint8_t is_aperture_spads = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4253 | uint32_t ref_spad_count = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4254 | uint8_t aperture_spads = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4255 | uint8_t vcsel_pulse_period_pclk; |
sepp_nepp | 6:fb11b746ceb5 | 4256 | uint32_t seq_timeout_micro_secs; |
sepp_nepp | 6:fb11b746ceb5 | 4257 | |
sepp_nepp | 7:3a1115c2556b | 4258 | status = VL53L0X_get_info_from_device( 1); |
sepp_nepp | 6:fb11b746ceb5 | 4259 | |
sepp_nepp | 6:fb11b746ceb5 | 4260 | /* set the ref spad from NVM */ |
sepp_nepp | 8:2fd7cb217068 | 4261 | count = (uint32_t)Data.ReferenceSpadCount; |
sepp_nepp | 8:2fd7cb217068 | 4262 | aperture_spads = Data.ReferenceSpadType; |
sepp_nepp | 6:fb11b746ceb5 | 4263 | |
sepp_nepp | 6:fb11b746ceb5 | 4264 | /* NVM value invalid */ |
sepp_nepp | 6:fb11b746ceb5 | 4265 | if ((aperture_spads > 1) || |
sepp_nepp | 6:fb11b746ceb5 | 4266 | ((aperture_spads == 1) && (count > 32)) || |
sepp_nepp | 6:fb11b746ceb5 | 4267 | ((aperture_spads == 0) && (count > 12))) { |
sepp_nepp | 7:3a1115c2556b | 4268 | status = wrapped_VL53L0X_perform_ref_spad_management( &ref_spad_count, |
sepp_nepp | 6:fb11b746ceb5 | 4269 | &is_aperture_spads); |
sepp_nepp | 6:fb11b746ceb5 | 4270 | } else { |
sepp_nepp | 7:3a1115c2556b | 4271 | status = VL53L0X_set_reference_spads( count, aperture_spads); |
sepp_nepp | 6:fb11b746ceb5 | 4272 | } |
sepp_nepp | 6:fb11b746ceb5 | 4273 | |
sepp_nepp | 6:fb11b746ceb5 | 4274 | /* Initialize tuning settings buffer to prevent compiler warning. */ |
sepp_nepp | 6:fb11b746ceb5 | 4275 | p_tuning_setting_buffer = DefaultTuningSettings; |
sepp_nepp | 6:fb11b746ceb5 | 4276 | |
sepp_nepp | 6:fb11b746ceb5 | 4277 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4278 | use_internal_tuning_settings = Data.UseInternalTuningSettings; |
sepp_nepp | 6:fb11b746ceb5 | 4279 | |
sepp_nepp | 6:fb11b746ceb5 | 4280 | if (use_internal_tuning_settings == 0) { |
sepp_nepp | 8:2fd7cb217068 | 4281 | p_tuning_setting_buffer = Data.pTuningSettingsPointer; } |
sepp_nepp | 7:3a1115c2556b | 4282 | else { p_tuning_setting_buffer = DefaultTuningSettings; } |
sepp_nepp | 6:fb11b746ceb5 | 4283 | |
sepp_nepp | 6:fb11b746ceb5 | 4284 | } |
sepp_nepp | 6:fb11b746ceb5 | 4285 | |
sepp_nepp | 6:fb11b746ceb5 | 4286 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4287 | status = VL53L0X_load_tuning_settings( p_tuning_setting_buffer); } |
sepp_nepp | 6:fb11b746ceb5 | 4288 | |
sepp_nepp | 6:fb11b746ceb5 | 4289 | /* Set interrupt config to new sample ready */ |
sepp_nepp | 6:fb11b746ceb5 | 4290 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4291 | status = VL53L0X_set_gpio_config( 0, 0, |
sepp_nepp | 6:fb11b746ceb5 | 4292 | VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY, |
sepp_nepp | 6:fb11b746ceb5 | 4293 | VL53L0X_INTERRUPTPOLARITY_LOW); |
sepp_nepp | 6:fb11b746ceb5 | 4294 | } |
sepp_nepp | 6:fb11b746ceb5 | 4295 | |
sepp_nepp | 6:fb11b746ceb5 | 4296 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4297 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 4298 | status |= VL53L0X_read_word ( 0x84, &tempword); |
sepp_nepp | 7:3a1115c2556b | 4299 | status |= VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 4300 | } |
sepp_nepp | 6:fb11b746ceb5 | 4301 | |
sepp_nepp | 6:fb11b746ceb5 | 4302 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 4303 | Data.OscFrequency_MHz = VL53L0X_FP412TOFP1616(tempword) ; |
sepp_nepp | 6:fb11b746ceb5 | 4304 | } |
sepp_nepp | 6:fb11b746ceb5 | 4305 | |
sepp_nepp | 6:fb11b746ceb5 | 4306 | /* After static init, some device parameters may be changed, |
sepp_nepp | 6:fb11b746ceb5 | 4307 | * so update them */ |
sepp_nepp | 6:fb11b746ceb5 | 4308 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4309 | status = VL53L0X_get_device_parameters( ¤t_parameters); |
sepp_nepp | 6:fb11b746ceb5 | 4310 | } |
sepp_nepp | 6:fb11b746ceb5 | 4311 | |
sepp_nepp | 6:fb11b746ceb5 | 4312 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4313 | status = VL53L0X_get_fraction_enable( &tempbyte); |
sepp_nepp | 6:fb11b746ceb5 | 4314 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4315 | Data.RangeFractionalEnable = tempbyte; |
sepp_nepp | 6:fb11b746ceb5 | 4316 | } |
sepp_nepp | 6:fb11b746ceb5 | 4317 | } |
sepp_nepp | 6:fb11b746ceb5 | 4318 | |
sepp_nepp | 6:fb11b746ceb5 | 4319 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 10:cd1758e186a4 | 4320 | CurrentParameters = current_parameters; |
sepp_nepp | 6:fb11b746ceb5 | 4321 | } |
sepp_nepp | 6:fb11b746ceb5 | 4322 | |
sepp_nepp | 6:fb11b746ceb5 | 4323 | /* read the sequence config and save it */ |
sepp_nepp | 6:fb11b746ceb5 | 4324 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4325 | status = VL53L0X_read_byte(VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, &tempbyte); |
sepp_nepp | 6:fb11b746ceb5 | 4326 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4327 | Data.SequenceConfig = tempbyte; |
sepp_nepp | 6:fb11b746ceb5 | 4328 | } |
sepp_nepp | 6:fb11b746ceb5 | 4329 | } |
sepp_nepp | 6:fb11b746ceb5 | 4330 | |
sepp_nepp | 6:fb11b746ceb5 | 4331 | /* Disable MSRC and TCC by default */ |
sepp_nepp | 6:fb11b746ceb5 | 4332 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4333 | status = VL53L0X_set_sequence_step_enable(VL53L0X_SEQUENCESTEP_TCC, 0); |
sepp_nepp | 6:fb11b746ceb5 | 4334 | } |
sepp_nepp | 6:fb11b746ceb5 | 4335 | |
sepp_nepp | 6:fb11b746ceb5 | 4336 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4337 | status = VL53L0X_set_sequence_step_enable(VL53L0X_SEQUENCESTEP_MSRC, 0); |
sepp_nepp | 6:fb11b746ceb5 | 4338 | } |
sepp_nepp | 6:fb11b746ceb5 | 4339 | |
sepp_nepp | 6:fb11b746ceb5 | 4340 | /* Set PAL State to standby */ |
sepp_nepp | 6:fb11b746ceb5 | 4341 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4342 | Data.PalState = VL53L0X_STATE_IDLE; |
sepp_nepp | 6:fb11b746ceb5 | 4343 | } |
sepp_nepp | 6:fb11b746ceb5 | 4344 | |
sepp_nepp | 6:fb11b746ceb5 | 4345 | /* Store pre-range vcsel period */ |
sepp_nepp | 6:fb11b746ceb5 | 4346 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4347 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE,&vcsel_pulse_period_pclk); |
sepp_nepp | 6:fb11b746ceb5 | 4348 | } |
sepp_nepp | 6:fb11b746ceb5 | 4349 | |
sepp_nepp | 6:fb11b746ceb5 | 4350 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4351 | Data.PreRangeVcselPulsePeriod = vcsel_pulse_period_pclk; |
sepp_nepp | 6:fb11b746ceb5 | 4352 | } |
sepp_nepp | 6:fb11b746ceb5 | 4353 | |
sepp_nepp | 6:fb11b746ceb5 | 4354 | /* Store final-range vcsel period */ |
sepp_nepp | 6:fb11b746ceb5 | 4355 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4356 | status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_FINAL_RANGE, |
sepp_nepp | 6:fb11b746ceb5 | 4357 | &vcsel_pulse_period_pclk); |
sepp_nepp | 6:fb11b746ceb5 | 4358 | } |
sepp_nepp | 6:fb11b746ceb5 | 4359 | |
sepp_nepp | 6:fb11b746ceb5 | 4360 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 8:2fd7cb217068 | 4361 | Data.FinalRangeVcselPulsePeriod = vcsel_pulse_period_pclk; |
sepp_nepp | 6:fb11b746ceb5 | 4362 | } |
sepp_nepp | 6:fb11b746ceb5 | 4363 | |
sepp_nepp | 6:fb11b746ceb5 | 4364 | /* Store pre-range timeout */ |
sepp_nepp | 6:fb11b746ceb5 | 4365 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4366 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_PRE_RANGE,&seq_timeout_micro_secs); |
sepp_nepp | 6:fb11b746ceb5 | 4367 | } |
sepp_nepp | 6:fb11b746ceb5 | 4368 | |
sepp_nepp | 6:fb11b746ceb5 | 4369 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 4370 | Data.PreRangeTimeout_us = seq_timeout_micro_secs; |
sepp_nepp | 6:fb11b746ceb5 | 4371 | } |
sepp_nepp | 6:fb11b746ceb5 | 4372 | |
sepp_nepp | 6:fb11b746ceb5 | 4373 | /* Store final-range timeout */ |
sepp_nepp | 6:fb11b746ceb5 | 4374 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4375 | status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE,&seq_timeout_micro_secs); |
sepp_nepp | 6:fb11b746ceb5 | 4376 | } |
sepp_nepp | 6:fb11b746ceb5 | 4377 | |
sepp_nepp | 6:fb11b746ceb5 | 4378 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 4379 | Data.FinalRangeTimeout_us = seq_timeout_micro_secs; |
sepp_nepp | 6:fb11b746ceb5 | 4380 | } |
sepp_nepp | 6:fb11b746ceb5 | 4381 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4382 | } |
sepp_nepp | 6:fb11b746ceb5 | 4383 | |
sepp_nepp | 7:3a1115c2556b | 4384 | VL53L0X_Error VL53L0X::VL53L0X_stop_measurement(void) |
sepp_nepp | 8:2fd7cb217068 | 4385 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 4386 | |
sepp_nepp | 7:3a1115c2556b | 4387 | status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START, |
sepp_nepp | 6:fb11b746ceb5 | 4388 | VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT); |
sepp_nepp | 7:3a1115c2556b | 4389 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 4390 | status = VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 7:3a1115c2556b | 4391 | status = VL53L0X_write_byte( 0x91, 0x00); |
sepp_nepp | 7:3a1115c2556b | 4392 | status = VL53L0X_write_byte( 0x00, 0x01); |
sepp_nepp | 7:3a1115c2556b | 4393 | status = VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 4394 | |
sepp_nepp | 6:fb11b746ceb5 | 4395 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 6:fb11b746ceb5 | 4396 | /* Set PAL State to Idle */ |
sepp_nepp | 8:2fd7cb217068 | 4397 | Data.PalState = VL53L0X_STATE_IDLE; |
sepp_nepp | 6:fb11b746ceb5 | 4398 | } |
sepp_nepp | 6:fb11b746ceb5 | 4399 | |
sepp_nepp | 6:fb11b746ceb5 | 4400 | /* Check if need to apply interrupt settings */ |
sepp_nepp | 6:fb11b746ceb5 | 4401 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 7:3a1115c2556b | 4402 | status = VL53L0X_check_and_load_interrupt_settings( 0); |
sepp_nepp | 6:fb11b746ceb5 | 4403 | } |
sepp_nepp | 6:fb11b746ceb5 | 4404 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4405 | } |
sepp_nepp | 6:fb11b746ceb5 | 4406 | |
sepp_nepp | 8:2fd7cb217068 | 4407 | VL53L0X_Error VL53L0X::VL53L0X_get_stop_completed_status(uint32_t *p_stop_status) |
sepp_nepp | 8:2fd7cb217068 | 4408 | { VL53L0X_Error status = VL53L0X_ERROR_NONE; |
sepp_nepp | 6:fb11b746ceb5 | 4409 | uint8_t byte = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4410 | |
sepp_nepp | 6:fb11b746ceb5 | 4411 | |
sepp_nepp | 7:3a1115c2556b | 4412 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 6:fb11b746ceb5 | 4413 | |
sepp_nepp | 6:fb11b746ceb5 | 4414 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 4415 | status = VL53L0X_read_byte( 0x04, &byte);} |
sepp_nepp | 6:fb11b746ceb5 | 4416 | |
sepp_nepp | 6:fb11b746ceb5 | 4417 | if (status == VL53L0X_ERROR_NONE) { |
sepp_nepp | 11:d8dbe3b87f9f | 4418 | status = VL53L0X_write_byte( 0xFF, 0x0); } |
sepp_nepp | 6:fb11b746ceb5 | 4419 | |
sepp_nepp | 6:fb11b746ceb5 | 4420 | *p_stop_status = byte; |
sepp_nepp | 6:fb11b746ceb5 | 4421 | |
sepp_nepp | 6:fb11b746ceb5 | 4422 | if (byte == 0) { |
sepp_nepp | 7:3a1115c2556b | 4423 | status = VL53L0X_write_byte( 0x80, 0x01); |
sepp_nepp | 7:3a1115c2556b | 4424 | status = VL53L0X_write_byte( 0xFF, 0x01); |
sepp_nepp | 7:3a1115c2556b | 4425 | status = VL53L0X_write_byte( 0x00, 0x00); |
sepp_nepp | 8:2fd7cb217068 | 4426 | status = VL53L0X_write_byte( 0x91,Data.StopVariable); |
sepp_nepp | 7:3a1115c2556b | 4427 | status = VL53L0X_write_byte( 0x00, 0x01); |
sepp_nepp | 7:3a1115c2556b | 4428 | status = VL53L0X_write_byte( 0xFF, 0x00); |
sepp_nepp | 7:3a1115c2556b | 4429 | status = VL53L0X_write_byte( 0x80, 0x00); |
sepp_nepp | 6:fb11b746ceb5 | 4430 | } |
sepp_nepp | 6:fb11b746ceb5 | 4431 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4432 | } |
sepp_nepp | 6:fb11b746ceb5 | 4433 | |
sepp_nepp | 6:fb11b746ceb5 | 4434 | /******************************************************************************/ |
sepp_nepp | 6:fb11b746ceb5 | 4435 | |
sepp_nepp | 6:fb11b746ceb5 | 4436 | /****************** Write and read functions from I2C *************************/ |
sepp_nepp | 6:fb11b746ceb5 | 4437 | |
sepp_nepp | 7:3a1115c2556b | 4438 | VL53L0X_Error VL53L0X::VL53L0X_read_multi( uint8_t index, uint8_t *p_data, uint32_t count) |
sepp_nepp | 9:cb4c6d4e5030 | 4439 | { if (count >= VL53L0X_MAX_I2C_XFER_SIZE) { |
sepp_nepp | 9:cb4c6d4e5030 | 4440 | return VL53L0X_ERROR_INVALID_PARAMS;} |
sepp_nepp | 9:cb4c6d4e5030 | 4441 | else { return VL53L0X_i2c_read(index, p_data, (uint16_t)count); } |
sepp_nepp | 6:fb11b746ceb5 | 4442 | } |
sepp_nepp | 6:fb11b746ceb5 | 4443 | |
sepp_nepp | 7:3a1115c2556b | 4444 | VL53L0X_Error VL53L0X::VL53L0X_write_byte( uint8_t index, uint8_t data) |
sepp_nepp | 9:cb4c6d4e5030 | 4445 | { return VL53L0X_i2c_write(index, &data, 1); |
sepp_nepp | 6:fb11b746ceb5 | 4446 | } |
sepp_nepp | 6:fb11b746ceb5 | 4447 | |
sepp_nepp | 7:3a1115c2556b | 4448 | VL53L0X_Error VL53L0X::VL53L0X_write_word( uint8_t index, uint16_t data) |
sepp_nepp | 8:2fd7cb217068 | 4449 | { int status; |
sepp_nepp | 6:fb11b746ceb5 | 4450 | uint8_t buffer[2]; |
sepp_nepp | 6:fb11b746ceb5 | 4451 | |
sepp_nepp | 6:fb11b746ceb5 | 4452 | buffer[0] = data >> 8; |
sepp_nepp | 6:fb11b746ceb5 | 4453 | buffer[1] = data & 0x00FF; |
sepp_nepp | 7:3a1115c2556b | 4454 | status = VL53L0X_i2c_write(index, (uint8_t *)buffer, 2); |
sepp_nepp | 6:fb11b746ceb5 | 4455 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4456 | } |
sepp_nepp | 6:fb11b746ceb5 | 4457 | |
sepp_nepp | 7:3a1115c2556b | 4458 | VL53L0X_Error VL53L0X::VL53L0X_write_dword( uint8_t index, uint32_t data) |
sepp_nepp | 8:2fd7cb217068 | 4459 | { int status; |
sepp_nepp | 6:fb11b746ceb5 | 4460 | uint8_t buffer[4]; |
sepp_nepp | 6:fb11b746ceb5 | 4461 | |
sepp_nepp | 6:fb11b746ceb5 | 4462 | buffer[0] = (data >> 24) & 0xFF; |
sepp_nepp | 6:fb11b746ceb5 | 4463 | buffer[1] = (data >> 16) & 0xFF; |
sepp_nepp | 6:fb11b746ceb5 | 4464 | buffer[2] = (data >> 8) & 0xFF; |
sepp_nepp | 6:fb11b746ceb5 | 4465 | buffer[3] = (data >> 0) & 0xFF; |
sepp_nepp | 7:3a1115c2556b | 4466 | status = VL53L0X_i2c_write(index, (uint8_t *)buffer, 4); |
sepp_nepp | 6:fb11b746ceb5 | 4467 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4468 | } |
sepp_nepp | 6:fb11b746ceb5 | 4469 | |
sepp_nepp | 7:3a1115c2556b | 4470 | VL53L0X_Error VL53L0X::VL53L0X_read_byte( uint8_t index, uint8_t *p_data) |
sepp_nepp | 9:cb4c6d4e5030 | 4471 | { return VL53L0X_i2c_read(index, p_data, 1); } |
sepp_nepp | 6:fb11b746ceb5 | 4472 | |
sepp_nepp | 7:3a1115c2556b | 4473 | VL53L0X_Error VL53L0X::VL53L0X_read_word( uint8_t index, uint16_t *p_data) |
sepp_nepp | 8:2fd7cb217068 | 4474 | { int status; |
sepp_nepp | 6:fb11b746ceb5 | 4475 | uint8_t buffer[2] = {0, 0}; |
sepp_nepp | 6:fb11b746ceb5 | 4476 | |
sepp_nepp | 7:3a1115c2556b | 4477 | status = VL53L0X_i2c_read(index, buffer, 2); |
sepp_nepp | 9:cb4c6d4e5030 | 4478 | if (!status) {*p_data = (buffer[0] << 8) + buffer[1];} |
sepp_nepp | 6:fb11b746ceb5 | 4479 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4480 | } |
sepp_nepp | 6:fb11b746ceb5 | 4481 | |
sepp_nepp | 7:3a1115c2556b | 4482 | VL53L0X_Error VL53L0X::VL53L0X_read_dword( uint8_t index, uint32_t *p_data) |
sepp_nepp | 8:2fd7cb217068 | 4483 | { int status; |
sepp_nepp | 6:fb11b746ceb5 | 4484 | uint8_t buffer[4] = {0, 0, 0, 0}; |
sepp_nepp | 6:fb11b746ceb5 | 4485 | |
sepp_nepp | 7:3a1115c2556b | 4486 | status = VL53L0X_i2c_read(index, buffer, 4); |
sepp_nepp | 9:cb4c6d4e5030 | 4487 | if (!status) { *p_data = (buffer[0] << 24) + (buffer[1] << 16) + (buffer[2] << 8) + buffer[3]; } |
sepp_nepp | 6:fb11b746ceb5 | 4488 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4489 | } |
sepp_nepp | 6:fb11b746ceb5 | 4490 | |
sepp_nepp | 7:3a1115c2556b | 4491 | VL53L0X_Error VL53L0X::VL53L0X_update_byte( uint8_t index, uint8_t and_data, uint8_t or_data) |
sepp_nepp | 8:2fd7cb217068 | 4492 | { int status; |
sepp_nepp | 6:fb11b746ceb5 | 4493 | uint8_t buffer = 0; |
sepp_nepp | 6:fb11b746ceb5 | 4494 | |
sepp_nepp | 6:fb11b746ceb5 | 4495 | /* read data direct onto buffer */ |
sepp_nepp | 7:3a1115c2556b | 4496 | status = VL53L0X_i2c_read(index, &buffer, 1); |
sepp_nepp | 6:fb11b746ceb5 | 4497 | if (!status) { |
sepp_nepp | 6:fb11b746ceb5 | 4498 | buffer = (buffer & and_data) | or_data; |
sepp_nepp | 7:3a1115c2556b | 4499 | status = VL53L0X_i2c_write(index, &buffer, (uint8_t)1); |
sepp_nepp | 6:fb11b746ceb5 | 4500 | } |
sepp_nepp | 6:fb11b746ceb5 | 4501 | return status; |
sepp_nepp | 6:fb11b746ceb5 | 4502 | } |
sepp_nepp | 6:fb11b746ceb5 | 4503 | |
sepp_nepp | 7:3a1115c2556b | 4504 | VL53L0X_Error VL53L0X::VL53L0X_i2c_write(uint8_t RegisterAddr, uint8_t *p_data, |
sepp_nepp | 6:fb11b746ceb5 | 4505 | uint16_t NumByteToWrite) |
sepp_nepp | 8:2fd7cb217068 | 4506 | { /** Writes a buffer towards the I2C peripheral device. */ |
sepp_nepp | 8:2fd7cb217068 | 4507 | static uint8_t tmp[VL53L0X_MAX_I2C_XFER_SIZE]; |
sepp_nepp | 6:fb11b746ceb5 | 4508 | |
sepp_nepp | 6:fb11b746ceb5 | 4509 | if(NumByteToWrite >= VL53L0X_MAX_I2C_XFER_SIZE) return -2; |
sepp_nepp | 6:fb11b746ceb5 | 4510 | |
sepp_nepp | 6:fb11b746ceb5 | 4511 | /* First, send device address. Then, send data and STOP condition */ |
sepp_nepp | 6:fb11b746ceb5 | 4512 | tmp[0] = RegisterAddr; |
sepp_nepp | 8:2fd7cb217068 | 4513 | memcpy(tmp+1, p_data, NumByteToWrite); |
sepp_nepp | 8:2fd7cb217068 | 4514 | |
sepp_nepp | 8:2fd7cb217068 | 4515 | if (_dev_i2c->write(I2cDevAddr, (const char*)tmp, NumByteToWrite+1, false) != 0 ) |
sepp_nepp | 8:2fd7cb217068 | 4516 | { return -1; } |
sepp_nepp | 8:2fd7cb217068 | 4517 | return 0; |
sepp_nepp | 8:2fd7cb217068 | 4518 | } |
sepp_nepp | 8:2fd7cb217068 | 4519 | |
sepp_nepp | 8:2fd7cb217068 | 4520 | VL53L0X_Error VL53L0X::VL53L0X_i2c_read(uint8_t RegisterAddr, uint8_t *p_data, uint16_t NumByteToRead) |
sepp_nepp | 8:2fd7cb217068 | 4521 | { /** Reads a buffer from the I2C peripheral device. */ |
sepp_nepp | 8:2fd7cb217068 | 4522 | |
sepp_nepp | 8:2fd7cb217068 | 4523 | /* First Send device address, with no STOP condition */ |
sepp_nepp | 8:2fd7cb217068 | 4524 | int ret = _dev_i2c->write(I2cDevAddr, (const char*)&RegisterAddr, 1, true); |
sepp_nepp | 8:2fd7cb217068 | 4525 | |
sepp_nepp | 8:2fd7cb217068 | 4526 | /* all ok ? then Read data, with STOP condition */ |
sepp_nepp | 9:cb4c6d4e5030 | 4527 | if (ret == 0) { ret = _dev_i2c->read(I2cDevAddr, (char*)p_data, NumByteToRead, false); } |
sepp_nepp | 8:2fd7cb217068 | 4528 | |
sepp_nepp | 6:fb11b746ceb5 | 4529 | if (ret != 0 ){ return -1; } |
sepp_nepp | 6:fb11b746ceb5 | 4530 | return 0; |
sepp_nepp | 6:fb11b746ceb5 | 4531 | } |
sepp_nepp | 6:fb11b746ceb5 | 4532 |