Condensed Version of Public VL53L0X
VL53L0X_def.h@10:cd251e0fc2fd, 2019-03-24 (annotated)
- Committer:
- sepp_nepp
- Date:
- Sun Mar 24 22:24:16 2019 +0000
- Revision:
- 10:cd251e0fc2fd
- Parent:
- 8:abea9638127a
- Child:
- 11:c6f95a42d4d7
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Who changed what in which revision?
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nikapov | 0:a1a69d32f310 | 1 | /******************************************************************************* |
nikapov | 0:a1a69d32f310 | 2 | Copyright © 2016, STMicroelectronics International N.V. |
nikapov | 0:a1a69d32f310 | 3 | All rights reserved. |
nikapov | 0:a1a69d32f310 | 4 | |
nikapov | 0:a1a69d32f310 | 5 | Redistribution and use in source and binary forms, with or without |
nikapov | 0:a1a69d32f310 | 6 | modification, are permitted provided that the following conditions are met: |
nikapov | 0:a1a69d32f310 | 7 | * Redistributions of source code must retain the above copyright |
nikapov | 0:a1a69d32f310 | 8 | notice, this list of conditions and the following disclaimer. |
nikapov | 0:a1a69d32f310 | 9 | * Redistributions in binary form must reproduce the above copyright |
nikapov | 0:a1a69d32f310 | 10 | notice, this list of conditions and the following disclaimer in the |
nikapov | 0:a1a69d32f310 | 11 | documentation and/or other materials provided with the distribution. |
nikapov | 0:a1a69d32f310 | 12 | * Neither the name of STMicroelectronics nor the |
nikapov | 0:a1a69d32f310 | 13 | names of its contributors may be used to endorse or promote products |
nikapov | 0:a1a69d32f310 | 14 | derived from this software without specific prior written permission. |
nikapov | 0:a1a69d32f310 | 15 | |
nikapov | 0:a1a69d32f310 | 16 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
nikapov | 0:a1a69d32f310 | 17 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
nikapov | 0:a1a69d32f310 | 18 | WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND |
nikapov | 0:a1a69d32f310 | 19 | NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS ARE DISCLAIMED. |
nikapov | 0:a1a69d32f310 | 20 | IN NO EVENT SHALL STMICROELECTRONICS INTERNATIONAL N.V. BE LIABLE FOR ANY |
nikapov | 0:a1a69d32f310 | 21 | DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
nikapov | 0:a1a69d32f310 | 22 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
nikapov | 0:a1a69d32f310 | 23 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
nikapov | 0:a1a69d32f310 | 24 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
nikapov | 0:a1a69d32f310 | 25 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
nikapov | 0:a1a69d32f310 | 26 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
nikapov | 0:a1a69d32f310 | 27 | *******************************************************************************/ |
nikapov | 0:a1a69d32f310 | 28 | |
nikapov | 0:a1a69d32f310 | 29 | /** |
nikapov | 0:a1a69d32f310 | 30 | * @file VL53L0X_def.h |
nikapov | 0:a1a69d32f310 | 31 | * |
nikapov | 0:a1a69d32f310 | 32 | * @brief Type definitions for VL53L0X API. |
nikapov | 0:a1a69d32f310 | 33 | * |
nikapov | 0:a1a69d32f310 | 34 | */ |
nikapov | 0:a1a69d32f310 | 35 | |
nikapov | 0:a1a69d32f310 | 36 | |
nikapov | 0:a1a69d32f310 | 37 | #ifndef _VL53L0X_DEF_H_ |
nikapov | 0:a1a69d32f310 | 38 | #define _VL53L0X_DEF_H_ |
nikapov | 0:a1a69d32f310 | 39 | |
nikapov | 0:a1a69d32f310 | 40 | |
nikapov | 0:a1a69d32f310 | 41 | #ifdef __cplusplus |
nikapov | 0:a1a69d32f310 | 42 | extern "C" { |
nikapov | 0:a1a69d32f310 | 43 | #endif |
nikapov | 0:a1a69d32f310 | 44 | |
nikapov | 0:a1a69d32f310 | 45 | /** @defgroup VL53L0X_globaldefine_group VL53L0X Defines |
nikapov | 0:a1a69d32f310 | 46 | * @brief VL53L0X Defines |
nikapov | 0:a1a69d32f310 | 47 | * @{ |
nikapov | 0:a1a69d32f310 | 48 | */ |
nikapov | 0:a1a69d32f310 | 49 | |
sepp_nepp | 5:b95f6951f7d5 | 50 | /****************** define for i2c configuration *******************************/ |
sepp_nepp | 5:b95f6951f7d5 | 51 | /** Maximum buffer size to be used in i2c */ |
sepp_nepp | 5:b95f6951f7d5 | 52 | #define VL53L0X_MAX_I2C_XFER_SIZE 64 /* Maximum buffer size to be used in i2c */ |
sepp_nepp | 5:b95f6951f7d5 | 53 | #define VL53L0X_I2C_USER_VAR /* none but could be for a flag var to get/pass to mutex interruptible return flags and try again */ |
sepp_nepp | 5:b95f6951f7d5 | 54 | |
nikapov | 0:a1a69d32f310 | 55 | |
nikapov | 0:a1a69d32f310 | 56 | /** PAL SPECIFICATION major version */ |
nikapov | 0:a1a69d32f310 | 57 | #define VL53L0X10_SPECIFICATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 58 | /** PAL SPECIFICATION minor version */ |
nikapov | 0:a1a69d32f310 | 59 | #define VL53L0X10_SPECIFICATION_VER_MINOR 2 |
nikapov | 0:a1a69d32f310 | 60 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 61 | #define VL53L0X10_SPECIFICATION_VER_SUB 7 |
nikapov | 0:a1a69d32f310 | 62 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 63 | #define VL53L0X10_SPECIFICATION_VER_REVISION 1440 |
nikapov | 0:a1a69d32f310 | 64 | |
nikapov | 0:a1a69d32f310 | 65 | /** VL53L0X PAL IMPLEMENTATION major version */ |
nikapov | 0:a1a69d32f310 | 66 | #define VL53L0X10_IMPLEMENTATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 67 | /** VL53L0X PAL IMPLEMENTATION minor version */ |
nikapov | 0:a1a69d32f310 | 68 | #define VL53L0X10_IMPLEMENTATION_VER_MINOR 0 |
nikapov | 0:a1a69d32f310 | 69 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 70 | #define VL53L0X10_IMPLEMENTATION_VER_SUB 9 |
nikapov | 0:a1a69d32f310 | 71 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 72 | #define VL53L0X10_IMPLEMENTATION_VER_REVISION 3673 |
nikapov | 0:a1a69d32f310 | 73 | |
nikapov | 0:a1a69d32f310 | 74 | /** PAL SPECIFICATION major version */ |
nikapov | 0:a1a69d32f310 | 75 | #define VL53L0X_SPECIFICATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 76 | /** PAL SPECIFICATION minor version */ |
nikapov | 0:a1a69d32f310 | 77 | #define VL53L0X_SPECIFICATION_VER_MINOR 2 |
nikapov | 0:a1a69d32f310 | 78 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 79 | #define VL53L0X_SPECIFICATION_VER_SUB 7 |
nikapov | 0:a1a69d32f310 | 80 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 81 | #define VL53L0X_SPECIFICATION_VER_REVISION 1440 |
nikapov | 0:a1a69d32f310 | 82 | |
nikapov | 0:a1a69d32f310 | 83 | /** VL53L0X PAL IMPLEMENTATION major version */ |
nikapov | 0:a1a69d32f310 | 84 | #define VL53L0X_IMPLEMENTATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 85 | /** VL53L0X PAL IMPLEMENTATION minor version */ |
nikapov | 0:a1a69d32f310 | 86 | #define VL53L0X_IMPLEMENTATION_VER_MINOR 1 |
nikapov | 0:a1a69d32f310 | 87 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 88 | #define VL53L0X_IMPLEMENTATION_VER_SUB 21 |
nikapov | 0:a1a69d32f310 | 89 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 90 | #define VL53L0X_IMPLEMENTATION_VER_REVISION 4823 |
sepp_nepp | 5:b95f6951f7d5 | 91 | |
sepp_nepp | 5:b95f6951f7d5 | 92 | |
nikapov | 0:a1a69d32f310 | 93 | #define VL53L0X_DEFAULT_MAX_LOOP 2000 |
nikapov | 0:a1a69d32f310 | 94 | #define VL53L0X_MAX_STRING_LENGTH 32 |
nikapov | 0:a1a69d32f310 | 95 | |
nikapov | 0:a1a69d32f310 | 96 | |
sepp_nepp | 7:41cbc431e1f4 | 97 | /** |
sepp_nepp | 7:41cbc431e1f4 | 98 | * Device specific defines. To be adapted by implementer for the targeted |
sepp_nepp | 7:41cbc431e1f4 | 99 | * device. |
sepp_nepp | 7:41cbc431e1f4 | 100 | */ |
sepp_nepp | 7:41cbc431e1f4 | 101 | |
sepp_nepp | 7:41cbc431e1f4 | 102 | /** use where fractional values are expected |
sepp_nepp | 7:41cbc431e1f4 | 103 | * |
sepp_nepp | 7:41cbc431e1f4 | 104 | * Given a floating point value f it's .16 bit point is (int)(f*(1<<16))*/ |
sepp_nepp | 7:41cbc431e1f4 | 105 | typedef uint32_t FixPoint1616_t; |
sepp_nepp | 7:41cbc431e1f4 | 106 | |
sepp_nepp | 7:41cbc431e1f4 | 107 | /** @defgroup VL53L0X_DevSpecDefines_group VL53L0X cut1.1 Device Specific Defines |
sepp_nepp | 7:41cbc431e1f4 | 108 | * @brief VL53L0X cut1.1 Device Specific Defines |
sepp_nepp | 7:41cbc431e1f4 | 109 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 110 | */ |
sepp_nepp | 7:41cbc431e1f4 | 111 | |
sepp_nepp | 7:41cbc431e1f4 | 112 | /** @defgroup VL53L0X_DeviceError_group Device Error |
sepp_nepp | 7:41cbc431e1f4 | 113 | * @brief Device Error code |
sepp_nepp | 7:41cbc431e1f4 | 114 | * |
sepp_nepp | 7:41cbc431e1f4 | 115 | * This enum is Device specific it should be updated in the implementation |
sepp_nepp | 7:41cbc431e1f4 | 116 | * Use @a VL53L0X_GetStatusErrorString() to get the string. |
sepp_nepp | 7:41cbc431e1f4 | 117 | * It is related to Status Register of the Device. |
sepp_nepp | 7:41cbc431e1f4 | 118 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 119 | */ |
sepp_nepp | 7:41cbc431e1f4 | 120 | typedef uint8_t VL53L0X_DeviceError; |
sepp_nepp | 7:41cbc431e1f4 | 121 | |
sepp_nepp | 7:41cbc431e1f4 | 122 | #define VL53L0X_DEVICEERROR_NONE ((VL53L0X_DeviceError) 0) |
sepp_nepp | 7:41cbc431e1f4 | 123 | /*!< 0 NoError */ |
sepp_nepp | 7:41cbc431e1f4 | 124 | #define VL53L0X_DEVICEERROR_VCSELCONTINUITYTESTFAILURE ((VL53L0X_DeviceError) 1) |
sepp_nepp | 7:41cbc431e1f4 | 125 | #define VL53L0X_DEVICEERROR_VCSELWATCHDOGTESTFAILURE ((VL53L0X_DeviceError) 2) |
sepp_nepp | 7:41cbc431e1f4 | 126 | #define VL53L0X_DEVICEERROR_NOVHVVALUEFOUND ((VL53L0X_DeviceError) 3) |
sepp_nepp | 7:41cbc431e1f4 | 127 | #define VL53L0X_DEVICEERROR_MSRCNOTARGET ((VL53L0X_DeviceError) 4) |
sepp_nepp | 7:41cbc431e1f4 | 128 | #define VL53L0X_DEVICEERROR_SNRCHECK ((VL53L0X_DeviceError) 5) |
sepp_nepp | 7:41cbc431e1f4 | 129 | #define VL53L0X_DEVICEERROR_RANGEPHASECHECK ((VL53L0X_DeviceError) 6) |
sepp_nepp | 7:41cbc431e1f4 | 130 | #define VL53L0X_DEVICEERROR_SIGMATHRESHOLDCHECK ((VL53L0X_DeviceError) 7) |
sepp_nepp | 7:41cbc431e1f4 | 131 | #define VL53L0X_DEVICEERROR_TCC ((VL53L0X_DeviceError) 8) |
sepp_nepp | 7:41cbc431e1f4 | 132 | #define VL53L0X_DEVICEERROR_MINCLIP ((VL53L0X_DeviceError) 10) |
sepp_nepp | 7:41cbc431e1f4 | 133 | #define VL53L0X_DEVICEERROR_RANGECOMPLETE ((VL53L0X_DeviceError) 11) |
sepp_nepp | 7:41cbc431e1f4 | 134 | #define VL53L0X_DEVICEERROR_ALGOUNDERFLOW ((VL53L0X_DeviceError) 12) |
sepp_nepp | 7:41cbc431e1f4 | 135 | #define VL53L0X_DEVICEERROR_ALGOOVERFLOW ((VL53L0X_DeviceError) 13) |
sepp_nepp | 7:41cbc431e1f4 | 136 | #define VL53L0X_DEVICEERROR_RANGEIGNORETHRESHOLD ((VL53L0X_DeviceError) 14) |
sepp_nepp | 7:41cbc431e1f4 | 137 | |
sepp_nepp | 7:41cbc431e1f4 | 138 | /** @} end of VL53L0X_DeviceError_group */ |
sepp_nepp | 7:41cbc431e1f4 | 139 | |
sepp_nepp | 7:41cbc431e1f4 | 140 | |
sepp_nepp | 7:41cbc431e1f4 | 141 | /** @defgroup VL53L0X_CheckEnable_group Check Enable list |
sepp_nepp | 7:41cbc431e1f4 | 142 | * @brief Check Enable code |
sepp_nepp | 7:41cbc431e1f4 | 143 | * |
sepp_nepp | 7:41cbc431e1f4 | 144 | * Define used to specify the LimitCheckId. |
sepp_nepp | 7:41cbc431e1f4 | 145 | * Use @a VL53L0X_GetLimitCheckInfo() to get the string. |
sepp_nepp | 7:41cbc431e1f4 | 146 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 147 | */ |
sepp_nepp | 7:41cbc431e1f4 | 148 | |
sepp_nepp | 7:41cbc431e1f4 | 149 | #define VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE 0 |
sepp_nepp | 7:41cbc431e1f4 | 150 | #define VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE 1 |
sepp_nepp | 7:41cbc431e1f4 | 151 | #define VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP 2 |
sepp_nepp | 7:41cbc431e1f4 | 152 | #define VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD 3 |
sepp_nepp | 7:41cbc431e1f4 | 153 | #define VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC 4 |
sepp_nepp | 7:41cbc431e1f4 | 154 | #define VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE 5 |
sepp_nepp | 7:41cbc431e1f4 | 155 | #define VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS 6 |
sepp_nepp | 7:41cbc431e1f4 | 156 | /** @} end of VL53L0X_CheckEnable_group */ |
sepp_nepp | 7:41cbc431e1f4 | 157 | |
sepp_nepp | 7:41cbc431e1f4 | 158 | |
sepp_nepp | 7:41cbc431e1f4 | 159 | /** @defgroup VL53L0X_GpioFunctionality_group Gpio Functionality |
sepp_nepp | 7:41cbc431e1f4 | 160 | * @brief Defines the different functionalities for the device GPIO(s) |
sepp_nepp | 7:41cbc431e1f4 | 161 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 162 | */ |
sepp_nepp | 7:41cbc431e1f4 | 163 | typedef uint8_t VL53L0X_GpioFunctionality; |
sepp_nepp | 7:41cbc431e1f4 | 164 | |
sepp_nepp | 7:41cbc431e1f4 | 165 | #define VL53L0X_GPIOFUNCTIONALITY_OFF \ |
sepp_nepp | 7:41cbc431e1f4 | 166 | ((VL53L0X_GpioFunctionality) 0) /*!< NO Interrupt */ |
sepp_nepp | 7:41cbc431e1f4 | 167 | #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW \ |
sepp_nepp | 7:41cbc431e1f4 | 168 | ((VL53L0X_GpioFunctionality) 1) /*!< Level Low (value < thresh_low) */ |
sepp_nepp | 7:41cbc431e1f4 | 169 | #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH \ |
sepp_nepp | 7:41cbc431e1f4 | 170 | ((VL53L0X_GpioFunctionality) 2) /*!< Level High (value > thresh_high) */ |
sepp_nepp | 7:41cbc431e1f4 | 171 | #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT \ |
sepp_nepp | 7:41cbc431e1f4 | 172 | ((VL53L0X_GpioFunctionality) 3) |
sepp_nepp | 7:41cbc431e1f4 | 173 | /*!< Out Of Window (value < thresh_low OR value > thresh_high) */ |
sepp_nepp | 7:41cbc431e1f4 | 174 | #define VL53L0X_GPIOFUNCTIONALITY_NEW_MEASURE_READY \ |
sepp_nepp | 7:41cbc431e1f4 | 175 | ((VL53L0X_GpioFunctionality) 4) /*!< New Sample Ready */ |
sepp_nepp | 7:41cbc431e1f4 | 176 | /** @} end of VL53L0X_GpioFunctionality_group */ |
sepp_nepp | 7:41cbc431e1f4 | 177 | |
sepp_nepp | 7:41cbc431e1f4 | 178 | |
sepp_nepp | 7:41cbc431e1f4 | 179 | /* Device register map */ |
sepp_nepp | 7:41cbc431e1f4 | 180 | |
sepp_nepp | 7:41cbc431e1f4 | 181 | /** @defgroup VL53L0X_DefineRegisters_group Define Registers |
sepp_nepp | 7:41cbc431e1f4 | 182 | * @brief List of all the defined registers |
sepp_nepp | 7:41cbc431e1f4 | 183 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 184 | */ |
sepp_nepp | 10:cd251e0fc2fd | 185 | #define VL53L0X_REG_SYSRANGE_START 0x000 |
sepp_nepp | 7:41cbc431e1f4 | 186 | /** mask existing bit in #VL53L0X_REG_SYSRANGE_START*/ |
sepp_nepp | 7:41cbc431e1f4 | 187 | #define VL53L0X_REG_SYSRANGE_MODE_MASK 0x0F |
sepp_nepp | 7:41cbc431e1f4 | 188 | /** bit 0 in #VL53L0X_REG_SYSRANGE_START write 1 toggle state in |
sepp_nepp | 7:41cbc431e1f4 | 189 | * continuous mode and arm next shot in single shot mode */ |
sepp_nepp | 7:41cbc431e1f4 | 190 | #define VL53L0X_REG_SYSRANGE_MODE_START_STOP 0x01 |
sepp_nepp | 7:41cbc431e1f4 | 191 | /** bit 1 write 0 in #VL53L0X_REG_SYSRANGE_START set single shot mode */ |
sepp_nepp | 7:41cbc431e1f4 | 192 | #define VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT 0x00 |
sepp_nepp | 7:41cbc431e1f4 | 193 | /** bit 1 write 1 in #VL53L0X_REG_SYSRANGE_START set back-to-back |
sepp_nepp | 7:41cbc431e1f4 | 194 | * operation mode */ |
sepp_nepp | 7:41cbc431e1f4 | 195 | #define VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK 0x02 |
sepp_nepp | 7:41cbc431e1f4 | 196 | /** bit 2 write 1 in #VL53L0X_REG_SYSRANGE_START set timed operation |
sepp_nepp | 7:41cbc431e1f4 | 197 | * mode */ |
sepp_nepp | 7:41cbc431e1f4 | 198 | #define VL53L0X_REG_SYSRANGE_MODE_TIMED 0x04 |
sepp_nepp | 7:41cbc431e1f4 | 199 | /** bit 3 write 1 in #VL53L0X_REG_SYSRANGE_START set histogram operation |
sepp_nepp | 7:41cbc431e1f4 | 200 | * mode */ |
sepp_nepp | 7:41cbc431e1f4 | 201 | #define VL53L0X_REG_SYSRANGE_MODE_HISTOGRAM 0x08 |
sepp_nepp | 7:41cbc431e1f4 | 202 | |
sepp_nepp | 10:cd251e0fc2fd | 203 | #define VL53L0X_REG_SYSTEM_THRESH_HIGH 0x000C |
sepp_nepp | 10:cd251e0fc2fd | 204 | #define VL53L0X_REG_SYSTEM_THRESH_LOW 0x000E |
sepp_nepp | 7:41cbc431e1f4 | 205 | |
sepp_nepp | 7:41cbc431e1f4 | 206 | #define VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG 0x0001 |
sepp_nepp | 7:41cbc431e1f4 | 207 | #define VL53L0X_REG_SYSTEM_RANGE_CONFIG 0x0009 |
sepp_nepp | 7:41cbc431e1f4 | 208 | #define VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD 0x0004 |
sepp_nepp | 7:41cbc431e1f4 | 209 | |
sepp_nepp | 7:41cbc431e1f4 | 210 | #define VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO 0x000A |
sepp_nepp | 7:41cbc431e1f4 | 211 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_DISABLED 0x00 |
sepp_nepp | 7:41cbc431e1f4 | 212 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_LOW 0x01 |
sepp_nepp | 7:41cbc431e1f4 | 213 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_HIGH 0x02 |
sepp_nepp | 7:41cbc431e1f4 | 214 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_OUT_OF_WINDOW 0x03 |
sepp_nepp | 7:41cbc431e1f4 | 215 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY 0x04 |
sepp_nepp | 7:41cbc431e1f4 | 216 | |
sepp_nepp | 7:41cbc431e1f4 | 217 | #define VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH 0x0084 |
sepp_nepp | 7:41cbc431e1f4 | 218 | #define VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR 0x000B |
sepp_nepp | 7:41cbc431e1f4 | 219 | |
sepp_nepp | 7:41cbc431e1f4 | 220 | /* Result registers */ |
sepp_nepp | 7:41cbc431e1f4 | 221 | #define VL53L0X_REG_RESULT_INTERRUPT_STATUS 0x0013 |
sepp_nepp | 7:41cbc431e1f4 | 222 | #define VL53L0X_REG_RESULT_RANGE_STATUS 0x0014 |
sepp_nepp | 7:41cbc431e1f4 | 223 | |
sepp_nepp | 7:41cbc431e1f4 | 224 | #define VL53L0X_REG_RESULT_CORE_PAGE 1 |
sepp_nepp | 7:41cbc431e1f4 | 225 | #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN 0x00BC |
sepp_nepp | 7:41cbc431e1f4 | 226 | #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN 0x00C0 |
sepp_nepp | 7:41cbc431e1f4 | 227 | #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF 0x00D0 |
sepp_nepp | 7:41cbc431e1f4 | 228 | #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_REF 0x00D4 |
sepp_nepp | 7:41cbc431e1f4 | 229 | #define VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF 0x00B6 |
sepp_nepp | 7:41cbc431e1f4 | 230 | |
sepp_nepp | 7:41cbc431e1f4 | 231 | /* Algo register */ |
sepp_nepp | 7:41cbc431e1f4 | 232 | #define VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM 0x0028 |
sepp_nepp | 7:41cbc431e1f4 | 233 | #define VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS 0x008a |
sepp_nepp | 7:41cbc431e1f4 | 234 | |
sepp_nepp | 7:41cbc431e1f4 | 235 | /* Check Limit registers */ |
sepp_nepp | 7:41cbc431e1f4 | 236 | #define VL53L0X_REG_MSRC_CONFIG_CONTROL 0x0060 |
sepp_nepp | 7:41cbc431e1f4 | 237 | |
sepp_nepp | 7:41cbc431e1f4 | 238 | #define VL53L0X_REG_PRE_RANGE_CONFIG_MIN_SNR 0X0027 |
sepp_nepp | 7:41cbc431e1f4 | 239 | #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW 0x0056 |
sepp_nepp | 7:41cbc431e1f4 | 240 | #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH 0x0057 |
sepp_nepp | 7:41cbc431e1f4 | 241 | #define VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT 0x0064 |
sepp_nepp | 7:41cbc431e1f4 | 242 | |
sepp_nepp | 7:41cbc431e1f4 | 243 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_SNR 0X0067 |
sepp_nepp | 7:41cbc431e1f4 | 244 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW 0x0047 |
sepp_nepp | 7:41cbc431e1f4 | 245 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH 0x0048 |
sepp_nepp | 7:41cbc431e1f4 | 246 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT 0x0044 |
sepp_nepp | 7:41cbc431e1f4 | 247 | |
sepp_nepp | 7:41cbc431e1f4 | 248 | #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_HI 0X0061 |
sepp_nepp | 7:41cbc431e1f4 | 249 | #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_LO 0X0062 |
sepp_nepp | 7:41cbc431e1f4 | 250 | |
sepp_nepp | 7:41cbc431e1f4 | 251 | /* PRE RANGE registers */ |
sepp_nepp | 7:41cbc431e1f4 | 252 | #define VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD 0x0050 |
sepp_nepp | 7:41cbc431e1f4 | 253 | #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0051 |
sepp_nepp | 7:41cbc431e1f4 | 254 | #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0052 |
sepp_nepp | 7:41cbc431e1f4 | 255 | |
sepp_nepp | 7:41cbc431e1f4 | 256 | #define VL53L0X_REG_SYSTEM_HISTOGRAM_BIN 0x0081 |
sepp_nepp | 7:41cbc431e1f4 | 257 | #define VL53L0X_REG_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT 0x0033 |
sepp_nepp | 7:41cbc431e1f4 | 258 | #define VL53L0X_REG_HISTOGRAM_CONFIG_READOUT_CTRL 0x0055 |
sepp_nepp | 7:41cbc431e1f4 | 259 | |
sepp_nepp | 7:41cbc431e1f4 | 260 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD 0x0070 |
sepp_nepp | 7:41cbc431e1f4 | 261 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0071 |
sepp_nepp | 7:41cbc431e1f4 | 262 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0072 |
sepp_nepp | 7:41cbc431e1f4 | 263 | #define VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS 0x0020 |
sepp_nepp | 7:41cbc431e1f4 | 264 | |
sepp_nepp | 7:41cbc431e1f4 | 265 | #define VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP 0x0046 |
sepp_nepp | 7:41cbc431e1f4 | 266 | |
sepp_nepp | 7:41cbc431e1f4 | 267 | #define VL53L0X_REG_SOFT_RESET_GO2_SOFT_RESET_N 0x00bf |
sepp_nepp | 7:41cbc431e1f4 | 268 | #define VL53L0X_REG_IDENTIFICATION_MODEL_ID 0x00c0 |
sepp_nepp | 7:41cbc431e1f4 | 269 | #define VL53L0X_REG_IDENTIFICATION_REVISION_ID 0x00c2 |
sepp_nepp | 7:41cbc431e1f4 | 270 | |
sepp_nepp | 7:41cbc431e1f4 | 271 | #define VL53L0X_REG_OSC_CALIBRATE_VAL 0x00f8 |
sepp_nepp | 7:41cbc431e1f4 | 272 | |
sepp_nepp | 7:41cbc431e1f4 | 273 | #define VL53L0X_SIGMA_ESTIMATE_MAX_VALUE 65535 |
sepp_nepp | 7:41cbc431e1f4 | 274 | /* equivalent to a range sigma of 655.35mm */ |
sepp_nepp | 7:41cbc431e1f4 | 275 | |
sepp_nepp | 7:41cbc431e1f4 | 276 | #define VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH 0x032 |
sepp_nepp | 7:41cbc431e1f4 | 277 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 0x0B0 |
sepp_nepp | 7:41cbc431e1f4 | 278 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_1 0x0B1 |
sepp_nepp | 7:41cbc431e1f4 | 279 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_2 0x0B2 |
sepp_nepp | 7:41cbc431e1f4 | 280 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_3 0x0B3 |
sepp_nepp | 7:41cbc431e1f4 | 281 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_4 0x0B4 |
sepp_nepp | 7:41cbc431e1f4 | 282 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_5 0x0B5 |
sepp_nepp | 7:41cbc431e1f4 | 283 | |
sepp_nepp | 7:41cbc431e1f4 | 284 | #define VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT 0xB6 |
sepp_nepp | 7:41cbc431e1f4 | 285 | #define VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD 0x4E /* 0x14E */ |
sepp_nepp | 7:41cbc431e1f4 | 286 | #define VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET 0x4F /* 0x14F */ |
sepp_nepp | 7:41cbc431e1f4 | 287 | #define VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE 0x80 |
sepp_nepp | 7:41cbc431e1f4 | 288 | |
sepp_nepp | 7:41cbc431e1f4 | 289 | /* Speed of light in um per 1E-10 Seconds */ |
sepp_nepp | 7:41cbc431e1f4 | 290 | #define VL53L0X_SPEED_OF_LIGHT_IN_AIR 2997 |
sepp_nepp | 7:41cbc431e1f4 | 291 | |
sepp_nepp | 7:41cbc431e1f4 | 292 | #define VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV 0x0089 |
sepp_nepp | 7:41cbc431e1f4 | 293 | |
sepp_nepp | 7:41cbc431e1f4 | 294 | #define VL53L0X_REG_ALGO_PHASECAL_LIM 0x0030 /* 0x130 */ |
sepp_nepp | 7:41cbc431e1f4 | 295 | #define VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT 0x0030 |
sepp_nepp | 7:41cbc431e1f4 | 296 | |
sepp_nepp | 7:41cbc431e1f4 | 297 | /** @} VL53L0X_DefineRegisters_group */ |
sepp_nepp | 7:41cbc431e1f4 | 298 | |
sepp_nepp | 7:41cbc431e1f4 | 299 | /** @} VL53L0X_DevSpecDefines_group */ |
sepp_nepp | 7:41cbc431e1f4 | 300 | |
nikapov | 0:a1a69d32f310 | 301 | |
nikapov | 0:a1a69d32f310 | 302 | /**************************************** |
nikapov | 0:a1a69d32f310 | 303 | * PRIVATE define do not edit |
nikapov | 0:a1a69d32f310 | 304 | ****************************************/ |
nikapov | 0:a1a69d32f310 | 305 | |
nikapov | 0:a1a69d32f310 | 306 | /** @brief Defines the parameters of the Get Version Functions |
nikapov | 0:a1a69d32f310 | 307 | */ |
nikapov | 0:a1a69d32f310 | 308 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 309 | uint32_t revision; /*!< revision number */ |
Davidroid | 2:d07edeaff6f1 | 310 | uint8_t major; /*!< major number */ |
Davidroid | 2:d07edeaff6f1 | 311 | uint8_t minor; /*!< minor number */ |
Davidroid | 2:d07edeaff6f1 | 312 | uint8_t build; /*!< build number */ |
nikapov | 0:a1a69d32f310 | 313 | } VL53L0X_Version_t; |
nikapov | 0:a1a69d32f310 | 314 | |
nikapov | 0:a1a69d32f310 | 315 | |
nikapov | 0:a1a69d32f310 | 316 | /** @brief Defines the parameters of the Get Device Info Functions |
nikapov | 0:a1a69d32f310 | 317 | */ |
nikapov | 0:a1a69d32f310 | 318 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 319 | char Name[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 320 | /*!< Name of the Device e.g. Left_Distance */ |
Davidroid | 2:d07edeaff6f1 | 321 | char Type[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 322 | /*!< Type of the Device e.g VL53L0X */ |
Davidroid | 2:d07edeaff6f1 | 323 | char ProductId[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 324 | /*!< Product Identifier String */ |
Davidroid | 2:d07edeaff6f1 | 325 | uint8_t ProductType; |
Davidroid | 2:d07edeaff6f1 | 326 | /*!< Product Type, VL53L0X = 1, VL53L1 = 2 */ |
Davidroid | 2:d07edeaff6f1 | 327 | uint8_t ProductRevisionMajor; |
Davidroid | 2:d07edeaff6f1 | 328 | /*!< Product revision major */ |
Davidroid | 2:d07edeaff6f1 | 329 | uint8_t ProductRevisionMinor; |
Davidroid | 2:d07edeaff6f1 | 330 | /*!< Product revision minor */ |
nikapov | 0:a1a69d32f310 | 331 | } VL53L0X_DeviceInfo_t; |
nikapov | 0:a1a69d32f310 | 332 | |
nikapov | 0:a1a69d32f310 | 333 | |
nikapov | 0:a1a69d32f310 | 334 | /** @defgroup VL53L0X_define_Error_group Error and Warning code returned by API |
nikapov | 0:a1a69d32f310 | 335 | * The following DEFINE are used to identify the PAL ERROR |
nikapov | 0:a1a69d32f310 | 336 | * @{ |
nikapov | 0:a1a69d32f310 | 337 | */ |
nikapov | 0:a1a69d32f310 | 338 | |
nikapov | 0:a1a69d32f310 | 339 | typedef int8_t VL53L0X_Error; |
nikapov | 0:a1a69d32f310 | 340 | |
nikapov | 0:a1a69d32f310 | 341 | #define VL53L0X_ERROR_NONE ((VL53L0X_Error) 0) |
nikapov | 0:a1a69d32f310 | 342 | #define VL53L0X_ERROR_CALIBRATION_WARNING ((VL53L0X_Error) -1) |
Davidroid | 2:d07edeaff6f1 | 343 | /*!< Warning invalid calibration data may be in used |
Davidroid | 2:d07edeaff6f1 | 344 | \a VL53L0X_InitData() |
Davidroid | 2:d07edeaff6f1 | 345 | \a VL53L0X_GetOffsetCalibrationData |
Davidroid | 2:d07edeaff6f1 | 346 | \a VL53L0X_SetOffsetCalibrationData */ |
nikapov | 0:a1a69d32f310 | 347 | #define VL53L0X_ERROR_MIN_CLIPPED ((VL53L0X_Error) -2) |
Davidroid | 2:d07edeaff6f1 | 348 | /*!< Warning parameter passed was clipped to min before to be applied */ |
nikapov | 0:a1a69d32f310 | 349 | |
nikapov | 0:a1a69d32f310 | 350 | #define VL53L0X_ERROR_UNDEFINED ((VL53L0X_Error) -3) |
Davidroid | 2:d07edeaff6f1 | 351 | /*!< Unqualified error */ |
nikapov | 0:a1a69d32f310 | 352 | #define VL53L0X_ERROR_INVALID_PARAMS ((VL53L0X_Error) -4) |
Davidroid | 2:d07edeaff6f1 | 353 | /*!< Parameter passed is invalid or out of range */ |
nikapov | 0:a1a69d32f310 | 354 | #define VL53L0X_ERROR_NOT_SUPPORTED ((VL53L0X_Error) -5) |
Davidroid | 2:d07edeaff6f1 | 355 | /*!< Function is not supported in current mode or configuration */ |
nikapov | 0:a1a69d32f310 | 356 | #define VL53L0X_ERROR_RANGE_ERROR ((VL53L0X_Error) -6) |
Davidroid | 2:d07edeaff6f1 | 357 | /*!< Device report a ranging error interrupt status */ |
nikapov | 0:a1a69d32f310 | 358 | #define VL53L0X_ERROR_TIME_OUT ((VL53L0X_Error) -7) |
Davidroid | 2:d07edeaff6f1 | 359 | /*!< Aborted due to time out */ |
nikapov | 0:a1a69d32f310 | 360 | #define VL53L0X_ERROR_MODE_NOT_SUPPORTED ((VL53L0X_Error) -8) |
Davidroid | 2:d07edeaff6f1 | 361 | /*!< Asked mode is not supported by the device */ |
nikapov | 0:a1a69d32f310 | 362 | #define VL53L0X_ERROR_BUFFER_TOO_SMALL ((VL53L0X_Error) -9) |
Davidroid | 2:d07edeaff6f1 | 363 | /*!< ... */ |
nikapov | 0:a1a69d32f310 | 364 | #define VL53L0X_ERROR_GPIO_NOT_EXISTING ((VL53L0X_Error) -10) |
Davidroid | 2:d07edeaff6f1 | 365 | /*!< User tried to setup a non-existing GPIO pin */ |
nikapov | 0:a1a69d32f310 | 366 | #define VL53L0X_ERROR_GPIO_FUNCTIONALITY_NOT_SUPPORTED ((VL53L0X_Error) -11) |
Davidroid | 2:d07edeaff6f1 | 367 | /*!< unsupported GPIO functionality */ |
nikapov | 0:a1a69d32f310 | 368 | #define VL53L0X_ERROR_INTERRUPT_NOT_CLEARED ((VL53L0X_Error) -12) |
Davidroid | 2:d07edeaff6f1 | 369 | /*!< Error during interrupt clear */ |
nikapov | 0:a1a69d32f310 | 370 | #define VL53L0X_ERROR_CONTROL_INTERFACE ((VL53L0X_Error) -20) |
Davidroid | 2:d07edeaff6f1 | 371 | /*!< error reported from IO functions */ |
nikapov | 0:a1a69d32f310 | 372 | #define VL53L0X_ERROR_INVALID_COMMAND ((VL53L0X_Error) -30) |
Davidroid | 2:d07edeaff6f1 | 373 | /*!< The command is not allowed in the current device state |
Davidroid | 2:d07edeaff6f1 | 374 | * (power down) */ |
nikapov | 0:a1a69d32f310 | 375 | #define VL53L0X_ERROR_DIVISION_BY_ZERO ((VL53L0X_Error) -40) |
Davidroid | 2:d07edeaff6f1 | 376 | /*!< In the function a division by zero occurs */ |
nikapov | 0:a1a69d32f310 | 377 | #define VL53L0X_ERROR_REF_SPAD_INIT ((VL53L0X_Error) -50) |
Davidroid | 2:d07edeaff6f1 | 378 | /*!< Error during reference SPAD initialization */ |
nikapov | 0:a1a69d32f310 | 379 | #define VL53L0X_ERROR_NOT_IMPLEMENTED ((VL53L0X_Error) -99) |
Davidroid | 2:d07edeaff6f1 | 380 | /*!< Tells requested functionality has not been implemented yet or |
Davidroid | 2:d07edeaff6f1 | 381 | * not compatible with the device */ |
nikapov | 0:a1a69d32f310 | 382 | /** @} VL53L0X_define_Error_group */ |
nikapov | 0:a1a69d32f310 | 383 | |
nikapov | 0:a1a69d32f310 | 384 | |
nikapov | 0:a1a69d32f310 | 385 | /** @defgroup VL53L0X_define_DeviceModes_group Defines Device modes |
nikapov | 0:a1a69d32f310 | 386 | * Defines all possible modes for the device |
nikapov | 0:a1a69d32f310 | 387 | * @{ |
nikapov | 0:a1a69d32f310 | 388 | */ |
nikapov | 0:a1a69d32f310 | 389 | typedef uint8_t VL53L0X_DeviceModes; |
nikapov | 0:a1a69d32f310 | 390 | |
nikapov | 0:a1a69d32f310 | 391 | #define VL53L0X_DEVICEMODE_SINGLE_RANGING ((VL53L0X_DeviceModes) 0) |
nikapov | 0:a1a69d32f310 | 392 | #define VL53L0X_DEVICEMODE_CONTINUOUS_RANGING ((VL53L0X_DeviceModes) 1) |
nikapov | 0:a1a69d32f310 | 393 | #define VL53L0X_DEVICEMODE_SINGLE_HISTOGRAM ((VL53L0X_DeviceModes) 2) |
nikapov | 0:a1a69d32f310 | 394 | #define VL53L0X_DEVICEMODE_CONTINUOUS_TIMED_RANGING ((VL53L0X_DeviceModes) 3) |
nikapov | 0:a1a69d32f310 | 395 | #define VL53L0X_DEVICEMODE_SINGLE_ALS ((VL53L0X_DeviceModes) 10) |
nikapov | 0:a1a69d32f310 | 396 | #define VL53L0X_DEVICEMODE_GPIO_DRIVE ((VL53L0X_DeviceModes) 20) |
nikapov | 0:a1a69d32f310 | 397 | #define VL53L0X_DEVICEMODE_GPIO_OSC ((VL53L0X_DeviceModes) 21) |
Davidroid | 2:d07edeaff6f1 | 398 | /* ... Modes to be added depending on device */ |
nikapov | 0:a1a69d32f310 | 399 | /** @} VL53L0X_define_DeviceModes_group */ |
nikapov | 0:a1a69d32f310 | 400 | |
nikapov | 0:a1a69d32f310 | 401 | /** @defgroup VL53L0X_define_HistogramModes_group Defines Histogram modes |
nikapov | 0:a1a69d32f310 | 402 | * Defines all possible Histogram modes for the device |
nikapov | 0:a1a69d32f310 | 403 | * @{ |
nikapov | 0:a1a69d32f310 | 404 | */ |
nikapov | 0:a1a69d32f310 | 405 | typedef uint8_t VL53L0X_HistogramModes; |
nikapov | 0:a1a69d32f310 | 406 | |
nikapov | 0:a1a69d32f310 | 407 | #define VL53L0X_HISTOGRAMMODE_DISABLED ((VL53L0X_HistogramModes) 0) |
Davidroid | 2:d07edeaff6f1 | 408 | /*!< Histogram Disabled */ |
nikapov | 0:a1a69d32f310 | 409 | #define VL53L0X_HISTOGRAMMODE_REFERENCE_ONLY ((VL53L0X_HistogramModes) 1) |
Davidroid | 2:d07edeaff6f1 | 410 | /*!< Histogram Reference array only */ |
nikapov | 0:a1a69d32f310 | 411 | #define VL53L0X_HISTOGRAMMODE_RETURN_ONLY ((VL53L0X_HistogramModes) 2) |
Davidroid | 2:d07edeaff6f1 | 412 | /*!< Histogram Return array only */ |
nikapov | 0:a1a69d32f310 | 413 | #define VL53L0X_HISTOGRAMMODE_BOTH ((VL53L0X_HistogramModes) 3) |
Davidroid | 2:d07edeaff6f1 | 414 | /*!< Histogram both Reference and Return Arrays */ |
Davidroid | 2:d07edeaff6f1 | 415 | /* ... Modes to be added depending on device */ |
nikapov | 0:a1a69d32f310 | 416 | /** @} VL53L0X_define_HistogramModes_group */ |
nikapov | 0:a1a69d32f310 | 417 | |
nikapov | 0:a1a69d32f310 | 418 | |
nikapov | 0:a1a69d32f310 | 419 | /** @defgroup VL53L0X_define_PowerModes_group List of available Power Modes |
nikapov | 0:a1a69d32f310 | 420 | * List of available Power Modes |
nikapov | 0:a1a69d32f310 | 421 | * @{ |
nikapov | 0:a1a69d32f310 | 422 | */ |
nikapov | 0:a1a69d32f310 | 423 | |
nikapov | 0:a1a69d32f310 | 424 | typedef uint8_t VL53L0X_PowerModes; |
nikapov | 0:a1a69d32f310 | 425 | |
nikapov | 0:a1a69d32f310 | 426 | #define VL53L0X_POWERMODE_STANDBY_LEVEL1 ((VL53L0X_PowerModes) 0) |
Davidroid | 2:d07edeaff6f1 | 427 | /*!< Standby level 1 */ |
nikapov | 0:a1a69d32f310 | 428 | #define VL53L0X_POWERMODE_STANDBY_LEVEL2 ((VL53L0X_PowerModes) 1) |
Davidroid | 2:d07edeaff6f1 | 429 | /*!< Standby level 2 */ |
nikapov | 0:a1a69d32f310 | 430 | #define VL53L0X_POWERMODE_IDLE_LEVEL1 ((VL53L0X_PowerModes) 2) |
Davidroid | 2:d07edeaff6f1 | 431 | /*!< Idle level 1 */ |
nikapov | 0:a1a69d32f310 | 432 | #define VL53L0X_POWERMODE_IDLE_LEVEL2 ((VL53L0X_PowerModes) 3) |
Davidroid | 2:d07edeaff6f1 | 433 | /*!< Idle level 2 */ |
nikapov | 0:a1a69d32f310 | 434 | |
nikapov | 0:a1a69d32f310 | 435 | /** @} VL53L0X_define_PowerModes_group */ |
nikapov | 0:a1a69d32f310 | 436 | |
nikapov | 0:a1a69d32f310 | 437 | /** @brief Defines all parameters for the device |
nikapov | 0:a1a69d32f310 | 438 | */ |
nikapov | 0:a1a69d32f310 | 439 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 440 | VL53L0X_DeviceModes DeviceMode; |
Davidroid | 2:d07edeaff6f1 | 441 | /*!< Defines type of measurement to be done for the next measure */ |
Davidroid | 2:d07edeaff6f1 | 442 | VL53L0X_HistogramModes HistogramMode; |
Davidroid | 2:d07edeaff6f1 | 443 | /*!< Defines type of histogram measurement to be done for the next |
Davidroid | 2:d07edeaff6f1 | 444 | * measure */ |
sepp_nepp | 10:cd251e0fc2fd | 445 | uint32_t MeasurementTimingBudget_us; |
Davidroid | 2:d07edeaff6f1 | 446 | /*!< Defines the allowed total time for a single measurement */ |
sepp_nepp | 10:cd251e0fc2fd | 447 | uint32_t InterMeasurementPeriod_ms; |
Davidroid | 2:d07edeaff6f1 | 448 | /*!< Defines time between two consecutive measurements (between two |
Davidroid | 2:d07edeaff6f1 | 449 | * measurement starts). If set to 0 means back-to-back mode */ |
Davidroid | 2:d07edeaff6f1 | 450 | uint8_t XTalkCompensationEnable; |
Davidroid | 2:d07edeaff6f1 | 451 | /*!< Tells if Crosstalk compensation shall be enable or not */ |
Davidroid | 2:d07edeaff6f1 | 452 | uint16_t XTalkCompensationRangeMilliMeter; |
Davidroid | 2:d07edeaff6f1 | 453 | /*!< CrossTalk compensation range in millimeter */ |
Davidroid | 2:d07edeaff6f1 | 454 | FixPoint1616_t XTalkCompensationRateMegaCps; |
Davidroid | 2:d07edeaff6f1 | 455 | /*!< CrossTalk compensation rate in Mega counts per seconds. |
Davidroid | 2:d07edeaff6f1 | 456 | * Expressed in 16.16 fixed point format. */ |
Davidroid | 2:d07edeaff6f1 | 457 | int32_t RangeOffsetMicroMeters; |
Davidroid | 2:d07edeaff6f1 | 458 | /*!< Range offset adjustment (mm). */ |
nikapov | 0:a1a69d32f310 | 459 | |
Davidroid | 2:d07edeaff6f1 | 460 | uint8_t LimitChecksEnable[VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS]; |
Davidroid | 2:d07edeaff6f1 | 461 | /*!< This Array store all the Limit Check enable for this device. */ |
Davidroid | 2:d07edeaff6f1 | 462 | uint8_t LimitChecksStatus[VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS]; |
Davidroid | 2:d07edeaff6f1 | 463 | /*!< This Array store all the Status of the check linked to last |
Davidroid | 2:d07edeaff6f1 | 464 | * measurement. */ |
Davidroid | 2:d07edeaff6f1 | 465 | FixPoint1616_t LimitChecksValue[VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS]; |
Davidroid | 2:d07edeaff6f1 | 466 | /*!< This Array store all the Limit Check value for this device */ |
nikapov | 0:a1a69d32f310 | 467 | |
Davidroid | 2:d07edeaff6f1 | 468 | uint8_t WrapAroundCheckEnable; |
Davidroid | 2:d07edeaff6f1 | 469 | /*!< Tells if Wrap Around Check shall be enable or not */ |
nikapov | 0:a1a69d32f310 | 470 | } VL53L0X_DeviceParameters_t; |
nikapov | 0:a1a69d32f310 | 471 | |
nikapov | 0:a1a69d32f310 | 472 | |
nikapov | 0:a1a69d32f310 | 473 | /** @defgroup VL53L0X_define_State_group Defines the current status of the device |
nikapov | 0:a1a69d32f310 | 474 | * Defines the current status of the device |
nikapov | 0:a1a69d32f310 | 475 | * @{ |
nikapov | 0:a1a69d32f310 | 476 | */ |
nikapov | 0:a1a69d32f310 | 477 | typedef uint8_t VL53L0X_State; |
nikapov | 0:a1a69d32f310 | 478 | |
nikapov | 0:a1a69d32f310 | 479 | #define VL53L0X_STATE_POWERDOWN ((VL53L0X_State) 0) |
Davidroid | 2:d07edeaff6f1 | 480 | /*!< Device is in HW reset */ |
nikapov | 0:a1a69d32f310 | 481 | #define VL53L0X_STATE_WAIT_STATICINIT ((VL53L0X_State) 1) |
Davidroid | 2:d07edeaff6f1 | 482 | /*!< Device is initialized and wait for static initialization */ |
nikapov | 0:a1a69d32f310 | 483 | #define VL53L0X_STATE_STANDBY ((VL53L0X_State) 2) |
Davidroid | 2:d07edeaff6f1 | 484 | /*!< Device is in Low power Standby mode */ |
nikapov | 0:a1a69d32f310 | 485 | #define VL53L0X_STATE_IDLE ((VL53L0X_State) 3) |
Davidroid | 2:d07edeaff6f1 | 486 | /*!< Device has been initialized and ready to do measurements */ |
nikapov | 0:a1a69d32f310 | 487 | #define VL53L0X_STATE_RUNNING ((VL53L0X_State) 4) |
Davidroid | 2:d07edeaff6f1 | 488 | /*!< Device is performing measurement */ |
nikapov | 0:a1a69d32f310 | 489 | #define VL53L0X_STATE_UNKNOWN ((VL53L0X_State) 98) |
Davidroid | 2:d07edeaff6f1 | 490 | /*!< Device is in unknown state and need to be rebooted */ |
nikapov | 0:a1a69d32f310 | 491 | #define VL53L0X_STATE_ERROR ((VL53L0X_State) 99) |
Davidroid | 2:d07edeaff6f1 | 492 | /*!< Device is in error state and need to be rebooted */ |
nikapov | 0:a1a69d32f310 | 493 | /** @} VL53L0X_define_State_group */ |
nikapov | 0:a1a69d32f310 | 494 | |
nikapov | 0:a1a69d32f310 | 495 | |
nikapov | 0:a1a69d32f310 | 496 | /** @brief Structure containing the Dmax computation parameters and data |
nikapov | 0:a1a69d32f310 | 497 | */ |
nikapov | 0:a1a69d32f310 | 498 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 499 | int32_t AmbTuningWindowFactor_K; |
Davidroid | 2:d07edeaff6f1 | 500 | /*!< internal algo tuning (*1000) */ |
Davidroid | 2:d07edeaff6f1 | 501 | int32_t RetSignalAt0mm; |
Davidroid | 2:d07edeaff6f1 | 502 | /*!< intermediate dmax computation value caching */ |
nikapov | 0:a1a69d32f310 | 503 | } VL53L0X_DMaxData_t; |
nikapov | 0:a1a69d32f310 | 504 | |
nikapov | 0:a1a69d32f310 | 505 | /** |
nikapov | 0:a1a69d32f310 | 506 | * @struct VL53L0X_RangeData_t |
nikapov | 0:a1a69d32f310 | 507 | * @brief Range measurement data. |
nikapov | 0:a1a69d32f310 | 508 | */ |
nikapov | 0:a1a69d32f310 | 509 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 510 | uint32_t TimeStamp; /*!< 32-bit time stamp. */ |
Davidroid | 2:d07edeaff6f1 | 511 | uint32_t MeasurementTimeUsec; |
sepp_nepp | 10:cd251e0fc2fd | 512 | /*!< Give the Measurement time needed by the device to do the measurement.*/ |
nikapov | 0:a1a69d32f310 | 513 | |
Davidroid | 2:d07edeaff6f1 | 514 | uint16_t RangeMilliMeter; /*!< range distance in millimeter. */ |
nikapov | 0:a1a69d32f310 | 515 | |
Davidroid | 2:d07edeaff6f1 | 516 | uint16_t RangeDMaxMilliMeter; |
Davidroid | 2:d07edeaff6f1 | 517 | /*!< Tells what is the maximum detection distance of the device |
Davidroid | 2:d07edeaff6f1 | 518 | * in current setup and environment conditions (Filled when |
Davidroid | 2:d07edeaff6f1 | 519 | * applicable) */ |
nikapov | 0:a1a69d32f310 | 520 | |
Davidroid | 2:d07edeaff6f1 | 521 | FixPoint1616_t SignalRateRtnMegaCps; |
Davidroid | 2:d07edeaff6f1 | 522 | /*!< Return signal rate (MCPS)\n these is a 16.16 fix point |
Davidroid | 2:d07edeaff6f1 | 523 | * value, which is effectively a measure of target |
Davidroid | 2:d07edeaff6f1 | 524 | * reflectance.*/ |
Davidroid | 2:d07edeaff6f1 | 525 | FixPoint1616_t AmbientRateRtnMegaCps; |
Davidroid | 2:d07edeaff6f1 | 526 | /*!< Return ambient rate (MCPS)\n these is a 16.16 fix point |
Davidroid | 2:d07edeaff6f1 | 527 | * value, which is effectively a measure of the ambien |
Davidroid | 2:d07edeaff6f1 | 528 | * t light.*/ |
nikapov | 0:a1a69d32f310 | 529 | |
Davidroid | 2:d07edeaff6f1 | 530 | uint16_t EffectiveSpadRtnCount; |
Davidroid | 2:d07edeaff6f1 | 531 | /*!< Return the effective SPAD count for the return signal. |
Davidroid | 2:d07edeaff6f1 | 532 | * To obtain Real value it should be divided by 256 */ |
nikapov | 0:a1a69d32f310 | 533 | |
Davidroid | 2:d07edeaff6f1 | 534 | uint8_t ZoneId; |
Davidroid | 2:d07edeaff6f1 | 535 | /*!< Denotes which zone and range scheduler stage the range |
Davidroid | 2:d07edeaff6f1 | 536 | * data relates to. */ |
Davidroid | 2:d07edeaff6f1 | 537 | uint8_t RangeFractionalPart; |
Davidroid | 2:d07edeaff6f1 | 538 | /*!< Fractional part of range distance. Final value is a |
Davidroid | 2:d07edeaff6f1 | 539 | * FixPoint168 value. */ |
Davidroid | 2:d07edeaff6f1 | 540 | uint8_t RangeStatus; |
Davidroid | 2:d07edeaff6f1 | 541 | /*!< Range Status for the current measurement. This is device |
Davidroid | 2:d07edeaff6f1 | 542 | * dependent. Value = 0 means value is valid. |
Davidroid | 2:d07edeaff6f1 | 543 | * See \ref RangeStatusPage */ |
nikapov | 0:a1a69d32f310 | 544 | } VL53L0X_RangingMeasurementData_t; |
nikapov | 0:a1a69d32f310 | 545 | |
nikapov | 0:a1a69d32f310 | 546 | |
nikapov | 0:a1a69d32f310 | 547 | #define VL53L0X_HISTOGRAM_BUFFER_SIZE 24 |
nikapov | 0:a1a69d32f310 | 548 | |
nikapov | 0:a1a69d32f310 | 549 | /** |
nikapov | 0:a1a69d32f310 | 550 | * @struct VL53L0X_HistogramData_t |
nikapov | 0:a1a69d32f310 | 551 | * @brief Histogram measurement data. |
nikapov | 0:a1a69d32f310 | 552 | */ |
sepp_nepp | 10:cd251e0fc2fd | 553 | typedef struct { /* Histogram Measurement data */ |
Davidroid | 2:d07edeaff6f1 | 554 | uint32_t HistogramData[VL53L0X_HISTOGRAM_BUFFER_SIZE]; |
Davidroid | 2:d07edeaff6f1 | 555 | /*!< Histogram data */ |
Davidroid | 2:d07edeaff6f1 | 556 | uint8_t HistogramType; /*!< Indicate the types of histogram data : |
nikapov | 0:a1a69d32f310 | 557 | Return only, Reference only, both Return and Reference */ |
Davidroid | 2:d07edeaff6f1 | 558 | uint8_t FirstBin; /*!< First Bin value */ |
Davidroid | 2:d07edeaff6f1 | 559 | uint8_t BufferSize; /*!< Buffer Size - Set by the user.*/ |
sepp_nepp | 10:cd251e0fc2fd | 560 | uint8_t NumberOfBins;/*!< Number of bins filled by the histogram measurement */ |
Davidroid | 2:d07edeaff6f1 | 561 | VL53L0X_DeviceError ErrorStatus; |
Davidroid | 2:d07edeaff6f1 | 562 | /*!< Error status of the current measurement. \n |
Davidroid | 2:d07edeaff6f1 | 563 | see @a ::VL53L0X_DeviceError @a VL53L0X_GetStatusErrorString() */ |
nikapov | 0:a1a69d32f310 | 564 | } VL53L0X_HistogramMeasurementData_t; |
nikapov | 0:a1a69d32f310 | 565 | |
nikapov | 0:a1a69d32f310 | 566 | #define VL53L0X_REF_SPAD_BUFFER_SIZE 6 |
nikapov | 0:a1a69d32f310 | 567 | |
nikapov | 0:a1a69d32f310 | 568 | /** |
nikapov | 0:a1a69d32f310 | 569 | * @struct VL53L0X_SpadData_t |
nikapov | 0:a1a69d32f310 | 570 | * @brief Spad Configuration Data. |
nikapov | 0:a1a69d32f310 | 571 | */ |
nikapov | 0:a1a69d32f310 | 572 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 573 | uint8_t RefSpadEnables[VL53L0X_REF_SPAD_BUFFER_SIZE]; |
Davidroid | 2:d07edeaff6f1 | 574 | /*!< Reference Spad Enables */ |
Davidroid | 2:d07edeaff6f1 | 575 | uint8_t RefGoodSpadMap[VL53L0X_REF_SPAD_BUFFER_SIZE]; |
Davidroid | 2:d07edeaff6f1 | 576 | /*!< Reference Spad Good Spad Map */ |
nikapov | 0:a1a69d32f310 | 577 | } VL53L0X_SpadData_t; |
nikapov | 0:a1a69d32f310 | 578 | |
nikapov | 0:a1a69d32f310 | 579 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 580 | FixPoint1616_t OscFrequencyMHz; /* Frequency used */ |
nikapov | 0:a1a69d32f310 | 581 | |
Davidroid | 2:d07edeaff6f1 | 582 | uint16_t LastEncodedTimeout; |
Davidroid | 2:d07edeaff6f1 | 583 | /* last encoded Time out used for timing budget*/ |
Davidroid | 2:d07edeaff6f1 | 584 | VL53L0X_GpioFunctionality Pin0GpioFunctionality; |
Davidroid | 2:d07edeaff6f1 | 585 | /* store the functionality of the GPIO: pin0 */ |
nikapov | 0:a1a69d32f310 | 586 | |
Davidroid | 2:d07edeaff6f1 | 587 | uint32_t FinalRangeTimeoutMicroSecs; |
Davidroid | 2:d07edeaff6f1 | 588 | /*!< Execution time of the final range*/ |
Davidroid | 2:d07edeaff6f1 | 589 | uint8_t FinalRangeVcselPulsePeriod; |
Davidroid | 2:d07edeaff6f1 | 590 | /*!< Vcsel pulse period (pll clocks) for the final range measurement*/ |
Davidroid | 2:d07edeaff6f1 | 591 | uint32_t PreRangeTimeoutMicroSecs; |
Davidroid | 2:d07edeaff6f1 | 592 | /*!< Execution time of the final range*/ |
Davidroid | 2:d07edeaff6f1 | 593 | uint8_t PreRangeVcselPulsePeriod; |
Davidroid | 2:d07edeaff6f1 | 594 | /*!< Vcsel pulse period (pll clocks) for the pre-range measurement*/ |
nikapov | 0:a1a69d32f310 | 595 | |
Davidroid | 2:d07edeaff6f1 | 596 | uint16_t SigmaEstRefArray; |
Davidroid | 2:d07edeaff6f1 | 597 | /*!< Reference array sigma value in 1/100th of [mm] e.g. 100 = 1mm */ |
Davidroid | 2:d07edeaff6f1 | 598 | uint16_t SigmaEstEffPulseWidth; |
sepp_nepp | 10:cd251e0fc2fd | 599 | /*!< Effective Pulse width for sigma estimate in 1/100th of ns e.g. 900 = 9.0ns */ |
Davidroid | 2:d07edeaff6f1 | 600 | uint16_t SigmaEstEffAmbWidth; |
Davidroid | 2:d07edeaff6f1 | 601 | /*!< Effective Ambient width for sigma estimate in 1/100th of ns |
Davidroid | 2:d07edeaff6f1 | 602 | * e.g. 500 = 5.0ns */ |
nikapov | 0:a1a69d32f310 | 603 | |
Davidroid | 2:d07edeaff6f1 | 604 | uint8_t ReadDataFromDeviceDone; /* Indicate if read from device has |
nikapov | 0:a1a69d32f310 | 605 | been done (==1) or not (==0) */ |
Davidroid | 2:d07edeaff6f1 | 606 | uint8_t ModuleId; /* Module ID */ |
Davidroid | 2:d07edeaff6f1 | 607 | uint8_t Revision; /* test Revision */ |
Davidroid | 2:d07edeaff6f1 | 608 | char ProductId[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 609 | /* Product Identifier String */ |
Davidroid | 2:d07edeaff6f1 | 610 | uint8_t ReferenceSpadCount; /* used for ref spad management */ |
Davidroid | 2:d07edeaff6f1 | 611 | uint8_t ReferenceSpadType; /* used for ref spad management */ |
Davidroid | 2:d07edeaff6f1 | 612 | uint8_t RefSpadsInitialised; /* reports if ref spads are initialised. */ |
Davidroid | 2:d07edeaff6f1 | 613 | uint32_t PartUIDUpper; /*!< Unique Part ID Upper */ |
Davidroid | 2:d07edeaff6f1 | 614 | uint32_t PartUIDLower; /*!< Unique Part ID Lower */ |
Davidroid | 2:d07edeaff6f1 | 615 | FixPoint1616_t SignalRateMeasFixed400mm; /*!< Peek Signal rate |
nikapov | 0:a1a69d32f310 | 616 | at 400 mm*/ |
nikapov | 0:a1a69d32f310 | 617 | |
nikapov | 0:a1a69d32f310 | 618 | } VL53L0X_DeviceSpecificParameters_t; |
nikapov | 0:a1a69d32f310 | 619 | |
nikapov | 0:a1a69d32f310 | 620 | /** @defgroup VL53L0X_define_InterruptPolarity_group Defines the Polarity |
nikapov | 0:a1a69d32f310 | 621 | * of the Interrupt |
nikapov | 0:a1a69d32f310 | 622 | * Defines the Polarity of the Interrupt |
nikapov | 0:a1a69d32f310 | 623 | * @{ |
nikapov | 0:a1a69d32f310 | 624 | */ |
nikapov | 0:a1a69d32f310 | 625 | typedef uint8_t VL53L0X_InterruptPolarity; |
nikapov | 0:a1a69d32f310 | 626 | |
nikapov | 0:a1a69d32f310 | 627 | #define VL53L0X_INTERRUPTPOLARITY_LOW ((VL53L0X_InterruptPolarity) 0) |
nikapov | 0:a1a69d32f310 | 628 | /*!< Set active low polarity best setup for falling edge. */ |
nikapov | 0:a1a69d32f310 | 629 | #define VL53L0X_INTERRUPTPOLARITY_HIGH ((VL53L0X_InterruptPolarity) 1) |
nikapov | 0:a1a69d32f310 | 630 | /*!< Set active high polarity best setup for rising edge. */ |
nikapov | 0:a1a69d32f310 | 631 | |
nikapov | 0:a1a69d32f310 | 632 | /** @} VL53L0X_define_InterruptPolarity_group */ |
nikapov | 0:a1a69d32f310 | 633 | |
nikapov | 0:a1a69d32f310 | 634 | |
nikapov | 0:a1a69d32f310 | 635 | /** @defgroup VL53L0X_define_VcselPeriod_group Vcsel Period Defines |
nikapov | 0:a1a69d32f310 | 636 | * Defines the range measurement for which to access the vcsel period. |
nikapov | 0:a1a69d32f310 | 637 | * @{ |
nikapov | 0:a1a69d32f310 | 638 | */ |
nikapov | 0:a1a69d32f310 | 639 | typedef uint8_t VL53L0X_VcselPeriod; |
nikapov | 0:a1a69d32f310 | 640 | |
nikapov | 0:a1a69d32f310 | 641 | #define VL53L0X_VCSEL_PERIOD_PRE_RANGE ((VL53L0X_VcselPeriod) 0) |
nikapov | 0:a1a69d32f310 | 642 | /*!<Identifies the pre-range vcsel period. */ |
nikapov | 0:a1a69d32f310 | 643 | #define VL53L0X_VCSEL_PERIOD_FINAL_RANGE ((VL53L0X_VcselPeriod) 1) |
nikapov | 0:a1a69d32f310 | 644 | /*!<Identifies the final range vcsel period. */ |
nikapov | 0:a1a69d32f310 | 645 | |
nikapov | 0:a1a69d32f310 | 646 | /** @} VL53L0X_define_VcselPeriod_group */ |
nikapov | 0:a1a69d32f310 | 647 | |
nikapov | 0:a1a69d32f310 | 648 | /** @defgroup VL53L0X_define_SchedulerSequence_group Defines the steps |
nikapov | 0:a1a69d32f310 | 649 | * carried out by the scheduler during a range measurement. |
nikapov | 0:a1a69d32f310 | 650 | * @{ |
nikapov | 0:a1a69d32f310 | 651 | * Defines the states of all the steps in the scheduler |
nikapov | 0:a1a69d32f310 | 652 | * i.e. enabled/disabled. |
nikapov | 0:a1a69d32f310 | 653 | */ |
nikapov | 0:a1a69d32f310 | 654 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 655 | uint8_t TccOn; /*!<Reports if Target Centre Check On */ |
Davidroid | 2:d07edeaff6f1 | 656 | uint8_t MsrcOn; /*!<Reports if MSRC On */ |
Davidroid | 2:d07edeaff6f1 | 657 | uint8_t DssOn; /*!<Reports if DSS On */ |
Davidroid | 2:d07edeaff6f1 | 658 | uint8_t PreRangeOn; /*!<Reports if Pre-Range On */ |
Davidroid | 2:d07edeaff6f1 | 659 | uint8_t FinalRangeOn; /*!<Reports if Final-Range On */ |
nikapov | 0:a1a69d32f310 | 660 | } VL53L0X_SchedulerSequenceSteps_t; |
nikapov | 0:a1a69d32f310 | 661 | |
nikapov | 0:a1a69d32f310 | 662 | /** @} VL53L0X_define_SchedulerSequence_group */ |
nikapov | 0:a1a69d32f310 | 663 | |
nikapov | 0:a1a69d32f310 | 664 | /** @defgroup VL53L0X_define_SequenceStepId_group Defines the Polarity |
nikapov | 0:a1a69d32f310 | 665 | * of the Interrupt |
nikapov | 0:a1a69d32f310 | 666 | * Defines the the sequence steps performed during ranging.. |
nikapov | 0:a1a69d32f310 | 667 | * @{ |
nikapov | 0:a1a69d32f310 | 668 | */ |
nikapov | 0:a1a69d32f310 | 669 | typedef uint8_t VL53L0X_SequenceStepId; |
nikapov | 0:a1a69d32f310 | 670 | |
nikapov | 0:a1a69d32f310 | 671 | #define VL53L0X_SEQUENCESTEP_TCC ((VL53L0X_VcselPeriod) 0) |
nikapov | 0:a1a69d32f310 | 672 | /*!<Target CentreCheck identifier. */ |
nikapov | 0:a1a69d32f310 | 673 | #define VL53L0X_SEQUENCESTEP_DSS ((VL53L0X_VcselPeriod) 1) |
nikapov | 0:a1a69d32f310 | 674 | /*!<Dynamic Spad Selection function Identifier. */ |
nikapov | 0:a1a69d32f310 | 675 | #define VL53L0X_SEQUENCESTEP_MSRC ((VL53L0X_VcselPeriod) 2) |
nikapov | 0:a1a69d32f310 | 676 | /*!<Minimum Signal Rate Check function Identifier. */ |
nikapov | 0:a1a69d32f310 | 677 | #define VL53L0X_SEQUENCESTEP_PRE_RANGE ((VL53L0X_VcselPeriod) 3) |
nikapov | 0:a1a69d32f310 | 678 | /*!<Pre-Range check Identifier. */ |
nikapov | 0:a1a69d32f310 | 679 | #define VL53L0X_SEQUENCESTEP_FINAL_RANGE ((VL53L0X_VcselPeriod) 4) |
nikapov | 0:a1a69d32f310 | 680 | /*!<Final Range Check Identifier. */ |
nikapov | 0:a1a69d32f310 | 681 | |
nikapov | 0:a1a69d32f310 | 682 | #define VL53L0X_SEQUENCESTEP_NUMBER_OF_CHECKS 5 |
nikapov | 0:a1a69d32f310 | 683 | /*!<Number of Sequence Step Managed by the API. */ |
nikapov | 0:a1a69d32f310 | 684 | |
nikapov | 0:a1a69d32f310 | 685 | /** @} VL53L0X_define_SequenceStepId_group */ |
nikapov | 0:a1a69d32f310 | 686 | |
nikapov | 0:a1a69d32f310 | 687 | /* MACRO Definitions */ |
nikapov | 0:a1a69d32f310 | 688 | /** @defgroup VL53L0X_define_GeneralMacro_group General Macro Defines |
nikapov | 0:a1a69d32f310 | 689 | * General Macro Defines |
nikapov | 0:a1a69d32f310 | 690 | * @{ |
nikapov | 0:a1a69d32f310 | 691 | */ |
nikapov | 0:a1a69d32f310 | 692 | |
nikapov | 0:a1a69d32f310 | 693 | /* Defines */ |
sepp_nepp | 10:cd251e0fc2fd | 694 | #define VL53L0X_FIXPOINT1616TOFIXPOINT97(Value) (uint16_t)((Value>>9)&0xFFFF) |
sepp_nepp | 10:cd251e0fc2fd | 695 | #define VL53L0X_FIXPOINT97TOFIXPOINT1616(Value) (FixPoint1616_t)(Value<<9) |
nikapov | 0:a1a69d32f310 | 696 | |
sepp_nepp | 10:cd251e0fc2fd | 697 | #define VL53L0X_FIXPOINT1616TOFIXPOINT88(Value) (uint16_t)((Value>>8)&0xFFFF) |
sepp_nepp | 10:cd251e0fc2fd | 698 | #define VL53L0X_FIXPOINT88TOFIXPOINT1616(Value) (FixPoint1616_t)(Value<<8) |
nikapov | 0:a1a69d32f310 | 699 | |
sepp_nepp | 10:cd251e0fc2fd | 700 | #define VL53L0X_FIXPOINT1616TOFIXPOINT412(Value) (uint16_t)((Value>>4)&0xFFFF) |
sepp_nepp | 10:cd251e0fc2fd | 701 | #define VL53L0X_FIXPOINT412TOFIXPOINT1616(Value) (FixPoint1616_t)(Value<<4) |
nikapov | 0:a1a69d32f310 | 702 | |
sepp_nepp | 10:cd251e0fc2fd | 703 | #define VL53L0X_FIXPOINT1616TOFIXPOINT313(Value) (uint16_t)((Value>>3)&0xFFFF) |
sepp_nepp | 10:cd251e0fc2fd | 704 | #define VL53L0X_FIXPOINT313TOFIXPOINT1616(Value) (FixPoint1616_t)(Value<<3) |
nikapov | 0:a1a69d32f310 | 705 | |
sepp_nepp | 10:cd251e0fc2fd | 706 | #define VL53L0X_FIXPOINT1616TOFIXPOINT08(Value) (uint8_t)((Value>>8)&0x00FF) |
sepp_nepp | 10:cd251e0fc2fd | 707 | #define VL53L0X_FIXPOINT08TOFIXPOINT1616(Value) (FixPoint1616_t)(Value<<8) |
nikapov | 0:a1a69d32f310 | 708 | |
sepp_nepp | 10:cd251e0fc2fd | 709 | #define VL53L0X_FIXPOINT1616TOFIXPOINT53(Value) (uint8_t)((Value>>13)&0x00FF) |
sepp_nepp | 10:cd251e0fc2fd | 710 | #define VL53L0X_FIXPOINT53TOFIXPOINT1616(Value) (FixPoint1616_t)(Value<<13) |
nikapov | 0:a1a69d32f310 | 711 | |
sepp_nepp | 10:cd251e0fc2fd | 712 | #define VL53L0X_FIXPOINT1616TOFIXPOINT102(Value) (uint16_t)((Value>>14)&0x0FFF) |
sepp_nepp | 10:cd251e0fc2fd | 713 | #define VL53L0X_FIXPOINT102TOFIXPOINT1616(Value) (FixPoint1616_t)(Value<<12) |
nikapov | 0:a1a69d32f310 | 714 | |
sepp_nepp | 10:cd251e0fc2fd | 715 | #define VL53L0X_MAKEUINT16(lsb, msb) (uint16_t)((((uint16_t)msb)<<8) + (uint16_t)lsb) |
nikapov | 0:a1a69d32f310 | 716 | |
nikapov | 0:a1a69d32f310 | 717 | /** @} VL53L0X_define_GeneralMacro_group */ |
nikapov | 0:a1a69d32f310 | 718 | |
nikapov | 0:a1a69d32f310 | 719 | /** @} VL53L0X_globaldefine_group */ |
nikapov | 0:a1a69d32f310 | 720 | |
nikapov | 0:a1a69d32f310 | 721 | #ifdef __cplusplus |
nikapov | 0:a1a69d32f310 | 722 | } |
nikapov | 0:a1a69d32f310 | 723 | #endif |
nikapov | 0:a1a69d32f310 | 724 | |
nikapov | 0:a1a69d32f310 | 725 | #endif /* _VL53L0X_DEF_H_ */ |