Condensed Version of Public VL53L0X
VL53L0X_def.h@7:41cbc431e1f4, 2019-03-24 (annotated)
- Committer:
- sepp_nepp
- Date:
- Sun Mar 24 18:18:54 2019 +0000
- Revision:
- 7:41cbc431e1f4
- Parent:
- 5:b95f6951f7d5
- Child:
- 8:abea9638127a
Many edits, but bizzarre compile error;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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nikapov | 0:a1a69d32f310 | 1 | /******************************************************************************* |
nikapov | 0:a1a69d32f310 | 2 | Copyright © 2016, STMicroelectronics International N.V. |
nikapov | 0:a1a69d32f310 | 3 | All rights reserved. |
nikapov | 0:a1a69d32f310 | 4 | |
nikapov | 0:a1a69d32f310 | 5 | Redistribution and use in source and binary forms, with or without |
nikapov | 0:a1a69d32f310 | 6 | modification, are permitted provided that the following conditions are met: |
nikapov | 0:a1a69d32f310 | 7 | * Redistributions of source code must retain the above copyright |
nikapov | 0:a1a69d32f310 | 8 | notice, this list of conditions and the following disclaimer. |
nikapov | 0:a1a69d32f310 | 9 | * Redistributions in binary form must reproduce the above copyright |
nikapov | 0:a1a69d32f310 | 10 | notice, this list of conditions and the following disclaimer in the |
nikapov | 0:a1a69d32f310 | 11 | documentation and/or other materials provided with the distribution. |
nikapov | 0:a1a69d32f310 | 12 | * Neither the name of STMicroelectronics nor the |
nikapov | 0:a1a69d32f310 | 13 | names of its contributors may be used to endorse or promote products |
nikapov | 0:a1a69d32f310 | 14 | derived from this software without specific prior written permission. |
nikapov | 0:a1a69d32f310 | 15 | |
nikapov | 0:a1a69d32f310 | 16 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
nikapov | 0:a1a69d32f310 | 17 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
nikapov | 0:a1a69d32f310 | 18 | WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND |
nikapov | 0:a1a69d32f310 | 19 | NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS ARE DISCLAIMED. |
nikapov | 0:a1a69d32f310 | 20 | IN NO EVENT SHALL STMICROELECTRONICS INTERNATIONAL N.V. BE LIABLE FOR ANY |
nikapov | 0:a1a69d32f310 | 21 | DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
nikapov | 0:a1a69d32f310 | 22 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
nikapov | 0:a1a69d32f310 | 23 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
nikapov | 0:a1a69d32f310 | 24 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
nikapov | 0:a1a69d32f310 | 25 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
nikapov | 0:a1a69d32f310 | 26 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
nikapov | 0:a1a69d32f310 | 27 | *******************************************************************************/ |
nikapov | 0:a1a69d32f310 | 28 | |
nikapov | 0:a1a69d32f310 | 29 | /** |
nikapov | 0:a1a69d32f310 | 30 | * @file VL53L0X_def.h |
nikapov | 0:a1a69d32f310 | 31 | * |
nikapov | 0:a1a69d32f310 | 32 | * @brief Type definitions for VL53L0X API. |
nikapov | 0:a1a69d32f310 | 33 | * |
nikapov | 0:a1a69d32f310 | 34 | */ |
nikapov | 0:a1a69d32f310 | 35 | |
nikapov | 0:a1a69d32f310 | 36 | |
nikapov | 0:a1a69d32f310 | 37 | #ifndef _VL53L0X_DEF_H_ |
nikapov | 0:a1a69d32f310 | 38 | #define _VL53L0X_DEF_H_ |
nikapov | 0:a1a69d32f310 | 39 | |
nikapov | 0:a1a69d32f310 | 40 | |
nikapov | 0:a1a69d32f310 | 41 | #ifdef __cplusplus |
nikapov | 0:a1a69d32f310 | 42 | extern "C" { |
nikapov | 0:a1a69d32f310 | 43 | #endif |
nikapov | 0:a1a69d32f310 | 44 | |
nikapov | 0:a1a69d32f310 | 45 | /** @defgroup VL53L0X_globaldefine_group VL53L0X Defines |
nikapov | 0:a1a69d32f310 | 46 | * @brief VL53L0X Defines |
nikapov | 0:a1a69d32f310 | 47 | * @{ |
nikapov | 0:a1a69d32f310 | 48 | */ |
nikapov | 0:a1a69d32f310 | 49 | |
sepp_nepp | 5:b95f6951f7d5 | 50 | /****************** define for i2c configuration *******************************/ |
sepp_nepp | 5:b95f6951f7d5 | 51 | /** Maximum buffer size to be used in i2c */ |
sepp_nepp | 5:b95f6951f7d5 | 52 | #define VL53L0X_MAX_I2C_XFER_SIZE 64 /* Maximum buffer size to be used in i2c */ |
sepp_nepp | 5:b95f6951f7d5 | 53 | #define VL53L0X_I2C_USER_VAR /* none but could be for a flag var to get/pass to mutex interruptible return flags and try again */ |
sepp_nepp | 5:b95f6951f7d5 | 54 | |
nikapov | 0:a1a69d32f310 | 55 | |
nikapov | 0:a1a69d32f310 | 56 | /** PAL SPECIFICATION major version */ |
nikapov | 0:a1a69d32f310 | 57 | #define VL53L0X10_SPECIFICATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 58 | /** PAL SPECIFICATION minor version */ |
nikapov | 0:a1a69d32f310 | 59 | #define VL53L0X10_SPECIFICATION_VER_MINOR 2 |
nikapov | 0:a1a69d32f310 | 60 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 61 | #define VL53L0X10_SPECIFICATION_VER_SUB 7 |
nikapov | 0:a1a69d32f310 | 62 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 63 | #define VL53L0X10_SPECIFICATION_VER_REVISION 1440 |
nikapov | 0:a1a69d32f310 | 64 | |
nikapov | 0:a1a69d32f310 | 65 | /** VL53L0X PAL IMPLEMENTATION major version */ |
nikapov | 0:a1a69d32f310 | 66 | #define VL53L0X10_IMPLEMENTATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 67 | /** VL53L0X PAL IMPLEMENTATION minor version */ |
nikapov | 0:a1a69d32f310 | 68 | #define VL53L0X10_IMPLEMENTATION_VER_MINOR 0 |
nikapov | 0:a1a69d32f310 | 69 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 70 | #define VL53L0X10_IMPLEMENTATION_VER_SUB 9 |
nikapov | 0:a1a69d32f310 | 71 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 72 | #define VL53L0X10_IMPLEMENTATION_VER_REVISION 3673 |
nikapov | 0:a1a69d32f310 | 73 | |
nikapov | 0:a1a69d32f310 | 74 | /** PAL SPECIFICATION major version */ |
nikapov | 0:a1a69d32f310 | 75 | #define VL53L0X_SPECIFICATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 76 | /** PAL SPECIFICATION minor version */ |
nikapov | 0:a1a69d32f310 | 77 | #define VL53L0X_SPECIFICATION_VER_MINOR 2 |
nikapov | 0:a1a69d32f310 | 78 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 79 | #define VL53L0X_SPECIFICATION_VER_SUB 7 |
nikapov | 0:a1a69d32f310 | 80 | /** PAL SPECIFICATION sub version */ |
nikapov | 0:a1a69d32f310 | 81 | #define VL53L0X_SPECIFICATION_VER_REVISION 1440 |
nikapov | 0:a1a69d32f310 | 82 | |
nikapov | 0:a1a69d32f310 | 83 | /** VL53L0X PAL IMPLEMENTATION major version */ |
nikapov | 0:a1a69d32f310 | 84 | #define VL53L0X_IMPLEMENTATION_VER_MAJOR 1 |
nikapov | 0:a1a69d32f310 | 85 | /** VL53L0X PAL IMPLEMENTATION minor version */ |
nikapov | 0:a1a69d32f310 | 86 | #define VL53L0X_IMPLEMENTATION_VER_MINOR 1 |
nikapov | 0:a1a69d32f310 | 87 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 88 | #define VL53L0X_IMPLEMENTATION_VER_SUB 21 |
nikapov | 0:a1a69d32f310 | 89 | /** VL53L0X PAL IMPLEMENTATION sub version */ |
nikapov | 0:a1a69d32f310 | 90 | #define VL53L0X_IMPLEMENTATION_VER_REVISION 4823 |
sepp_nepp | 5:b95f6951f7d5 | 91 | |
sepp_nepp | 5:b95f6951f7d5 | 92 | |
nikapov | 0:a1a69d32f310 | 93 | #define VL53L0X_DEFAULT_MAX_LOOP 2000 |
nikapov | 0:a1a69d32f310 | 94 | #define VL53L0X_MAX_STRING_LENGTH 32 |
nikapov | 0:a1a69d32f310 | 95 | |
nikapov | 0:a1a69d32f310 | 96 | |
sepp_nepp | 7:41cbc431e1f4 | 97 | /** |
sepp_nepp | 7:41cbc431e1f4 | 98 | * Device specific defines. To be adapted by implementer for the targeted |
sepp_nepp | 7:41cbc431e1f4 | 99 | * device. |
sepp_nepp | 7:41cbc431e1f4 | 100 | */ |
sepp_nepp | 7:41cbc431e1f4 | 101 | |
sepp_nepp | 7:41cbc431e1f4 | 102 | /** use where fractional values are expected |
sepp_nepp | 7:41cbc431e1f4 | 103 | * |
sepp_nepp | 7:41cbc431e1f4 | 104 | * Given a floating point value f it's .16 bit point is (int)(f*(1<<16))*/ |
sepp_nepp | 7:41cbc431e1f4 | 105 | typedef uint32_t FixPoint1616_t; |
sepp_nepp | 7:41cbc431e1f4 | 106 | |
sepp_nepp | 7:41cbc431e1f4 | 107 | /** @defgroup VL53L0X_DevSpecDefines_group VL53L0X cut1.1 Device Specific Defines |
sepp_nepp | 7:41cbc431e1f4 | 108 | * @brief VL53L0X cut1.1 Device Specific Defines |
sepp_nepp | 7:41cbc431e1f4 | 109 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 110 | */ |
sepp_nepp | 7:41cbc431e1f4 | 111 | |
sepp_nepp | 7:41cbc431e1f4 | 112 | /** @defgroup VL53L0X_DeviceError_group Device Error |
sepp_nepp | 7:41cbc431e1f4 | 113 | * @brief Device Error code |
sepp_nepp | 7:41cbc431e1f4 | 114 | * |
sepp_nepp | 7:41cbc431e1f4 | 115 | * This enum is Device specific it should be updated in the implementation |
sepp_nepp | 7:41cbc431e1f4 | 116 | * Use @a VL53L0X_GetStatusErrorString() to get the string. |
sepp_nepp | 7:41cbc431e1f4 | 117 | * It is related to Status Register of the Device. |
sepp_nepp | 7:41cbc431e1f4 | 118 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 119 | */ |
sepp_nepp | 7:41cbc431e1f4 | 120 | typedef uint8_t VL53L0X_DeviceError; |
sepp_nepp | 7:41cbc431e1f4 | 121 | |
sepp_nepp | 7:41cbc431e1f4 | 122 | #define VL53L0X_DEVICEERROR_NONE ((VL53L0X_DeviceError) 0) |
sepp_nepp | 7:41cbc431e1f4 | 123 | /*!< 0 NoError */ |
sepp_nepp | 7:41cbc431e1f4 | 124 | #define VL53L0X_DEVICEERROR_VCSELCONTINUITYTESTFAILURE ((VL53L0X_DeviceError) 1) |
sepp_nepp | 7:41cbc431e1f4 | 125 | #define VL53L0X_DEVICEERROR_VCSELWATCHDOGTESTFAILURE ((VL53L0X_DeviceError) 2) |
sepp_nepp | 7:41cbc431e1f4 | 126 | #define VL53L0X_DEVICEERROR_NOVHVVALUEFOUND ((VL53L0X_DeviceError) 3) |
sepp_nepp | 7:41cbc431e1f4 | 127 | #define VL53L0X_DEVICEERROR_MSRCNOTARGET ((VL53L0X_DeviceError) 4) |
sepp_nepp | 7:41cbc431e1f4 | 128 | #define VL53L0X_DEVICEERROR_SNRCHECK ((VL53L0X_DeviceError) 5) |
sepp_nepp | 7:41cbc431e1f4 | 129 | #define VL53L0X_DEVICEERROR_RANGEPHASECHECK ((VL53L0X_DeviceError) 6) |
sepp_nepp | 7:41cbc431e1f4 | 130 | #define VL53L0X_DEVICEERROR_SIGMATHRESHOLDCHECK ((VL53L0X_DeviceError) 7) |
sepp_nepp | 7:41cbc431e1f4 | 131 | #define VL53L0X_DEVICEERROR_TCC ((VL53L0X_DeviceError) 8) |
sepp_nepp | 7:41cbc431e1f4 | 132 | #define VL53L0X_DEVICEERROR_MINCLIP ((VL53L0X_DeviceError) 10) |
sepp_nepp | 7:41cbc431e1f4 | 133 | #define VL53L0X_DEVICEERROR_RANGECOMPLETE ((VL53L0X_DeviceError) 11) |
sepp_nepp | 7:41cbc431e1f4 | 134 | #define VL53L0X_DEVICEERROR_ALGOUNDERFLOW ((VL53L0X_DeviceError) 12) |
sepp_nepp | 7:41cbc431e1f4 | 135 | #define VL53L0X_DEVICEERROR_ALGOOVERFLOW ((VL53L0X_DeviceError) 13) |
sepp_nepp | 7:41cbc431e1f4 | 136 | #define VL53L0X_DEVICEERROR_RANGEIGNORETHRESHOLD ((VL53L0X_DeviceError) 14) |
sepp_nepp | 7:41cbc431e1f4 | 137 | |
sepp_nepp | 7:41cbc431e1f4 | 138 | /** @} end of VL53L0X_DeviceError_group */ |
sepp_nepp | 7:41cbc431e1f4 | 139 | |
sepp_nepp | 7:41cbc431e1f4 | 140 | |
sepp_nepp | 7:41cbc431e1f4 | 141 | /** @defgroup VL53L0X_CheckEnable_group Check Enable list |
sepp_nepp | 7:41cbc431e1f4 | 142 | * @brief Check Enable code |
sepp_nepp | 7:41cbc431e1f4 | 143 | * |
sepp_nepp | 7:41cbc431e1f4 | 144 | * Define used to specify the LimitCheckId. |
sepp_nepp | 7:41cbc431e1f4 | 145 | * Use @a VL53L0X_GetLimitCheckInfo() to get the string. |
sepp_nepp | 7:41cbc431e1f4 | 146 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 147 | */ |
sepp_nepp | 7:41cbc431e1f4 | 148 | |
sepp_nepp | 7:41cbc431e1f4 | 149 | #define VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE 0 |
sepp_nepp | 7:41cbc431e1f4 | 150 | #define VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE 1 |
sepp_nepp | 7:41cbc431e1f4 | 151 | #define VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP 2 |
sepp_nepp | 7:41cbc431e1f4 | 152 | #define VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD 3 |
sepp_nepp | 7:41cbc431e1f4 | 153 | #define VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC 4 |
sepp_nepp | 7:41cbc431e1f4 | 154 | #define VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE 5 |
sepp_nepp | 7:41cbc431e1f4 | 155 | |
sepp_nepp | 7:41cbc431e1f4 | 156 | #define VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS 6 |
sepp_nepp | 7:41cbc431e1f4 | 157 | |
sepp_nepp | 7:41cbc431e1f4 | 158 | /** @} end of VL53L0X_CheckEnable_group */ |
sepp_nepp | 7:41cbc431e1f4 | 159 | |
sepp_nepp | 7:41cbc431e1f4 | 160 | |
sepp_nepp | 7:41cbc431e1f4 | 161 | /** @defgroup VL53L0X_GpioFunctionality_group Gpio Functionality |
sepp_nepp | 7:41cbc431e1f4 | 162 | * @brief Defines the different functionalities for the device GPIO(s) |
sepp_nepp | 7:41cbc431e1f4 | 163 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 164 | */ |
sepp_nepp | 7:41cbc431e1f4 | 165 | typedef uint8_t VL53L0X_GpioFunctionality; |
sepp_nepp | 7:41cbc431e1f4 | 166 | |
sepp_nepp | 7:41cbc431e1f4 | 167 | #define VL53L0X_GPIOFUNCTIONALITY_OFF \ |
sepp_nepp | 7:41cbc431e1f4 | 168 | ((VL53L0X_GpioFunctionality) 0) /*!< NO Interrupt */ |
sepp_nepp | 7:41cbc431e1f4 | 169 | #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW \ |
sepp_nepp | 7:41cbc431e1f4 | 170 | ((VL53L0X_GpioFunctionality) 1) /*!< Level Low (value < thresh_low) */ |
sepp_nepp | 7:41cbc431e1f4 | 171 | #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH \ |
sepp_nepp | 7:41cbc431e1f4 | 172 | ((VL53L0X_GpioFunctionality) 2) /*!< Level High (value > thresh_high) */ |
sepp_nepp | 7:41cbc431e1f4 | 173 | #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT \ |
sepp_nepp | 7:41cbc431e1f4 | 174 | ((VL53L0X_GpioFunctionality) 3) |
sepp_nepp | 7:41cbc431e1f4 | 175 | /*!< Out Of Window (value < thresh_low OR value > thresh_high) */ |
sepp_nepp | 7:41cbc431e1f4 | 176 | #define VL53L0X_GPIOFUNCTIONALITY_NEW_MEASURE_READY \ |
sepp_nepp | 7:41cbc431e1f4 | 177 | ((VL53L0X_GpioFunctionality) 4) /*!< New Sample Ready */ |
sepp_nepp | 7:41cbc431e1f4 | 178 | |
sepp_nepp | 7:41cbc431e1f4 | 179 | /** @} end of VL53L0X_GpioFunctionality_group */ |
sepp_nepp | 7:41cbc431e1f4 | 180 | |
sepp_nepp | 7:41cbc431e1f4 | 181 | |
sepp_nepp | 7:41cbc431e1f4 | 182 | /* Device register map */ |
sepp_nepp | 7:41cbc431e1f4 | 183 | |
sepp_nepp | 7:41cbc431e1f4 | 184 | /** @defgroup VL53L0X_DefineRegisters_group Define Registers |
sepp_nepp | 7:41cbc431e1f4 | 185 | * @brief List of all the defined registers |
sepp_nepp | 7:41cbc431e1f4 | 186 | * @{ |
sepp_nepp | 7:41cbc431e1f4 | 187 | */ |
sepp_nepp | 7:41cbc431e1f4 | 188 | #define VL53L0X_REG_SYSRANGE_START 0x000 |
sepp_nepp | 7:41cbc431e1f4 | 189 | /** mask existing bit in #VL53L0X_REG_SYSRANGE_START*/ |
sepp_nepp | 7:41cbc431e1f4 | 190 | #define VL53L0X_REG_SYSRANGE_MODE_MASK 0x0F |
sepp_nepp | 7:41cbc431e1f4 | 191 | /** bit 0 in #VL53L0X_REG_SYSRANGE_START write 1 toggle state in |
sepp_nepp | 7:41cbc431e1f4 | 192 | * continuous mode and arm next shot in single shot mode */ |
sepp_nepp | 7:41cbc431e1f4 | 193 | #define VL53L0X_REG_SYSRANGE_MODE_START_STOP 0x01 |
sepp_nepp | 7:41cbc431e1f4 | 194 | /** bit 1 write 0 in #VL53L0X_REG_SYSRANGE_START set single shot mode */ |
sepp_nepp | 7:41cbc431e1f4 | 195 | #define VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT 0x00 |
sepp_nepp | 7:41cbc431e1f4 | 196 | /** bit 1 write 1 in #VL53L0X_REG_SYSRANGE_START set back-to-back |
sepp_nepp | 7:41cbc431e1f4 | 197 | * operation mode */ |
sepp_nepp | 7:41cbc431e1f4 | 198 | #define VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK 0x02 |
sepp_nepp | 7:41cbc431e1f4 | 199 | /** bit 2 write 1 in #VL53L0X_REG_SYSRANGE_START set timed operation |
sepp_nepp | 7:41cbc431e1f4 | 200 | * mode */ |
sepp_nepp | 7:41cbc431e1f4 | 201 | #define VL53L0X_REG_SYSRANGE_MODE_TIMED 0x04 |
sepp_nepp | 7:41cbc431e1f4 | 202 | /** bit 3 write 1 in #VL53L0X_REG_SYSRANGE_START set histogram operation |
sepp_nepp | 7:41cbc431e1f4 | 203 | * mode */ |
sepp_nepp | 7:41cbc431e1f4 | 204 | #define VL53L0X_REG_SYSRANGE_MODE_HISTOGRAM 0x08 |
sepp_nepp | 7:41cbc431e1f4 | 205 | |
sepp_nepp | 7:41cbc431e1f4 | 206 | #define VL53L0X_REG_SYSTEM_THRESH_HIGH 0x000C |
sepp_nepp | 7:41cbc431e1f4 | 207 | #define VL53L0X_REG_SYSTEM_THRESH_LOW 0x000E |
sepp_nepp | 7:41cbc431e1f4 | 208 | |
sepp_nepp | 7:41cbc431e1f4 | 209 | #define VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG 0x0001 |
sepp_nepp | 7:41cbc431e1f4 | 210 | #define VL53L0X_REG_SYSTEM_RANGE_CONFIG 0x0009 |
sepp_nepp | 7:41cbc431e1f4 | 211 | #define VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD 0x0004 |
sepp_nepp | 7:41cbc431e1f4 | 212 | |
sepp_nepp | 7:41cbc431e1f4 | 213 | #define VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO 0x000A |
sepp_nepp | 7:41cbc431e1f4 | 214 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_DISABLED 0x00 |
sepp_nepp | 7:41cbc431e1f4 | 215 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_LOW 0x01 |
sepp_nepp | 7:41cbc431e1f4 | 216 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_HIGH 0x02 |
sepp_nepp | 7:41cbc431e1f4 | 217 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_OUT_OF_WINDOW 0x03 |
sepp_nepp | 7:41cbc431e1f4 | 218 | #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY 0x04 |
sepp_nepp | 7:41cbc431e1f4 | 219 | |
sepp_nepp | 7:41cbc431e1f4 | 220 | #define VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH 0x0084 |
sepp_nepp | 7:41cbc431e1f4 | 221 | |
sepp_nepp | 7:41cbc431e1f4 | 222 | #define VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR 0x000B |
sepp_nepp | 7:41cbc431e1f4 | 223 | |
sepp_nepp | 7:41cbc431e1f4 | 224 | /* Result registers */ |
sepp_nepp | 7:41cbc431e1f4 | 225 | #define VL53L0X_REG_RESULT_INTERRUPT_STATUS 0x0013 |
sepp_nepp | 7:41cbc431e1f4 | 226 | #define VL53L0X_REG_RESULT_RANGE_STATUS 0x0014 |
sepp_nepp | 7:41cbc431e1f4 | 227 | |
sepp_nepp | 7:41cbc431e1f4 | 228 | #define VL53L0X_REG_RESULT_CORE_PAGE 1 |
sepp_nepp | 7:41cbc431e1f4 | 229 | #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN 0x00BC |
sepp_nepp | 7:41cbc431e1f4 | 230 | #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN 0x00C0 |
sepp_nepp | 7:41cbc431e1f4 | 231 | #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF 0x00D0 |
sepp_nepp | 7:41cbc431e1f4 | 232 | #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_REF 0x00D4 |
sepp_nepp | 7:41cbc431e1f4 | 233 | #define VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF 0x00B6 |
sepp_nepp | 7:41cbc431e1f4 | 234 | |
sepp_nepp | 7:41cbc431e1f4 | 235 | /* Algo register */ |
sepp_nepp | 7:41cbc431e1f4 | 236 | |
sepp_nepp | 7:41cbc431e1f4 | 237 | #define VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM 0x0028 |
sepp_nepp | 7:41cbc431e1f4 | 238 | |
sepp_nepp | 7:41cbc431e1f4 | 239 | #define VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS 0x008a |
sepp_nepp | 7:41cbc431e1f4 | 240 | |
sepp_nepp | 7:41cbc431e1f4 | 241 | /* Check Limit registers */ |
sepp_nepp | 7:41cbc431e1f4 | 242 | #define VL53L0X_REG_MSRC_CONFIG_CONTROL 0x0060 |
sepp_nepp | 7:41cbc431e1f4 | 243 | |
sepp_nepp | 7:41cbc431e1f4 | 244 | #define VL53L0X_REG_PRE_RANGE_CONFIG_MIN_SNR 0X0027 |
sepp_nepp | 7:41cbc431e1f4 | 245 | #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW 0x0056 |
sepp_nepp | 7:41cbc431e1f4 | 246 | #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH 0x0057 |
sepp_nepp | 7:41cbc431e1f4 | 247 | #define VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT 0x0064 |
sepp_nepp | 7:41cbc431e1f4 | 248 | |
sepp_nepp | 7:41cbc431e1f4 | 249 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_SNR 0X0067 |
sepp_nepp | 7:41cbc431e1f4 | 250 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW 0x0047 |
sepp_nepp | 7:41cbc431e1f4 | 251 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH 0x0048 |
sepp_nepp | 7:41cbc431e1f4 | 252 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT 0x0044 |
sepp_nepp | 7:41cbc431e1f4 | 253 | |
sepp_nepp | 7:41cbc431e1f4 | 254 | |
sepp_nepp | 7:41cbc431e1f4 | 255 | #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_HI 0X0061 |
sepp_nepp | 7:41cbc431e1f4 | 256 | #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_LO 0X0062 |
sepp_nepp | 7:41cbc431e1f4 | 257 | |
sepp_nepp | 7:41cbc431e1f4 | 258 | /* PRE RANGE registers */ |
sepp_nepp | 7:41cbc431e1f4 | 259 | #define VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD 0x0050 |
sepp_nepp | 7:41cbc431e1f4 | 260 | #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0051 |
sepp_nepp | 7:41cbc431e1f4 | 261 | #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0052 |
sepp_nepp | 7:41cbc431e1f4 | 262 | |
sepp_nepp | 7:41cbc431e1f4 | 263 | #define VL53L0X_REG_SYSTEM_HISTOGRAM_BIN 0x0081 |
sepp_nepp | 7:41cbc431e1f4 | 264 | #define VL53L0X_REG_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT 0x0033 |
sepp_nepp | 7:41cbc431e1f4 | 265 | #define VL53L0X_REG_HISTOGRAM_CONFIG_READOUT_CTRL 0x0055 |
sepp_nepp | 7:41cbc431e1f4 | 266 | |
sepp_nepp | 7:41cbc431e1f4 | 267 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD 0x0070 |
sepp_nepp | 7:41cbc431e1f4 | 268 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0071 |
sepp_nepp | 7:41cbc431e1f4 | 269 | #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0072 |
sepp_nepp | 7:41cbc431e1f4 | 270 | #define VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS 0x0020 |
sepp_nepp | 7:41cbc431e1f4 | 271 | |
sepp_nepp | 7:41cbc431e1f4 | 272 | #define VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP 0x0046 |
sepp_nepp | 7:41cbc431e1f4 | 273 | |
sepp_nepp | 7:41cbc431e1f4 | 274 | |
sepp_nepp | 7:41cbc431e1f4 | 275 | #define VL53L0X_REG_SOFT_RESET_GO2_SOFT_RESET_N 0x00bf |
sepp_nepp | 7:41cbc431e1f4 | 276 | #define VL53L0X_REG_IDENTIFICATION_MODEL_ID 0x00c0 |
sepp_nepp | 7:41cbc431e1f4 | 277 | #define VL53L0X_REG_IDENTIFICATION_REVISION_ID 0x00c2 |
sepp_nepp | 7:41cbc431e1f4 | 278 | |
sepp_nepp | 7:41cbc431e1f4 | 279 | #define VL53L0X_REG_OSC_CALIBRATE_VAL 0x00f8 |
sepp_nepp | 7:41cbc431e1f4 | 280 | |
sepp_nepp | 7:41cbc431e1f4 | 281 | #define VL53L0X_SIGMA_ESTIMATE_MAX_VALUE 65535 |
sepp_nepp | 7:41cbc431e1f4 | 282 | /* equivalent to a range sigma of 655.35mm */ |
sepp_nepp | 7:41cbc431e1f4 | 283 | |
sepp_nepp | 7:41cbc431e1f4 | 284 | #define VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH 0x032 |
sepp_nepp | 7:41cbc431e1f4 | 285 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 0x0B0 |
sepp_nepp | 7:41cbc431e1f4 | 286 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_1 0x0B1 |
sepp_nepp | 7:41cbc431e1f4 | 287 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_2 0x0B2 |
sepp_nepp | 7:41cbc431e1f4 | 288 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_3 0x0B3 |
sepp_nepp | 7:41cbc431e1f4 | 289 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_4 0x0B4 |
sepp_nepp | 7:41cbc431e1f4 | 290 | #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_5 0x0B5 |
sepp_nepp | 7:41cbc431e1f4 | 291 | |
sepp_nepp | 7:41cbc431e1f4 | 292 | #define VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT 0xB6 |
sepp_nepp | 7:41cbc431e1f4 | 293 | #define VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD 0x4E /* 0x14E */ |
sepp_nepp | 7:41cbc431e1f4 | 294 | #define VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET 0x4F /* 0x14F */ |
sepp_nepp | 7:41cbc431e1f4 | 295 | #define VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE 0x80 |
sepp_nepp | 7:41cbc431e1f4 | 296 | |
sepp_nepp | 7:41cbc431e1f4 | 297 | /* Speed of light in um per 1E-10 Seconds */ |
sepp_nepp | 7:41cbc431e1f4 | 298 | #define VL53L0X_SPEED_OF_LIGHT_IN_AIR 2997 |
sepp_nepp | 7:41cbc431e1f4 | 299 | |
sepp_nepp | 7:41cbc431e1f4 | 300 | #define VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV 0x0089 |
sepp_nepp | 7:41cbc431e1f4 | 301 | |
sepp_nepp | 7:41cbc431e1f4 | 302 | #define VL53L0X_REG_ALGO_PHASECAL_LIM 0x0030 /* 0x130 */ |
sepp_nepp | 7:41cbc431e1f4 | 303 | #define VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT 0x0030 |
sepp_nepp | 7:41cbc431e1f4 | 304 | |
sepp_nepp | 7:41cbc431e1f4 | 305 | /** @} VL53L0X_DefineRegisters_group */ |
sepp_nepp | 7:41cbc431e1f4 | 306 | |
sepp_nepp | 7:41cbc431e1f4 | 307 | /** @} VL53L0X_DevSpecDefines_group */ |
sepp_nepp | 7:41cbc431e1f4 | 308 | |
nikapov | 0:a1a69d32f310 | 309 | |
nikapov | 0:a1a69d32f310 | 310 | /**************************************** |
nikapov | 0:a1a69d32f310 | 311 | * PRIVATE define do not edit |
nikapov | 0:a1a69d32f310 | 312 | ****************************************/ |
nikapov | 0:a1a69d32f310 | 313 | |
nikapov | 0:a1a69d32f310 | 314 | /** @brief Defines the parameters of the Get Version Functions |
nikapov | 0:a1a69d32f310 | 315 | */ |
nikapov | 0:a1a69d32f310 | 316 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 317 | uint32_t revision; /*!< revision number */ |
Davidroid | 2:d07edeaff6f1 | 318 | uint8_t major; /*!< major number */ |
Davidroid | 2:d07edeaff6f1 | 319 | uint8_t minor; /*!< minor number */ |
Davidroid | 2:d07edeaff6f1 | 320 | uint8_t build; /*!< build number */ |
nikapov | 0:a1a69d32f310 | 321 | } VL53L0X_Version_t; |
nikapov | 0:a1a69d32f310 | 322 | |
nikapov | 0:a1a69d32f310 | 323 | |
nikapov | 0:a1a69d32f310 | 324 | /** @brief Defines the parameters of the Get Device Info Functions |
nikapov | 0:a1a69d32f310 | 325 | */ |
nikapov | 0:a1a69d32f310 | 326 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 327 | char Name[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 328 | /*!< Name of the Device e.g. Left_Distance */ |
Davidroid | 2:d07edeaff6f1 | 329 | char Type[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 330 | /*!< Type of the Device e.g VL53L0X */ |
Davidroid | 2:d07edeaff6f1 | 331 | char ProductId[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 332 | /*!< Product Identifier String */ |
Davidroid | 2:d07edeaff6f1 | 333 | uint8_t ProductType; |
Davidroid | 2:d07edeaff6f1 | 334 | /*!< Product Type, VL53L0X = 1, VL53L1 = 2 */ |
Davidroid | 2:d07edeaff6f1 | 335 | uint8_t ProductRevisionMajor; |
Davidroid | 2:d07edeaff6f1 | 336 | /*!< Product revision major */ |
Davidroid | 2:d07edeaff6f1 | 337 | uint8_t ProductRevisionMinor; |
Davidroid | 2:d07edeaff6f1 | 338 | /*!< Product revision minor */ |
nikapov | 0:a1a69d32f310 | 339 | } VL53L0X_DeviceInfo_t; |
nikapov | 0:a1a69d32f310 | 340 | |
nikapov | 0:a1a69d32f310 | 341 | |
nikapov | 0:a1a69d32f310 | 342 | /** @defgroup VL53L0X_define_Error_group Error and Warning code returned by API |
nikapov | 0:a1a69d32f310 | 343 | * The following DEFINE are used to identify the PAL ERROR |
nikapov | 0:a1a69d32f310 | 344 | * @{ |
nikapov | 0:a1a69d32f310 | 345 | */ |
nikapov | 0:a1a69d32f310 | 346 | |
nikapov | 0:a1a69d32f310 | 347 | typedef int8_t VL53L0X_Error; |
nikapov | 0:a1a69d32f310 | 348 | |
nikapov | 0:a1a69d32f310 | 349 | #define VL53L0X_ERROR_NONE ((VL53L0X_Error) 0) |
nikapov | 0:a1a69d32f310 | 350 | #define VL53L0X_ERROR_CALIBRATION_WARNING ((VL53L0X_Error) -1) |
Davidroid | 2:d07edeaff6f1 | 351 | /*!< Warning invalid calibration data may be in used |
Davidroid | 2:d07edeaff6f1 | 352 | \a VL53L0X_InitData() |
Davidroid | 2:d07edeaff6f1 | 353 | \a VL53L0X_GetOffsetCalibrationData |
Davidroid | 2:d07edeaff6f1 | 354 | \a VL53L0X_SetOffsetCalibrationData */ |
nikapov | 0:a1a69d32f310 | 355 | #define VL53L0X_ERROR_MIN_CLIPPED ((VL53L0X_Error) -2) |
Davidroid | 2:d07edeaff6f1 | 356 | /*!< Warning parameter passed was clipped to min before to be applied */ |
nikapov | 0:a1a69d32f310 | 357 | |
nikapov | 0:a1a69d32f310 | 358 | #define VL53L0X_ERROR_UNDEFINED ((VL53L0X_Error) -3) |
Davidroid | 2:d07edeaff6f1 | 359 | /*!< Unqualified error */ |
nikapov | 0:a1a69d32f310 | 360 | #define VL53L0X_ERROR_INVALID_PARAMS ((VL53L0X_Error) -4) |
Davidroid | 2:d07edeaff6f1 | 361 | /*!< Parameter passed is invalid or out of range */ |
nikapov | 0:a1a69d32f310 | 362 | #define VL53L0X_ERROR_NOT_SUPPORTED ((VL53L0X_Error) -5) |
Davidroid | 2:d07edeaff6f1 | 363 | /*!< Function is not supported in current mode or configuration */ |
nikapov | 0:a1a69d32f310 | 364 | #define VL53L0X_ERROR_RANGE_ERROR ((VL53L0X_Error) -6) |
Davidroid | 2:d07edeaff6f1 | 365 | /*!< Device report a ranging error interrupt status */ |
nikapov | 0:a1a69d32f310 | 366 | #define VL53L0X_ERROR_TIME_OUT ((VL53L0X_Error) -7) |
Davidroid | 2:d07edeaff6f1 | 367 | /*!< Aborted due to time out */ |
nikapov | 0:a1a69d32f310 | 368 | #define VL53L0X_ERROR_MODE_NOT_SUPPORTED ((VL53L0X_Error) -8) |
Davidroid | 2:d07edeaff6f1 | 369 | /*!< Asked mode is not supported by the device */ |
nikapov | 0:a1a69d32f310 | 370 | #define VL53L0X_ERROR_BUFFER_TOO_SMALL ((VL53L0X_Error) -9) |
Davidroid | 2:d07edeaff6f1 | 371 | /*!< ... */ |
nikapov | 0:a1a69d32f310 | 372 | #define VL53L0X_ERROR_GPIO_NOT_EXISTING ((VL53L0X_Error) -10) |
Davidroid | 2:d07edeaff6f1 | 373 | /*!< User tried to setup a non-existing GPIO pin */ |
nikapov | 0:a1a69d32f310 | 374 | #define VL53L0X_ERROR_GPIO_FUNCTIONALITY_NOT_SUPPORTED ((VL53L0X_Error) -11) |
Davidroid | 2:d07edeaff6f1 | 375 | /*!< unsupported GPIO functionality */ |
nikapov | 0:a1a69d32f310 | 376 | #define VL53L0X_ERROR_INTERRUPT_NOT_CLEARED ((VL53L0X_Error) -12) |
Davidroid | 2:d07edeaff6f1 | 377 | /*!< Error during interrupt clear */ |
nikapov | 0:a1a69d32f310 | 378 | #define VL53L0X_ERROR_CONTROL_INTERFACE ((VL53L0X_Error) -20) |
Davidroid | 2:d07edeaff6f1 | 379 | /*!< error reported from IO functions */ |
nikapov | 0:a1a69d32f310 | 380 | #define VL53L0X_ERROR_INVALID_COMMAND ((VL53L0X_Error) -30) |
Davidroid | 2:d07edeaff6f1 | 381 | /*!< The command is not allowed in the current device state |
Davidroid | 2:d07edeaff6f1 | 382 | * (power down) */ |
nikapov | 0:a1a69d32f310 | 383 | #define VL53L0X_ERROR_DIVISION_BY_ZERO ((VL53L0X_Error) -40) |
Davidroid | 2:d07edeaff6f1 | 384 | /*!< In the function a division by zero occurs */ |
nikapov | 0:a1a69d32f310 | 385 | #define VL53L0X_ERROR_REF_SPAD_INIT ((VL53L0X_Error) -50) |
Davidroid | 2:d07edeaff6f1 | 386 | /*!< Error during reference SPAD initialization */ |
nikapov | 0:a1a69d32f310 | 387 | #define VL53L0X_ERROR_NOT_IMPLEMENTED ((VL53L0X_Error) -99) |
Davidroid | 2:d07edeaff6f1 | 388 | /*!< Tells requested functionality has not been implemented yet or |
Davidroid | 2:d07edeaff6f1 | 389 | * not compatible with the device */ |
nikapov | 0:a1a69d32f310 | 390 | /** @} VL53L0X_define_Error_group */ |
nikapov | 0:a1a69d32f310 | 391 | |
nikapov | 0:a1a69d32f310 | 392 | |
nikapov | 0:a1a69d32f310 | 393 | /** @defgroup VL53L0X_define_DeviceModes_group Defines Device modes |
nikapov | 0:a1a69d32f310 | 394 | * Defines all possible modes for the device |
nikapov | 0:a1a69d32f310 | 395 | * @{ |
nikapov | 0:a1a69d32f310 | 396 | */ |
nikapov | 0:a1a69d32f310 | 397 | typedef uint8_t VL53L0X_DeviceModes; |
nikapov | 0:a1a69d32f310 | 398 | |
nikapov | 0:a1a69d32f310 | 399 | #define VL53L0X_DEVICEMODE_SINGLE_RANGING ((VL53L0X_DeviceModes) 0) |
nikapov | 0:a1a69d32f310 | 400 | #define VL53L0X_DEVICEMODE_CONTINUOUS_RANGING ((VL53L0X_DeviceModes) 1) |
nikapov | 0:a1a69d32f310 | 401 | #define VL53L0X_DEVICEMODE_SINGLE_HISTOGRAM ((VL53L0X_DeviceModes) 2) |
nikapov | 0:a1a69d32f310 | 402 | #define VL53L0X_DEVICEMODE_CONTINUOUS_TIMED_RANGING ((VL53L0X_DeviceModes) 3) |
nikapov | 0:a1a69d32f310 | 403 | #define VL53L0X_DEVICEMODE_SINGLE_ALS ((VL53L0X_DeviceModes) 10) |
nikapov | 0:a1a69d32f310 | 404 | #define VL53L0X_DEVICEMODE_GPIO_DRIVE ((VL53L0X_DeviceModes) 20) |
nikapov | 0:a1a69d32f310 | 405 | #define VL53L0X_DEVICEMODE_GPIO_OSC ((VL53L0X_DeviceModes) 21) |
Davidroid | 2:d07edeaff6f1 | 406 | /* ... Modes to be added depending on device */ |
nikapov | 0:a1a69d32f310 | 407 | /** @} VL53L0X_define_DeviceModes_group */ |
nikapov | 0:a1a69d32f310 | 408 | |
nikapov | 0:a1a69d32f310 | 409 | /** @defgroup VL53L0X_define_HistogramModes_group Defines Histogram modes |
nikapov | 0:a1a69d32f310 | 410 | * Defines all possible Histogram modes for the device |
nikapov | 0:a1a69d32f310 | 411 | * @{ |
nikapov | 0:a1a69d32f310 | 412 | */ |
nikapov | 0:a1a69d32f310 | 413 | typedef uint8_t VL53L0X_HistogramModes; |
nikapov | 0:a1a69d32f310 | 414 | |
nikapov | 0:a1a69d32f310 | 415 | #define VL53L0X_HISTOGRAMMODE_DISABLED ((VL53L0X_HistogramModes) 0) |
Davidroid | 2:d07edeaff6f1 | 416 | /*!< Histogram Disabled */ |
nikapov | 0:a1a69d32f310 | 417 | #define VL53L0X_HISTOGRAMMODE_REFERENCE_ONLY ((VL53L0X_HistogramModes) 1) |
Davidroid | 2:d07edeaff6f1 | 418 | /*!< Histogram Reference array only */ |
nikapov | 0:a1a69d32f310 | 419 | #define VL53L0X_HISTOGRAMMODE_RETURN_ONLY ((VL53L0X_HistogramModes) 2) |
Davidroid | 2:d07edeaff6f1 | 420 | /*!< Histogram Return array only */ |
nikapov | 0:a1a69d32f310 | 421 | #define VL53L0X_HISTOGRAMMODE_BOTH ((VL53L0X_HistogramModes) 3) |
Davidroid | 2:d07edeaff6f1 | 422 | /*!< Histogram both Reference and Return Arrays */ |
Davidroid | 2:d07edeaff6f1 | 423 | /* ... Modes to be added depending on device */ |
nikapov | 0:a1a69d32f310 | 424 | /** @} VL53L0X_define_HistogramModes_group */ |
nikapov | 0:a1a69d32f310 | 425 | |
nikapov | 0:a1a69d32f310 | 426 | |
nikapov | 0:a1a69d32f310 | 427 | /** @defgroup VL53L0X_define_PowerModes_group List of available Power Modes |
nikapov | 0:a1a69d32f310 | 428 | * List of available Power Modes |
nikapov | 0:a1a69d32f310 | 429 | * @{ |
nikapov | 0:a1a69d32f310 | 430 | */ |
nikapov | 0:a1a69d32f310 | 431 | |
nikapov | 0:a1a69d32f310 | 432 | typedef uint8_t VL53L0X_PowerModes; |
nikapov | 0:a1a69d32f310 | 433 | |
nikapov | 0:a1a69d32f310 | 434 | #define VL53L0X_POWERMODE_STANDBY_LEVEL1 ((VL53L0X_PowerModes) 0) |
Davidroid | 2:d07edeaff6f1 | 435 | /*!< Standby level 1 */ |
nikapov | 0:a1a69d32f310 | 436 | #define VL53L0X_POWERMODE_STANDBY_LEVEL2 ((VL53L0X_PowerModes) 1) |
Davidroid | 2:d07edeaff6f1 | 437 | /*!< Standby level 2 */ |
nikapov | 0:a1a69d32f310 | 438 | #define VL53L0X_POWERMODE_IDLE_LEVEL1 ((VL53L0X_PowerModes) 2) |
Davidroid | 2:d07edeaff6f1 | 439 | /*!< Idle level 1 */ |
nikapov | 0:a1a69d32f310 | 440 | #define VL53L0X_POWERMODE_IDLE_LEVEL2 ((VL53L0X_PowerModes) 3) |
Davidroid | 2:d07edeaff6f1 | 441 | /*!< Idle level 2 */ |
nikapov | 0:a1a69d32f310 | 442 | |
nikapov | 0:a1a69d32f310 | 443 | /** @} VL53L0X_define_PowerModes_group */ |
nikapov | 0:a1a69d32f310 | 444 | |
nikapov | 0:a1a69d32f310 | 445 | /** @brief Defines all parameters for the device |
nikapov | 0:a1a69d32f310 | 446 | */ |
nikapov | 0:a1a69d32f310 | 447 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 448 | VL53L0X_DeviceModes DeviceMode; |
Davidroid | 2:d07edeaff6f1 | 449 | /*!< Defines type of measurement to be done for the next measure */ |
Davidroid | 2:d07edeaff6f1 | 450 | VL53L0X_HistogramModes HistogramMode; |
Davidroid | 2:d07edeaff6f1 | 451 | /*!< Defines type of histogram measurement to be done for the next |
Davidroid | 2:d07edeaff6f1 | 452 | * measure */ |
Davidroid | 2:d07edeaff6f1 | 453 | uint32_t MeasurementTimingBudgetMicroSeconds; |
Davidroid | 2:d07edeaff6f1 | 454 | /*!< Defines the allowed total time for a single measurement */ |
Davidroid | 2:d07edeaff6f1 | 455 | uint32_t InterMeasurementPeriodMilliSeconds; |
Davidroid | 2:d07edeaff6f1 | 456 | /*!< Defines time between two consecutive measurements (between two |
Davidroid | 2:d07edeaff6f1 | 457 | * measurement starts). If set to 0 means back-to-back mode */ |
Davidroid | 2:d07edeaff6f1 | 458 | uint8_t XTalkCompensationEnable; |
Davidroid | 2:d07edeaff6f1 | 459 | /*!< Tells if Crosstalk compensation shall be enable or not */ |
Davidroid | 2:d07edeaff6f1 | 460 | uint16_t XTalkCompensationRangeMilliMeter; |
Davidroid | 2:d07edeaff6f1 | 461 | /*!< CrossTalk compensation range in millimeter */ |
Davidroid | 2:d07edeaff6f1 | 462 | FixPoint1616_t XTalkCompensationRateMegaCps; |
Davidroid | 2:d07edeaff6f1 | 463 | /*!< CrossTalk compensation rate in Mega counts per seconds. |
Davidroid | 2:d07edeaff6f1 | 464 | * Expressed in 16.16 fixed point format. */ |
Davidroid | 2:d07edeaff6f1 | 465 | int32_t RangeOffsetMicroMeters; |
Davidroid | 2:d07edeaff6f1 | 466 | /*!< Range offset adjustment (mm). */ |
nikapov | 0:a1a69d32f310 | 467 | |
Davidroid | 2:d07edeaff6f1 | 468 | uint8_t LimitChecksEnable[VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS]; |
Davidroid | 2:d07edeaff6f1 | 469 | /*!< This Array store all the Limit Check enable for this device. */ |
Davidroid | 2:d07edeaff6f1 | 470 | uint8_t LimitChecksStatus[VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS]; |
Davidroid | 2:d07edeaff6f1 | 471 | /*!< This Array store all the Status of the check linked to last |
Davidroid | 2:d07edeaff6f1 | 472 | * measurement. */ |
Davidroid | 2:d07edeaff6f1 | 473 | FixPoint1616_t LimitChecksValue[VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS]; |
Davidroid | 2:d07edeaff6f1 | 474 | /*!< This Array store all the Limit Check value for this device */ |
nikapov | 0:a1a69d32f310 | 475 | |
Davidroid | 2:d07edeaff6f1 | 476 | uint8_t WrapAroundCheckEnable; |
Davidroid | 2:d07edeaff6f1 | 477 | /*!< Tells if Wrap Around Check shall be enable or not */ |
nikapov | 0:a1a69d32f310 | 478 | } VL53L0X_DeviceParameters_t; |
nikapov | 0:a1a69d32f310 | 479 | |
nikapov | 0:a1a69d32f310 | 480 | |
nikapov | 0:a1a69d32f310 | 481 | /** @defgroup VL53L0X_define_State_group Defines the current status of the device |
nikapov | 0:a1a69d32f310 | 482 | * Defines the current status of the device |
nikapov | 0:a1a69d32f310 | 483 | * @{ |
nikapov | 0:a1a69d32f310 | 484 | */ |
nikapov | 0:a1a69d32f310 | 485 | |
nikapov | 0:a1a69d32f310 | 486 | typedef uint8_t VL53L0X_State; |
nikapov | 0:a1a69d32f310 | 487 | |
nikapov | 0:a1a69d32f310 | 488 | #define VL53L0X_STATE_POWERDOWN ((VL53L0X_State) 0) |
Davidroid | 2:d07edeaff6f1 | 489 | /*!< Device is in HW reset */ |
nikapov | 0:a1a69d32f310 | 490 | #define VL53L0X_STATE_WAIT_STATICINIT ((VL53L0X_State) 1) |
Davidroid | 2:d07edeaff6f1 | 491 | /*!< Device is initialized and wait for static initialization */ |
nikapov | 0:a1a69d32f310 | 492 | #define VL53L0X_STATE_STANDBY ((VL53L0X_State) 2) |
Davidroid | 2:d07edeaff6f1 | 493 | /*!< Device is in Low power Standby mode */ |
nikapov | 0:a1a69d32f310 | 494 | #define VL53L0X_STATE_IDLE ((VL53L0X_State) 3) |
Davidroid | 2:d07edeaff6f1 | 495 | /*!< Device has been initialized and ready to do measurements */ |
nikapov | 0:a1a69d32f310 | 496 | #define VL53L0X_STATE_RUNNING ((VL53L0X_State) 4) |
Davidroid | 2:d07edeaff6f1 | 497 | /*!< Device is performing measurement */ |
nikapov | 0:a1a69d32f310 | 498 | #define VL53L0X_STATE_UNKNOWN ((VL53L0X_State) 98) |
Davidroid | 2:d07edeaff6f1 | 499 | /*!< Device is in unknown state and need to be rebooted */ |
nikapov | 0:a1a69d32f310 | 500 | #define VL53L0X_STATE_ERROR ((VL53L0X_State) 99) |
Davidroid | 2:d07edeaff6f1 | 501 | /*!< Device is in error state and need to be rebooted */ |
nikapov | 0:a1a69d32f310 | 502 | |
nikapov | 0:a1a69d32f310 | 503 | /** @} VL53L0X_define_State_group */ |
nikapov | 0:a1a69d32f310 | 504 | |
nikapov | 0:a1a69d32f310 | 505 | |
nikapov | 0:a1a69d32f310 | 506 | /** @brief Structure containing the Dmax computation parameters and data |
nikapov | 0:a1a69d32f310 | 507 | */ |
nikapov | 0:a1a69d32f310 | 508 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 509 | int32_t AmbTuningWindowFactor_K; |
Davidroid | 2:d07edeaff6f1 | 510 | /*!< internal algo tuning (*1000) */ |
Davidroid | 2:d07edeaff6f1 | 511 | int32_t RetSignalAt0mm; |
Davidroid | 2:d07edeaff6f1 | 512 | /*!< intermediate dmax computation value caching */ |
nikapov | 0:a1a69d32f310 | 513 | } VL53L0X_DMaxData_t; |
nikapov | 0:a1a69d32f310 | 514 | |
nikapov | 0:a1a69d32f310 | 515 | /** |
nikapov | 0:a1a69d32f310 | 516 | * @struct VL53L0X_RangeData_t |
nikapov | 0:a1a69d32f310 | 517 | * @brief Range measurement data. |
nikapov | 0:a1a69d32f310 | 518 | */ |
nikapov | 0:a1a69d32f310 | 519 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 520 | uint32_t TimeStamp; /*!< 32-bit time stamp. */ |
Davidroid | 2:d07edeaff6f1 | 521 | uint32_t MeasurementTimeUsec; |
Davidroid | 2:d07edeaff6f1 | 522 | /*!< Give the Measurement time needed by the device to do the |
Davidroid | 2:d07edeaff6f1 | 523 | * measurement.*/ |
nikapov | 0:a1a69d32f310 | 524 | |
Davidroid | 2:d07edeaff6f1 | 525 | uint16_t RangeMilliMeter; /*!< range distance in millimeter. */ |
nikapov | 0:a1a69d32f310 | 526 | |
Davidroid | 2:d07edeaff6f1 | 527 | uint16_t RangeDMaxMilliMeter; |
Davidroid | 2:d07edeaff6f1 | 528 | /*!< Tells what is the maximum detection distance of the device |
Davidroid | 2:d07edeaff6f1 | 529 | * in current setup and environment conditions (Filled when |
Davidroid | 2:d07edeaff6f1 | 530 | * applicable) */ |
nikapov | 0:a1a69d32f310 | 531 | |
Davidroid | 2:d07edeaff6f1 | 532 | FixPoint1616_t SignalRateRtnMegaCps; |
Davidroid | 2:d07edeaff6f1 | 533 | /*!< Return signal rate (MCPS)\n these is a 16.16 fix point |
Davidroid | 2:d07edeaff6f1 | 534 | * value, which is effectively a measure of target |
Davidroid | 2:d07edeaff6f1 | 535 | * reflectance.*/ |
Davidroid | 2:d07edeaff6f1 | 536 | FixPoint1616_t AmbientRateRtnMegaCps; |
Davidroid | 2:d07edeaff6f1 | 537 | /*!< Return ambient rate (MCPS)\n these is a 16.16 fix point |
Davidroid | 2:d07edeaff6f1 | 538 | * value, which is effectively a measure of the ambien |
Davidroid | 2:d07edeaff6f1 | 539 | * t light.*/ |
nikapov | 0:a1a69d32f310 | 540 | |
Davidroid | 2:d07edeaff6f1 | 541 | uint16_t EffectiveSpadRtnCount; |
Davidroid | 2:d07edeaff6f1 | 542 | /*!< Return the effective SPAD count for the return signal. |
Davidroid | 2:d07edeaff6f1 | 543 | * To obtain Real value it should be divided by 256 */ |
nikapov | 0:a1a69d32f310 | 544 | |
Davidroid | 2:d07edeaff6f1 | 545 | uint8_t ZoneId; |
Davidroid | 2:d07edeaff6f1 | 546 | /*!< Denotes which zone and range scheduler stage the range |
Davidroid | 2:d07edeaff6f1 | 547 | * data relates to. */ |
Davidroid | 2:d07edeaff6f1 | 548 | uint8_t RangeFractionalPart; |
Davidroid | 2:d07edeaff6f1 | 549 | /*!< Fractional part of range distance. Final value is a |
Davidroid | 2:d07edeaff6f1 | 550 | * FixPoint168 value. */ |
Davidroid | 2:d07edeaff6f1 | 551 | uint8_t RangeStatus; |
Davidroid | 2:d07edeaff6f1 | 552 | /*!< Range Status for the current measurement. This is device |
Davidroid | 2:d07edeaff6f1 | 553 | * dependent. Value = 0 means value is valid. |
Davidroid | 2:d07edeaff6f1 | 554 | * See \ref RangeStatusPage */ |
nikapov | 0:a1a69d32f310 | 555 | } VL53L0X_RangingMeasurementData_t; |
nikapov | 0:a1a69d32f310 | 556 | |
nikapov | 0:a1a69d32f310 | 557 | |
nikapov | 0:a1a69d32f310 | 558 | #define VL53L0X_HISTOGRAM_BUFFER_SIZE 24 |
nikapov | 0:a1a69d32f310 | 559 | |
nikapov | 0:a1a69d32f310 | 560 | /** |
nikapov | 0:a1a69d32f310 | 561 | * @struct VL53L0X_HistogramData_t |
nikapov | 0:a1a69d32f310 | 562 | * @brief Histogram measurement data. |
nikapov | 0:a1a69d32f310 | 563 | */ |
nikapov | 0:a1a69d32f310 | 564 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 565 | /* Histogram Measurement data */ |
Davidroid | 2:d07edeaff6f1 | 566 | uint32_t HistogramData[VL53L0X_HISTOGRAM_BUFFER_SIZE]; |
Davidroid | 2:d07edeaff6f1 | 567 | /*!< Histogram data */ |
Davidroid | 2:d07edeaff6f1 | 568 | uint8_t HistogramType; /*!< Indicate the types of histogram data : |
nikapov | 0:a1a69d32f310 | 569 | Return only, Reference only, both Return and Reference */ |
Davidroid | 2:d07edeaff6f1 | 570 | uint8_t FirstBin; /*!< First Bin value */ |
Davidroid | 2:d07edeaff6f1 | 571 | uint8_t BufferSize; /*!< Buffer Size - Set by the user.*/ |
Davidroid | 2:d07edeaff6f1 | 572 | uint8_t NumberOfBins; |
Davidroid | 2:d07edeaff6f1 | 573 | /*!< Number of bins filled by the histogram measurement */ |
nikapov | 0:a1a69d32f310 | 574 | |
Davidroid | 2:d07edeaff6f1 | 575 | VL53L0X_DeviceError ErrorStatus; |
Davidroid | 2:d07edeaff6f1 | 576 | /*!< Error status of the current measurement. \n |
Davidroid | 2:d07edeaff6f1 | 577 | see @a ::VL53L0X_DeviceError @a VL53L0X_GetStatusErrorString() */ |
nikapov | 0:a1a69d32f310 | 578 | } VL53L0X_HistogramMeasurementData_t; |
nikapov | 0:a1a69d32f310 | 579 | |
nikapov | 0:a1a69d32f310 | 580 | #define VL53L0X_REF_SPAD_BUFFER_SIZE 6 |
nikapov | 0:a1a69d32f310 | 581 | |
nikapov | 0:a1a69d32f310 | 582 | /** |
nikapov | 0:a1a69d32f310 | 583 | * @struct VL53L0X_SpadData_t |
nikapov | 0:a1a69d32f310 | 584 | * @brief Spad Configuration Data. |
nikapov | 0:a1a69d32f310 | 585 | */ |
nikapov | 0:a1a69d32f310 | 586 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 587 | uint8_t RefSpadEnables[VL53L0X_REF_SPAD_BUFFER_SIZE]; |
Davidroid | 2:d07edeaff6f1 | 588 | /*!< Reference Spad Enables */ |
Davidroid | 2:d07edeaff6f1 | 589 | uint8_t RefGoodSpadMap[VL53L0X_REF_SPAD_BUFFER_SIZE]; |
Davidroid | 2:d07edeaff6f1 | 590 | /*!< Reference Spad Good Spad Map */ |
nikapov | 0:a1a69d32f310 | 591 | } VL53L0X_SpadData_t; |
nikapov | 0:a1a69d32f310 | 592 | |
nikapov | 0:a1a69d32f310 | 593 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 594 | FixPoint1616_t OscFrequencyMHz; /* Frequency used */ |
nikapov | 0:a1a69d32f310 | 595 | |
Davidroid | 2:d07edeaff6f1 | 596 | uint16_t LastEncodedTimeout; |
Davidroid | 2:d07edeaff6f1 | 597 | /* last encoded Time out used for timing budget*/ |
nikapov | 0:a1a69d32f310 | 598 | |
Davidroid | 2:d07edeaff6f1 | 599 | VL53L0X_GpioFunctionality Pin0GpioFunctionality; |
Davidroid | 2:d07edeaff6f1 | 600 | /* store the functionality of the GPIO: pin0 */ |
nikapov | 0:a1a69d32f310 | 601 | |
Davidroid | 2:d07edeaff6f1 | 602 | uint32_t FinalRangeTimeoutMicroSecs; |
Davidroid | 2:d07edeaff6f1 | 603 | /*!< Execution time of the final range*/ |
Davidroid | 2:d07edeaff6f1 | 604 | uint8_t FinalRangeVcselPulsePeriod; |
Davidroid | 2:d07edeaff6f1 | 605 | /*!< Vcsel pulse period (pll clocks) for the final range measurement*/ |
Davidroid | 2:d07edeaff6f1 | 606 | uint32_t PreRangeTimeoutMicroSecs; |
Davidroid | 2:d07edeaff6f1 | 607 | /*!< Execution time of the final range*/ |
Davidroid | 2:d07edeaff6f1 | 608 | uint8_t PreRangeVcselPulsePeriod; |
Davidroid | 2:d07edeaff6f1 | 609 | /*!< Vcsel pulse period (pll clocks) for the pre-range measurement*/ |
nikapov | 0:a1a69d32f310 | 610 | |
Davidroid | 2:d07edeaff6f1 | 611 | uint16_t SigmaEstRefArray; |
Davidroid | 2:d07edeaff6f1 | 612 | /*!< Reference array sigma value in 1/100th of [mm] e.g. 100 = 1mm */ |
Davidroid | 2:d07edeaff6f1 | 613 | uint16_t SigmaEstEffPulseWidth; |
Davidroid | 2:d07edeaff6f1 | 614 | /*!< Effective Pulse width for sigma estimate in 1/100th |
Davidroid | 2:d07edeaff6f1 | 615 | * of ns e.g. 900 = 9.0ns */ |
Davidroid | 2:d07edeaff6f1 | 616 | uint16_t SigmaEstEffAmbWidth; |
Davidroid | 2:d07edeaff6f1 | 617 | /*!< Effective Ambient width for sigma estimate in 1/100th of ns |
Davidroid | 2:d07edeaff6f1 | 618 | * e.g. 500 = 5.0ns */ |
nikapov | 0:a1a69d32f310 | 619 | |
nikapov | 0:a1a69d32f310 | 620 | |
Davidroid | 2:d07edeaff6f1 | 621 | uint8_t ReadDataFromDeviceDone; /* Indicate if read from device has |
nikapov | 0:a1a69d32f310 | 622 | been done (==1) or not (==0) */ |
Davidroid | 2:d07edeaff6f1 | 623 | uint8_t ModuleId; /* Module ID */ |
Davidroid | 2:d07edeaff6f1 | 624 | uint8_t Revision; /* test Revision */ |
Davidroid | 2:d07edeaff6f1 | 625 | char ProductId[VL53L0X_MAX_STRING_LENGTH]; |
Davidroid | 2:d07edeaff6f1 | 626 | /* Product Identifier String */ |
Davidroid | 2:d07edeaff6f1 | 627 | uint8_t ReferenceSpadCount; /* used for ref spad management */ |
Davidroid | 2:d07edeaff6f1 | 628 | uint8_t ReferenceSpadType; /* used for ref spad management */ |
Davidroid | 2:d07edeaff6f1 | 629 | uint8_t RefSpadsInitialised; /* reports if ref spads are initialised. */ |
Davidroid | 2:d07edeaff6f1 | 630 | uint32_t PartUIDUpper; /*!< Unique Part ID Upper */ |
Davidroid | 2:d07edeaff6f1 | 631 | uint32_t PartUIDLower; /*!< Unique Part ID Lower */ |
Davidroid | 2:d07edeaff6f1 | 632 | FixPoint1616_t SignalRateMeasFixed400mm; /*!< Peek Signal rate |
nikapov | 0:a1a69d32f310 | 633 | at 400 mm*/ |
nikapov | 0:a1a69d32f310 | 634 | |
nikapov | 0:a1a69d32f310 | 635 | } VL53L0X_DeviceSpecificParameters_t; |
nikapov | 0:a1a69d32f310 | 636 | |
nikapov | 0:a1a69d32f310 | 637 | /** |
sepp_nepp | 7:41cbc431e1f4 | 638 | * @struct VL53L0X_Dev_t |
nikapov | 0:a1a69d32f310 | 639 | * |
sepp_nepp | 7:41cbc431e1f4 | 640 | * @brief Generic PAL device type that does link between API and platform abstraction layer |
sepp_nepp | 7:41cbc431e1f4 | 641 | |
sepp_nepp | 7:41cbc431e1f4 | 642 | * merged with VL53L0X_DevData_t that embeds ST FlightSense Dev data |
sepp_nepp | 7:41cbc431e1f4 | 643 | * VL53L0X PAL device ST private data structure \n |
sepp_nepp | 7:41cbc431e1f4 | 644 | * End user should never access any of these field directly \n |
sepp_nepp | 7:41cbc431e1f4 | 645 | * |
nikapov | 0:a1a69d32f310 | 646 | */ |
sepp_nepp | 7:41cbc431e1f4 | 647 | |
nikapov | 0:a1a69d32f310 | 648 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 649 | VL53L0X_DMaxData_t DMaxData; |
Davidroid | 2:d07edeaff6f1 | 650 | /*!< Dmax Data */ |
Davidroid | 2:d07edeaff6f1 | 651 | int32_t Part2PartOffsetNVMMicroMeter; |
Davidroid | 2:d07edeaff6f1 | 652 | /*!< backed up NVM value */ |
Davidroid | 2:d07edeaff6f1 | 653 | int32_t Part2PartOffsetAdjustmentNVMMicroMeter; |
Davidroid | 2:d07edeaff6f1 | 654 | /*!< backed up NVM value representing additional offset adjustment */ |
Davidroid | 2:d07edeaff6f1 | 655 | VL53L0X_DeviceParameters_t CurrentParameters; |
Davidroid | 2:d07edeaff6f1 | 656 | /*!< Current Device Parameter */ |
Davidroid | 2:d07edeaff6f1 | 657 | VL53L0X_RangingMeasurementData_t LastRangeMeasure; |
Davidroid | 2:d07edeaff6f1 | 658 | /*!< Ranging Data */ |
Davidroid | 2:d07edeaff6f1 | 659 | VL53L0X_HistogramMeasurementData_t LastHistogramMeasure; |
Davidroid | 2:d07edeaff6f1 | 660 | /*!< Histogram Data */ |
Davidroid | 2:d07edeaff6f1 | 661 | VL53L0X_DeviceSpecificParameters_t DeviceSpecificParameters; |
Davidroid | 2:d07edeaff6f1 | 662 | /*!< Parameters specific to the device */ |
Davidroid | 2:d07edeaff6f1 | 663 | VL53L0X_SpadData_t SpadData; |
Davidroid | 2:d07edeaff6f1 | 664 | /*!< Spad Data */ |
Davidroid | 2:d07edeaff6f1 | 665 | uint8_t SequenceConfig; |
Davidroid | 2:d07edeaff6f1 | 666 | /*!< Internal value for the sequence config */ |
Davidroid | 2:d07edeaff6f1 | 667 | uint8_t RangeFractionalEnable; |
Davidroid | 2:d07edeaff6f1 | 668 | /*!< Enable/Disable fractional part of ranging data */ |
Davidroid | 2:d07edeaff6f1 | 669 | VL53L0X_State PalState; |
Davidroid | 2:d07edeaff6f1 | 670 | /*!< Current state of the PAL for this device */ |
Davidroid | 2:d07edeaff6f1 | 671 | VL53L0X_PowerModes PowerMode; |
Davidroid | 2:d07edeaff6f1 | 672 | /*!< Current Power Mode */ |
Davidroid | 2:d07edeaff6f1 | 673 | uint16_t SigmaEstRefArray; |
Davidroid | 2:d07edeaff6f1 | 674 | /*!< Reference array sigma value in 1/100th of [mm] e.g. 100 = 1mm */ |
Davidroid | 2:d07edeaff6f1 | 675 | uint16_t SigmaEstEffPulseWidth; |
Davidroid | 2:d07edeaff6f1 | 676 | /*!< Effective Pulse width for sigma estimate in 1/100th |
Davidroid | 2:d07edeaff6f1 | 677 | * of ns e.g. 900 = 9.0ns */ |
Davidroid | 2:d07edeaff6f1 | 678 | uint16_t SigmaEstEffAmbWidth; |
Davidroid | 2:d07edeaff6f1 | 679 | /*!< Effective Ambient width for sigma estimate in 1/100th of ns |
Davidroid | 2:d07edeaff6f1 | 680 | * e.g. 500 = 5.0ns */ |
Davidroid | 2:d07edeaff6f1 | 681 | uint8_t StopVariable; |
Davidroid | 2:d07edeaff6f1 | 682 | /*!< StopVariable used during the stop sequence */ |
Davidroid | 2:d07edeaff6f1 | 683 | uint16_t targetRefRate; |
Davidroid | 2:d07edeaff6f1 | 684 | /*!< Target Ambient Rate for Ref spad management */ |
Davidroid | 2:d07edeaff6f1 | 685 | FixPoint1616_t SigmaEstimate; |
Davidroid | 2:d07edeaff6f1 | 686 | /*!< Sigma Estimate - based on ambient & VCSEL rates and |
Davidroid | 2:d07edeaff6f1 | 687 | * signal_total_events */ |
Davidroid | 2:d07edeaff6f1 | 688 | FixPoint1616_t SignalEstimate; |
Davidroid | 2:d07edeaff6f1 | 689 | /*!< Signal Estimate - based on ambient & VCSEL rates and cross talk */ |
Davidroid | 2:d07edeaff6f1 | 690 | FixPoint1616_t LastSignalRefMcps; |
Davidroid | 2:d07edeaff6f1 | 691 | /*!< Latest Signal ref in Mcps */ |
Davidroid | 2:d07edeaff6f1 | 692 | uint8_t *pTuningSettingsPointer; |
Davidroid | 2:d07edeaff6f1 | 693 | /*!< Pointer for Tuning Settings table */ |
Davidroid | 2:d07edeaff6f1 | 694 | uint8_t UseInternalTuningSettings; |
Davidroid | 2:d07edeaff6f1 | 695 | /*!< Indicate if we use Tuning Settings table */ |
Davidroid | 2:d07edeaff6f1 | 696 | uint16_t LinearityCorrectiveGain; |
Davidroid | 2:d07edeaff6f1 | 697 | /*!< Linearity Corrective Gain value in x1000 */ |
Davidroid | 2:d07edeaff6f1 | 698 | uint16_t DmaxCalRangeMilliMeter; |
Davidroid | 2:d07edeaff6f1 | 699 | /*!< Dmax Calibration Range millimeter */ |
Davidroid | 2:d07edeaff6f1 | 700 | FixPoint1616_t DmaxCalSignalRateRtnMegaCps; |
Davidroid | 2:d07edeaff6f1 | 701 | /*!< Dmax Calibration Signal Rate Return MegaCps */ |
nikapov | 0:a1a69d32f310 | 702 | |
sepp_nepp | 7:41cbc431e1f4 | 703 | /*!< user and application specific fields */ |
sepp_nepp | 5:b95f6951f7d5 | 704 | uint8_t I2cDevAddr; /*!< i2c device address user specific field */ |
sepp_nepp | 5:b95f6951f7d5 | 705 | uint8_t comms_type; /*!< Type of comms : VL53L0X_COMMS_I2C or VL53L0X_COMMS_SPI */ |
sepp_nepp | 5:b95f6951f7d5 | 706 | uint16_t comms_speed_khz; /*!< Comms speed [kHz] : typically 400kHz for I2C */ |
sepp_nepp | 5:b95f6951f7d5 | 707 | |
sepp_nepp | 5:b95f6951f7d5 | 708 | } VL53L0X_Dev_t; |
sepp_nepp | 5:b95f6951f7d5 | 709 | |
sepp_nepp | 5:b95f6951f7d5 | 710 | /** |
sepp_nepp | 5:b95f6951f7d5 | 711 | * @brief Declare the device Handle as a pointer of the structure @a VL53L0X_Dev_t. |
sepp_nepp | 5:b95f6951f7d5 | 712 | */ |
sepp_nepp | 5:b95f6951f7d5 | 713 | typedef VL53L0X_Dev_t *VL53L0X_DEV; |
nikapov | 0:a1a69d32f310 | 714 | |
nikapov | 0:a1a69d32f310 | 715 | |
nikapov | 0:a1a69d32f310 | 716 | /** @defgroup VL53L0X_define_InterruptPolarity_group Defines the Polarity |
nikapov | 0:a1a69d32f310 | 717 | * of the Interrupt |
nikapov | 0:a1a69d32f310 | 718 | * Defines the Polarity of the Interrupt |
nikapov | 0:a1a69d32f310 | 719 | * @{ |
nikapov | 0:a1a69d32f310 | 720 | */ |
nikapov | 0:a1a69d32f310 | 721 | typedef uint8_t VL53L0X_InterruptPolarity; |
nikapov | 0:a1a69d32f310 | 722 | |
nikapov | 0:a1a69d32f310 | 723 | #define VL53L0X_INTERRUPTPOLARITY_LOW ((VL53L0X_InterruptPolarity) 0) |
nikapov | 0:a1a69d32f310 | 724 | /*!< Set active low polarity best setup for falling edge. */ |
nikapov | 0:a1a69d32f310 | 725 | #define VL53L0X_INTERRUPTPOLARITY_HIGH ((VL53L0X_InterruptPolarity) 1) |
nikapov | 0:a1a69d32f310 | 726 | /*!< Set active high polarity best setup for rising edge. */ |
nikapov | 0:a1a69d32f310 | 727 | |
nikapov | 0:a1a69d32f310 | 728 | /** @} VL53L0X_define_InterruptPolarity_group */ |
nikapov | 0:a1a69d32f310 | 729 | |
nikapov | 0:a1a69d32f310 | 730 | |
nikapov | 0:a1a69d32f310 | 731 | /** @defgroup VL53L0X_define_VcselPeriod_group Vcsel Period Defines |
nikapov | 0:a1a69d32f310 | 732 | * Defines the range measurement for which to access the vcsel period. |
nikapov | 0:a1a69d32f310 | 733 | * @{ |
nikapov | 0:a1a69d32f310 | 734 | */ |
nikapov | 0:a1a69d32f310 | 735 | typedef uint8_t VL53L0X_VcselPeriod; |
nikapov | 0:a1a69d32f310 | 736 | |
nikapov | 0:a1a69d32f310 | 737 | #define VL53L0X_VCSEL_PERIOD_PRE_RANGE ((VL53L0X_VcselPeriod) 0) |
nikapov | 0:a1a69d32f310 | 738 | /*!<Identifies the pre-range vcsel period. */ |
nikapov | 0:a1a69d32f310 | 739 | #define VL53L0X_VCSEL_PERIOD_FINAL_RANGE ((VL53L0X_VcselPeriod) 1) |
nikapov | 0:a1a69d32f310 | 740 | /*!<Identifies the final range vcsel period. */ |
nikapov | 0:a1a69d32f310 | 741 | |
nikapov | 0:a1a69d32f310 | 742 | /** @} VL53L0X_define_VcselPeriod_group */ |
nikapov | 0:a1a69d32f310 | 743 | |
nikapov | 0:a1a69d32f310 | 744 | /** @defgroup VL53L0X_define_SchedulerSequence_group Defines the steps |
nikapov | 0:a1a69d32f310 | 745 | * carried out by the scheduler during a range measurement. |
nikapov | 0:a1a69d32f310 | 746 | * @{ |
nikapov | 0:a1a69d32f310 | 747 | * Defines the states of all the steps in the scheduler |
nikapov | 0:a1a69d32f310 | 748 | * i.e. enabled/disabled. |
nikapov | 0:a1a69d32f310 | 749 | */ |
nikapov | 0:a1a69d32f310 | 750 | typedef struct { |
Davidroid | 2:d07edeaff6f1 | 751 | uint8_t TccOn; /*!<Reports if Target Centre Check On */ |
Davidroid | 2:d07edeaff6f1 | 752 | uint8_t MsrcOn; /*!<Reports if MSRC On */ |
Davidroid | 2:d07edeaff6f1 | 753 | uint8_t DssOn; /*!<Reports if DSS On */ |
Davidroid | 2:d07edeaff6f1 | 754 | uint8_t PreRangeOn; /*!<Reports if Pre-Range On */ |
Davidroid | 2:d07edeaff6f1 | 755 | uint8_t FinalRangeOn; /*!<Reports if Final-Range On */ |
nikapov | 0:a1a69d32f310 | 756 | } VL53L0X_SchedulerSequenceSteps_t; |
nikapov | 0:a1a69d32f310 | 757 | |
nikapov | 0:a1a69d32f310 | 758 | /** @} VL53L0X_define_SchedulerSequence_group */ |
nikapov | 0:a1a69d32f310 | 759 | |
nikapov | 0:a1a69d32f310 | 760 | /** @defgroup VL53L0X_define_SequenceStepId_group Defines the Polarity |
nikapov | 0:a1a69d32f310 | 761 | * of the Interrupt |
nikapov | 0:a1a69d32f310 | 762 | * Defines the the sequence steps performed during ranging.. |
nikapov | 0:a1a69d32f310 | 763 | * @{ |
nikapov | 0:a1a69d32f310 | 764 | */ |
nikapov | 0:a1a69d32f310 | 765 | typedef uint8_t VL53L0X_SequenceStepId; |
nikapov | 0:a1a69d32f310 | 766 | |
nikapov | 0:a1a69d32f310 | 767 | #define VL53L0X_SEQUENCESTEP_TCC ((VL53L0X_VcselPeriod) 0) |
nikapov | 0:a1a69d32f310 | 768 | /*!<Target CentreCheck identifier. */ |
nikapov | 0:a1a69d32f310 | 769 | #define VL53L0X_SEQUENCESTEP_DSS ((VL53L0X_VcselPeriod) 1) |
nikapov | 0:a1a69d32f310 | 770 | /*!<Dynamic Spad Selection function Identifier. */ |
nikapov | 0:a1a69d32f310 | 771 | #define VL53L0X_SEQUENCESTEP_MSRC ((VL53L0X_VcselPeriod) 2) |
nikapov | 0:a1a69d32f310 | 772 | /*!<Minimum Signal Rate Check function Identifier. */ |
nikapov | 0:a1a69d32f310 | 773 | #define VL53L0X_SEQUENCESTEP_PRE_RANGE ((VL53L0X_VcselPeriod) 3) |
nikapov | 0:a1a69d32f310 | 774 | /*!<Pre-Range check Identifier. */ |
nikapov | 0:a1a69d32f310 | 775 | #define VL53L0X_SEQUENCESTEP_FINAL_RANGE ((VL53L0X_VcselPeriod) 4) |
nikapov | 0:a1a69d32f310 | 776 | /*!<Final Range Check Identifier. */ |
nikapov | 0:a1a69d32f310 | 777 | |
nikapov | 0:a1a69d32f310 | 778 | #define VL53L0X_SEQUENCESTEP_NUMBER_OF_CHECKS 5 |
nikapov | 0:a1a69d32f310 | 779 | /*!<Number of Sequence Step Managed by the API. */ |
nikapov | 0:a1a69d32f310 | 780 | |
nikapov | 0:a1a69d32f310 | 781 | /** @} VL53L0X_define_SequenceStepId_group */ |
nikapov | 0:a1a69d32f310 | 782 | |
nikapov | 0:a1a69d32f310 | 783 | /* MACRO Definitions */ |
nikapov | 0:a1a69d32f310 | 784 | /** @defgroup VL53L0X_define_GeneralMacro_group General Macro Defines |
nikapov | 0:a1a69d32f310 | 785 | * General Macro Defines |
nikapov | 0:a1a69d32f310 | 786 | * @{ |
nikapov | 0:a1a69d32f310 | 787 | */ |
nikapov | 0:a1a69d32f310 | 788 | |
nikapov | 0:a1a69d32f310 | 789 | /* Defines */ |
nikapov | 0:a1a69d32f310 | 790 | |
nikapov | 0:a1a69d32f310 | 791 | #define VL53L0X_FIXPOINT1616TOFIXPOINT97(Value) \ |
nikapov | 0:a1a69d32f310 | 792 | (uint16_t)((Value>>9)&0xFFFF) |
nikapov | 0:a1a69d32f310 | 793 | #define VL53L0X_FIXPOINT97TOFIXPOINT1616(Value) \ |
nikapov | 0:a1a69d32f310 | 794 | (FixPoint1616_t)(Value<<9) |
nikapov | 0:a1a69d32f310 | 795 | |
nikapov | 0:a1a69d32f310 | 796 | #define VL53L0X_FIXPOINT1616TOFIXPOINT88(Value) \ |
nikapov | 0:a1a69d32f310 | 797 | (uint16_t)((Value>>8)&0xFFFF) |
nikapov | 0:a1a69d32f310 | 798 | #define VL53L0X_FIXPOINT88TOFIXPOINT1616(Value) \ |
nikapov | 0:a1a69d32f310 | 799 | (FixPoint1616_t)(Value<<8) |
nikapov | 0:a1a69d32f310 | 800 | |
nikapov | 0:a1a69d32f310 | 801 | #define VL53L0X_FIXPOINT1616TOFIXPOINT412(Value) \ |
nikapov | 0:a1a69d32f310 | 802 | (uint16_t)((Value>>4)&0xFFFF) |
nikapov | 0:a1a69d32f310 | 803 | #define VL53L0X_FIXPOINT412TOFIXPOINT1616(Value) \ |
nikapov | 0:a1a69d32f310 | 804 | (FixPoint1616_t)(Value<<4) |
nikapov | 0:a1a69d32f310 | 805 | |
nikapov | 0:a1a69d32f310 | 806 | #define VL53L0X_FIXPOINT1616TOFIXPOINT313(Value) \ |
nikapov | 0:a1a69d32f310 | 807 | (uint16_t)((Value>>3)&0xFFFF) |
nikapov | 0:a1a69d32f310 | 808 | #define VL53L0X_FIXPOINT313TOFIXPOINT1616(Value) \ |
nikapov | 0:a1a69d32f310 | 809 | (FixPoint1616_t)(Value<<3) |
nikapov | 0:a1a69d32f310 | 810 | |
nikapov | 0:a1a69d32f310 | 811 | #define VL53L0X_FIXPOINT1616TOFIXPOINT08(Value) \ |
nikapov | 0:a1a69d32f310 | 812 | (uint8_t)((Value>>8)&0x00FF) |
nikapov | 0:a1a69d32f310 | 813 | #define VL53L0X_FIXPOINT08TOFIXPOINT1616(Value) \ |
nikapov | 0:a1a69d32f310 | 814 | (FixPoint1616_t)(Value<<8) |
nikapov | 0:a1a69d32f310 | 815 | |
nikapov | 0:a1a69d32f310 | 816 | #define VL53L0X_FIXPOINT1616TOFIXPOINT53(Value) \ |
nikapov | 0:a1a69d32f310 | 817 | (uint8_t)((Value>>13)&0x00FF) |
nikapov | 0:a1a69d32f310 | 818 | #define VL53L0X_FIXPOINT53TOFIXPOINT1616(Value) \ |
nikapov | 0:a1a69d32f310 | 819 | (FixPoint1616_t)(Value<<13) |
nikapov | 0:a1a69d32f310 | 820 | |
nikapov | 0:a1a69d32f310 | 821 | #define VL53L0X_FIXPOINT1616TOFIXPOINT102(Value) \ |
nikapov | 0:a1a69d32f310 | 822 | (uint16_t)((Value>>14)&0x0FFF) |
nikapov | 0:a1a69d32f310 | 823 | #define VL53L0X_FIXPOINT102TOFIXPOINT1616(Value) \ |
nikapov | 0:a1a69d32f310 | 824 | (FixPoint1616_t)(Value<<12) |
nikapov | 0:a1a69d32f310 | 825 | |
nikapov | 0:a1a69d32f310 | 826 | #define VL53L0X_MAKEUINT16(lsb, msb) (uint16_t)((((uint16_t)msb)<<8) + \ |
nikapov | 0:a1a69d32f310 | 827 | (uint16_t)lsb) |
nikapov | 0:a1a69d32f310 | 828 | |
nikapov | 0:a1a69d32f310 | 829 | /** @} VL53L0X_define_GeneralMacro_group */ |
nikapov | 0:a1a69d32f310 | 830 | |
sepp_nepp | 7:41cbc431e1f4 | 831 | #define REF_ARRAY_SPAD_0 0 |
sepp_nepp | 7:41cbc431e1f4 | 832 | #define REF_ARRAY_SPAD_5 5 |
sepp_nepp | 7:41cbc431e1f4 | 833 | #define REF_ARRAY_SPAD_10 10 |
sepp_nepp | 7:41cbc431e1f4 | 834 | |
sepp_nepp | 7:41cbc431e1f4 | 835 | uint32_t refArrayQuadrants[4] = {REF_ARRAY_SPAD_10,REF_ARRAY_SPAD_5, |
sepp_nepp | 7:41cbc431e1f4 | 836 | REF_ARRAY_SPAD_0,REF_ARRAY_SPAD_5 }; |
nikapov | 0:a1a69d32f310 | 837 | /** @} VL53L0X_globaldefine_group */ |
nikapov | 0:a1a69d32f310 | 838 | |
nikapov | 0:a1a69d32f310 | 839 | #ifdef __cplusplus |
nikapov | 0:a1a69d32f310 | 840 | } |
nikapov | 0:a1a69d32f310 | 841 | #endif |
nikapov | 0:a1a69d32f310 | 842 | |
nikapov | 0:a1a69d32f310 | 843 | #endif /* _VL53L0X_DEF_H_ */ |