Sinan Divarci / Mbed OS max4146x_comp

max4146x_comp

Dependencies:   MAX14690

USBDevice/USBDevice/USBHAL_Maxim.cpp@0:0061165683ee, 2020-10-25 (annotated)

Committer:
sdivarci
Date:
Sun Oct 25 20:10:02 2020 +0000
Revision:
0:0061165683ee
sdivarci

Who changed what in which revision?

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sdivarci 0:0061165683ee 1 /*******************************************************************************
sdivarci 0:0061165683ee 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
sdivarci 0:0061165683ee 3 *
sdivarci 0:0061165683ee 4 * Permission is hereby granted, free of charge, to any person obtaining a
sdivarci 0:0061165683ee 5 * copy of this software and associated documentation files (the "Software"),
sdivarci 0:0061165683ee 6 * to deal in the Software without restriction, including without limitation
sdivarci 0:0061165683ee 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sdivarci 0:0061165683ee 8 * and/or sell copies of the Software, and to permit persons to whom the
sdivarci 0:0061165683ee 9 * Software is furnished to do so, subject to the following conditions:
sdivarci 0:0061165683ee 10 *
sdivarci 0:0061165683ee 11 * The above copyright notice and this permission notice shall be included
sdivarci 0:0061165683ee 12 * in all copies or substantial portions of the Software.
sdivarci 0:0061165683ee 13 *
sdivarci 0:0061165683ee 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sdivarci 0:0061165683ee 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sdivarci 0:0061165683ee 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sdivarci 0:0061165683ee 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sdivarci 0:0061165683ee 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sdivarci 0:0061165683ee 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sdivarci 0:0061165683ee 20 * OTHER DEALINGS IN THE SOFTWARE.
sdivarci 0:0061165683ee 21 *
sdivarci 0:0061165683ee 22 * Except as contained in this notice, the name of Maxim Integrated
sdivarci 0:0061165683ee 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sdivarci 0:0061165683ee 24 * Products, Inc. Branding Policy.
sdivarci 0:0061165683ee 25 *
sdivarci 0:0061165683ee 26 * The mere transfer of this software does not imply any licenses
sdivarci 0:0061165683ee 27 * of trade secrets, proprietary technology, copyrights, patents,
sdivarci 0:0061165683ee 28 * trademarks, maskwork rights, or any other form of intellectual
sdivarci 0:0061165683ee 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
sdivarci 0:0061165683ee 30 * ownership rights.
sdivarci 0:0061165683ee 31 *******************************************************************************
sdivarci 0:0061165683ee 32 */
sdivarci 0:0061165683ee 33
sdivarci 0:0061165683ee 34 #if defined(TARGET_Maxim)
sdivarci 0:0061165683ee 35
sdivarci 0:0061165683ee 36 #include "USBHAL.h"
sdivarci 0:0061165683ee 37 #include "usb_regs.h"
sdivarci 0:0061165683ee 38 #include "clkman_regs.h"
sdivarci 0:0061165683ee 39
sdivarci 0:0061165683ee 40 #if defined(TARGET_MAX32625) || defined(TARGET_MAX32630)
sdivarci 0:0061165683ee 41 #include "pwrman_regs.h"
sdivarci 0:0061165683ee 42 #endif
sdivarci 0:0061165683ee 43
sdivarci 0:0061165683ee 44 #define CONNECT_INTS (MXC_F_USB_DEV_INTEN_BRST | MXC_F_USB_DEV_INTEN_SETUP | MXC_F_USB_DEV_INTEN_EP_IN | MXC_F_USB_DEV_INTEN_EP_OUT | MXC_F_USB_DEV_INTEN_DMA_ERR)
sdivarci 0:0061165683ee 45
sdivarci 0:0061165683ee 46 USBHAL *USBHAL::instance;
sdivarci 0:0061165683ee 47
sdivarci 0:0061165683ee 48 typedef struct {
sdivarci 0:0061165683ee 49 volatile uint32_t buf0_desc;
sdivarci 0:0061165683ee 50 volatile uint32_t buf0_address;
sdivarci 0:0061165683ee 51 volatile uint32_t buf1_desc;
sdivarci 0:0061165683ee 52 volatile uint32_t buf1_address;
sdivarci 0:0061165683ee 53 } ep_buffer_t;
sdivarci 0:0061165683ee 54
sdivarci 0:0061165683ee 55 typedef struct {
sdivarci 0:0061165683ee 56 ep_buffer_t out_buffer;
sdivarci 0:0061165683ee 57 ep_buffer_t in_buffer;
sdivarci 0:0061165683ee 58 } ep0_buffer_t;
sdivarci 0:0061165683ee 59
sdivarci 0:0061165683ee 60 typedef struct {
sdivarci 0:0061165683ee 61 ep0_buffer_t ep0;
sdivarci 0:0061165683ee 62 ep_buffer_t ep[MXC_USB_NUM_EP - 1];
sdivarci 0:0061165683ee 63 } ep_buffer_descriptor_t;
sdivarci 0:0061165683ee 64
sdivarci 0:0061165683ee 65 // Static storage for endpoint buffer descriptor table. Must be 512 byte aligned for DMA.
sdivarci 0:0061165683ee 66 #ifdef __IAR_SYSTEMS_ICC__
sdivarci 0:0061165683ee 67 #pragma data_alignment = 512
sdivarci 0:0061165683ee 68 #else
sdivarci 0:0061165683ee 69 __attribute__ ((aligned (512)))
sdivarci 0:0061165683ee 70 #endif
sdivarci 0:0061165683ee 71 ep_buffer_descriptor_t ep_buffer_descriptor;
sdivarci 0:0061165683ee 72
sdivarci 0:0061165683ee 73 // static storage for temporary data buffers. Must be 32 byte aligned.
sdivarci 0:0061165683ee 74 #ifdef __IAR_SYSTEMS_ICC__
sdivarci 0:0061165683ee 75 #pragma data_alignment = 4
sdivarci 0:0061165683ee 76 #else
sdivarci 0:0061165683ee 77 __attribute__ ((aligned (4)))
sdivarci 0:0061165683ee 78 #endif
sdivarci 0:0061165683ee 79 static uint8_t aligned_buffer[NUMBER_OF_LOGICAL_ENDPOINTS][MXC_USB_MAX_PACKET];
sdivarci 0:0061165683ee 80
sdivarci 0:0061165683ee 81 // control packet state
sdivarci 0:0061165683ee 82 static enum {
sdivarci 0:0061165683ee 83 CTRL_NONE = 0,
sdivarci 0:0061165683ee 84 CTRL_SETUP,
sdivarci 0:0061165683ee 85 CTRL_OUT,
sdivarci 0:0061165683ee 86 CTRL_IN,
sdivarci 0:0061165683ee 87 } control_state;
sdivarci 0:0061165683ee 88
sdivarci 0:0061165683ee 89 USBHAL::USBHAL(void)
sdivarci 0:0061165683ee 90 {
sdivarci 0:0061165683ee 91 NVIC_DisableIRQ(USB_IRQn);
sdivarci 0:0061165683ee 92
sdivarci 0:0061165683ee 93 #if defined(TARGET_MAX32600)
sdivarci 0:0061165683ee 94 // The PLL must be enabled for USB
sdivarci 0:0061165683ee 95 MBED_ASSERT(MXC_CLKMAN->clk_config & MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE);
sdivarci 0:0061165683ee 96
sdivarci 0:0061165683ee 97 // Enable the USB clock
sdivarci 0:0061165683ee 98 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N;
sdivarci 0:0061165683ee 99 #elif defined(TARGET_MAX32620)
sdivarci 0:0061165683ee 100 // Enable the USB clock
sdivarci 0:0061165683ee 101 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_CLOCK_ENABLE;
sdivarci 0:0061165683ee 102 #elif defined(TARGET_MAX32625) || defined(TARGET_MAX32630)
sdivarci 0:0061165683ee 103 MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED;
sdivarci 0:0061165683ee 104 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_CLOCK_ENABLE;
sdivarci 0:0061165683ee 105 #endif
sdivarci 0:0061165683ee 106
sdivarci 0:0061165683ee 107 // reset the device
sdivarci 0:0061165683ee 108 MXC_USB->cn = 0;
sdivarci 0:0061165683ee 109 MXC_USB->cn = MXC_F_USB_CN_USB_EN;
sdivarci 0:0061165683ee 110 MXC_USB->dev_inten = 0;
sdivarci 0:0061165683ee 111 MXC_USB->dev_cn = 0;
sdivarci 0:0061165683ee 112 MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
sdivarci 0:0061165683ee 113 MXC_USB->dev_cn = 0;
sdivarci 0:0061165683ee 114
sdivarci 0:0061165683ee 115 // fill in callback arrays
sdivarci 0:0061165683ee 116 epCallback[EP0OUT] = NULL;
sdivarci 0:0061165683ee 117 epCallback[EP0IN] = NULL;
sdivarci 0:0061165683ee 118 epCallback[EP1OUT] = &USBHAL::EP1_OUT_callback;
sdivarci 0:0061165683ee 119 epCallback[EP1IN ] = &USBHAL::EP1_IN_callback;
sdivarci 0:0061165683ee 120 epCallback[EP2OUT] = &USBHAL::EP2_OUT_callback;
sdivarci 0:0061165683ee 121 epCallback[EP2IN ] = &USBHAL::EP2_IN_callback;
sdivarci 0:0061165683ee 122 epCallback[EP3OUT] = &USBHAL::EP3_OUT_callback;
sdivarci 0:0061165683ee 123 epCallback[EP3IN ] = &USBHAL::EP3_IN_callback;
sdivarci 0:0061165683ee 124 epCallback[EP4OUT] = &USBHAL::EP4_OUT_callback;
sdivarci 0:0061165683ee 125 epCallback[EP4IN ] = &USBHAL::EP4_IN_callback;
sdivarci 0:0061165683ee 126 epCallback[EP5OUT] = &USBHAL::EP5_OUT_callback;
sdivarci 0:0061165683ee 127 epCallback[EP5IN ] = &USBHAL::EP5_IN_callback;
sdivarci 0:0061165683ee 128 epCallback[EP6OUT] = &USBHAL::EP6_OUT_callback;
sdivarci 0:0061165683ee 129 epCallback[EP6IN ] = &USBHAL::EP6_IN_callback;
sdivarci 0:0061165683ee 130 epCallback[EP7OUT] = &USBHAL::EP7_OUT_callback;
sdivarci 0:0061165683ee 131 epCallback[EP7IN ] = &USBHAL::EP7_IN_callback;
sdivarci 0:0061165683ee 132
sdivarci 0:0061165683ee 133 // clear driver state
sdivarci 0:0061165683ee 134 control_state = CTRL_NONE;
sdivarci 0:0061165683ee 135
sdivarci 0:0061165683ee 136 // set the descriptor location
sdivarci 0:0061165683ee 137 MXC_USB->ep_base = (uint32_t)&ep_buffer_descriptor;
sdivarci 0:0061165683ee 138
sdivarci 0:0061165683ee 139 // enable VBUS interrupts
sdivarci 0:0061165683ee 140 MXC_USB->dev_inten = MXC_F_USB_DEV_INTEN_NO_VBUS | MXC_F_USB_DEV_INTEN_VBUS;
sdivarci 0:0061165683ee 141
sdivarci 0:0061165683ee 142 // attach IRQ handler and enable interrupts
sdivarci 0:0061165683ee 143 instance = this;
sdivarci 0:0061165683ee 144 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
sdivarci 0:0061165683ee 145 NVIC_EnableIRQ(USB_IRQn);
sdivarci 0:0061165683ee 146 }
sdivarci 0:0061165683ee 147
sdivarci 0:0061165683ee 148 USBHAL::~USBHAL(void)
sdivarci 0:0061165683ee 149 {
sdivarci 0:0061165683ee 150 MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
sdivarci 0:0061165683ee 151 MXC_USB->dev_cn = 0;
sdivarci 0:0061165683ee 152 MXC_USB->cn = 0;
sdivarci 0:0061165683ee 153 }
sdivarci 0:0061165683ee 154
sdivarci 0:0061165683ee 155 void USBHAL::connect(void)
sdivarci 0:0061165683ee 156 {
sdivarci 0:0061165683ee 157 // enable interrupts
sdivarci 0:0061165683ee 158 MXC_USB->dev_inten |= CONNECT_INTS;
sdivarci 0:0061165683ee 159
sdivarci 0:0061165683ee 160 // allow interrupts on ep0
sdivarci 0:0061165683ee 161 MXC_USB->ep[0] |= MXC_F_USB_EP_INT_EN;
sdivarci 0:0061165683ee 162
sdivarci 0:0061165683ee 163 // pullup enable
sdivarci 0:0061165683ee 164 MXC_USB->dev_cn |= (MXC_F_USB_DEV_CN_CONNECT | MXC_F_USB_DEV_CN_FIFO_MODE);
sdivarci 0:0061165683ee 165 }
sdivarci 0:0061165683ee 166
sdivarci 0:0061165683ee 167 void USBHAL::disconnect(void)
sdivarci 0:0061165683ee 168 {
sdivarci 0:0061165683ee 169 // disable interrupts
sdivarci 0:0061165683ee 170 MXC_USB->dev_inten &= ~CONNECT_INTS;
sdivarci 0:0061165683ee 171
sdivarci 0:0061165683ee 172 // disable pullup
sdivarci 0:0061165683ee 173 MXC_USB->dev_cn &= ~MXC_F_USB_DEV_CN_CONNECT;
sdivarci 0:0061165683ee 174 }
sdivarci 0:0061165683ee 175
sdivarci 0:0061165683ee 176 void USBHAL::configureDevice(void)
sdivarci 0:0061165683ee 177 {
sdivarci 0:0061165683ee 178 // do nothing
sdivarci 0:0061165683ee 179 }
sdivarci 0:0061165683ee 180
sdivarci 0:0061165683ee 181 void USBHAL::unconfigureDevice(void)
sdivarci 0:0061165683ee 182 {
sdivarci 0:0061165683ee 183 // reset endpoints
sdivarci 0:0061165683ee 184 for (int i = 0; i < MXC_USB_NUM_EP; i++) {
sdivarci 0:0061165683ee 185 // Disable endpoint and clear the data toggle
sdivarci 0:0061165683ee 186 MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
sdivarci 0:0061165683ee 187 MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
sdivarci 0:0061165683ee 188 }
sdivarci 0:0061165683ee 189 }
sdivarci 0:0061165683ee 190
sdivarci 0:0061165683ee 191 void USBHAL::setAddress(uint8_t address)
sdivarci 0:0061165683ee 192 {
sdivarci 0:0061165683ee 193 // do nothing
sdivarci 0:0061165683ee 194 }
sdivarci 0:0061165683ee 195
sdivarci 0:0061165683ee 196 void USBHAL::remoteWakeup(void)
sdivarci 0:0061165683ee 197 {
sdivarci 0:0061165683ee 198 // do nothing
sdivarci 0:0061165683ee 199 }
sdivarci 0:0061165683ee 200
sdivarci 0:0061165683ee 201 static ep_buffer_t *get_desc(uint8_t endpoint)
sdivarci 0:0061165683ee 202 {
sdivarci 0:0061165683ee 203 uint8_t epnum = EP_NUM(endpoint);
sdivarci 0:0061165683ee 204 ep_buffer_t *desc;
sdivarci 0:0061165683ee 205
sdivarci 0:0061165683ee 206 if (epnum == 0) {
sdivarci 0:0061165683ee 207 if (IN_EP(endpoint)) {
sdivarci 0:0061165683ee 208 desc = &ep_buffer_descriptor.ep0.in_buffer;
sdivarci 0:0061165683ee 209 } else {
sdivarci 0:0061165683ee 210 desc = &ep_buffer_descriptor.ep0.out_buffer;
sdivarci 0:0061165683ee 211 }
sdivarci 0:0061165683ee 212 } else {
sdivarci 0:0061165683ee 213 desc = &ep_buffer_descriptor.ep[epnum - 1];
sdivarci 0:0061165683ee 214 }
sdivarci 0:0061165683ee 215
sdivarci 0:0061165683ee 216 return desc;
sdivarci 0:0061165683ee 217 }
sdivarci 0:0061165683ee 218
sdivarci 0:0061165683ee 219 void USBHAL::EP0setup(uint8_t *buffer)
sdivarci 0:0061165683ee 220 {
sdivarci 0:0061165683ee 221 // Setup packet is fixed at 8 bytes
sdivarci 0:0061165683ee 222 // Setup registers cannot be read in byte mode
sdivarci 0:0061165683ee 223 uint32_t *ptr32 = (uint32_t*)buffer;
sdivarci 0:0061165683ee 224 ptr32[0] = (uint32_t)MXC_USB->setup0;
sdivarci 0:0061165683ee 225 ptr32[1] = (uint32_t)MXC_USB->setup1;
sdivarci 0:0061165683ee 226 }
sdivarci 0:0061165683ee 227
sdivarci 0:0061165683ee 228 void USBHAL::EP0read(void)
sdivarci 0:0061165683ee 229 {
sdivarci 0:0061165683ee 230 if (control_state == CTRL_IN) {
sdivarci 0:0061165683ee 231 // This is the status stage. ACK.
sdivarci 0:0061165683ee 232 MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
sdivarci 0:0061165683ee 233 control_state = CTRL_NONE;
sdivarci 0:0061165683ee 234 return;
sdivarci 0:0061165683ee 235 }
sdivarci 0:0061165683ee 236
sdivarci 0:0061165683ee 237 control_state = CTRL_OUT;
sdivarci 0:0061165683ee 238
sdivarci 0:0061165683ee 239 endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
sdivarci 0:0061165683ee 240 }
sdivarci 0:0061165683ee 241
sdivarci 0:0061165683ee 242 void USBHAL::EP0readStage(void)
sdivarci 0:0061165683ee 243 {
sdivarci 0:0061165683ee 244 // do nothing
sdivarci 0:0061165683ee 245 }
sdivarci 0:0061165683ee 246
sdivarci 0:0061165683ee 247 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
sdivarci 0:0061165683ee 248 {
sdivarci 0:0061165683ee 249 uint32_t size;
sdivarci 0:0061165683ee 250
sdivarci 0:0061165683ee 251 if (MXC_USB->out_owner & 1) {
sdivarci 0:0061165683ee 252 return 0;
sdivarci 0:0061165683ee 253 }
sdivarci 0:0061165683ee 254
sdivarci 0:0061165683ee 255 // get the packet length and contents
sdivarci 0:0061165683ee 256 ep_buffer_t *desc = get_desc(EP0OUT);
sdivarci 0:0061165683ee 257 size = desc->buf0_desc;
sdivarci 0:0061165683ee 258 memcpy(buffer, aligned_buffer[0], size);
sdivarci 0:0061165683ee 259
sdivarci 0:0061165683ee 260 return size;
sdivarci 0:0061165683ee 261 }
sdivarci 0:0061165683ee 262
sdivarci 0:0061165683ee 263 void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
sdivarci 0:0061165683ee 264 {
sdivarci 0:0061165683ee 265 if ((size == 0) && (control_state != CTRL_IN)) {
sdivarci 0:0061165683ee 266 // This is a status stage ACK. Handle in hardware.
sdivarci 0:0061165683ee 267 MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
sdivarci 0:0061165683ee 268 control_state = CTRL_NONE;
sdivarci 0:0061165683ee 269 return;
sdivarci 0:0061165683ee 270 }
sdivarci 0:0061165683ee 271
sdivarci 0:0061165683ee 272 control_state = CTRL_IN;
sdivarci 0:0061165683ee 273
sdivarci 0:0061165683ee 274 endpointWrite(EP0IN, buffer, size);
sdivarci 0:0061165683ee 275 }
sdivarci 0:0061165683ee 276
sdivarci 0:0061165683ee 277 void USBHAL::EP0stall(void)
sdivarci 0:0061165683ee 278 {
sdivarci 0:0061165683ee 279 stallEndpoint(0);
sdivarci 0:0061165683ee 280 }
sdivarci 0:0061165683ee 281
sdivarci 0:0061165683ee 282 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
sdivarci 0:0061165683ee 283 {
sdivarci 0:0061165683ee 284 uint8_t epnum = EP_NUM(endpoint);
sdivarci 0:0061165683ee 285
sdivarci 0:0061165683ee 286 if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
sdivarci 0:0061165683ee 287 return EP_INVALID;
sdivarci 0:0061165683ee 288 }
sdivarci 0:0061165683ee 289
sdivarci 0:0061165683ee 290 if (maximumSize > MXC_USB_MAX_PACKET) {
sdivarci 0:0061165683ee 291 return EP_INVALID;
sdivarci 0:0061165683ee 292 }
sdivarci 0:0061165683ee 293
sdivarci 0:0061165683ee 294 uint32_t mask = (1 << epnum);
sdivarci 0:0061165683ee 295 if (MXC_USB->out_owner & mask) {
sdivarci 0:0061165683ee 296 return EP_INVALID;
sdivarci 0:0061165683ee 297 }
sdivarci 0:0061165683ee 298
sdivarci 0:0061165683ee 299 ep_buffer_t *desc = get_desc(endpoint);
sdivarci 0:0061165683ee 300 desc->buf0_desc = maximumSize;
sdivarci 0:0061165683ee 301 desc->buf0_address = (uint32_t)aligned_buffer[epnum];
sdivarci 0:0061165683ee 302
sdivarci 0:0061165683ee 303 MXC_USB->out_owner = mask;
sdivarci 0:0061165683ee 304
sdivarci 0:0061165683ee 305 return EP_PENDING;
sdivarci 0:0061165683ee 306 }
sdivarci 0:0061165683ee 307
sdivarci 0:0061165683ee 308 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead)
sdivarci 0:0061165683ee 309 {
sdivarci 0:0061165683ee 310 if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
sdivarci 0:0061165683ee 311 return EP_INVALID;
sdivarci 0:0061165683ee 312 }
sdivarci 0:0061165683ee 313
sdivarci 0:0061165683ee 314 uint32_t mask = (1 << EP_NUM(endpoint));
sdivarci 0:0061165683ee 315 if (MXC_USB->out_owner & mask) {
sdivarci 0:0061165683ee 316 return EP_PENDING;
sdivarci 0:0061165683ee 317 }
sdivarci 0:0061165683ee 318
sdivarci 0:0061165683ee 319 // get the packet length and contents
sdivarci 0:0061165683ee 320 ep_buffer_t *desc = get_desc(endpoint);
sdivarci 0:0061165683ee 321 *bytesRead = desc->buf0_desc;
sdivarci 0:0061165683ee 322 memcpy(data, aligned_buffer[EP_NUM(endpoint)], *bytesRead);
sdivarci 0:0061165683ee 323
sdivarci 0:0061165683ee 324 return EP_COMPLETED;
sdivarci 0:0061165683ee 325 }
sdivarci 0:0061165683ee 326
sdivarci 0:0061165683ee 327 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
sdivarci 0:0061165683ee 328 {
sdivarci 0:0061165683ee 329 uint8_t epnum = EP_NUM(endpoint);
sdivarci 0:0061165683ee 330
sdivarci 0:0061165683ee 331 if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || OUT_EP(endpoint)) {
sdivarci 0:0061165683ee 332 return EP_INVALID;
sdivarci 0:0061165683ee 333 }
sdivarci 0:0061165683ee 334
sdivarci 0:0061165683ee 335 if (size > MXC_USB_MAX_PACKET) {
sdivarci 0:0061165683ee 336 return EP_INVALID;
sdivarci 0:0061165683ee 337 }
sdivarci 0:0061165683ee 338
sdivarci 0:0061165683ee 339 uint32_t mask = (1 << epnum);
sdivarci 0:0061165683ee 340 if (MXC_USB->in_owner & mask) {
sdivarci 0:0061165683ee 341 return EP_INVALID;
sdivarci 0:0061165683ee 342 }
sdivarci 0:0061165683ee 343
sdivarci 0:0061165683ee 344 memcpy(aligned_buffer[epnum], data, size);
sdivarci 0:0061165683ee 345
sdivarci 0:0061165683ee 346 ep_buffer_t *desc = get_desc(endpoint);
sdivarci 0:0061165683ee 347 desc->buf0_desc = size;
sdivarci 0:0061165683ee 348 desc->buf0_address = (uint32_t)aligned_buffer[epnum];
sdivarci 0:0061165683ee 349
sdivarci 0:0061165683ee 350 // start the DMA
sdivarci 0:0061165683ee 351 MXC_USB->in_owner = mask;
sdivarci 0:0061165683ee 352
sdivarci 0:0061165683ee 353 return EP_PENDING;
sdivarci 0:0061165683ee 354 }
sdivarci 0:0061165683ee 355
sdivarci 0:0061165683ee 356 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
sdivarci 0:0061165683ee 357 {
sdivarci 0:0061165683ee 358 uint32_t mask = (1 << EP_NUM(endpoint));
sdivarci 0:0061165683ee 359 if (MXC_USB->in_owner & mask) {
sdivarci 0:0061165683ee 360 return EP_PENDING;
sdivarci 0:0061165683ee 361 }
sdivarci 0:0061165683ee 362
sdivarci 0:0061165683ee 363 return EP_COMPLETED;
sdivarci 0:0061165683ee 364 }
sdivarci 0:0061165683ee 365
sdivarci 0:0061165683ee 366 void USBHAL::stallEndpoint(uint8_t endpoint)
sdivarci 0:0061165683ee 367 {
sdivarci 0:0061165683ee 368 uint8_t epnum = EP_NUM(endpoint);
sdivarci 0:0061165683ee 369
sdivarci 0:0061165683ee 370 if (epnum == 0) {
sdivarci 0:0061165683ee 371 MXC_USB->ep[epnum] |= MXC_F_USB_EP_ST_STALL;
sdivarci 0:0061165683ee 372 }
sdivarci 0:0061165683ee 373
sdivarci 0:0061165683ee 374 MXC_USB->ep[epnum] |= MXC_F_USB_EP_STALL;
sdivarci 0:0061165683ee 375 }
sdivarci 0:0061165683ee 376
sdivarci 0:0061165683ee 377 void USBHAL::unstallEndpoint(uint8_t endpoint)
sdivarci 0:0061165683ee 378 {
sdivarci 0:0061165683ee 379 MXC_USB->ep[EP_NUM(endpoint)] &= ~MXC_F_USB_EP_STALL;
sdivarci 0:0061165683ee 380 }
sdivarci 0:0061165683ee 381
sdivarci 0:0061165683ee 382 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options)
sdivarci 0:0061165683ee 383 {
sdivarci 0:0061165683ee 384 uint8_t epnum = EP_NUM(endpoint);
sdivarci 0:0061165683ee 385 uint32_t ep_ctrl;
sdivarci 0:0061165683ee 386
sdivarci 0:0061165683ee 387 if (epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) {
sdivarci 0:0061165683ee 388 return false;
sdivarci 0:0061165683ee 389 }
sdivarci 0:0061165683ee 390
sdivarci 0:0061165683ee 391 if (IN_EP(endpoint)) {
sdivarci 0:0061165683ee 392 ep_ctrl = (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS);
sdivarci 0:0061165683ee 393 } else {
sdivarci 0:0061165683ee 394 ep_ctrl = (MXC_S_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS);
sdivarci 0:0061165683ee 395 }
sdivarci 0:0061165683ee 396
sdivarci 0:0061165683ee 397 ep_ctrl |= (MXC_F_USB_EP_DT | MXC_F_USB_EP_INT_EN);
sdivarci 0:0061165683ee 398
sdivarci 0:0061165683ee 399 MXC_USB->ep[epnum] = ep_ctrl;
sdivarci 0:0061165683ee 400
sdivarci 0:0061165683ee 401 return true;
sdivarci 0:0061165683ee 402 }
sdivarci 0:0061165683ee 403
sdivarci 0:0061165683ee 404 bool USBHAL::getEndpointStallState(unsigned char endpoint)
sdivarci 0:0061165683ee 405 {
sdivarci 0:0061165683ee 406 return !!(MXC_USB->ep[endpoint] & MXC_F_USB_EP_STALL);
sdivarci 0:0061165683ee 407 }
sdivarci 0:0061165683ee 408
sdivarci 0:0061165683ee 409 void USBHAL::_usbisr(void)
sdivarci 0:0061165683ee 410 {
sdivarci 0:0061165683ee 411 instance->usbisr();
sdivarci 0:0061165683ee 412 }
sdivarci 0:0061165683ee 413
sdivarci 0:0061165683ee 414 void USBHAL::usbisr(void)
sdivarci 0:0061165683ee 415 {
sdivarci 0:0061165683ee 416 // get and clear irqs
sdivarci 0:0061165683ee 417 uint32_t irq_flags = MXC_USB->dev_intfl;
sdivarci 0:0061165683ee 418 MXC_USB->dev_intfl = irq_flags;
sdivarci 0:0061165683ee 419
sdivarci 0:0061165683ee 420 // process only enabled interrupts
sdivarci 0:0061165683ee 421 irq_flags &= MXC_USB->dev_inten;
sdivarci 0:0061165683ee 422
sdivarci 0:0061165683ee 423 // suspend
sdivarci 0:0061165683ee 424 if (irq_flags & MXC_F_USB_DEV_INTFL_SUSP) {
sdivarci 0:0061165683ee 425 suspendStateChanged(1);
sdivarci 0:0061165683ee 426 }
sdivarci 0:0061165683ee 427
sdivarci 0:0061165683ee 428 // bus reset
sdivarci 0:0061165683ee 429 if (irq_flags & MXC_F_USB_DEV_INTFL_BRST) {
sdivarci 0:0061165683ee 430
sdivarci 0:0061165683ee 431 // reset endpoints
sdivarci 0:0061165683ee 432 for (int i = 0; i < MXC_USB_NUM_EP; i++) {
sdivarci 0:0061165683ee 433 // Disable endpoint and clear the data toggle
sdivarci 0:0061165683ee 434 MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
sdivarci 0:0061165683ee 435 MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
sdivarci 0:0061165683ee 436 }
sdivarci 0:0061165683ee 437
sdivarci 0:0061165683ee 438 // clear driver state
sdivarci 0:0061165683ee 439 control_state = CTRL_NONE;
sdivarci 0:0061165683ee 440
sdivarci 0:0061165683ee 441 busReset();
sdivarci 0:0061165683ee 442
sdivarci 0:0061165683ee 443 // no need to process events after reset
sdivarci 0:0061165683ee 444 return;
sdivarci 0:0061165683ee 445 }
sdivarci 0:0061165683ee 446
sdivarci 0:0061165683ee 447 // Setup packet
sdivarci 0:0061165683ee 448 if (irq_flags & MXC_F_USB_DEV_INTFL_SETUP) {
sdivarci 0:0061165683ee 449 control_state = CTRL_SETUP;
sdivarci 0:0061165683ee 450 EP0setupCallback();
sdivarci 0:0061165683ee 451 }
sdivarci 0:0061165683ee 452
sdivarci 0:0061165683ee 453 // IN packets
sdivarci 0:0061165683ee 454 if (irq_flags & MXC_F_USB_DEV_INTFL_EP_IN) {
sdivarci 0:0061165683ee 455 // get and clear IN irqs
sdivarci 0:0061165683ee 456 uint32_t in_irqs = MXC_USB->in_int;
sdivarci 0:0061165683ee 457 MXC_USB->in_int = in_irqs;
sdivarci 0:0061165683ee 458
sdivarci 0:0061165683ee 459 if (in_irqs & 1) {
sdivarci 0:0061165683ee 460 EP0in();
sdivarci 0:0061165683ee 461 }
sdivarci 0:0061165683ee 462
sdivarci 0:0061165683ee 463 for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
sdivarci 0:0061165683ee 464 uint32_t irq_mask = (1 << epnum);
sdivarci 0:0061165683ee 465 if (in_irqs & irq_mask) {
sdivarci 0:0061165683ee 466 uint8_t endpoint = (epnum << 1) | DIR_IN;
sdivarci 0:0061165683ee 467 (instance->*(epCallback[endpoint]))();
sdivarci 0:0061165683ee 468 }
sdivarci 0:0061165683ee 469 }
sdivarci 0:0061165683ee 470 }
sdivarci 0:0061165683ee 471
sdivarci 0:0061165683ee 472 // OUT packets
sdivarci 0:0061165683ee 473 if (irq_flags & MXC_F_USB_DEV_INTFL_EP_OUT) {
sdivarci 0:0061165683ee 474 // get and clear OUT irqs
sdivarci 0:0061165683ee 475 uint32_t out_irqs = MXC_USB->out_int;
sdivarci 0:0061165683ee 476 MXC_USB->out_int = out_irqs;
sdivarci 0:0061165683ee 477
sdivarci 0:0061165683ee 478 if (out_irqs & 1) {
sdivarci 0:0061165683ee 479 EP0out();
sdivarci 0:0061165683ee 480 }
sdivarci 0:0061165683ee 481
sdivarci 0:0061165683ee 482 for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
sdivarci 0:0061165683ee 483 uint32_t irq_mask = (1 << epnum);
sdivarci 0:0061165683ee 484 if (out_irqs & irq_mask) {
sdivarci 0:0061165683ee 485 uint8_t endpoint = (epnum << 1) | DIR_OUT;
sdivarci 0:0061165683ee 486 (instance->*(epCallback[endpoint]))();
sdivarci 0:0061165683ee 487 }
sdivarci 0:0061165683ee 488 }
sdivarci 0:0061165683ee 489 }
sdivarci 0:0061165683ee 490 }
sdivarci 0:0061165683ee 491
sdivarci 0:0061165683ee 492 #endif