Sinan Divarci / Mbed OS max4146x_comp

max4146x_comp

Dependencies:   MAX14690

USBDevice/USBDevice/USBHAL_LPC40.cpp@0:0061165683ee, 2020-10-25 (annotated)

Committer:
sdivarci
Date:
Sun Oct 25 20:10:02 2020 +0000
Revision:
0:0061165683ee
sdivarci

Who changed what in which revision?

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sdivarci 0:0061165683ee 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
sdivarci 0:0061165683ee 2 *
sdivarci 0:0061165683ee 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
sdivarci 0:0061165683ee 4 * and associated documentation files (the "Software"), to deal in the Software without
sdivarci 0:0061165683ee 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
sdivarci 0:0061165683ee 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
sdivarci 0:0061165683ee 7 * Software is furnished to do so, subject to the following conditions:
sdivarci 0:0061165683ee 8 *
sdivarci 0:0061165683ee 9 * The above copyright notice and this permission notice shall be included in all copies or
sdivarci 0:0061165683ee 10 * substantial portions of the Software.
sdivarci 0:0061165683ee 11 *
sdivarci 0:0061165683ee 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
sdivarci 0:0061165683ee 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
sdivarci 0:0061165683ee 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
sdivarci 0:0061165683ee 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
sdivarci 0:0061165683ee 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
sdivarci 0:0061165683ee 17 */
sdivarci 0:0061165683ee 18
sdivarci 0:0061165683ee 19 #if defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM)
sdivarci 0:0061165683ee 20
sdivarci 0:0061165683ee 21 #include "USBHAL.h"
sdivarci 0:0061165683ee 22
sdivarci 0:0061165683ee 23
sdivarci 0:0061165683ee 24 // Get endpoint direction
sdivarci 0:0061165683ee 25 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
sdivarci 0:0061165683ee 26 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
sdivarci 0:0061165683ee 27
sdivarci 0:0061165683ee 28 // Convert physical endpoint number to register bit
sdivarci 0:0061165683ee 29 #define EP(endpoint) (1UL<<endpoint)
sdivarci 0:0061165683ee 30
sdivarci 0:0061165683ee 31 // Power Control for Peripherals register
sdivarci 0:0061165683ee 32 #define PCUSB (1UL<<31)
sdivarci 0:0061165683ee 33
sdivarci 0:0061165683ee 34 // USB Clock Control register
sdivarci 0:0061165683ee 35 #define DEV_CLK_EN (1UL<<1)
sdivarci 0:0061165683ee 36 #define PORT_CLK_EN (1UL<<3)
sdivarci 0:0061165683ee 37 #define AHB_CLK_EN (1UL<<4)
sdivarci 0:0061165683ee 38
sdivarci 0:0061165683ee 39 // USB Clock Status register
sdivarci 0:0061165683ee 40 #define DEV_CLK_ON (1UL<<1)
sdivarci 0:0061165683ee 41 #define AHB_CLK_ON (1UL<<4)
sdivarci 0:0061165683ee 42
sdivarci 0:0061165683ee 43 // USB Device Interupt registers
sdivarci 0:0061165683ee 44 #define FRAME (1UL<<0)
sdivarci 0:0061165683ee 45 #define EP_FAST (1UL<<1)
sdivarci 0:0061165683ee 46 #define EP_SLOW (1UL<<2)
sdivarci 0:0061165683ee 47 #define DEV_STAT (1UL<<3)
sdivarci 0:0061165683ee 48 #define CCEMPTY (1UL<<4)
sdivarci 0:0061165683ee 49 #define CDFULL (1UL<<5)
sdivarci 0:0061165683ee 50 #define RxENDPKT (1UL<<6)
sdivarci 0:0061165683ee 51 #define TxENDPKT (1UL<<7)
sdivarci 0:0061165683ee 52 #define EP_RLZED (1UL<<8)
sdivarci 0:0061165683ee 53 #define ERR_INT (1UL<<9)
sdivarci 0:0061165683ee 54
sdivarci 0:0061165683ee 55 // USB Control register
sdivarci 0:0061165683ee 56 #define RD_EN (1<<0)
sdivarci 0:0061165683ee 57 #define WR_EN (1<<1)
sdivarci 0:0061165683ee 58 #define LOG_ENDPOINT(endpoint) ((endpoint>>1)<<2)
sdivarci 0:0061165683ee 59
sdivarci 0:0061165683ee 60 // USB Receive Packet Length register
sdivarci 0:0061165683ee 61 #define DV (1UL<<10)
sdivarci 0:0061165683ee 62 #define PKT_RDY (1UL<<11)
sdivarci 0:0061165683ee 63 #define PKT_LNGTH_MASK (0x3ff)
sdivarci 0:0061165683ee 64
sdivarci 0:0061165683ee 65 // Serial Interface Engine (SIE)
sdivarci 0:0061165683ee 66 #define SIE_WRITE (0x01)
sdivarci 0:0061165683ee 67 #define SIE_READ (0x02)
sdivarci 0:0061165683ee 68 #define SIE_COMMAND (0x05)
sdivarci 0:0061165683ee 69 #define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16))
sdivarci 0:0061165683ee 70
sdivarci 0:0061165683ee 71 // SIE Command codes
sdivarci 0:0061165683ee 72 #define SIE_CMD_SET_ADDRESS (0xD0)
sdivarci 0:0061165683ee 73 #define SIE_CMD_CONFIGURE_DEVICE (0xD8)
sdivarci 0:0061165683ee 74 #define SIE_CMD_SET_MODE (0xF3)
sdivarci 0:0061165683ee 75 #define SIE_CMD_READ_FRAME_NUMBER (0xF5)
sdivarci 0:0061165683ee 76 #define SIE_CMD_READ_TEST_REGISTER (0xFD)
sdivarci 0:0061165683ee 77 #define SIE_CMD_SET_DEVICE_STATUS (0xFE)
sdivarci 0:0061165683ee 78 #define SIE_CMD_GET_DEVICE_STATUS (0xFE)
sdivarci 0:0061165683ee 79 #define SIE_CMD_GET_ERROR_CODE (0xFF)
sdivarci 0:0061165683ee 80 #define SIE_CMD_READ_ERROR_STATUS (0xFB)
sdivarci 0:0061165683ee 81
sdivarci 0:0061165683ee 82 #define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+endpoint)
sdivarci 0:0061165683ee 83 #define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+endpoint)
sdivarci 0:0061165683ee 84 #define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+endpoint)
sdivarci 0:0061165683ee 85
sdivarci 0:0061165683ee 86 #define SIE_CMD_CLEAR_BUFFER (0xF2)
sdivarci 0:0061165683ee 87 #define SIE_CMD_VALIDATE_BUFFER (0xFA)
sdivarci 0:0061165683ee 88
sdivarci 0:0061165683ee 89 // SIE Device Status register
sdivarci 0:0061165683ee 90 #define SIE_DS_CON (1<<0)
sdivarci 0:0061165683ee 91 #define SIE_DS_CON_CH (1<<1)
sdivarci 0:0061165683ee 92 #define SIE_DS_SUS (1<<2)
sdivarci 0:0061165683ee 93 #define SIE_DS_SUS_CH (1<<3)
sdivarci 0:0061165683ee 94 #define SIE_DS_RST (1<<4)
sdivarci 0:0061165683ee 95
sdivarci 0:0061165683ee 96 // SIE Device Set Address register
sdivarci 0:0061165683ee 97 #define SIE_DSA_DEV_EN (1<<7)
sdivarci 0:0061165683ee 98
sdivarci 0:0061165683ee 99 // SIE Configue Device register
sdivarci 0:0061165683ee 100 #define SIE_CONF_DEVICE (1<<0)
sdivarci 0:0061165683ee 101
sdivarci 0:0061165683ee 102 // Select Endpoint register
sdivarci 0:0061165683ee 103 #define SIE_SE_FE (1<<0)
sdivarci 0:0061165683ee 104 #define SIE_SE_ST (1<<1)
sdivarci 0:0061165683ee 105 #define SIE_SE_STP (1<<2)
sdivarci 0:0061165683ee 106 #define SIE_SE_PO (1<<3)
sdivarci 0:0061165683ee 107 #define SIE_SE_EPN (1<<4)
sdivarci 0:0061165683ee 108 #define SIE_SE_B_1_FULL (1<<5)
sdivarci 0:0061165683ee 109 #define SIE_SE_B_2_FULL (1<<6)
sdivarci 0:0061165683ee 110
sdivarci 0:0061165683ee 111 // Set Endpoint Status command
sdivarci 0:0061165683ee 112 #define SIE_SES_ST (1<<0)
sdivarci 0:0061165683ee 113 #define SIE_SES_DA (1<<5)
sdivarci 0:0061165683ee 114 #define SIE_SES_RF_MO (1<<6)
sdivarci 0:0061165683ee 115 #define SIE_SES_CND_ST (1<<7)
sdivarci 0:0061165683ee 116
sdivarci 0:0061165683ee 117
sdivarci 0:0061165683ee 118 USBHAL * USBHAL::instance;
sdivarci 0:0061165683ee 119
sdivarci 0:0061165683ee 120 static volatile int epComplete;
sdivarci 0:0061165683ee 121 static uint32_t endpointStallState;
sdivarci 0:0061165683ee 122
sdivarci 0:0061165683ee 123 static void SIECommand(uint32_t command) {
sdivarci 0:0061165683ee 124 // The command phase of a SIE transaction
sdivarci 0:0061165683ee 125 LPC_USB->DevIntClr = CCEMPTY;
sdivarci 0:0061165683ee 126 LPC_USB->CmdCode = SIE_CMD_CODE(SIE_COMMAND, command);
sdivarci 0:0061165683ee 127 while (!(LPC_USB->DevIntSt & CCEMPTY));
sdivarci 0:0061165683ee 128 }
sdivarci 0:0061165683ee 129
sdivarci 0:0061165683ee 130 static void SIEWriteData(uint8_t data) {
sdivarci 0:0061165683ee 131 // The data write phase of a SIE transaction
sdivarci 0:0061165683ee 132 LPC_USB->DevIntClr = CCEMPTY;
sdivarci 0:0061165683ee 133 LPC_USB->CmdCode = SIE_CMD_CODE(SIE_WRITE, data);
sdivarci 0:0061165683ee 134 while (!(LPC_USB->DevIntSt & CCEMPTY));
sdivarci 0:0061165683ee 135 }
sdivarci 0:0061165683ee 136
sdivarci 0:0061165683ee 137 static uint8_t SIEReadData(uint32_t command) {
sdivarci 0:0061165683ee 138 // The data read phase of a SIE transaction
sdivarci 0:0061165683ee 139 LPC_USB->DevIntClr = CDFULL;
sdivarci 0:0061165683ee 140 LPC_USB->CmdCode = SIE_CMD_CODE(SIE_READ, command);
sdivarci 0:0061165683ee 141 while (!(LPC_USB->DevIntSt & CDFULL));
sdivarci 0:0061165683ee 142 return (uint8_t)LPC_USB->CmdData;
sdivarci 0:0061165683ee 143 }
sdivarci 0:0061165683ee 144
sdivarci 0:0061165683ee 145 static void SIEsetDeviceStatus(uint8_t status) {
sdivarci 0:0061165683ee 146 // Write SIE device status register
sdivarci 0:0061165683ee 147 SIECommand(SIE_CMD_SET_DEVICE_STATUS);
sdivarci 0:0061165683ee 148 SIEWriteData(status);
sdivarci 0:0061165683ee 149 }
sdivarci 0:0061165683ee 150
sdivarci 0:0061165683ee 151 static uint8_t SIEgetDeviceStatus(void) {
sdivarci 0:0061165683ee 152 // Read SIE device status register
sdivarci 0:0061165683ee 153 SIECommand(SIE_CMD_GET_DEVICE_STATUS);
sdivarci 0:0061165683ee 154 return SIEReadData(SIE_CMD_GET_DEVICE_STATUS);
sdivarci 0:0061165683ee 155 }
sdivarci 0:0061165683ee 156
sdivarci 0:0061165683ee 157 void SIEsetAddress(uint8_t address) {
sdivarci 0:0061165683ee 158 // Write SIE device address register
sdivarci 0:0061165683ee 159 SIECommand(SIE_CMD_SET_ADDRESS);
sdivarci 0:0061165683ee 160 SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN);
sdivarci 0:0061165683ee 161 }
sdivarci 0:0061165683ee 162
sdivarci 0:0061165683ee 163 static uint8_t SIEselectEndpoint(uint8_t endpoint) {
sdivarci 0:0061165683ee 164 // SIE select endpoint command
sdivarci 0:0061165683ee 165 SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint));
sdivarci 0:0061165683ee 166 return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint));
sdivarci 0:0061165683ee 167 }
sdivarci 0:0061165683ee 168
sdivarci 0:0061165683ee 169 static uint8_t SIEclearBuffer(void) {
sdivarci 0:0061165683ee 170 // SIE clear buffer command
sdivarci 0:0061165683ee 171 SIECommand(SIE_CMD_CLEAR_BUFFER);
sdivarci 0:0061165683ee 172 return SIEReadData(SIE_CMD_CLEAR_BUFFER);
sdivarci 0:0061165683ee 173 }
sdivarci 0:0061165683ee 174
sdivarci 0:0061165683ee 175 static void SIEvalidateBuffer(void) {
sdivarci 0:0061165683ee 176 // SIE validate buffer command
sdivarci 0:0061165683ee 177 SIECommand(SIE_CMD_VALIDATE_BUFFER);
sdivarci 0:0061165683ee 178 }
sdivarci 0:0061165683ee 179
sdivarci 0:0061165683ee 180 static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) {
sdivarci 0:0061165683ee 181 // SIE set endpoint status command
sdivarci 0:0061165683ee 182 SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint));
sdivarci 0:0061165683ee 183 SIEWriteData(status);
sdivarci 0:0061165683ee 184 }
sdivarci 0:0061165683ee 185
sdivarci 0:0061165683ee 186 static uint16_t SIEgetFrameNumber(void) __attribute__ ((unused));
sdivarci 0:0061165683ee 187 static uint16_t SIEgetFrameNumber(void) {
sdivarci 0:0061165683ee 188 // Read current frame number
sdivarci 0:0061165683ee 189 uint16_t lowByte;
sdivarci 0:0061165683ee 190 uint16_t highByte;
sdivarci 0:0061165683ee 191
sdivarci 0:0061165683ee 192 SIECommand(SIE_CMD_READ_FRAME_NUMBER);
sdivarci 0:0061165683ee 193 lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
sdivarci 0:0061165683ee 194 highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
sdivarci 0:0061165683ee 195
sdivarci 0:0061165683ee 196 return (highByte << 8) | lowByte;
sdivarci 0:0061165683ee 197 }
sdivarci 0:0061165683ee 198
sdivarci 0:0061165683ee 199 static void SIEconfigureDevice(void) {
sdivarci 0:0061165683ee 200 // SIE Configure device command
sdivarci 0:0061165683ee 201 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
sdivarci 0:0061165683ee 202 SIEWriteData(SIE_CONF_DEVICE);
sdivarci 0:0061165683ee 203 }
sdivarci 0:0061165683ee 204
sdivarci 0:0061165683ee 205 static void SIEunconfigureDevice(void) {
sdivarci 0:0061165683ee 206 // SIE Configure device command
sdivarci 0:0061165683ee 207 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
sdivarci 0:0061165683ee 208 SIEWriteData(0);
sdivarci 0:0061165683ee 209 }
sdivarci 0:0061165683ee 210
sdivarci 0:0061165683ee 211 static void SIEconnect(void) {
sdivarci 0:0061165683ee 212 // Connect USB device
sdivarci 0:0061165683ee 213 uint8_t status = SIEgetDeviceStatus();
sdivarci 0:0061165683ee 214 SIEsetDeviceStatus(status | SIE_DS_CON);
sdivarci 0:0061165683ee 215 }
sdivarci 0:0061165683ee 216
sdivarci 0:0061165683ee 217
sdivarci 0:0061165683ee 218 static void SIEdisconnect(void) {
sdivarci 0:0061165683ee 219 // Disconnect USB device
sdivarci 0:0061165683ee 220 uint8_t status = SIEgetDeviceStatus();
sdivarci 0:0061165683ee 221 SIEsetDeviceStatus(status & ~SIE_DS_CON);
sdivarci 0:0061165683ee 222 }
sdivarci 0:0061165683ee 223
sdivarci 0:0061165683ee 224
sdivarci 0:0061165683ee 225 static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) {
sdivarci 0:0061165683ee 226 // Implemented using using EP_INT_CLR.
sdivarci 0:0061165683ee 227 LPC_USB->EpIntClr = EP(endpoint);
sdivarci 0:0061165683ee 228 while (!(LPC_USB->DevIntSt & CDFULL));
sdivarci 0:0061165683ee 229 return (uint8_t)LPC_USB->CmdData;
sdivarci 0:0061165683ee 230 }
sdivarci 0:0061165683ee 231
sdivarci 0:0061165683ee 232
sdivarci 0:0061165683ee 233 static void enableEndpointEvent(uint8_t endpoint) {
sdivarci 0:0061165683ee 234 // Enable an endpoint interrupt
sdivarci 0:0061165683ee 235 LPC_USB->EpIntEn |= EP(endpoint);
sdivarci 0:0061165683ee 236 }
sdivarci 0:0061165683ee 237
sdivarci 0:0061165683ee 238 static void disableEndpointEvent(uint8_t endpoint) __attribute__ ((unused));
sdivarci 0:0061165683ee 239 static void disableEndpointEvent(uint8_t endpoint) {
sdivarci 0:0061165683ee 240 // Disable an endpoint interrupt
sdivarci 0:0061165683ee 241 LPC_USB->EpIntEn &= ~EP(endpoint);
sdivarci 0:0061165683ee 242 }
sdivarci 0:0061165683ee 243
sdivarci 0:0061165683ee 244 static volatile uint32_t __attribute__((used)) dummyRead;
sdivarci 0:0061165683ee 245 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
sdivarci 0:0061165683ee 246 // Read from an OUT endpoint
sdivarci 0:0061165683ee 247 uint32_t size;
sdivarci 0:0061165683ee 248 uint32_t i;
sdivarci 0:0061165683ee 249 uint32_t data = 0;
sdivarci 0:0061165683ee 250 uint8_t offset;
sdivarci 0:0061165683ee 251
sdivarci 0:0061165683ee 252 LPC_USB->Ctrl = LOG_ENDPOINT(endpoint) | RD_EN;
sdivarci 0:0061165683ee 253 while (!(LPC_USB->RxPLen & PKT_RDY));
sdivarci 0:0061165683ee 254
sdivarci 0:0061165683ee 255 size = LPC_USB->RxPLen & PKT_LNGTH_MASK;
sdivarci 0:0061165683ee 256
sdivarci 0:0061165683ee 257 offset = 0;
sdivarci 0:0061165683ee 258
sdivarci 0:0061165683ee 259 if (size > 0) {
sdivarci 0:0061165683ee 260 for (i=0; i<size; i++) {
sdivarci 0:0061165683ee 261 if (offset==0) {
sdivarci 0:0061165683ee 262 // Fetch up to four bytes of data as a word
sdivarci 0:0061165683ee 263 data = LPC_USB->RxData;
sdivarci 0:0061165683ee 264 }
sdivarci 0:0061165683ee 265
sdivarci 0:0061165683ee 266 // extract a byte
sdivarci 0:0061165683ee 267 *buffer = (data>>offset) & 0xff;
sdivarci 0:0061165683ee 268 buffer++;
sdivarci 0:0061165683ee 269
sdivarci 0:0061165683ee 270 // move on to the next byte
sdivarci 0:0061165683ee 271 offset = (offset + 8) % 32;
sdivarci 0:0061165683ee 272 }
sdivarci 0:0061165683ee 273 } else {
sdivarci 0:0061165683ee 274 dummyRead = LPC_USB->RxData;
sdivarci 0:0061165683ee 275 }
sdivarci 0:0061165683ee 276
sdivarci 0:0061165683ee 277 LPC_USB->Ctrl = 0;
sdivarci 0:0061165683ee 278
sdivarci 0:0061165683ee 279 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
sdivarci 0:0061165683ee 280 SIEselectEndpoint(endpoint);
sdivarci 0:0061165683ee 281 SIEclearBuffer();
sdivarci 0:0061165683ee 282 }
sdivarci 0:0061165683ee 283
sdivarci 0:0061165683ee 284 return size;
sdivarci 0:0061165683ee 285 }
sdivarci 0:0061165683ee 286
sdivarci 0:0061165683ee 287 static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) {
sdivarci 0:0061165683ee 288 // Write to an IN endpoint
sdivarci 0:0061165683ee 289 uint32_t temp, data;
sdivarci 0:0061165683ee 290 uint8_t offset;
sdivarci 0:0061165683ee 291
sdivarci 0:0061165683ee 292 LPC_USB->Ctrl = LOG_ENDPOINT(endpoint) | WR_EN;
sdivarci 0:0061165683ee 293
sdivarci 0:0061165683ee 294 LPC_USB->TxPLen = size;
sdivarci 0:0061165683ee 295 offset = 0;
sdivarci 0:0061165683ee 296 data = 0;
sdivarci 0:0061165683ee 297
sdivarci 0:0061165683ee 298 if (size>0) {
sdivarci 0:0061165683ee 299 do {
sdivarci 0:0061165683ee 300 // Fetch next data byte into a word-sized temporary variable
sdivarci 0:0061165683ee 301 temp = *buffer++;
sdivarci 0:0061165683ee 302
sdivarci 0:0061165683ee 303 // Add to current data word
sdivarci 0:0061165683ee 304 temp = temp << offset;
sdivarci 0:0061165683ee 305 data = data | temp;
sdivarci 0:0061165683ee 306
sdivarci 0:0061165683ee 307 // move on to the next byte
sdivarci 0:0061165683ee 308 offset = (offset + 8) % 32;
sdivarci 0:0061165683ee 309 size--;
sdivarci 0:0061165683ee 310
sdivarci 0:0061165683ee 311 if ((offset==0) || (size==0)) {
sdivarci 0:0061165683ee 312 // Write the word to the endpoint
sdivarci 0:0061165683ee 313 LPC_USB->TxData = data;
sdivarci 0:0061165683ee 314 data = 0;
sdivarci 0:0061165683ee 315 }
sdivarci 0:0061165683ee 316 } while (size>0);
sdivarci 0:0061165683ee 317 } else {
sdivarci 0:0061165683ee 318 LPC_USB->TxData = 0;
sdivarci 0:0061165683ee 319 }
sdivarci 0:0061165683ee 320
sdivarci 0:0061165683ee 321 // Clear WR_EN to cover zero length packet case
sdivarci 0:0061165683ee 322 LPC_USB->Ctrl=0;
sdivarci 0:0061165683ee 323
sdivarci 0:0061165683ee 324 SIEselectEndpoint(endpoint);
sdivarci 0:0061165683ee 325 SIEvalidateBuffer();
sdivarci 0:0061165683ee 326 }
sdivarci 0:0061165683ee 327
sdivarci 0:0061165683ee 328 USBHAL::USBHAL(void) {
sdivarci 0:0061165683ee 329 // Disable IRQ
sdivarci 0:0061165683ee 330 NVIC_DisableIRQ(USB_IRQn);
sdivarci 0:0061165683ee 331
sdivarci 0:0061165683ee 332 // fill in callback array
sdivarci 0:0061165683ee 333 epCallback[0] = &USBHAL::EP1_OUT_callback;
sdivarci 0:0061165683ee 334 epCallback[1] = &USBHAL::EP1_IN_callback;
sdivarci 0:0061165683ee 335 epCallback[2] = &USBHAL::EP2_OUT_callback;
sdivarci 0:0061165683ee 336 epCallback[3] = &USBHAL::EP2_IN_callback;
sdivarci 0:0061165683ee 337 epCallback[4] = &USBHAL::EP3_OUT_callback;
sdivarci 0:0061165683ee 338 epCallback[5] = &USBHAL::EP3_IN_callback;
sdivarci 0:0061165683ee 339 epCallback[6] = &USBHAL::EP4_OUT_callback;
sdivarci 0:0061165683ee 340 epCallback[7] = &USBHAL::EP4_IN_callback;
sdivarci 0:0061165683ee 341 epCallback[8] = &USBHAL::EP5_OUT_callback;
sdivarci 0:0061165683ee 342 epCallback[9] = &USBHAL::EP5_IN_callback;
sdivarci 0:0061165683ee 343 epCallback[10] = &USBHAL::EP6_OUT_callback;
sdivarci 0:0061165683ee 344 epCallback[11] = &USBHAL::EP6_IN_callback;
sdivarci 0:0061165683ee 345 epCallback[12] = &USBHAL::EP7_OUT_callback;
sdivarci 0:0061165683ee 346 epCallback[13] = &USBHAL::EP7_IN_callback;
sdivarci 0:0061165683ee 347 epCallback[14] = &USBHAL::EP8_OUT_callback;
sdivarci 0:0061165683ee 348 epCallback[15] = &USBHAL::EP8_IN_callback;
sdivarci 0:0061165683ee 349 epCallback[16] = &USBHAL::EP9_OUT_callback;
sdivarci 0:0061165683ee 350 epCallback[17] = &USBHAL::EP9_IN_callback;
sdivarci 0:0061165683ee 351 epCallback[18] = &USBHAL::EP10_OUT_callback;
sdivarci 0:0061165683ee 352 epCallback[19] = &USBHAL::EP10_IN_callback;
sdivarci 0:0061165683ee 353 epCallback[20] = &USBHAL::EP11_OUT_callback;
sdivarci 0:0061165683ee 354 epCallback[21] = &USBHAL::EP11_IN_callback;
sdivarci 0:0061165683ee 355 epCallback[22] = &USBHAL::EP12_OUT_callback;
sdivarci 0:0061165683ee 356 epCallback[23] = &USBHAL::EP12_IN_callback;
sdivarci 0:0061165683ee 357 epCallback[24] = &USBHAL::EP13_OUT_callback;
sdivarci 0:0061165683ee 358 epCallback[25] = &USBHAL::EP13_IN_callback;
sdivarci 0:0061165683ee 359 epCallback[26] = &USBHAL::EP14_OUT_callback;
sdivarci 0:0061165683ee 360 epCallback[27] = &USBHAL::EP14_IN_callback;
sdivarci 0:0061165683ee 361 epCallback[28] = &USBHAL::EP15_OUT_callback;
sdivarci 0:0061165683ee 362 epCallback[29] = &USBHAL::EP15_IN_callback;
sdivarci 0:0061165683ee 363
sdivarci 0:0061165683ee 364 // Enable power to USB device controller
sdivarci 0:0061165683ee 365 LPC_SC->PCONP |= PCUSB;
sdivarci 0:0061165683ee 366
sdivarci 0:0061165683ee 367 // Enable USB clocks
sdivarci 0:0061165683ee 368 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN | PORT_CLK_EN;
sdivarci 0:0061165683ee 369 while ((LPC_USB->USBClkSt & (DEV_CLK_EN | AHB_CLK_EN | PORT_CLK_EN)) != (DEV_CLK_ON | AHB_CLK_ON | PORT_CLK_EN));
sdivarci 0:0061165683ee 370
sdivarci 0:0061165683ee 371 // Select port USB2
sdivarci 0:0061165683ee 372 LPC_USB->StCtrl |= 3;
sdivarci 0:0061165683ee 373
sdivarci 0:0061165683ee 374
sdivarci 0:0061165683ee 375 // Configure pin P0.31 to be USB2
sdivarci 0:0061165683ee 376 LPC_IOCON->P0_31 &= ~0x07;
sdivarci 0:0061165683ee 377 LPC_IOCON->P0_31 |= 0x01;
sdivarci 0:0061165683ee 378
sdivarci 0:0061165683ee 379 // Disconnect USB device
sdivarci 0:0061165683ee 380 SIEdisconnect();
sdivarci 0:0061165683ee 381
sdivarci 0:0061165683ee 382 // Configure pin P0.14 to be Connect
sdivarci 0:0061165683ee 383 LPC_IOCON->P0_14 &= ~0x07;
sdivarci 0:0061165683ee 384 LPC_IOCON->P0_14 |= 0x03;
sdivarci 0:0061165683ee 385
sdivarci 0:0061165683ee 386 // Connect must be low for at least 2.5uS
sdivarci 0:0061165683ee 387 wait(0.3);
sdivarci 0:0061165683ee 388
sdivarci 0:0061165683ee 389 // Set the maximum packet size for the control endpoints
sdivarci 0:0061165683ee 390 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
sdivarci 0:0061165683ee 391 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
sdivarci 0:0061165683ee 392
sdivarci 0:0061165683ee 393 // Attach IRQ
sdivarci 0:0061165683ee 394 instance = this;
sdivarci 0:0061165683ee 395 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
sdivarci 0:0061165683ee 396
sdivarci 0:0061165683ee 397 // Enable interrupts for device events and EP0
sdivarci 0:0061165683ee 398 LPC_USB->DevIntEn = EP_SLOW | DEV_STAT | FRAME;
sdivarci 0:0061165683ee 399 enableEndpointEvent(EP0IN);
sdivarci 0:0061165683ee 400 enableEndpointEvent(EP0OUT);
sdivarci 0:0061165683ee 401 }
sdivarci 0:0061165683ee 402
sdivarci 0:0061165683ee 403 USBHAL::~USBHAL(void) {
sdivarci 0:0061165683ee 404 // Ensure device disconnected
sdivarci 0:0061165683ee 405 SIEdisconnect();
sdivarci 0:0061165683ee 406 // Disable USB interrupts
sdivarci 0:0061165683ee 407 NVIC_DisableIRQ(USB_IRQn);
sdivarci 0:0061165683ee 408 }
sdivarci 0:0061165683ee 409
sdivarci 0:0061165683ee 410 void USBHAL::connect(void) {
sdivarci 0:0061165683ee 411 NVIC_EnableIRQ(USB_IRQn);
sdivarci 0:0061165683ee 412 // Connect USB device
sdivarci 0:0061165683ee 413 SIEconnect();
sdivarci 0:0061165683ee 414 }
sdivarci 0:0061165683ee 415
sdivarci 0:0061165683ee 416 void USBHAL::disconnect(void) {
sdivarci 0:0061165683ee 417 NVIC_DisableIRQ(USB_IRQn);
sdivarci 0:0061165683ee 418 // Disconnect USB device
sdivarci 0:0061165683ee 419 SIEdisconnect();
sdivarci 0:0061165683ee 420 }
sdivarci 0:0061165683ee 421
sdivarci 0:0061165683ee 422 void USBHAL::configureDevice(void) {
sdivarci 0:0061165683ee 423 SIEconfigureDevice();
sdivarci 0:0061165683ee 424 }
sdivarci 0:0061165683ee 425
sdivarci 0:0061165683ee 426 void USBHAL::unconfigureDevice(void) {
sdivarci 0:0061165683ee 427 SIEunconfigureDevice();
sdivarci 0:0061165683ee 428 }
sdivarci 0:0061165683ee 429
sdivarci 0:0061165683ee 430 void USBHAL::setAddress(uint8_t address) {
sdivarci 0:0061165683ee 431 SIEsetAddress(address);
sdivarci 0:0061165683ee 432 }
sdivarci 0:0061165683ee 433
sdivarci 0:0061165683ee 434 void USBHAL::EP0setup(uint8_t *buffer) {
sdivarci 0:0061165683ee 435 endpointReadcore(EP0OUT, buffer);
sdivarci 0:0061165683ee 436 }
sdivarci 0:0061165683ee 437
sdivarci 0:0061165683ee 438 void USBHAL::EP0read(void) {
sdivarci 0:0061165683ee 439 // Not required
sdivarci 0:0061165683ee 440 }
sdivarci 0:0061165683ee 441
sdivarci 0:0061165683ee 442 void USBHAL::EP0readStage(void) {
sdivarci 0:0061165683ee 443 // Not required
sdivarci 0:0061165683ee 444 }
sdivarci 0:0061165683ee 445
sdivarci 0:0061165683ee 446 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
sdivarci 0:0061165683ee 447 return endpointReadcore(EP0OUT, buffer);
sdivarci 0:0061165683ee 448 }
sdivarci 0:0061165683ee 449
sdivarci 0:0061165683ee 450 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
sdivarci 0:0061165683ee 451 endpointWritecore(EP0IN, buffer, size);
sdivarci 0:0061165683ee 452 }
sdivarci 0:0061165683ee 453
sdivarci 0:0061165683ee 454 void USBHAL::EP0getWriteResult(void) {
sdivarci 0:0061165683ee 455 // Not required
sdivarci 0:0061165683ee 456 }
sdivarci 0:0061165683ee 457
sdivarci 0:0061165683ee 458 void USBHAL::EP0stall(void) {
sdivarci 0:0061165683ee 459 // This will stall both control endpoints
sdivarci 0:0061165683ee 460 stallEndpoint(EP0OUT);
sdivarci 0:0061165683ee 461 }
sdivarci 0:0061165683ee 462
sdivarci 0:0061165683ee 463 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
sdivarci 0:0061165683ee 464 return EP_PENDING;
sdivarci 0:0061165683ee 465 }
sdivarci 0:0061165683ee 466
sdivarci 0:0061165683ee 467 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
sdivarci 0:0061165683ee 468
sdivarci 0:0061165683ee 469 //for isochronous endpoint, we don't wait an interrupt
sdivarci 0:0061165683ee 470 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
sdivarci 0:0061165683ee 471 if (!(epComplete & EP(endpoint)))
sdivarci 0:0061165683ee 472 return EP_PENDING;
sdivarci 0:0061165683ee 473 }
sdivarci 0:0061165683ee 474
sdivarci 0:0061165683ee 475 *bytesRead = endpointReadcore(endpoint, buffer);
sdivarci 0:0061165683ee 476 epComplete &= ~EP(endpoint);
sdivarci 0:0061165683ee 477 return EP_COMPLETED;
sdivarci 0:0061165683ee 478 }
sdivarci 0:0061165683ee 479
sdivarci 0:0061165683ee 480 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
sdivarci 0:0061165683ee 481 if (getEndpointStallState(endpoint)) {
sdivarci 0:0061165683ee 482 return EP_STALLED;
sdivarci 0:0061165683ee 483 }
sdivarci 0:0061165683ee 484
sdivarci 0:0061165683ee 485 epComplete &= ~EP(endpoint);
sdivarci 0:0061165683ee 486
sdivarci 0:0061165683ee 487 endpointWritecore(endpoint, data, size);
sdivarci 0:0061165683ee 488 return EP_PENDING;
sdivarci 0:0061165683ee 489 }
sdivarci 0:0061165683ee 490
sdivarci 0:0061165683ee 491 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
sdivarci 0:0061165683ee 492 if (epComplete & EP(endpoint)) {
sdivarci 0:0061165683ee 493 epComplete &= ~EP(endpoint);
sdivarci 0:0061165683ee 494 return EP_COMPLETED;
sdivarci 0:0061165683ee 495 }
sdivarci 0:0061165683ee 496
sdivarci 0:0061165683ee 497 return EP_PENDING;
sdivarci 0:0061165683ee 498 }
sdivarci 0:0061165683ee 499
sdivarci 0:0061165683ee 500 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
sdivarci 0:0061165683ee 501 // Realise an endpoint
sdivarci 0:0061165683ee 502 LPC_USB->DevIntClr = EP_RLZED;
sdivarci 0:0061165683ee 503 LPC_USB->ReEp |= EP(endpoint);
sdivarci 0:0061165683ee 504 LPC_USB->EpInd = endpoint;
sdivarci 0:0061165683ee 505 LPC_USB->MaxPSize = maxPacket;
sdivarci 0:0061165683ee 506
sdivarci 0:0061165683ee 507 while (!(LPC_USB->DevIntSt & EP_RLZED));
sdivarci 0:0061165683ee 508 LPC_USB->DevIntClr = EP_RLZED;
sdivarci 0:0061165683ee 509
sdivarci 0:0061165683ee 510 // Clear stall state
sdivarci 0:0061165683ee 511 endpointStallState &= ~EP(endpoint);
sdivarci 0:0061165683ee 512
sdivarci 0:0061165683ee 513 enableEndpointEvent(endpoint);
sdivarci 0:0061165683ee 514 return true;
sdivarci 0:0061165683ee 515 }
sdivarci 0:0061165683ee 516
sdivarci 0:0061165683ee 517 void USBHAL::stallEndpoint(uint8_t endpoint) {
sdivarci 0:0061165683ee 518 // Stall an endpoint
sdivarci 0:0061165683ee 519 if ( (endpoint==EP0IN) || (endpoint==EP0OUT) ) {
sdivarci 0:0061165683ee 520 // Conditionally stall both control endpoints
sdivarci 0:0061165683ee 521 SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST);
sdivarci 0:0061165683ee 522 } else {
sdivarci 0:0061165683ee 523 SIEsetEndpointStatus(endpoint, SIE_SES_ST);
sdivarci 0:0061165683ee 524
sdivarci 0:0061165683ee 525 // Update stall state
sdivarci 0:0061165683ee 526 endpointStallState |= EP(endpoint);
sdivarci 0:0061165683ee 527 }
sdivarci 0:0061165683ee 528 }
sdivarci 0:0061165683ee 529
sdivarci 0:0061165683ee 530 void USBHAL::unstallEndpoint(uint8_t endpoint) {
sdivarci 0:0061165683ee 531 // Unstall an endpoint. The endpoint will also be reinitialised
sdivarci 0:0061165683ee 532 SIEsetEndpointStatus(endpoint, 0);
sdivarci 0:0061165683ee 533
sdivarci 0:0061165683ee 534 // Update stall state
sdivarci 0:0061165683ee 535 endpointStallState &= ~EP(endpoint);
sdivarci 0:0061165683ee 536 }
sdivarci 0:0061165683ee 537
sdivarci 0:0061165683ee 538 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
sdivarci 0:0061165683ee 539 // Returns true if endpoint stalled
sdivarci 0:0061165683ee 540 return endpointStallState & EP(endpoint);
sdivarci 0:0061165683ee 541 }
sdivarci 0:0061165683ee 542
sdivarci 0:0061165683ee 543 void USBHAL::remoteWakeup(void) {
sdivarci 0:0061165683ee 544 // Remote wakeup
sdivarci 0:0061165683ee 545 uint8_t status;
sdivarci 0:0061165683ee 546
sdivarci 0:0061165683ee 547 // Enable USB clocks
sdivarci 0:0061165683ee 548 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
sdivarci 0:0061165683ee 549 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
sdivarci 0:0061165683ee 550
sdivarci 0:0061165683ee 551 status = SIEgetDeviceStatus();
sdivarci 0:0061165683ee 552 SIEsetDeviceStatus(status & ~SIE_DS_SUS);
sdivarci 0:0061165683ee 553 }
sdivarci 0:0061165683ee 554
sdivarci 0:0061165683ee 555 void USBHAL::_usbisr(void) {
sdivarci 0:0061165683ee 556 instance->usbisr();
sdivarci 0:0061165683ee 557 }
sdivarci 0:0061165683ee 558
sdivarci 0:0061165683ee 559
sdivarci 0:0061165683ee 560 void USBHAL::usbisr(void) {
sdivarci 0:0061165683ee 561 uint8_t devStat;
sdivarci 0:0061165683ee 562
sdivarci 0:0061165683ee 563 if (LPC_USB->DevIntSt & FRAME) {
sdivarci 0:0061165683ee 564 // Start of frame event
sdivarci 0:0061165683ee 565 SOF(SIEgetFrameNumber());
sdivarci 0:0061165683ee 566 // Clear interrupt status flag
sdivarci 0:0061165683ee 567 LPC_USB->DevIntClr = FRAME;
sdivarci 0:0061165683ee 568 }
sdivarci 0:0061165683ee 569
sdivarci 0:0061165683ee 570 if (LPC_USB->DevIntSt & DEV_STAT) {
sdivarci 0:0061165683ee 571 // Device Status interrupt
sdivarci 0:0061165683ee 572 // Must clear the interrupt status flag before reading the device status from the SIE
sdivarci 0:0061165683ee 573 LPC_USB->DevIntClr = DEV_STAT;
sdivarci 0:0061165683ee 574
sdivarci 0:0061165683ee 575 // Read device status from SIE
sdivarci 0:0061165683ee 576 devStat = SIEgetDeviceStatus();
sdivarci 0:0061165683ee 577 //printf("devStat: %d\r\n", devStat);
sdivarci 0:0061165683ee 578
sdivarci 0:0061165683ee 579 if (devStat & SIE_DS_SUS_CH) {
sdivarci 0:0061165683ee 580 // Suspend status changed
sdivarci 0:0061165683ee 581 if((devStat & SIE_DS_SUS) != 0) {
sdivarci 0:0061165683ee 582 suspendStateChanged(0);
sdivarci 0:0061165683ee 583 }
sdivarci 0:0061165683ee 584 }
sdivarci 0:0061165683ee 585
sdivarci 0:0061165683ee 586 if (devStat & SIE_DS_RST) {
sdivarci 0:0061165683ee 587 // Bus reset
sdivarci 0:0061165683ee 588 if((devStat & SIE_DS_SUS) == 0) {
sdivarci 0:0061165683ee 589 suspendStateChanged(1);
sdivarci 0:0061165683ee 590 }
sdivarci 0:0061165683ee 591 busReset();
sdivarci 0:0061165683ee 592 }
sdivarci 0:0061165683ee 593 }
sdivarci 0:0061165683ee 594
sdivarci 0:0061165683ee 595 if (LPC_USB->DevIntSt & EP_SLOW) {
sdivarci 0:0061165683ee 596 // (Slow) Endpoint Interrupt
sdivarci 0:0061165683ee 597
sdivarci 0:0061165683ee 598 // Process each endpoint interrupt
sdivarci 0:0061165683ee 599 if (LPC_USB->EpIntSt & EP(EP0OUT)) {
sdivarci 0:0061165683ee 600 if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) {
sdivarci 0:0061165683ee 601 // this is a setup packet
sdivarci 0:0061165683ee 602 EP0setupCallback();
sdivarci 0:0061165683ee 603 } else {
sdivarci 0:0061165683ee 604 EP0out();
sdivarci 0:0061165683ee 605 }
sdivarci 0:0061165683ee 606 LPC_USB->DevIntClr = EP_SLOW;
sdivarci 0:0061165683ee 607 }
sdivarci 0:0061165683ee 608
sdivarci 0:0061165683ee 609 if (LPC_USB->EpIntSt & EP(EP0IN)) {
sdivarci 0:0061165683ee 610 selectEndpointClearInterrupt(EP0IN);
sdivarci 0:0061165683ee 611 LPC_USB->DevIntClr = EP_SLOW;
sdivarci 0:0061165683ee 612 EP0in();
sdivarci 0:0061165683ee 613 }
sdivarci 0:0061165683ee 614
sdivarci 0:0061165683ee 615 for (uint8_t num = 2; num < 16*2; num++) {
sdivarci 0:0061165683ee 616 if (LPC_USB->EpIntSt & EP(num)) {
sdivarci 0:0061165683ee 617 selectEndpointClearInterrupt(num);
sdivarci 0:0061165683ee 618 epComplete |= EP(num);
sdivarci 0:0061165683ee 619 LPC_USB->DevIntClr = EP_SLOW;
sdivarci 0:0061165683ee 620 if ((instance->*(epCallback[num - 2]))()) {
sdivarci 0:0061165683ee 621 epComplete &= ~EP(num);
sdivarci 0:0061165683ee 622 }
sdivarci 0:0061165683ee 623 }
sdivarci 0:0061165683ee 624 }
sdivarci 0:0061165683ee 625 }
sdivarci 0:0061165683ee 626 }
sdivarci 0:0061165683ee 627
sdivarci 0:0061165683ee 628 #endif