Mihail Stoyanov
Fork of the official mbed C/C++ SDK provides the software platform and libraries to build your applications. The fork has the documentation converted to Doxygen format
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Fork of
mbed
by 
mbed official
Revision 0:82220227f4fa, committed 2008-04-08
- Comitter:
- simon.ford@mbed.co.uk
- Date:
- Tue Apr 08 14:12:21 2008 +0000
- Child:
- 1:6b7f447ca868
- Commit message:
- A first develoment release of the mbed libraries
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/AnalogIn.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,76 @@
+/* mbed Microcontroller Library - AnalogIn
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_ANALOGIN_H
+#define MBED_ANALOGIN_H
+
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: AnalogIn
+ * An analog input, used for reading the voltage on a pin
+ */
+class AnalogIn : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: AnalogIn
+ * Create an AnalogIn connected to the specified pin
+ *
+ * Variables:
+ * pin - AnalogIn pin to connect to (15-20)
+ */
+ AnalogIn(int pin);
+
+ /* Group: Access Methods */
+
+ /* Function: read
+ * Read the input, measured as a percentage (float)
+ *
+ * Variables:
+ * returns - A floating-point value representing the current input voltage,
+ * measured as a percentage. The returned value will lie between
+ * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
+ */
+ float read();
+
+ /* Function: read_v
+ * Read the input, measured in volts (float)
+ *
+ * Variables:
+ * returns - A floating-point value representing the current input voltage,
+ * measured in volts. The returned value will lie between
+ * 0.0f (representing 0v / 0%) and 3.3f (representing 3.3v / 100%).
+ */
+ float read_v();
+
+ /* Function: read_mv
+ * Read the input, measured in milli-volts (int)
+ *
+ * Variables:
+ * returns - An integer value representing the current input voltage,
+ * measured in milli-volts. The returned value will lie between
+ * 0 (representing 0v / 0%) and 3300 (representing 3.3v / 100%).
+ */
+ int read_mv();
+
+ /* Group: Access Methods Shorthand */
+
+ /* Function: operator float
+ * A shorthand for <read>
+ */
+ operator float();
+
+protected:
+
+ int _id;
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/AnalogOut.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,94 @@
+/* mbed Microcontroller Library - AnalogOut
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_ANALOGOUT_H
+#define MBED_ANALOGOUT_H
+
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: AnalogOut
+ * An analog output, used for setting the voltage on a pin
+ */
+class AnalogOut : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: AnalogOut
+ * Create an AnalogOut connected to the specified pin
+ *
+ * Variables:
+ * pin - AnalogOut pin to connect to (18)
+ */
+ AnalogOut(int pin);
+
+ /* Group: Access Methods */
+
+ /* Function: write
+ * Set the output voltage, specified as a percentage (float)
+ *
+ * Variables:
+ * percent - A floating-point value representing the output voltage,
+ * specified as a percentage. The value should lie between
+ * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
+ * Values outside this range will be saturated to 0.0f or 1.0f.
+ */
+ void write(float percent);
+
+ /* Function: write_v
+ * Set the output voltage, specified in volts (float)
+ *
+ * Variables:
+ * v - A floating-point value representing the output voltage,
+ * specified in volts. The value should lie between
+ * 0.0f (representing 0v / 0%) and 3.3f (representing 3.3v / 100%).
+ * Values outside this range will be saturated to 0.0f or 3.3f.
+ */
+ void write_v(float v);
+
+ /* Function: write_mv
+ * Set the output voltage, specified in mili-volts (int)
+ *
+ * Variables:
+ * mv - An integer value representing the output voltage,
+ * specified in milli-volts. The value should lie between
+ * 0 (representing 0v / 0%) and 3300 (representing 3.3v / 100%).
+ * Values outside this range will be saturated to 0 or 3300.
+ */
+ void write_mv(int mv);
+
+ /* Function: read
+ * Return the current output voltage setting, measured as a percentage (float)
+ *
+ * Variables:
+ * returns - A floating-point value representing the current voltage being output on the pin,
+ * measured as a percentage. The returned value will lie between
+ * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
+ *
+ * Note:
+ * This value may not match exactly the value set by a previous <write>.
+ */
+ float read();
+
+ /* Group: Access Method Shorthand */
+
+ /* Function: operator=
+ * A shorthand for <write>
+ */
+ AnalogOut& operator= (float percent);
+ AnalogOut& operator= (AnalogOut& rhs);
+
+ /* Function: operator float()
+ * A shorthand for <read>
+ */
+ operator float();
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Base.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,42 @@
+/* mbed Microcontroller Library - Base
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_BASE_H
+#define MBED_BASE_H
+
+#define MBED_BASE_NUM_OBJECTS 128 // max # base objects
+#define MBED_BASE_SIZE_NAME 16 // max size of object name, including the null-termination
+
+#include "rt_sys.h"
+
+namespace mbed {
+
+class Base {
+
+public:
+
+ Base();
+ virtual ~Base();
+
+ void name(const char* name);
+ const char* name();
+ const char* type();
+
+ static Base* lookup(const char* name);
+
+ virtual FILEHANDLE sys_open(const char* name, int openmode);
+
+protected:
+
+ const char* _type; // The class type
+ char _name[MBED_BASE_SIZE_NAME]; // The class instance name
+
+ static int _uid; // The counter used to generate the uid's
+ static Base* _objects[MBED_BASE_NUM_OBJECTS]; // Pointers to all the objects to enable things like rpc
+
+};
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/BusIn.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,64 @@
+/* mbed Microcontroller Library - BusIn
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_BUSIN_H
+#define MBED_BUSIN_H
+
+#include "Base.h"
+#include "DigitalIn.h"
+
+namespace mbed {
+
+/* Class: BusIn
+ * A digital input bus, used for reading the state of a collection of pins
+ */
+class BusIn : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: BusIn
+ * Create an BusIn, connected to the specified pins
+ *
+ * Variables:
+ * p<n> - DigitalIn pin to connect to bus bit <n> (5-30, NOT_CONNECTED)
+ *
+ * Note:
+ * It is only required to specify as many pin variables as is required
+ * for the bus; the rest will default to NOT_CONNECTED
+ */
+ BusIn(int p0, int p1 = NOT_CONNECTED, int p2 = NOT_CONNECTED, int p3 = NOT_CONNECTED,
+ int p4 = NOT_CONNECTED, int p5 = NOT_CONNECTED, int p6 = NOT_CONNECTED, int p7 = NOT_CONNECTED,
+ int p8 = NOT_CONNECTED, int p9 = NOT_CONNECTED, int p10 = NOT_CONNECTED, int p11 = NOT_CONNECTED,
+ int p12 = NOT_CONNECTED, int p13 = NOT_CONNECTED, int p14 = NOT_CONNECTED, int p15 = NOT_CONNECTED);
+
+ virtual ~BusIn();
+
+ /* Group: Access Methods */
+
+ /* Function: read
+ * Read the value of the input bus
+ *
+ * Variables:
+ * returns - An integer with each bit corresponding to the value read from the associated DigitalIn pin
+ */
+ int read();
+
+ /* Group: Access Method Shorthand */
+
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+
+protected:
+
+ DigitalIn* _pin[16];
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/BusOut.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,79 @@
+/* mbed Microcontroller Library - BusOut
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_BUSOUT_H
+#define MBED_BUSOUT_H
+
+#include "Base.h"
+#include "DigitalOut.h"
+
+namespace mbed {
+
+/* Class: BusOut
+ * A digital output bus, used for setting the state of a collection of pins
+ */
+class BusOut : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: BusOut
+ * Create an BusOut, connected to the specified pins
+ *
+ * Variables:
+ * p<n> - DigitalOut pin to connect to bus bit <n> (5-30, NOT_CONNECTED)
+ *
+ * Note:
+ * It is only required to specify as many pin variables as is required
+ * for the bus; the rest will default to NOT_CONNECTED
+ */
+ BusOut(int p0, int p1 = NOT_CONNECTED, int p2 = NOT_CONNECTED, int p3 = NOT_CONNECTED,
+ int p4 = NOT_CONNECTED, int p5 = NOT_CONNECTED, int p6 = NOT_CONNECTED, int p7 = NOT_CONNECTED,
+ int p8 = NOT_CONNECTED, int p9 = NOT_CONNECTED, int p10 = NOT_CONNECTED, int p11 = NOT_CONNECTED,
+ int p12 = NOT_CONNECTED, int p13 = NOT_CONNECTED, int p14 = NOT_CONNECTED, int p15 = NOT_CONNECTED);
+
+ virtual ~BusOut();
+
+ /* Group: Access Methods */
+
+ /* Function: write
+ * Write the value to the output bus
+ *
+ * Variables:
+ * value - An integer specifying a bit to write for every corresponding DigitalOut pin
+ */
+ void write(int value);
+
+
+ /* Function: read
+ * Read the value currently output on the bus
+ *
+ * Variables:
+ * returns - An integer with each bit corresponding to associated DigitalOut pin setting
+ */
+ int read();
+
+ /* Group: Access Method Shorthand */
+
+ /* Function: operator=
+ * A shorthand for <write>
+ */
+ BusOut& operator= (int v);
+ BusOut& operator= (BusOut& rhs);
+
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+
+protected:
+
+ DigitalOut* _pin[16];
+
+};
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Debug.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,94 @@
+/* mbed Microcontroller Library - Debug
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_DEBUG_H
+#define MBED_DEBUG_H
+
+#include "DebugTracer.h"
+
+namespace mbed {
+
+/* Section: debug
+ * Error reporting and debugging functions
+ */
+
+// As seen by user, for documentation purposes only
+#if 0
+/* Function: ERROR
+ * Report a fatal runtime error. Attempts to report the specified error message through the
+ * USB serial port, then dies with a fatal runtime error (siren lights)
+ *
+ * Variables:
+ * format - printf-style format string, followed by associated variables
+ */
+void ERROR(const char* format, ...);
+#endif
+
+#define ERROR(...) mbed_error(__FILE__, __LINE__, __VA_ARGS__)
+void mbed_error(const char* file, int line, const char* fmt, ...);
+
+// Internal use for "official" errors
+void mbed_error(const char* file, int line, int code, const char* fmt, ...);
+
+// As seen by user, for documentation purposes only
+#if 0
+/* Function: ASSERT
+ * Assert a condition is true, and report a fatal runtime error on failure. If
+ * the condition is true (non-zero), the function simply returns. If the
+ * condition is false (0), it attempts to report the specified error message through the
+ * USB serial port, then dies with a fatal runtime error (siren lights)
+ *
+ * Variables:
+ * condition - The condition variable to be tested. 0 causes an error to be reported
+ * format - printf-style format string, followed by associated variables
+ */
+void ASSERT(int condition, const char* fmt = 0, ...);
+#endif
+
+#define ASSERT(...) mbed_assert(__FILE__, __LINE__, __VA_ARGS__)
+void mbed_assert(const char* file, int line, int condition, const char* fmt = 0, ...);
+
+// Internal use for "official" errors
+void mbed_assert(const char* file, int line, int condition, int code, const char* fmt = 0, ...);
+
+// As seen by user, for documentation purposes only
+#if 0
+/* Function: DEBUG
+ * Report a debug message. Attempts to report the specified
+ * debug message through the USB serial port.
+ *
+ * Variables:
+ * format - printf-style format string, followed by associated variables
+ */
+void DEBUG(const char* format, ...);
+#endif
+
+// Actual macro and prototype
+#define DEBUG(...) mbed_debug(__FILE__, __LINE__, __VA_ARGS__)
+void mbed_debug(const char* file, int line, const char* format, ...);
+
+
+/* Function: DEBUG_LED1
+ * Set the state of LED1
+ */
+void DEBUG_LED1(int v);
+
+/* Function: DEBUG_LED2
+ * Set the state of LED2
+ */
+void DEBUG_LED2(int v);
+
+/* Function: DEBUG_LED3
+ * Set the state of LED3
+ */
+void DEBUG_LED3(int v);
+
+/* Function: DEBUG_LED4
+ * Set the state of LED4
+ */
+void DEBUG_LED4(int v);
+
+} // namepsace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/DebugTracer.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,91 @@
+/* mbed Microcontroller Library - DebugTracer
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_DEBUGTRACER_H
+#define MBED_DEBUGTRACER_H
+
+#include "Base.h"
+#include "stdio.h"
+
+#define MAX_TRACER_DEPTH 32
+
+namespace mbed {
+
+//#define METHOD(name)
+//#define FUNCTION(name)
+#define METHOD(name) DebugTracer _tracer_instance(name, this)
+#define FUNCTION(name) DebugTracer _tracer_instance(name)
+
+/* Class: DebugTracer
+ * A code instrumentation utility
+ *
+ * This object adds a function name or methodname/object instance
+ * to a stack on construction, and removes it on destruvtion. It
+ * can therefore be used at the start of functions to trace entry, exit
+ * and the call graph/stack.
+ *
+ * Wrapped in macros and with altered implementations, the same instrumentation can:
+ * - be #defined away to nothing
+ * - provide the call stack on encountering an error
+ * - trace the runtime call graph (for the whole program run, or programatically on/off)
+ *
+ *
+ * Example:
+ *
+ * Function example
+ * > void foo(int x) { FUNCTION("foo");
+ * > // normal code
+ *
+ * Class method example
+ * > void Foo::bar(int x) { METHOD("bar");
+ * > // normal code
+ */
+class DebugTracer {
+
+public:
+
+ /* Constructor: DebugTracer
+ * Record the method and object instance it is called on
+ * to the call stack
+ */
+ DebugTracer(char* method, Base* object = 0) {
+ _functions[_depth] = method;
+ _objects[_depth] = object;
+ _depth++;
+ }
+
+ /* Destructor: ~DebugTracer
+ * Pop from the call stack
+ */
+ ~DebugTracer() {
+ _depth--;
+ }
+
+ static void stack() {
+ fprintf(stderr, "Trace (depth = %d):\n", _depth);
+ for(int i=0; i<_depth; i++) {
+ // indent
+ for(int j=0; j<i; j++) {
+ fprintf(stderr, " ");
+ }
+ if(_objects[i]) {
+ fprintf(stderr, "%s::", _objects[i]->type());
+ }
+ fprintf(stderr, "%s\n", _functions[i]);
+ }
+ }
+
+ static int enabled;
+
+protected:
+
+ static Base* _objects[MAX_TRACER_DEPTH];
+ static char* _functions[MAX_TRACER_DEPTH];
+ static int _depth;
+
+};
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/DigitalIn.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,83 @@
+/* mbed Microcontroller Library - DigitalIn
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_DIGITALIN_H
+#define MBED_DIGITALIN_H
+
+#include "Base.h"
+#include "LPC2300.h"
+
+typedef void (*VoidFunctionPointer)(void);
+
+namespace mbed {
+
+/* Class: DigitalIn
+ * A digital input, used for reading the state of a pin
+ */
+
+class DigitalIn : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: DigitalIn
+ * Create a DigitalIn connected to the specified pin
+ *
+ * Variables:
+ * pin - DigitalIn pin to connect to (5-30)
+ */
+ DigitalIn(int pin);
+
+ /* Function: rise
+ * Attach a function to call when a rising edge occurs on the input
+ *
+ * Variables:
+ * fptr - A pointer to a void function, or 0 to set as none
+ */
+ void rise(void (*fptr)(void));
+
+ /* Function: fall
+ * Attach a function to call when a falling edge occurs on the input
+ *
+ * Variables:
+ * fptr - A pointer to a void function, or 0 to set as none
+ */
+ void fall(void (*fptr)(void));
+
+ /* Group: Access Methods */
+
+ /* Function: read
+ * Read the input, represented as 0 or 1 (int)
+ *
+ * Variables:
+ * returns - An integer representing the state of the input pin,
+ * 0 for logical 0 (0v) and 1 for logical 1 (3.3v)
+ */
+ int read();
+
+
+ /* Group: Access Method Shorthand */
+
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+
+ static void _irq(); // Called on a GPIO interrupt
+
+protected:
+
+ LPC2300::GPIORF* _rf;
+ unsigned int _mask;
+ int _id;
+
+ static VoidFunctionPointer _rising[48];
+ static VoidFunctionPointer _falling[48];
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/DigitalOut.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,73 @@
+/* mbed Microcontroller Library - DigitalOut
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_DIGITALOUT_H
+#define MBED_DIGITALOUT_H
+
+#include "Base.h"
+#include "LPC2300.h"
+
+namespace mbed {
+
+/* Class: DigitalOut
+ * A digital output, used for setting the state of a pin
+ */
+class DigitalOut : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: DigitalOut
+ * Create a DigitalOut connected to the specified pin
+ *
+ * Variables:
+ * pin - DigitalOut pin to connect to (5-30)
+ */
+ DigitalOut(int pin);
+
+ /* Group: Access Methods */
+
+ /* Function: write
+ * Set the output, specified as 0 or 1 (int)
+ *
+ * Variables:
+ * value - An integer specifying the pin output value,
+ * 0 for logical 0 (0v) and 1 (or any other non-zero value) for logical 1 (3.3v).
+ */
+ void write(int value);
+
+ /* Function: read
+ * Return the output setting, represented as 0 or 1 (int)
+ *
+ * Variables:
+ * returns - An integer representing the output setting of the pin,
+ * 0 for logical 0 (0v) and 1 for logical 1 (3.3v)
+ */
+ int read();
+
+ /* Group: Access Method Shorthand */
+
+ /* Function: operator=
+ * A shorthand for <write>
+ */
+ DigitalOut& operator= (int v);
+ DigitalOut& operator= (DigitalOut& rhs);
+
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+
+protected:
+
+ LPC2300::GPIORF* _rf;
+ unsigned int _mask;
+ int _id;
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FileHandle.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,95 @@
+/* mbed Microcontroller Library - FileHandle
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_FILEHANDLE_H
+#define MBED_FILEHANDLE_H
+
+namespace mbed {
+
+/* Class: FileHandle
+ * An OO equivalent of the internal FILEHANDLE variable
+ * and associated _sys_* functions
+ *
+ * FileHandle is an abstract class, needing at least sys_write and
+ * sys_read to be implmented for a simple interactive device
+ *
+ * No one ever directly tals to/instanciates a FileHandle - it gets
+ * created by FileSystem, and wrapped up by stdio
+ */
+class FileHandle {
+
+public:
+
+ //virtual ~FileHandle() { }
+
+ /* Function: sys_write
+ * Write the contents of a buffer to the file
+ *
+ * Parameters:
+ * buffer - the buffer to write from
+ * length - the number of characters to write
+ * mode - the mode of the file, 0 (normal) or 1 (binary); this may be unused?
+ *
+ * Returns:
+ * 0 on success, -1 on error, or the number of characters not written on partial success
+ */
+ virtual int sys_write(const unsigned char* buffer, unsigned int length, int mode) = 0;
+
+ virtual int sys_close() = 0;
+
+ /* Function: sys_read
+ * Reads the contents of the file into a buffer
+ *
+ * Parameters:
+ * buffer - the buffer to read in to
+ * length - the number of characters to read
+ * mode - the mode of the file, 0 (normal) or 1 (binary); this may be unused?
+ *
+ * Returns:
+ * 0 on success, -1 on error, or the number of characters not read on partial success. EOF is
+ * signaled by setting the top bit (0x80000000) of the return value.
+ */
+ virtual int sys_read(unsigned char* buffer, unsigned int length, int mode) = 0;
+
+ /* Function: sys_istty
+ * Check if the handle is for a interactive terminal device
+ *
+ * If so, unbuffered behaviour is used by default
+ *
+ * Returns:
+ * 0 - no
+ * 1 - yes
+ */
+ virtual int sys_istty() = 0 ;
+
+ /* Function: sys_seek
+ * Move the file position to a given offset from the file start
+ *
+ * Returns:
+ * 0 on success, -1 on failure or unsupported
+ */
+ virtual int sys_seek(int position) = 0;
+
+ /* Function: sys_ensure
+ * Flush any OS buffers associated with the FileHandle, ensuring it
+ * is up to date on disk
+ *
+ * Returns:
+ * 0 on success or un-needed, -1 on error
+ */
+ virtual int sys_ensure() = 0;
+
+ /* Function: sys_flen
+ * Find the current length of the file
+ *
+ * Returns:
+ * The current length of the file, or -1 on error
+ */
+ virtual int sys_flen() = 0;
+
+};
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/I2C.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,79 @@
+/* mbed Microcontroller Library - I2C
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_I2C_H
+#define MBED_I2C_H
+
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: I2C
+ * An I2C Master, used for communicating with I2C slave devices
+ */
+class I2C : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: I2C
+ * Create an I2C Master interface, connected to the specified pins
+ *
+ * Variables:
+ * sda - I2C data line pin
+ * scl - I2C clock line pin
+ *
+ * Pin Options:
+ * (9, 10) or (28, 27)
+ */
+ I2C(int sda, int scl);
+
+ /* Function: frequency
+ * Set the frequency of the I2C interface
+ *
+ * Variables:
+ * hz - The bus frequency in hertz
+ */
+ void frequency(int hz);
+
+ /* Group: Access Methods */
+
+ /* Function: read
+ * Read from an I2C slave
+ *
+ * Variables:
+ * address - 7-bit I2C slave address (0-127)
+ * data - Pointer to the byte-array to read data in to
+ * length - Number of bytes to read
+ */
+ void read(int address, char* data, int length);
+
+ /* Function: write
+ * Write to an I2C slave
+ *
+ * Variables:
+ * address - 7-bit I2C slave address (0-127)
+ * data - Pointer to the byte-array data to send
+ * length - Number of bytes to send
+ */
+ void write(int address, char* data, int length);
+
+protected:
+
+ void configure();
+
+ int _id;
+
+ int _uid;
+ static int _uidcounter;
+
+ int _hz;
+ static int _config[3];
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC2300.h Tue Apr 08 14:12:21 2008 +0000 @@ -0,0 +1,12 @@ +/* mbed Microcontroller Library - LPC2300 + * Copyright (c) 2007-2008, sford + */ + +#ifndef MBED_LPC2300_H +#define MBED_LPC2300_H + +#include "LPC23xx.h" +#include "LPC2300_HAL.h" +#include "LPC2300_MAP.h" + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC2300_HAL.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,412 @@
+/* mbed Microcontroller Library - LPC2300 HAL
+ * Copyright (c) 2007-2008, sford
+ *
+ * This should be anything specific to abstraction the LPC2300
+ *
+ * The HAL has no state associated with it. It is just a nice way to poke registers
+ * It is still specific to the chip, but a neat interface and a bit more general
+ * it is subject ot change and not exposed to the general user
+ */
+
+#ifndef MBED_LPC2300_HAL_H
+#define MBED_LPC2300_HAL_H
+
+#include "LPC23xx.h"
+
+namespace LPC2300 {
+
+/* Section: LPC2300 */
+
+//===================================================================
+// General
+//===================================================================
+
+typedef volatile unsigned int reg32;
+
+#define NOT_CONNECTED (-1)
+
+//===================================================================
+// Pin Connect Block
+//===================================================================
+
+/* Function: pin_function
+ * Set the port function (0-3)
+ */
+void pin_function(int port, int function);
+
+/* Function: pin_pullup
+ * Set the port resistor to pullup
+ */
+void pin_pullup(int port);
+
+/* Function: pin_pulldown
+ * Set the port resistor to pulldown
+ */
+void pin_pulldown(int port);
+
+/* Function: pin_pullnone
+ * Set the port resistor to none
+ */
+void pin_pullnone(int port);
+
+//===================================================================
+// GPIO
+//===================================================================
+
+struct GPIORF {
+ volatile unsigned int dir; // 0x00
+ volatile unsigned int _nc; // 0x04
+ volatile unsigned int _nc2; // 0x08
+ volatile unsigned int _nc3; // 0x0C
+ volatile unsigned int mask; // 0x10
+ volatile unsigned int pin; // 0x14
+ volatile unsigned int set; // 0x18
+ volatile unsigned int clr; // 0x1C
+};
+
+/* Function: gpio_input
+ * Set the port GPIO as an input
+ */
+void gpio_input(int port);
+
+/* Function: gpio_output
+ * Set the port GPIO as an output
+ */
+void gpio_output(int port);
+
+/* Function: gpio_write
+ * Write a value to the GPIO port (v & 1)
+ */
+void gpio_write(int port, int v);
+
+/* Function: gpio_read
+ * Read a value from the GPIO port (0 or 1)
+ */
+int gpio_read(int port);
+
+//===================================================================
+// GPIO IRQs
+//===================================================================
+
+struct GPIOInterruptsRF {
+ reg32 StatR; // 0x00
+ reg32 StatF; // 0x04
+ reg32 Clr; // 0x08
+ reg32 EnR; // 0x0C
+ reg32 EnF; // 0x10
+};
+
+/* Function: gpio_irq_enable_rising
+ * Enable the rising edge interrupt
+ */
+void gpio_irq_enable_rising(int port);
+
+/* Function: gpio_irq_enable_falling
+ * Enable the falling edge interrupt
+ */
+void gpio_irq_enable_falling(int port);
+
+/* Function: gpio_irq_disable_rising
+ * Disable the rising edge interrupt
+ */
+void gpio_irq_disable_rising(int port);
+
+/* Function: gpio_irq_disable_falling
+ * Disable the falling edge interrupt
+ */
+void gpio_irq_disable_falling(int port);
+
+/* Function: gpio_irq_clear
+ * Clear rising and falling interrupt for the port
+ */
+void gpio_irq_clear(int port);
+
+int gpio_irq_pending();
+int gpio_irq_pending_rising(int port);
+int gpio_irq_pending_falling(int port);
+
+//===================================================================
+// Analog-to-Digital Converter
+//===================================================================
+
+/* Function: adc_poweron
+ * Turn on the ADC
+ */
+void adc_poweron();
+
+/* Function: adc_poweroff
+ * Turn off the ADC
+ */
+void adc_poweroff();
+
+/* Function: adc_init
+ * Setup the ADC ready for reading
+ */
+void adc_init();
+
+/* Function: adc_read
+ * Read the value of the ADC (10-bit, id 0-5)
+ */
+int adc_read(int id);
+
+//===================================================================
+// Digital-to-Analog Converter
+//===================================================================
+
+/* Function: dac_poweron
+ * Turn on the DAC
+ */
+void dac_poweron();
+
+/* Function: dac_poweroff
+ * Turn off the DAC
+ */
+void dac_poweroff();
+
+/* Function: dac_init
+ * Setup the DAC ready for writinbg
+ */
+void dac_init();
+
+/* Function: dac_write
+ * Write a value to the DAC (10-bit)
+ */
+void dac_write(int value);
+
+/* Function: dac_read
+ * Read the value currently set as the DAC output (10-bit)
+ */
+int dac_read();
+
+//===================================================================
+// PWM
+//===================================================================
+
+struct LPC2368_PWM_RF {
+ reg32 IR; // 0x00 - Interrupt Register
+ reg32 TCR; // 0x04 - Timer Control Register
+ reg32 TC; // 0x08 - Timer Counter
+ reg32 PR; // 0x0C - Prescale Register
+ reg32 PC; // 0x10 - Prescale Counter
+ reg32 MCR; // 0x14 - Match Control Register
+ reg32 MR0; // 0x18 - Match Register 0
+ reg32 MR1; // 0x1C - Match Register 1
+ reg32 MR2; // 0x20 - Match Register 2
+ reg32 MR3; // 0x24 - Match Register 3
+ reg32 CCR; // 0x28 - Capture Control Register
+ reg32 CR0; // 0x2C - Capture Register 1
+ reg32 CR1; // 0x30 - Capture Register 2
+ reg32 CR2; // 0x34 - Capture Register 3
+ reg32 CR3; // 0x38 - Capture Register 4
+ reg32 EMR; // 0x3C - External Match Register
+ reg32 MR4; // 0x40 - Match Register 4
+ reg32 MR5; // 0x44 - Match Register 5
+ reg32 MR6; // 0x48 - Match Register 6
+ reg32 PCR; // 0x4C - PWM Control Register
+ reg32 LER; // 0x50 - Load Enable Register
+ reg32 _nc[7]; // 0x54-0x6C
+ reg32 CTCR; // 0x70 - Count Control Register
+};
+
+#define LPC2368_PWM ((LPC2368_PWM_RF*)0xE0018000)
+
+#define TCR_CNT_EN (1 << 0)
+#define TCR_RESET (1 << 1)
+#define TCR_PWM_EN (1 << 3)
+
+//===================================================================
+// SPI Master (SSP)
+//===================================================================
+
+struct SPIRF {
+ reg32 CR0; // 0x00
+ reg32 CR1; // 0x04
+ reg32 DR; // 0x08
+ reg32 SR; // 0x0C
+ reg32 CPSR; // 0x10
+ reg32 IMSC; // 0x14
+ reg32 RIS; // 0x18
+ reg32 MIS; // 0x1C
+ reg32 ICR; // 0x20
+ reg32 DMACR; // 0x24
+};
+
+void ssp_format(int id, int bits, int phase, int polarity);
+void ssp_frequency(int id, int hz);
+void ssp_enable(int id);
+void ssp_disable(int id);
+
+
+int ssp_read(int id);
+void ssp_write(int id, int value);
+int ssp_readable(int id);
+int ssp_writeable(int id);
+
+void ssp_poweron(int id);
+void ssp_poweroff(int id);
+
+/*
+int ssp_busy(int id);
+void ssp_clear(int id);
+*/
+
+
+//===================================================================
+// Uart
+//===================================================================
+
+struct UartRF {
+ union {
+ reg32 RBR; // 0x00 - Receive Buffer Register [DLAB=0]
+ reg32 THR; // 0x00 - Transmit Holding Register [DLAB=0]
+ reg32 DLL; // 0x00 - Divisor Latch (LSB) [DLAB=1]
+ };
+ union {
+ reg32 DLM; // 0x04 - Divisor Latch (MSB) [DLAB=1]
+ reg32 IER; // 0x04 - Interrupt Enable Register [DLAB=0]
+ };
+ union {
+ reg32 IIR; // 0x08 - Interrupt ID Register
+ reg32 FCR; // 0x08 - Fifo Control Register
+ };
+ reg32 LCR; // 0x0C - Line Control Register
+ reg32 MCR; // 0x10 - Modem Control Register (UART1 only)
+ reg32 LSR; // 0x14 - Line Status Register
+ reg32 MSR; // 0x18 - Modem Status Register (UART1 only)
+ reg32 SCR; // 0x1C - Scratch Pad Register
+ reg32 ACR; // 0x20 - Auto-baud Control Register
+ reg32 ICR; // 0x24 - IrDA Control Register (UART3 only)
+ reg32 FDR; // 0x28 - Fractional Divider Register
+ reg32 _nc; // 0x2C - unused
+ reg32 TER; // 0x30 - Transmit Enable Register
+};
+
+enum Parity {
+ None = 0,
+ Odd,
+ Even,
+ Forced1,
+ Forced0
+};
+
+/* Function: uart_poweron
+ * Turn on the Uart power
+ */
+void uart_poweron(int id);
+
+/* Function: uart_poweroff
+ * Turn off the Uart power
+ */
+void uart_poweroff(int id);
+
+void uart_baud(int id, int baudrate);
+void uart_format(int id, int data_bits, Parity parity, int stop_bits);
+void uart_enable(int id);
+void uart_disable(int id);
+
+int uart_getc(int id);
+void uart_putc(int id, int c);
+int uart_readable(int id);
+int uart_writable(int id);
+
+// I2C
+
+struct I2CRF {
+ reg32 I2CONSET; // 0x00 - I2C Control Set Register
+ reg32 I2STAT; // 0x04 - I2C Status Register
+ reg32 I2DAT; // 0x08 - I2C Data Register
+ reg32 I2ADR; // 0x0C - I2C Slave Address Register
+ reg32 I2SCLH; // 0x10 - SCH Duty Cycle Register High
+ reg32 I2SCLL; // 0x14 - SCL Duty Cycle Register Low
+ reg32 I2CONCLR; // 0x18 - I2C Control Clear Register
+};
+
+
+void i2c_poweron(int id);
+void i2c_poweroff(int id);
+void i2c_frequency(int id, int hz);
+void i2c_enable(int id);
+void i2c_conset(int id, int start, int stop, int interrupt, int acknowledge);
+void i2c_conclr(int id, int start, int stop, int interrupt, int acknowledge);
+void i2c_wait_SI(int id);
+void i2c_clear_SI(int id);
+int i2c_status(int id);
+int i2c_start(int id, int address);
+int i2c_write(int id, int value);
+void i2c_stop(int id);
+int i2c_read(int id, int last);
+int i2c_read(int id);
+int i2c_readlast(int id);
+
+// Timer
+
+
+struct TimerRF {
+ reg32 ir; // 0x00
+ reg32 tcr; // 0x04
+ reg32 tc; // 0x08
+ reg32 pr; // 0x0C
+ reg32 pc; // 0x10
+ reg32 mcr; // 0x14
+ reg32 mr0; // 0x18
+ reg32 mr1; // 0x1C
+ reg32 mr2; // 0x20
+ reg32 mr3; // 0x24
+ reg32 ccr; // 0x28
+ reg32 cr0; // 0x2C
+ reg32 cr1; // 0x30
+ reg32 cr2; // 0x34
+ reg32 cr3; // 0x38
+ reg32 emr; // 0x3C
+ reg32 _nc[12]; // 0x40-0x6C
+ reg32 ctcr; // 0x70
+};
+
+/* Function: timer_poweron
+ * Turn on the Timer power
+ */
+void timer_poweron(int id);
+
+/* Function: timer_poweroff
+ * Turn off the Timer power
+ */
+void timer_poweroff(int id);
+
+void timer_start(int id, int hz);
+int timer_read(int id);
+
+//===================================================================
+// VIC
+//===================================================================
+
+struct VicRF {
+ reg32 IRQStatus; // 0x000
+ reg32 FIQStatus; // 0x004
+ reg32 RawIntr; // 0x008
+ reg32 IntSelect; // 0x00C
+ reg32 IntEnable; // 0x010
+ reg32 IntEnClr; // 0x014
+ reg32 SoftInt; // 0x018
+ reg32 SoftIntClear; // 0x01C
+ reg32 Protection; // 0x020
+ reg32 SWPriorityMask; // 0x024
+ reg32 _nc[54]; // 0x028-0x0FC
+ reg32 VectAddr[32]; // 0x100-0x17C
+ reg32 _nc2[32]; // 0x180-0x1FC
+ reg32 VectPriority[32]; // 0x200-0x27C
+ reg32 _nc3[800]; // 0x280-0xEFC
+ reg32 Address; // 0xF00
+};
+
+void vic_init();
+void vic_vector(int id, void (*fptr)(void) /*__irq*/ , int priority);
+void vic_enable(int id);
+void vic_disable(int id);
+void vic_priority(int id, int priority);
+void vic_acknowledge();
+
+
+
+} // namespace LPC2300
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC2300_MAP.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,68 @@
+/* mbed Microcontroller Library - LPC2300 MAP
+ * Copyright (c) 2007-2008, sford
+ *
+ * This should be anything to do with the mapping of the LPC2300 on to the particular board implementation
+ */
+
+#ifndef MBED_LPC2300_MAP_H
+#define MBED_LPC2300_MAP_H
+
+//===================================================================
+// Define the target board
+//===================================================================
+
+//#define TARGET_MBED64 1
+#define TARGET_PHAT40 1
+//#define TARGET_BREAKOUT 1
+
+//===================================================================
+
+#if TARGET_MBED64
+
+enum {
+ LED1 = 65,
+ LED2 = 66,
+ LED3 = 67,
+ LED4 = 68,
+ USBTX = 69,
+ USBRX = 70
+};
+
+#elif TARGET_PHAT40
+
+enum {
+ LED1 = 32,
+ LED2 = 33,
+ LED3 = 34,
+ LED4 = 35,
+ USBTX = 36,
+ USBRX = 37
+};
+
+#else
+#error "UNRECOGNISED TARGET"
+#endif
+
+namespace LPC2300 {
+
+#define PORT(x,y) ((x*32 + y))
+#define LIST_END 0xFF
+#define NOT_AVAILABLE 0xFF
+
+struct PortMap {
+ unsigned char port; // P0.0 (0) to P4.31 (159)
+ unsigned char id; // Resource ID
+ unsigned char function; // Pin function
+};
+
+int pin_to_port(int pin);
+
+const PortMap* get_port_map(const PortMap* map, int pin);
+
+extern const PortMap ADC_PORTMAP[];
+extern const PortMap DAC_PORTMAP[];
+extern const PortMap PWM_PORTMAP[];
+
+} // namespace LPC2300
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC23xx.h Tue Apr 08 14:12:21 2008 +0000 @@ -0,0 +1,1131 @@ +/****************************************************************************** + * LPC23xx.h: Header file for NXP LPC23xx/24xx Family Microprocessors + * The header file is the super set of all hardware definition of the + * peripherals for the LPC23xx/24xx family microprocessor. + * + * Copyright(C) 2006, NXP Semiconductor + * All rights reserved. + * + * History + * 2005.10.01 ver 1.00 Prelimnary version, first Release + * 2007.05.17 ver 1.01 several corrections + * +******************************************************************************/ + +#ifndef __LPC23xx_H +#define __LPC23xx_H + +/* Vectored Interrupt Controller (VIC) */ +#define VIC_BASE_ADDR 0xFFFFF000 +#define VICIRQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000)) +#define VICFIQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004)) +#define VICRawIntr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008)) +#define VICIntSelect (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C)) +#define VICIntEnable (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010)) +#define VICIntEnClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014)) +#define VICSoftInt (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018)) +#define VICSoftIntClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C)) +#define VICProtection (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020)) +#define VICSWPrioMask (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x024)) + +#define VICVectAddr0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100)) +#define VICVectAddr1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104)) +#define VICVectAddr2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108)) +#define VICVectAddr3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C)) +#define VICVectAddr4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110)) +#define VICVectAddr5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114)) +#define VICVectAddr6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118)) +#define VICVectAddr7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C)) +#define VICVectAddr8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120)) +#define VICVectAddr9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124)) +#define VICVectAddr10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128)) +#define VICVectAddr11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C)) +#define VICVectAddr12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130)) +#define VICVectAddr13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134)) +#define VICVectAddr14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138)) +#define VICVectAddr15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C)) +#define VICVectAddr16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x140)) +#define VICVectAddr17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x144)) +#define VICVectAddr18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x148)) +#define VICVectAddr19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x14C)) +#define VICVectAddr20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x150)) +#define VICVectAddr21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x154)) +#define VICVectAddr22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x158)) +#define VICVectAddr23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x15C)) +#define VICVectAddr24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x160)) +#define VICVectAddr25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x164)) +#define VICVectAddr26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x168)) +#define VICVectAddr27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x16C)) +#define VICVectAddr28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x170)) +#define VICVectAddr29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x174)) +#define VICVectAddr30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x178)) +#define VICVectAddr31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x17C)) + +/* The name convention below is from previous LPC2000 family MCUs, in LPC23xx/24xx, +these registers are known as "VICVectPriority(x)". */ +#define VICVectCntl0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200)) +#define VICVectCntl1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204)) +#define VICVectCntl2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208)) +#define VICVectCntl3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C)) +#define VICVectCntl4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210)) +#define VICVectCntl5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214)) +#define VICVectCntl6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218)) +#define VICVectCntl7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C)) +#define VICVectCntl8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220)) +#define VICVectCntl9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224)) +#define VICVectCntl10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228)) +#define VICVectCntl11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C)) +#define VICVectCntl12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230)) +#define VICVectCntl13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234)) +#define VICVectCntl14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238)) +#define VICVectCntl15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C)) +#define VICVectCntl16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x240)) +#define VICVectCntl17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x244)) +#define VICVectCntl18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x248)) +#define VICVectCntl19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x24C)) +#define VICVectCntl20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x250)) +#define VICVectCntl21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x254)) +#define VICVectCntl22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x258)) +#define VICVectCntl23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x25C)) +#define VICVectCntl24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x260)) +#define VICVectCntl25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x264)) +#define VICVectCntl26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x268)) +#define VICVectCntl27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x26C)) +#define VICVectCntl28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x270)) +#define VICVectCntl29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x274)) +#define VICVectCntl30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x278)) +#define VICVectCntl31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x27C)) + +#define VICVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0xF00)) + + +/* Pin Connect Block */ +#define PINSEL_BASE_ADDR 0xE002C000 +#define PINSEL0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00)) +#define PINSEL1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04)) +#define PINSEL2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x08)) +#define PINSEL3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x0C)) +#define PINSEL4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x10)) +#define PINSEL5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14)) +#define PINSEL6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x18)) +#define PINSEL7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x1C)) +#define PINSEL8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x20)) +#define PINSEL9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x24)) +#define PINSEL10 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x28)) + +#define PINMODE0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x40)) +#define PINMODE1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x44)) +#define PINMODE2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x48)) +#define PINMODE3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x4C)) +#define PINMODE4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x50)) +#define PINMODE5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x54)) +#define PINMODE6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x58)) +#define PINMODE7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x5C)) +#define PINMODE8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x60)) +#define PINMODE9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x64)) + +/* General Purpose Input/Output (GPIO) */ +#define GPIO_BASE_ADDR 0xE0028000 +#define IOPIN0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00)) +#define IOSET0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04)) +#define IODIR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08)) +#define IOCLR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C)) +#define IOPIN1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10)) +#define IOSET1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14)) +#define IODIR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18)) +#define IOCLR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C)) + +/* GPIO Interrupt Registers */ +#define IO0_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x90)) +#define IO0_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x94)) +#define IO0_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x84)) +#define IO0_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x88)) +#define IO0_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x8C)) + +#define IO2_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB0)) +#define IO2_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB4)) +#define IO2_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA4)) +#define IO2_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA8)) +#define IO2_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xAC)) + +#define IO_INT_STAT (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x80)) + +#define PARTCFG_BASE_ADDR 0x3FFF8000 +#define PARTCFG (*(volatile unsigned long *)(PARTCFG_BASE_ADDR + 0x00)) + +/* Fast I/O setup */ +#define FIO_BASE_ADDR 0x3FFFC000 +#define FIO0DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) +#define FIO0MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10)) +#define FIO0PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14)) +#define FIO0SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18)) +#define FIO0CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C)) + +#define FIO1DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) +#define FIO1MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30)) +#define FIO1PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34)) +#define FIO1SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38)) +#define FIO1CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C)) + +#define FIO2DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x40)) +#define FIO2MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x50)) +#define FIO2PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x54)) +#define FIO2SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x58)) +#define FIO2CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x5C)) + +#define FIO3DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x60)) +#define FIO3MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x70)) +#define FIO3PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x74)) +#define FIO3SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x78)) +#define FIO3CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x7C)) + +#define FIO4DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x80)) +#define FIO4MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x90)) +#define FIO4PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x94)) +#define FIO4SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x98)) +#define FIO4CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x9C)) + +/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */ +#define FIO0DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01)) +#define FIO1DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) +#define FIO2DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41)) +#define FIO3DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61)) +#define FIO4DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81)) + +#define FIO0DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03)) +#define FIO1DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23)) +#define FIO2DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43)) +#define FIO3DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63)) +#define FIO4DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83)) + +#define FIO0DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11)) +#define FIO1MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) +#define FIO2MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51)) +#define FIO3MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71)) +#define FIO4MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91)) + +#define FIO0MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13)) +#define FIO1MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33)) +#define FIO2MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53)) +#define FIO3MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73)) +#define FIO4MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93)) + +#define FIO0MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15)) +#define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25)) +#define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55)) +#define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75)) +#define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95)) + +#define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17)) +#define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37)) +#define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57)) +#define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77)) +#define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97)) + +#define FIO0PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19)) +#define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29)) +#define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59)) +#define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79)) +#define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99)) + +#define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B)) +#define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B)) +#define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B)) +#define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B)) +#define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B)) + +#define FIO0SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D)) +#define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D)) +#define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D)) +#define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D)) +#define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D)) + +#define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E)) + +#define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F)) +#define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F)) +#define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F)) +#define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F)) +#define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F)) + +#define FIO0CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E)) + + +/* System Control Block(SCB) modules include Memory Accelerator Module, +Phase Locked Loop, VPB divider, Power Control, External Interrupt, +Reset, and Code Security/Debugging */ +#define SCB_BASE_ADDR 0xE01FC000 + +/* Memory Accelerator Module (MAM) */ +#define MAMCR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000)) +#define MAMTIM (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004)) +#define MEMMAP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040)) + +/* Phase Locked Loop (PLL) */ +#define PLLCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080)) +#define PLLCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084)) +#define PLLSTAT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088)) +#define PLLFEED (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C)) + +/* Power Control */ +#define PCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0)) +#define PCONP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4)) + +/* Clock Divider */ +// #define APBDIV (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100)) +#define CCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x104)) +#define USBCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x108)) +#define CLKSRCSEL (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x10C)) +#define PCLKSEL0 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A8)) +#define PCLKSEL1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1AC)) + +/* External Interrupts */ +#define EXTINT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140)) +#define INTWAKE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144)) +#define EXTMODE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148)) +#define EXTPOLAR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C)) + +/* Reset, reset source identification */ +#define RSIR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180)) + +/* RSID, code security protection */ +#define CSPR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x184)) + +/* AHB configuration */ +#define AHBCFG1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x188)) +#define AHBCFG2 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x18C)) + +/* System Controls and Status */ +#define SCS (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0)) + +/* MPMC(EMC) registers, note: all the external memory controller(EMC) registers +are for LPC24xx only. */ +#define STATIC_MEM0_BASE 0x80000000 +#define STATIC_MEM1_BASE 0x81000000 +#define STATIC_MEM2_BASE 0x82000000 +#define STATIC_MEM3_BASE 0x83000000 + +#define DYNAMIC_MEM0_BASE 0xA0000000 +#define DYNAMIC_MEM1_BASE 0xB0000000 +#define DYNAMIC_MEM2_BASE 0xC0000000 +#define DYNAMIC_MEM3_BASE 0xD0000000 + +/* External Memory Controller (EMC) */ +#define EMC_BASE_ADDR 0xFFE08000 +#define EMC_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x000)) +#define EMC_STAT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x004)) +#define EMC_CONFIG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x008)) + +/* Dynamic RAM access registers */ +#define EMC_DYN_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x020)) +#define EMC_DYN_RFSH (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x024)) +#define EMC_DYN_RD_CFG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x028)) +#define EMC_DYN_RP (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x030)) +#define EMC_DYN_RAS (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x034)) +#define EMC_DYN_SREX (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x038)) +#define EMC_DYN_APR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x03C)) +#define EMC_DYN_DAL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x040)) +#define EMC_DYN_WR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x044)) +#define EMC_DYN_RC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x048)) +#define EMC_DYN_RFC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x04C)) +#define EMC_DYN_XSR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x050)) +#define EMC_DYN_RRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x054)) +#define EMC_DYN_MRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x058)) + +#define EMC_DYN_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x100)) +#define EMC_DYN_RASCAS0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x104)) +#define EMC_DYN_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x140)) +#define EMC_DYN_RASCAS1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x144)) +#define EMC_DYN_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x160)) +#define EMC_DYN_RASCAS2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x164)) +#define EMC_DYN_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x180)) +#define EMC_DYN_RASCAS3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x184)) + +/* static RAM access registers */ +#define EMC_STA_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x200)) +#define EMC_STA_WAITWEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x204)) +#define EMC_STA_WAITOEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x208)) +#define EMC_STA_WAITRD0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x20C)) +#define EMC_STA_WAITPAGE0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x210)) +#define EMC_STA_WAITWR0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x214)) +#define EMC_STA_WAITTURN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x218)) + +#define EMC_STA_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x220)) +#define EMC_STA_WAITWEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x224)) +#define EMC_STA_WAITOEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x228)) +#define EMC_STA_WAITRD1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x22C)) +#define EMC_STA_WAITPAGE1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x230)) +#define EMC_STA_WAITWR1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x234)) +#define EMC_STA_WAITTURN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x238)) + +#define EMC_STA_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x240)) +#define EMC_STA_WAITWEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x244)) +#define EMC_STA_WAITOEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x248)) +#define EMC_STA_WAITRD2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x24C)) +#define EMC_STA_WAITPAGE2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x250)) +#define EMC_STA_WAITWR2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x254)) +#define EMC_STA_WAITTURN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x258)) + +#define EMC_STA_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x260)) +#define EMC_STA_WAITWEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x264)) +#define EMC_STA_WAITOEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x268)) +#define EMC_STA_WAITRD3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x26C)) +#define EMC_STA_WAITPAGE3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x270)) +#define EMC_STA_WAITWR3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x274)) +#define EMC_STA_WAITTURN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x278)) + +#define EMC_STA_EXT_WAIT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x880)) + + +/* Timer 0 */ +#define TMR0_BASE_ADDR 0xE0004000 +#define T0IR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00)) +#define T0TCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04)) +#define T0TC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08)) +#define T0PR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C)) +#define T0PC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10)) +#define T0MCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14)) +#define T0MR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18)) +#define T0MR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C)) +#define T0MR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20)) +#define T0MR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24)) +#define T0CCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28)) +#define T0CR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C)) +#define T0CR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30)) +#define T0CR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34)) +#define T0CR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38)) +#define T0EMR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C)) +#define T0CTCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70)) + +/* Timer 1 */ +#define TMR1_BASE_ADDR 0xE0008000 +#define T1IR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00)) +#define T1TCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04)) +#define T1TC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08)) +#define T1PR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C)) +#define T1PC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10)) +#define T1MCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14)) +#define T1MR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18)) +#define T1MR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C)) +#define T1MR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20)) +#define T1MR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24)) +#define T1CCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28)) +#define T1CR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C)) +#define T1CR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30)) +#define T1CR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34)) +#define T1CR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38)) +#define T1EMR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C)) +#define T1CTCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70)) + +/* Timer 2 */ +#define TMR2_BASE_ADDR 0xE0070000 +#define T2IR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x00)) +#define T2TCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x04)) +#define T2TC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x08)) +#define T2PR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x0C)) +#define T2PC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x10)) +#define T2MCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x14)) +#define T2MR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x18)) +#define T2MR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x1C)) +#define T2MR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x20)) +#define T2MR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x24)) +#define T2CCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x28)) +#define T2CR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x2C)) +#define T2CR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x30)) +#define T2CR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x34)) +#define T2CR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x38)) +#define T2EMR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x3C)) +#define T2CTCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x70)) + +/* Timer 3 */ +#define TMR3_BASE_ADDR 0xE0074000 +#define T3IR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x00)) +#define T3TCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x04)) +#define T3TC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x08)) +#define T3PR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x0C)) +#define T3PC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x10)) +#define T3MCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x14)) +#define T3MR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x18)) +#define T3MR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x1C)) +#define T3MR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x20)) +#define T3MR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x24)) +#define T3CCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x28)) +#define T3CR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x2C)) +#define T3CR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x30)) +#define T3CR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x34)) +#define T3CR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x38)) +#define T3EMR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x3C)) +#define T3CTCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x70)) + + +/* Pulse Width Modulator (PWM) */ +#define PWM0_BASE_ADDR 0xE0014000 +#define PWM0IR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x00)) +#define PWM0TCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x04)) +#define PWM0TC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x08)) +#define PWM0PR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x0C)) +#define PWM0PC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x10)) +#define PWM0MCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x14)) +#define PWM0MR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x18)) +#define PWM0MR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x1C)) +#define PWM0MR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x20)) +#define PWM0MR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x24)) +#define PWM0CCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x28)) +#define PWM0CR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x2C)) +#define PWM0CR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x30)) +#define PWM0CR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x34)) +#define PWM0CR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x38)) +#define PWM0EMR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x3C)) +#define PWM0MR4 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x40)) +#define PWM0MR5 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x44)) +#define PWM0MR6 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x48)) +#define PWM0PCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x4C)) +#define PWM0LER (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x50)) +#define PWM0CTCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x70)) + +#define PWM1_BASE_ADDR 0xE0018000 +#define PWM1IR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x00)) +#define PWM1TCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x04)) +#define PWM1TC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x08)) +#define PWM1PR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x0C)) +#define PWM1PC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x10)) +#define PWM1MCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x14)) +#define PWM1MR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x18)) +#define PWM1MR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x1C)) +#define PWM1MR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x20)) +#define PWM1MR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x24)) +#define PWM1CCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x28)) +#define PWM1CR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x2C)) +#define PWM1CR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x30)) +#define PWM1CR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x34)) +#define PWM1CR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x38)) +#define PWM1EMR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x3C)) +#define PWM1MR4 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x40)) +#define PWM1MR5 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x44)) +#define PWM1MR6 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x48)) +#define PWM1PCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x4C)) +#define PWM1LER (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x50)) +#define PWM1CTCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x70)) + + +/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ +#define UART0_BASE_ADDR 0xE000C000 +#define U0RBR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) +#define U0THR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) +#define U0DLL (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) +#define U0DLM (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) +#define U0IER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) +#define U0IIR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) +#define U0FCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) +#define U0LCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C)) +#define U0LSR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14)) +#define U0SCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C)) +#define U0ACR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20)) +#define U0ICR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x24)) +#define U0FDR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28)) +#define U0TER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ +#define UART1_BASE_ADDR 0xE0010000 +#define U1RBR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) +#define U1THR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) +#define U1DLL (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) +#define U1DLM (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) +#define U1IER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) +#define U1IIR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) +#define U1FCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) +#define U1LCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C)) +#define U1MCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10)) +#define U1LSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14)) +#define U1MSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18)) +#define U1SCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C)) +#define U1ACR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20)) +#define U1FDR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28)) +#define U1TER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 2 (UART2) */ +#define UART2_BASE_ADDR 0xE0078000 +#define U2RBR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) +#define U2THR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) +#define U2DLL (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) +#define U2DLM (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) +#define U2IER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) +#define U2IIR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) +#define U2FCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) +#define U2LCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x0C)) +#define U2LSR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x14)) +#define U2SCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x1C)) +#define U2ACR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x20)) +#define U2ICR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x24)) +#define U2FDR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x28)) +#define U2TER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 3 (UART3) */ +#define UART3_BASE_ADDR 0xE007C000 +#define U3RBR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) +#define U3THR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) +#define U3DLL (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) +#define U3DLM (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) +#define U3IER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) +#define U3IIR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) +#define U3FCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) +#define U3LCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x0C)) +#define U3LSR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x14)) +#define U3SCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x1C)) +#define U3ACR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x20)) +#define U3ICR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x24)) +#define U3FDR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x28)) +#define U3TER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x30)) + +/* I2C Interface 0 */ +#define I2C0_BASE_ADDR 0xE001C000 +#define I20CONSET (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00)) +#define I20STAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04)) +#define I20DAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08)) +#define I20ADR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C)) +#define I20SCLH (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10)) +#define I20SCLL (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14)) +#define I20CONCLR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18)) + +/* I2C Interface 1 */ +#define I2C1_BASE_ADDR 0xE005C000 +#define I21CONSET (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00)) +#define I21STAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04)) +#define I21DAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08)) +#define I21ADR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C)) +#define I21SCLH (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10)) +#define I21SCLL (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14)) +#define I21CONCLR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18)) + +/* I2C Interface 2 */ +#define I2C2_BASE_ADDR 0xE0080000 +#define I22CONSET (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x00)) +#define I22STAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x04)) +#define I22DAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x08)) +#define I22ADR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x0C)) +#define I22SCLH (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x10)) +#define I22SCLL (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x14)) +#define I22CONCLR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x18)) + +/* SPI0 (Serial Peripheral Interface 0) */ +#define SPI0_BASE_ADDR 0xE0020000 +#define S0SPCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00)) +#define S0SPSR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04)) +#define S0SPDR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08)) +#define S0SPCCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C)) +#define S0SPINT (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C)) + +/* SSP0 Controller */ +#define SSP0_BASE_ADDR 0xE0068000 +#define SSP0CR0 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x00)) +#define SSP0CR1 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x04)) +#define SSP0DR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x08)) +#define SSP0SR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x0C)) +#define SSP0CPSR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x10)) +#define SSP0IMSC (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x14)) +#define SSP0RIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x18)) +#define SSP0MIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x1C)) +#define SSP0ICR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x20)) +#define SSP0DMACR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x24)) + +/* SSP1 Controller */ +#define SSP1_BASE_ADDR 0xE0030000 +#define SSP1CR0 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x00)) +#define SSP1CR1 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x04)) +#define SSP1DR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x08)) +#define SSP1SR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x0C)) +#define SSP1CPSR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x10)) +#define SSP1IMSC (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x14)) +#define SSP1RIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x18)) +#define SSP1MIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x1C)) +#define SSP1ICR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x20)) +#define SSP1DMACR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x24)) + + +/* Real Time Clock */ +#define RTC_BASE_ADDR 0xE0024000 +#define RTC_ILR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00)) +#define RTC_CTC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04)) +#define RTC_CCR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08)) +#define RTC_CIIR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C)) +#define RTC_AMR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10)) +#define RTC_CTIME0 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14)) +#define RTC_CTIME1 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18)) +#define RTC_CTIME2 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C)) +#define RTC_SEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20)) +#define RTC_MIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24)) +#define RTC_HOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28)) +#define RTC_DOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C)) +#define RTC_DOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30)) +#define RTC_DOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34)) +#define RTC_MONTH (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38)) +#define RTC_YEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C)) +#define RTC_CISS (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x40)) +#define RTC_ALSEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60)) +#define RTC_ALMIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64)) +#define RTC_ALHOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68)) +#define RTC_ALDOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C)) +#define RTC_ALDOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70)) +#define RTC_ALDOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74)) +#define RTC_ALMON (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78)) +#define RTC_ALYEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C)) +#define RTC_PREINT (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80)) +#define RTC_PREFRAC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84)) + + +/* A/D Converter 0 (AD0) */ +#define AD0_BASE_ADDR 0xE0034000 +#define AD0CR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00)) +#define AD0GDR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04)) +#define AD0INTEN (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C)) +#define AD0DR0 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10)) +#define AD0DR1 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14)) +#define AD0DR2 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18)) +#define AD0DR3 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C)) +#define AD0DR4 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20)) +#define AD0DR5 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24)) +#define AD0DR6 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28)) +#define AD0DR7 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C)) +#define AD0STAT (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30)) + + +/* D/A Converter */ +#define DAC_BASE_ADDR 0xE006C000 +#define DACR (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00)) + + +/* Watchdog */ +#define WDG_BASE_ADDR 0xE0000000 +#define WDMOD (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00)) +#define WDTC (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04)) +#define WDFEED (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08)) +#define WDTV (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C)) +#define WDCLKSEL (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x10)) + +/* CAN CONTROLLERS AND ACCEPTANCE FILTER */ +#define CAN_ACCEPT_BASE_ADDR 0xE003C000 +#define CAN_AFMR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x00)) +#define CAN_SFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x04)) +#define CAN_SFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x08)) +#define CAN_EFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x0C)) +#define CAN_EFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x10)) +#define CAN_EOT (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x14)) +#define CAN_LUT_ERR_ADR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x18)) +#define CAN_LUT_ERR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x1C)) + +#define CAN_CENTRAL_BASE_ADDR 0xE0040000 +#define CAN_TX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x00)) +#define CAN_RX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x04)) +#define CAN_MSR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x08)) + +#define CAN1_BASE_ADDR 0xE0044000 +#define CAN1MOD (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x00)) +#define CAN1CMR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x04)) +#define CAN1GSR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x08)) +#define CAN1ICR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x0C)) +#define CAN1IER (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x10)) +#define CAN1BTR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x14)) +#define CAN1EWL (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x18)) +#define CAN1SR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x1C)) +#define CAN1RFS (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x20)) +#define CAN1RID (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x24)) +#define CAN1RDA (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x28)) +#define CAN1RDB (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x2C)) + +#define CAN1TFI1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x30)) +#define CAN1TID1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x34)) +#define CAN1TDA1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x38)) +#define CAN1TDB1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x3C)) +#define CAN1TFI2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x40)) +#define CAN1TID2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x44)) +#define CAN1TDA2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x48)) +#define CAN1TDB2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x4C)) +#define CAN1TFI3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x50)) +#define CAN1TID3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x54)) +#define CAN1TDA3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x58)) +#define CAN1TDB3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x5C)) + +#define CAN2_BASE_ADDR 0xE0048000 +#define CAN2MOD (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x00)) +#define CAN2CMR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x04)) +#define CAN2GSR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x08)) +#define CAN2ICR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x0C)) +#define CAN2IER (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x10)) +#define CAN2BTR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x14)) +#define CAN2EWL (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x18)) +#define CAN2SR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x1C)) +#define CAN2RFS (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x20)) +#define CAN2RID (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x24)) +#define CAN2RDA (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x28)) +#define CAN2RDB (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x2C)) + +#define CAN2TFI1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x30)) +#define CAN2TID1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x34)) +#define CAN2TDA1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x38)) +#define CAN2TDB1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x3C)) +#define CAN2TFI2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x40)) +#define CAN2TID2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x44)) +#define CAN2TDA2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x48)) +#define CAN2TDB2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x4C)) +#define CAN2TFI3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x50)) +#define CAN2TID3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x54)) +#define CAN2TDA3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x58)) +#define CAN2TDB3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x5C)) + + +/* MultiMedia Card Interface(MCI) Controller */ +#define MCI_BASE_ADDR 0xE008C000 +#define MCI_POWER (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x00)) +#define MCI_CLOCK (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x04)) +#define MCI_ARGUMENT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x08)) +#define MCI_COMMAND (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x0C)) +#define MCI_RESP_CMD (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x10)) +#define MCI_RESP0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x14)) +#define MCI_RESP1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x18)) +#define MCI_RESP2 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x1C)) +#define MCI_RESP3 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x20)) +#define MCI_DATA_TMR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x24)) +#define MCI_DATA_LEN (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x28)) +#define MCI_DATA_CTRL (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x2C)) +#define MCI_DATA_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x30)) +#define MCI_STATUS (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x34)) +#define MCI_CLEAR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x38)) +#define MCI_MASK0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x3C)) +#define MCI_MASK1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x40)) +#define MCI_FIFO_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x48)) +#define MCI_FIFO (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x80)) + + +/* I2S Interface Controller (I2S) */ +#define I2S_BASE_ADDR 0xE0088000 +#define I2S_DAO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x00)) +#define I2S_DAI (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x04)) +#define I2S_TX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x08)) +#define I2S_RX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x0C)) +#define I2S_STATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x10)) +#define I2S_DMA1 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x14)) +#define I2S_DMA2 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x18)) +#define I2S_IRQ (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x1C)) +#define I2S_TXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x20)) +#define I2S_RXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x24)) + + +/* General-purpose DMA Controller */ +#define DMA_BASE_ADDR 0xFFE04000 +#define GPDMA_INT_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x000)) +#define GPDMA_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x004)) +#define GPDMA_INT_TCCLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x008)) +#define GPDMA_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x00C)) +#define GPDMA_INT_ERR_CLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x010)) +#define GPDMA_RAW_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x014)) +#define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x018)) +#define GPDMA_ENABLED_CHNS (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x01C)) +#define GPDMA_SOFT_BREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x020)) +#define GPDMA_SOFT_SREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x024)) +#define GPDMA_SOFT_LBREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x028)) +#define GPDMA_SOFT_LSREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x02C)) +#define GPDMA_CONFIG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x030)) +#define GPDMA_SYNC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x034)) + +/* DMA channel 0 registers */ +#define GPDMA_CH0_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x100)) +#define GPDMA_CH0_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x104)) +#define GPDMA_CH0_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x108)) +#define GPDMA_CH0_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x10C)) +#define GPDMA_CH0_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x110)) + +/* DMA channel 1 registers */ +#define GPDMA_CH1_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x120)) +#define GPDMA_CH1_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x124)) +#define GPDMA_CH1_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x128)) +#define GPDMA_CH1_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x12C)) +#define GPDMA_CH1_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x130)) + + +/* USB Controller */ +#define USB_INT_BASE_ADDR 0xE01FC1C0 +#define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */ + +#define USB_INT_STAT (*(volatile unsigned long *)(USB_INT_BASE_ADDR + 0x00)) + +/* USB Device Interrupt Registers */ +#define DEV_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00)) +#define DEV_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04)) +#define DEV_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08)) +#define DEV_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C)) +#define DEV_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C)) + +/* USB Device Endpoint Interrupt Registers */ +#define EP_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30)) +#define EP_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34)) +#define EP_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38)) +#define EP_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C)) +#define EP_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40)) + +/* USB Device Endpoint Realization Registers */ +#define REALIZE_EP (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44)) +#define EP_INDEX (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48)) +#define MAXPACKET_SIZE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C)) + +/* USB Device Command Reagisters */ +#define CMD_CODE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10)) +#define CMD_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14)) + +/* USB Device Data Transfer Registers */ +#define RX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18)) +#define TX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C)) +#define RX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20)) +#define TX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24)) +#define USB_CTRL (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28)) + +/* USB Device DMA Registers */ +#define DMA_REQ_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x50)) +#define DMA_REQ_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x54)) +#define DMA_REQ_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x58)) +#define UDCA_HEAD (*(volatile unsigned long *)(USB_BASE_ADDR + 0x80)) +#define EP_DMA_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x84)) +#define EP_DMA_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x88)) +#define EP_DMA_DIS (*(volatile unsigned long *)(USB_BASE_ADDR + 0x8C)) +#define DMA_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x90)) +#define DMA_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x94)) +#define EOT_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA0)) +#define EOT_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA4)) +#define EOT_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA8)) +#define NDD_REQ_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xAC)) +#define NDD_REQ_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB0)) +#define NDD_REQ_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB4)) +#define SYS_ERR_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB8)) +#define SYS_ERR_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xBC)) +#define SYS_ERR_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xC0)) + +/* USB Host and OTG registers are for LPC24xx only */ +/* USB Host Controller */ +#define USBHC_BASE_ADDR 0xFFE0C000 +#define HC_REVISION (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x00)) +#define HC_CONTROL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x04)) +#define HC_CMD_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x08)) +#define HC_INT_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x0C)) +#define HC_INT_EN (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x10)) +#define HC_INT_DIS (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x14)) +#define HC_HCCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x18)) +#define HC_PERIOD_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x1C)) +#define HC_CTRL_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x20)) +#define HC_CTRL_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x24)) +#define HC_BULK_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x28)) +#define HC_BULK_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x2C)) +#define HC_DONE_HEAD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x30)) +#define HC_FM_INTERVAL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x34)) +#define HC_FM_REMAINING (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x38)) +#define HC_FM_NUMBER (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x3C)) +#define HC_PERIOD_START (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x40)) +#define HC_LS_THRHLD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x44)) +#define HC_RH_DESCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x48)) +#define HC_RH_DESCB (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x4C)) +#define HC_RH_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x50)) +#define HC_RH_PORT_STAT1 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x54)) +#define HC_RH_PORT_STAT2 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x58)) + +/* USB OTG Controller */ +#define USBOTG_BASE_ADDR 0xFFE0C100 +#define OTG_INT_STAT (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x00)) +#define OTG_INT_EN (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x04)) +#define OTG_INT_SET (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x08)) +#define OTG_INT_CLR (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x0C)) +/* On LPC23xx, the name is USBPortSel, on LPC24xx, the name is OTG_STAT_CTRL */ +#define OTG_STAT_CTRL (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) +#define OTG_TIMER (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x14)) + +#define USBOTG_I2C_BASE_ADDR 0xFFE0C300 +#define OTG_I2C_RX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_TX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_STS (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x04)) +#define OTG_I2C_CTL (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x08)) +#define OTG_I2C_CLKHI (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x0C)) +#define OTG_I2C_CLKLO (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x10)) + +/* On LPC23xx, the names are USBClkCtrl and USBClkSt; on LPC24xx, the names are +OTG_CLK_CTRL and OTG_CLK_STAT respectively. */ +#define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 +#define OTG_CLK_CTRL (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define OTG_CLK_STAT (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Note: below three register name convention is for LPC23xx USB device only, match +with the spec. update in USB Device Section. */ +#define USBPortSel (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) +#define USBClkCtrl (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define USBClkSt (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */ +#define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */ +#define MAC_MAC1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */ +#define MAC_MAC2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */ +#define MAC_IPGT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */ +#define MAC_IPGR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */ +#define MAC_CLRT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */ +#define MAC_MAXF (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */ +#define MAC_SUPP (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */ +#define MAC_TEST (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */ +#define MAC_MCFG (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */ +#define MAC_MCMD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */ +#define MAC_MADR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */ +#define MAC_MWTD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ +#define MAC_MRDD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ +#define MAC_MIND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */ + +#define MAC_SA0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */ +#define MAC_SA1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */ +#define MAC_SA2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */ + +#define MAC_COMMAND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x100)) /* Command reg */ +#define MAC_STATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */ +#define MAC_RXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */ +#define MAC_RXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */ +#define MAC_RXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */ +#define MAC_RXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */ +#define MAC_RXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */ +#define MAC_TXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */ +#define MAC_TXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */ +#define MAC_TXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */ +#define MAC_TXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */ +#define MAC_TXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */ + +#define MAC_TSV0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */ +#define MAC_TSV1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */ +#define MAC_RSV (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */ + +#define MAC_FLOWCONTROLCNT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */ +#define MAC_FLOWCONTROLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */ + +#define MAC_RXFILTERCTRL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */ +#define MAC_RXFILTERWOLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */ +#define MAC_RXFILTERWOLCLR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */ + +#define MAC_HASHFILTERL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */ +#define MAC_HASHFILTERH (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */ + +#define MAC_INTSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */ +#define MAC_INTENABLE (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */ +#define MAC_INTCLEAR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */ +#define MAC_INTSET (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */ + +#define MAC_POWERDOWN (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */ +#define MAC_MODULEID (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ + + +#endif // __LPC23xx_H \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/PwmOut.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,138 @@
+/* mbed Microcontroller Library - PwmOut
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_PWMOUT_H
+#define MBED_PWMOUT_H
+
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: PwmOut
+ * A pulse-width modulation digital output
+ */
+class PwmOut : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: PwmOut
+ * Create a PwmOut connected to the specified pin
+ *
+ * Variables:
+ * pin - PwmOut pin to connect to (21-26)
+ */
+ PwmOut(int pin);
+
+ /* Group: Access Methods (Analog-like) */
+
+ /* Function: write
+ * Set the ouput duty-cycle, specified as a percentage (float)
+ *
+ * Variables:
+ * percent - A floating-point value representing the output duty-cycle,
+ * specified as a percentage. The value should lie between
+ * 0.0f (representing 0v / on 0%) and 1.0f (representing 3.3v / on 100%).
+ * Values outside this range will be saturated to 0.0f or 1.0f.
+ */
+ void write(float percent);
+
+ /* Function: write_v
+ * Set the output duty-cycle, specified in volts (float)
+ *
+ * Variables:
+ * v - A floating-point value representing the output duty-cycle,
+ * specified in volts. The value should lie between
+ * 0.0f (representing 0v / 0% on) and 3.3f (representing 3.3v / 100% on).
+ * Values outside this range will be saturated to 0.0f or 3.3f.
+ */
+ void write_v(float v);
+
+ /* Function: write_mv
+ * Set the output duty-cycle, specified in mili-volts (int)
+ *
+ * Variables:
+ * mv - An integer value representing the output duty-cycle,
+ * specified in milli-volts. The value should lie between
+ * 0 (representing 0v / 0% on) and 3300 (representing 3.3v / 100% on).
+ * Values outside this range will be saturated to 0 or 3300.
+ */
+ void write_mv(int mv);
+
+ /* Function: read
+ * Return the current output duty-cycle setting, measured as a percentage (float)
+ *
+ * Variables:
+ * returns - A floating-point value representing the current duty-cycle being output on the pin,
+ * measured as a percentage. The returned value will lie between
+ * 0.0f (representing 0v / 0% on) and 1.0f (representing 3.3v / 100% on).
+ *
+ * Note:
+ * This value may not match exactly the value set by a previous <write>.
+ */
+ float read();
+
+ /* Group: Access Methods (Pulse-width) */
+
+ /* Function: period
+ * Set the PWM period, specified in seconds (float)
+ *
+ * Note:
+ * This is common to all PwmOut's, so changing it on one will change them all
+ */
+ void period(float seconds);
+
+ /* Function: pulsewidth
+ * Set the PWM pulsewidth, specified in seconds (float)
+ */
+ void pulsewidth(float seconds);
+
+ /* Function: period_ms
+ * Set the PWM period, specified in milli-seconds (int)
+ *
+ * Note:
+ * This is common to all PwmOut's, so changing it on one will change them all
+ */
+ void period_ms(int ms);
+
+ /* Function: pulsewidth_ms
+ * Set the PWM pulsewidth, specified in milli-seconds (int)
+ */
+ void pulsewidth_ms(int ms);
+
+ /* Function: period_us
+ * Set the PWM period, specified in micro-seconds (int)
+ *
+ * Note:
+ * This is common to all PwmOut's, so changing it on one will change them all
+ */
+ void period_us(int us);
+
+ /* Function: pulsewidth_us
+ * Set the PWM pulsewidth, specified in micro-seconds (int)
+ */
+ void pulsewidth_us(int us);
+
+ /* Group: Access Method Shorthand */
+
+ /* Function: operator=
+ * A shorthand for <write>
+ */
+ PwmOut& operator= (float percent);
+ PwmOut& operator= (PwmOut& rhs);
+
+ /* Function: operator float()
+ * A shorthand for <read>
+ */
+ operator float();
+
+protected:
+
+ int _id;
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Retarget.h Tue Apr 08 14:12:21 2008 +0000 @@ -0,0 +1,42 @@ +/* mbed Microcontroller Library - Retarget + * Copyright (c) 2007-2008, sford + */ + +#ifndef MBED_RETARGET_H +#define MBED_RETARGET_H + +#include "stdio.h" +#include "rt_sys.h" + +//=================================================================== +// System +//=================================================================== + +extern "C" void mbed_startup(); +extern "C" int $Sub$$main(); +extern "C" void $Sub$$_sys_exit(int return_code); + +//=================================================================== +// Pre-stdio +//=================================================================== + +extern "C" int $Sub$$fputc(int c, FILE* f); +extern "C" int $Sub$$fgetc(FILE* f); +extern "C" int $Sub$$__backspace(FILE* f); +extern "C" void $Sub$$_ttywrch(int c); + +//=================================================================== +// Post-stdio +//=================================================================== + +extern "C" FILEHANDLE $Sub$$_sys_open(const char* name, int openmode); +extern "C" int $Sub$$_sys_close(FILEHANDLE fh); +extern "C" int $Sub$$_sys_write(FILEHANDLE fh, const unsigned char* buffer, unsigned int length, int mode); +extern "C" int $Sub$$_sys_read(FILEHANDLE fh, unsigned char* buffer, unsigned int length, int mode); +extern "C" int $Sub$$_sys_istty(FILEHANDLE fh); +extern "C" int $Sub$$_sys_seek(FILEHANDLE fh, int position); +extern "C" int $Sub$$_sys_ensure(FILEHANDLE fh); +extern "C" int $Sub$$_sys_flen(FILEHANDLE fh); + + +#endif \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/SPI.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,79 @@
+/* mbed Microcontroller Library - SPI
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_SPI_H
+#define MBED_SPI_H
+
+#include "Base.h"
+#include "LPC2300.h"
+
+namespace mbed {
+
+/* Class: SPI
+ * A SPI Master, used for communicating with SPI slave devices
+ */
+class SPI : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: SPI
+ * Create a SPI master connected to the specified pins
+ *
+ * Variables:
+ * mosi - SPI Master Out, Slave In pin
+ * miso - SPI Master In, Slave Out pin
+ * sclk - SPI Clock pin
+ *
+ * Pin Options:
+ * (5, 6, 7) or (11, 12, 13)
+ */
+ SPI(int mosi, int miso, int sclk);
+
+ /* Function: format
+ * Set the transmission format
+ *
+ * Variables:
+ * bits - Number of bits per frame (4 - 16, default = 8)
+ * polarity - Clock polarity, 0 = Steady state low (default), 1 = Steady state high
+ * phase - Clock phase, 0 = Capture on first edge (default), 1 = Capture on second edge
+ */
+ void format(int bits = 8, int polarity = 0, int phase = 0);
+
+ /* Function: frequency
+ * Set the bus clock frequency
+ *
+ * Variables:
+ * hz - SCLK frequency in hz (default = 1MHz)
+ */
+ void frequency(int hz = 1000000);
+
+ /* Group: Access Methods */
+
+ /* Function: write
+ * Write to the SPI Slave and return the response
+ *
+ * Variables:
+ * value - Data to be sent to the SPI slave
+ * returns - Response from the SPI slave
+ */
+ int write(int value);
+
+protected:
+
+ void configure();
+
+ int _id;
+
+ int _uid;
+ static int _uidcounter;
+
+ int _bits, _polarity, _phase, _hz;
+ static int _config[2];
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/SemihostFileHandle.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,74 @@
+/* mbed Microcontroller Library - SemihostFileHandle
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_SEMIHOSTFILEHANDLE_H
+#define MBED_SEMIHOSTFILEHANDLE_H
+
+#include "rt_sys.h"
+#include "FileHandle.h"
+
+extern "C" int $Super$$_sys_close(FILEHANDLE fh);
+extern "C" int $Super$$_sys_write(FILEHANDLE fh, const unsigned char* buffer, unsigned int length, int mode);
+extern "C" int $Super$$_sys_read(FILEHANDLE fh, unsigned char* buffer, unsigned int length, int mode);
+extern "C" int $Super$$_sys_istty(FILEHANDLE fh);
+extern "C" int $Super$$_sys_seek(FILEHANDLE fh, int position);
+extern "C" int $Super$$_sys_ensure(FILEHANDLE fh);
+extern "C" long $Super$$_sys_flen(FILEHANDLE fh);
+
+namespace mbed {
+
+/* Class SemihostFileHandle
+ * Implements a FileHandle for talking to the standard Semihosting implementation
+ */
+class SemihostFileHandle : public FileHandle {
+
+public:
+
+ /* Constructor SemihostFileHandle
+ * Create a SemihostFileHandle using a standard FILEHANDLE
+ */
+ SemihostFileHandle(FILEHANDLE fh) {
+ _fh = fh;
+ }
+
+ virtual int sys_close() {
+ return $Super$$_sys_close(_fh);
+ }
+ // virtual ~SemihostFileHandle() {
+ // $Super$$_sys_close(_fh);
+ //}
+
+ virtual int sys_write(const unsigned char* buffer, unsigned int length, int mode) {
+ return $Super$$_sys_write(_fh, buffer, length, mode);
+ }
+
+ virtual int sys_read(unsigned char* buffer, unsigned int length, int mode) {
+ return $Super$$_sys_read(_fh, buffer, length, mode);
+ }
+
+ virtual int sys_istty() {
+ return $Super$$_sys_istty(_fh);
+ }
+
+ virtual int sys_seek(int position) {
+ return $Super$$_sys_seek(_fh, position);
+ }
+
+ virtual int sys_ensure() {
+ return $Super$$_sys_ensure(_fh);
+ }
+
+ virtual int sys_flen() {
+ return $Super$$_sys_flen(_fh);
+ }
+
+protected:
+
+ FILEHANDLE _fh;
+
+};
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/SemihostFileSystem.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,38 @@
+/* mbed Microcontroller Library - SemihostFileSystem
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_SEMIHOSTFILESYSTEM_H
+#define MBED_SEMIHOSTFILESYSTEM_H
+
+#include "rt_sys.h"
+
+#include "SemihostFileHandle.h"
+
+extern "C" FILEHANDLE $Super$$_sys_open(const char *name, int openmode);
+
+namespace mbed {
+
+/* Class SemihostFileSystem
+ * A file system invoking the standard semihosting implementation
+ */
+class SemihostFileSystem : public Base {
+
+public:
+
+ SemihostFileSystem(char* n) {
+ name(n);
+ _type = "SemihostFileSystem";
+ }
+
+ virtual FILEHANDLE sys_open(const char* name, int openmode) {
+ FILEHANDLE fh = $Super$$_sys_open(name, openmode);
+ FileHandle* fhc = new SemihostFileHandle(fh);
+ return (FILEHANDLE)fhc;
+ }
+
+};
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Serial.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,129 @@
+/* mbed Microcontroller Library - Serial
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_SERIAL_H
+#define MBED_SERIAL_H
+
+#include "Stream.h"
+
+namespace mbed {
+
+/* Class: Serial
+ * A serial port (UART) for communication with other serial devices
+ */
+class Serial : public Stream {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: Serial
+ * Create a Serial port, connected to the specified transmit and receive pins
+ *
+ * Variables:
+ * tx - Transmit pin
+ * rx - Receive pin
+ *
+ * Pin Options:
+ * (9, 10) or (13, 14) or (28, 27)
+ */
+ Serial(int tx, int rx);
+
+
+ /* Function: baud
+ * Set the baud rate of the serial port
+ *
+ * Variables:
+ * baudrate - The baudrate of the serial port (default = 9600).
+ * Standard baud rates up to 921600 are supported.
+ */
+ void baud(int baudrate);
+
+ enum Parity {
+ None = 0,
+ Odd = 1,
+ Even = 2,
+ Forced1 = 3,
+ Forced0 = 4
+ };
+
+ /* Function: format
+ * Set the transmission format used by the Serial port
+ *
+ * Variables:
+ * bits - The number of bits in a word (5-8; default = 8)
+ * parity - The type of parity used (None, Odd, Even, Forced1, Forced0; default = None)
+ * stop - The number of stop bits (1 or 2; default = 1)
+ */
+ void format(int bits, int parity, int stop);
+
+
+ /* Group: Access Methods */
+
+#if 0 // Inhereted from Stream, for documentation only
+
+ /* Function: putc
+ * Write a character
+ *
+ * Variables:
+ * c - The character to write to the serial port
+ */
+ int putc(int c);
+
+ /* Function: getc
+ * Read a character
+ *
+ * Variables:
+ * returns - The character read from the serial port
+ */
+ int getc();
+
+ /* Function: printf
+ * Write a formated string
+ *
+ * Variables:
+ * format - A printf-style format string, followed by the
+ * variables to use in formating the string.
+ */
+ int printf(const char* format, ...);
+
+ /* Function: scanf
+ * Read a formated string
+ *
+ * Variables:
+ * format - A scanf-style format string,
+ * followed by the pointers to variables to store the results.
+ */
+ int scanf(const char* format, ...);
+
+#endif
+
+ /* Function: readable
+ * Determine if there is a character available to read
+ *
+ * Variables:
+ * returns - 1 if there is a character available to read, else 0
+ */
+ int readable();
+
+ /* Function: writeable
+ * Determine if there is space available to write a character
+ *
+ * Variables:
+ * returns - 1 if there is space to write a character, else 0
+ */
+ int writeable();
+
+protected:
+
+ virtual int _getc();
+ virtual int _putc(int c);
+
+ int _id;
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Stream.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,37 @@
+/* mbed Microcontroller Library - Stream
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_STREAM_H
+#define MBED_STREAM_H
+
+#include "Base.h"
+
+namespace mbed {
+
+class Stream : public Base {
+
+public:
+
+ Stream();
+
+ int putc(int c);
+ int getc();
+ int printf(const char* format, ...);
+ int scanf(const char* format, ...);
+
+ int _backspace();
+
+protected:
+
+ virtual int _putc(int c) = 0;
+ virtual int _getc() = 0;
+
+ int _back;
+ int _last;
+
+};
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Timer.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,67 @@
+/* mbed Microcontroller Library - Timer
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_TIMER_H
+#define MBED_TIMER_H
+
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: Timer
+ * A general purpose timer
+ */
+class Timer : public Base {
+
+public:
+
+ Timer();
+
+ /* Group: Access Methods */
+
+ /* Function: start
+ * Start the timer
+ */
+ void start();
+
+ /* Function: stop
+ * Stop the timer
+ */
+ void stop();
+
+ /* Function: reset
+ * Reset the timer to 0.
+ *
+ * If it was already counting, it will continue
+ */
+ void reset();
+
+ /* Function: read
+ * Get the time passed in seconds
+ */
+ float read();
+
+ /* Function: read_ms
+ * Get the time passed in mili-seconds
+ */
+ int read_ms();
+
+ /* Function: read_us
+ * Get the time passed in micro-seconds
+ */
+ int read_us();
+
+ operator float();
+
+ int slicetime();
+
+int _running; // whether the timer is running
+ unsigned int _start; // the start time of the latest slice
+ int _time; // any accumulated time from previous slices
+
+};
+
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/helper.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,46 @@
+/* mbed Microcontroller Library - Helper
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_HELPER_H
+#define MBED_HELPER_H
+
+/* Section: helper
+ * A collection of useful functions not found in the standard C libraries
+ */
+
+namespace mbed {
+
+/* Function: min
+ * Return the minimum of two integers
+ */
+int min(int a, int b);
+
+/* Function: min
+ * Return the minimum of two floating-point numbers
+ */
+float min(float a, float b);
+
+/* Function: max
+ * Return the maximum of two integers
+ */
+int max(int a, int b);
+
+/* Function: max
+ * Return the maximum of two floating-point numbers
+ */
+float max(float a, float b);
+
+/* Function: clamp
+ * Return the value, clamped between a minimum and maximum integer value
+ */
+int clamp(int value, int minimum, int maximum);
+
+/* Function: clamp
+ * Return the value, clamped between a minimum and maximum floating-point value
+ */
+float clamp(float value, float minimum, float maximum);
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
Binary file mbed.ar has changed
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed.h Tue Apr 08 14:12:21 2008 +0000 @@ -0,0 +1,38 @@ +/* mbed Microcontroller Library + * Copyright (c) 2007-2008, sford + */ + +#ifndef MBED_H +#define MBED_H + +// Useful C libraries +#include "stdio.h" +#include "stdlib.h" +#include "string.h" +#include "math.h" + +#include "helper.h" + +// mbed Debug libraries +#include "Debug.h" +#include "stackheap.h" + +// mbed Peripheral components +#include "DigitalIn.h" +#include "DigitalOut.h" +#include "BusIn.h" +#include "BusOut.h" +#include "AnalogIn.h" +#include "AnalogOut.h" +#include "PwmOut.h" +#include "Serial.h" +#include "SPI.h" +#include "I2C.h" + +// mbed Internal components +#include "Timer.h" +#include "wait.h" + +using namespace mbed; + +#endif \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/stackheap.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,85 @@
+/* mbed Microcontroller Library - stackheap
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_STACKHEAP_H
+#define MBED_STACKHEAP_H
+
+namespace mbed {
+
+/* Section: stackheap
+ * Useful functions for seeing what is going on with the stack and heap
+ */
+
+/* Function: code_base
+ * Return the address of the fixed base of the code region
+ */
+int code_base();
+
+/* Function: code_limit
+ * Return the address of the top of the code region
+ */
+int code_limit();
+
+/* Function: rw_base
+ * Return the address of the fixed base of the rw region
+ */
+int rw_base();
+
+/* Function: rw_limit
+ * Return the address of the top of the rw region
+ */
+int rw_limit();
+
+/* Function: heap_base
+ * Return the address of the fixed base of the heap
+ */
+int heap_base();
+
+/* Function: heap_limit
+ * Return the address of the current top of the heap
+ */
+int heap_limit();
+
+/* Function: stack_base
+ * Return the address of the fixed base of the stack
+ */
+int stack_base();
+
+/* Function: stack_limit
+ * Return the address of the current top of the stack
+ */
+//int stack_limit();
+
+/* Function: code_size
+ * Return the size of the code region
+ */
+int code_size();
+
+/* Function: rw_size
+ * Return the size of the rw region
+ */
+int rw_size();
+
+/* Function: heap_size
+ * Return the current size of the heap pool allocated
+ */
+int heap_size();
+
+/* Function: stack_size
+ * Return the current size of the stack used
+ */
+//int stack_size();
+
+
+inline int stack_limit() {
+ return __current_sp();
+}
+
+inline int stack_size() {
+ return stack_base() - stack_limit();
+}
+
+} // namespace mbed
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/wait.h Tue Apr 08 14:12:21 2008 +0000
@@ -0,0 +1,31 @@
+/* mbed Microcontroller Library - wait
+ * Copyright (c) 2007-2008, sford
+ */
+
+#ifndef MBED_WAIT_H
+#define MBED_WAIT_H
+
+namespace mbed {
+
+/* Section: wait
+ * Useful waiting around functions
+ */
+
+/* Function: wait
+ * Wait the specified number of seconds (float)
+ */
+void wait(float s);
+
+/* Function: wait_ms
+ * Wait the specified number of milli-seconds (int)
+ */
+void wait_ms(int ms);
+
+/* Function: wait_us
+ * Wait the specified number of micro-seconds (int)
+ */
+void wait_us(int us);
+
+}
+
+#endif
\ No newline at end of file