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LPC_USART_Type Struct Reference

LPC_USART_Type Struct Reference
[Device_Peripheral_Registers]

Product name title=UM10462 Chapter title=LPC11U1x USART Modification date=3/16/2011 Major revision=0 Minor revision=3 (USART) More...

#include <LPC11Uxx.h>

Data Fields

__IO uint32_t LCR
__IO uint32_t MCR
__I uint32_t LSR
__I uint32_t MSR
__IO uint32_t SCR
__IO uint32_t ACR
__IO uint32_t ICR
__IO uint32_t FDR
__IO uint32_t OSR
__IO uint32_t TER
__IO uint32_t HDEN
__IO uint32_t SCICTRL
__IO uint32_t RS485CTRL
__IO uint32_t RS485ADRMATCH
__IO uint32_t RS485DLY
__IO uint32_t DLL
__O uint32_t THR
__I uint32_t RBR
__IO uint32_t IER
__IO uint32_t DLM
__O uint32_t FCR
__I uint32_t IIR

Detailed Description

Product name title=UM10462 Chapter title=LPC11U1x USART Modification date=3/16/2011 Major revision=0 Minor revision=3 (USART)

Definition at line 172 of file LPC11Uxx.h.


Field Documentation

__IO uint32_t ACR

(@ 0x40008020) Auto-baud Control Register. Contains controls for the auto-baud feature.

Definition at line 194 of file LPC11Uxx.h.

__IO uint32_t DLL

(@ 0x40008000) Divisor Latch LSB. Least significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. (DLAB=1)

Definition at line 175 of file LPC11Uxx.h.

__IO uint32_t DLM

(@ 0x40008004) Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. (DLAB=1)

Definition at line 182 of file LPC11Uxx.h.

__O uint32_t FCR

(@ 0x40008008) FIFO Control Register. Controls USART FIFO usage and modes.

Definition at line 186 of file LPC11Uxx.h.

__IO uint32_t FDR

(@ 0x40008028) Fractional Divider Register. Generates a clock input for the baud rate divider.

Definition at line 196 of file LPC11Uxx.h.

__IO uint32_t HDEN

(@ 0x40008040) Half duplex enable register.

Definition at line 200 of file LPC11Uxx.h.

__IO uint32_t ICR

(@ 0x40008024) IrDA Control Register. Enables and configures the IrDA (remote control) mode.

Definition at line 195 of file LPC11Uxx.h.

__IO uint32_t IER

(@ 0x40008004) Interrupt Enable Register. Contains individual interrupt enable bits for the 7 potential USART interrupts. (DLAB=0)

Definition at line 181 of file LPC11Uxx.h.

__I uint32_t IIR

(@ 0x40008008) Interrupt ID Register. Identifies which interrupt(s) are pending.

Definition at line 187 of file LPC11Uxx.h.

__IO uint32_t LCR

(@ 0x4000800C) Line Control Register. Contains controls for frame formatting and break generation.

Definition at line 189 of file LPC11Uxx.h.

__I uint32_t LSR

(@ 0x40008014) Line Status Register. Contains flags for transmit and receive status, including line errors.

Definition at line 191 of file LPC11Uxx.h.

__IO uint32_t MCR

(@ 0x40008010) Modem Control Register.

Definition at line 190 of file LPC11Uxx.h.

__I uint32_t MSR

(@ 0x40008018) Modem Status Register.

Definition at line 192 of file LPC11Uxx.h.

__IO uint32_t OSR

(@ 0x4000802C) Oversampling Register. Controls the degree of oversampling during each bit time.

Definition at line 197 of file LPC11Uxx.h.

__I uint32_t RBR

(@ 0x40008000) Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)

Definition at line 177 of file LPC11Uxx.h.

__IO uint32_t RS485ADRMATCH

(@ 0x40008050) RS-485/EIA-485 address match. Contains the address match value for RS-485/EIA-485 mode.

Definition at line 204 of file LPC11Uxx.h.

__IO uint32_t RS485CTRL

(@ 0x4000804C) RS-485/EIA-485 Control. Contains controls to configure various aspects of RS-485/EIA-485 modes.

Definition at line 203 of file LPC11Uxx.h.

__IO uint32_t RS485DLY

(@ 0x40008054) RS-485/EIA-485 direction control delay.

Definition at line 205 of file LPC11Uxx.h.

__IO uint32_t SCICTRL

(@ 0x40008048) Smart Card Interface Control register. Enables and configures the Smart Card Interface feature.

Definition at line 202 of file LPC11Uxx.h.

__IO uint32_t SCR

(@ 0x4000801C) Scratch Pad Register. Eight-bit temporary storage for software.

Definition at line 193 of file LPC11Uxx.h.

__IO uint32_t TER

(@ 0x40008030) Transmit Enable Register. Turns off USART transmitter for use with software flow control.

Definition at line 198 of file LPC11Uxx.h.

__O uint32_t THR

(@ 0x40008000) Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)

Definition at line 176 of file LPC11Uxx.h.