Diff: targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c

Revision:

161:2cc1468da177

Parent:

153:fa9ff456f731

Child:

165:e614a9f1c9e2

diff -r d5399cc887bb -r 2cc1468da177 targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c	Tue Mar 14 16:40:56 2017 +0000
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c	Thu Mar 30 13:45:57 2017 +0100
@@ -285,7 +285,7 @@
 
 void serial_baud(serial_t *obj, int baudrate) {
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
-    while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
+    while (! UART_IS_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart))));
     
     obj->serial.baudrate = baudrate;
     UART_Open((UART_T *) NU_MODBASE(obj->serial.uart), baudrate);
@@ -293,7 +293,7 @@
 
 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
-    while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
+    while (! UART_IS_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart))));
     
     // TODO: Assert for not supported parity and data bits
     obj->serial.databits = data_bits;
@@ -357,7 +357,7 @@
 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
 {
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
-    while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
+    while (! UART_IS_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart))));
     
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
@@ -544,7 +544,9 @@
         MBED_ASSERT(modinit != NULL);
         MBED_ASSERT(modinit->modname == obj->serial.uart);
     
-        PDMA->CHCTL |= 1 << obj->serial.dma_chn_id_tx;  // Enable this DMA channel
+        PDMA_T *pdma_base = dma_modbase();
+        
+        pdma_base->CHCTL |= 1 << obj->serial.dma_chn_id_tx;  // Enable this DMA channel
         PDMA_SetTransferMode(obj->serial.dma_chn_id_tx,
             ((struct nu_uart_var *) modinit->var)->pdma_perp_tx,    // Peripheral connected to this PDMA
             0,  // Scatter-gather disabled
@@ -555,7 +557,7 @@
         PDMA_SetTransferAddr(obj->serial.dma_chn_id_tx, 
             ((uint32_t) tx) + (tx_width / 8) * tx_length,   // NOTE: End of source address
             PDMA_SAR_INC,   // Source address incremental
-            (uint32_t) obj->serial.uart,    // Destination address
+            (uint32_t) NU_MODBASE(obj->serial.uart),    // Destination address
             PDMA_DAR_FIX);  // Destination address fixed
         PDMA_SetBurstType(obj->serial.dma_chn_id_tx, 
             PDMA_REQ_SINGLE,    // Single mode
@@ -603,7 +605,9 @@
         MBED_ASSERT(modinit != NULL);
         MBED_ASSERT(modinit->modname == obj->serial.uart);
     
-        PDMA->CHCTL |= 1 << obj->serial.dma_chn_id_rx;  // Enable this DMA channel
+        PDMA_T *pdma_base = dma_modbase();
+        
+        pdma_base->CHCTL |= 1 << obj->serial.dma_chn_id_rx;  // Enable this DMA channel
         PDMA_SetTransferMode(obj->serial.dma_chn_id_rx,
             ((struct nu_uart_var *) modinit->var)->pdma_perp_rx,    // Peripheral connected to this PDMA
             0,  // Scatter-gather disabled
@@ -612,7 +616,7 @@
             (rx_width == 8) ? PDMA_WIDTH_8 : (rx_width == 16) ? PDMA_WIDTH_16 : PDMA_WIDTH_32, 
             rx_length);
         PDMA_SetTransferAddr(obj->serial.dma_chn_id_rx,
-            (uint32_t) obj->serial.uart,    // Source address
+            (uint32_t) NU_MODBASE(obj->serial.uart),    // Source address
             PDMA_SAR_FIX,   // Source address fixed
             ((uint32_t) rx) + (rx_width / 8) * rx_length,   // NOTE: End of destination address
             PDMA_DAR_INC);  // Destination address incremental
@@ -631,14 +635,16 @@
 void serial_tx_abort_asynch(serial_t *obj)
 {
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
-    while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
+    while (! UART_IS_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart))));
     
     if (obj->serial.dma_usage_tx != DMA_USAGE_NEVER) {
+        PDMA_T *pdma_base = dma_modbase();
+        
         if (obj->serial.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(obj->serial.dma_chn_id_tx, 0);
             // FIXME: Next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             //PDMA_STOP(obj->serial.dma_chn_id_tx);
-            PDMA->CHCTL &= ~(1 << obj->serial.dma_chn_id_tx);
+            pdma_base->CHCTL &= ~(1 << obj->serial.dma_chn_id_tx);
         }
         UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_TXPDMAEN_Msk);
     }
@@ -653,11 +659,13 @@
 void serial_rx_abort_asynch(serial_t *obj)
 {
     if (obj->serial.dma_usage_rx != DMA_USAGE_NEVER) {
+        PDMA_T *pdma_base = dma_modbase();
+        
         if (obj->serial.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(obj->serial.dma_chn_id_rx, 0);
             // FIXME: Next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             //PDMA_STOP(obj->serial.dma_chn_id_rx);
-            PDMA->CHCTL &= ~(1 << obj->serial.dma_chn_id_rx);
+            pdma_base->CHCTL &= ~(1 << obj->serial.dma_chn_id_rx);
         }
         UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_RXPDMAEN_Msk);
     }