helpfor studient
Dependents: STM32_F103-C8T6basecanblink_led
Fork of mbed-dev by
targets/TARGET_NORDIC/TARGET_NRF5/us_ticker.c@186:9c2029bfadbe, 2018-04-20 (annotated)
- Committer:
- Anna Bridge
- Date:
- Fri Apr 20 11:31:35 2018 +0100
- Revision:
- 186:9c2029bfadbe
- Parent:
- 183:a56a73fd2a6f
Update to latest version of mbed lib
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /* |
<> | 149:156823d33999 | 2 | * Copyright (c) 2013 Nordic Semiconductor ASA |
<> | 149:156823d33999 | 3 | * All rights reserved. |
<> | 149:156823d33999 | 4 | * |
<> | 149:156823d33999 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 149:156823d33999 | 6 | * are permitted provided that the following conditions are met: |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * 1. Redistributions of source code must retain the above copyright notice, this list |
<> | 149:156823d33999 | 9 | * of conditions and the following disclaimer. |
<> | 149:156823d33999 | 10 | * |
<> | 149:156823d33999 | 11 | * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA |
<> | 149:156823d33999 | 12 | * integrated circuit in a product or a software update for such product, must reproduce |
<> | 149:156823d33999 | 13 | * the above copyright notice, this list of conditions and the following disclaimer in |
<> | 149:156823d33999 | 14 | * the documentation and/or other materials provided with the distribution. |
<> | 149:156823d33999 | 15 | * |
<> | 149:156823d33999 | 16 | * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be |
<> | 149:156823d33999 | 17 | * used to endorse or promote products derived from this software without specific prior |
<> | 149:156823d33999 | 18 | * written permission. |
<> | 149:156823d33999 | 19 | * |
<> | 149:156823d33999 | 20 | * 4. This software, with or without modification, must only be used with a |
<> | 149:156823d33999 | 21 | * Nordic Semiconductor ASA integrated circuit. |
<> | 149:156823d33999 | 22 | * |
<> | 149:156823d33999 | 23 | * 5. Any software provided in binary or object form under this license must not be reverse |
<> | 149:156823d33999 | 24 | * engineered, decompiled, modified and/or disassembled. |
<> | 149:156823d33999 | 25 | * |
<> | 149:156823d33999 | 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 149:156823d33999 | 27 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 149:156823d33999 | 28 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 149:156823d33999 | 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 149:156823d33999 | 30 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 149:156823d33999 | 31 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 149:156823d33999 | 32 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 149:156823d33999 | 33 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 149:156823d33999 | 34 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 149:156823d33999 | 35 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 149:156823d33999 | 36 | * |
<> | 149:156823d33999 | 37 | */ |
<> | 149:156823d33999 | 38 | |
<> | 149:156823d33999 | 39 | #include "us_ticker_api.h" |
<> | 149:156823d33999 | 40 | #include "common_rtc.h" |
<> | 149:156823d33999 | 41 | #include "app_util.h" |
<> | 149:156823d33999 | 42 | #include "nrf_drv_common.h" |
<> | 149:156823d33999 | 43 | #include "lp_ticker_api.h" |
Anna Bridge |
163:74e0ce7f98e8 | 44 | #include "mbed_critical.h" |
<> | 149:156823d33999 | 45 | |
AnnaBridge | 165:e614a9f1c9e2 | 46 | #if defined(NRF52_ERRATA_20) |
AnnaBridge | 165:e614a9f1c9e2 | 47 | #include "softdevice_handler.h" |
AnnaBridge | 165:e614a9f1c9e2 | 48 | #endif |
<> | 149:156823d33999 | 49 | |
<> | 149:156823d33999 | 50 | //------------------------------------------------------------------------------ |
<> | 149:156823d33999 | 51 | // Common stuff used also by lp_ticker and rtc_api (see "common_rtc.h"). |
<> | 149:156823d33999 | 52 | // |
<> | 149:156823d33999 | 53 | #include "app_util_platform.h" |
<> | 149:156823d33999 | 54 | |
<> | 149:156823d33999 | 55 | bool m_common_rtc_enabled = false; |
<> | 149:156823d33999 | 56 | uint32_t volatile m_common_rtc_overflows = 0; |
<> | 149:156823d33999 | 57 | |
AnnaBridge | 183:a56a73fd2a6f | 58 | // lp/us ticker fire interrupt flag for IRQ handler |
AnnaBridge | 183:a56a73fd2a6f | 59 | volatile uint8_t m_common_sw_irq_flag = 0; |
AnnaBridge | 183:a56a73fd2a6f | 60 | |
Anna Bridge |
163:74e0ce7f98e8 | 61 | __STATIC_INLINE void rtc_ovf_event_check(void) |
Anna Bridge |
163:74e0ce7f98e8 | 62 | { |
Anna Bridge |
163:74e0ce7f98e8 | 63 | if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW)) { |
Anna Bridge |
163:74e0ce7f98e8 | 64 | nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW); |
Anna Bridge |
163:74e0ce7f98e8 | 65 | // Don't disable this event. It shall occur periodically. |
Anna Bridge |
163:74e0ce7f98e8 | 66 | |
Anna Bridge |
163:74e0ce7f98e8 | 67 | ++m_common_rtc_overflows; |
Anna Bridge |
163:74e0ce7f98e8 | 68 | } |
Anna Bridge |
163:74e0ce7f98e8 | 69 | } |
Anna Bridge |
163:74e0ce7f98e8 | 70 | |
<> | 149:156823d33999 | 71 | #if defined(TARGET_MCU_NRF51822) |
<> | 149:156823d33999 | 72 | void common_rtc_irq_handler(void) |
<> | 149:156823d33999 | 73 | #else |
<> | 149:156823d33999 | 74 | void COMMON_RTC_IRQ_HANDLER(void) |
<> | 149:156823d33999 | 75 | #endif |
<> | 149:156823d33999 | 76 | { |
Anna Bridge |
163:74e0ce7f98e8 | 77 | |
Anna Bridge |
163:74e0ce7f98e8 | 78 | rtc_ovf_event_check(); |
Anna Bridge |
163:74e0ce7f98e8 | 79 | |
AnnaBridge | 183:a56a73fd2a6f | 80 | if ((m_common_sw_irq_flag & US_TICKER_SW_IRQ_MASK) || nrf_rtc_event_pending(COMMON_RTC_INSTANCE, US_TICKER_EVENT)) { |
<> | 149:156823d33999 | 81 | us_ticker_irq_handler(); |
<> | 149:156823d33999 | 82 | } |
<> | 149:156823d33999 | 83 | |
<> | 149:156823d33999 | 84 | #if DEVICE_LOWPOWERTIMER |
AnnaBridge | 183:a56a73fd2a6f | 85 | if (m_common_sw_irq_flag & LP_TICKER_SW_IRQ_MASK) { |
AnnaBridge | 183:a56a73fd2a6f | 86 | m_common_sw_irq_flag &= ~LP_TICKER_SW_IRQ_MASK; |
AnnaBridge | 183:a56a73fd2a6f | 87 | lp_ticker_irq_handler(); |
AnnaBridge | 183:a56a73fd2a6f | 88 | } |
<> | 149:156823d33999 | 89 | if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, LP_TICKER_EVENT)) { |
<> | 149:156823d33999 | 90 | |
<> | 149:156823d33999 | 91 | lp_ticker_irq_handler(); |
<> | 149:156823d33999 | 92 | } |
<> | 149:156823d33999 | 93 | #endif |
AnnaBridge | 165:e614a9f1c9e2 | 94 | } |
<> | 149:156823d33999 | 95 | |
AnnaBridge | 165:e614a9f1c9e2 | 96 | // Function for fix errata 20: RTC Register values are invalid |
AnnaBridge | 165:e614a9f1c9e2 | 97 | __STATIC_INLINE void errata_20(void) |
AnnaBridge | 165:e614a9f1c9e2 | 98 | { |
AnnaBridge | 165:e614a9f1c9e2 | 99 | #if defined(NRF52_ERRATA_20) |
AnnaBridge | 165:e614a9f1c9e2 | 100 | if (!softdevice_handler_is_enabled()) |
AnnaBridge | 165:e614a9f1c9e2 | 101 | { |
AnnaBridge | 165:e614a9f1c9e2 | 102 | NRF_CLOCK->EVENTS_LFCLKSTARTED = 0; |
AnnaBridge | 165:e614a9f1c9e2 | 103 | NRF_CLOCK->TASKS_LFCLKSTART = 1; |
AnnaBridge | 165:e614a9f1c9e2 | 104 | |
AnnaBridge | 165:e614a9f1c9e2 | 105 | while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) |
AnnaBridge | 165:e614a9f1c9e2 | 106 | { |
AnnaBridge | 165:e614a9f1c9e2 | 107 | } |
AnnaBridge | 165:e614a9f1c9e2 | 108 | } |
AnnaBridge | 165:e614a9f1c9e2 | 109 | NRF_RTC1->TASKS_STOP = 0; |
AnnaBridge | 165:e614a9f1c9e2 | 110 | #endif |
<> | 149:156823d33999 | 111 | } |
<> | 149:156823d33999 | 112 | |
<> | 150:02e0a0aed4ec | 113 | void RTC1_IRQHandler(void); |
<> | 150:02e0a0aed4ec | 114 | |
<> | 149:156823d33999 | 115 | void common_rtc_init(void) |
<> | 149:156823d33999 | 116 | { |
<> | 149:156823d33999 | 117 | if (m_common_rtc_enabled) { |
<> | 149:156823d33999 | 118 | return; |
<> | 149:156823d33999 | 119 | } |
<> | 149:156823d33999 | 120 | |
AnnaBridge | 165:e614a9f1c9e2 | 121 | errata_20(); |
AnnaBridge | 165:e614a9f1c9e2 | 122 | |
<> | 150:02e0a0aed4ec | 123 | NVIC_SetVector(RTC1_IRQn, (uint32_t)RTC1_IRQHandler); |
<> | 150:02e0a0aed4ec | 124 | |
<> | 149:156823d33999 | 125 | // RTC is driven by the low frequency (32.768 kHz) clock, a proper request |
<> | 149:156823d33999 | 126 | // must be made to have it running. |
<> | 149:156823d33999 | 127 | // Currently this clock is started in 'SystemInit' (see "system_nrf51.c" |
<> | 149:156823d33999 | 128 | // or "system_nrf52.c", respectively). |
<> | 149:156823d33999 | 129 | |
<> | 149:156823d33999 | 130 | nrf_rtc_prescaler_set(COMMON_RTC_INSTANCE, 0); |
<> | 149:156823d33999 | 131 | |
<> | 149:156823d33999 | 132 | nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT); |
<> | 149:156823d33999 | 133 | #if defined(TARGET_MCU_NRF51822) |
<> | 149:156823d33999 | 134 | nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT); |
<> | 149:156823d33999 | 135 | #endif |
<> | 149:156823d33999 | 136 | #if DEVICE_LOWPOWERTIMER |
<> | 149:156823d33999 | 137 | nrf_rtc_event_clear(COMMON_RTC_INSTANCE, LP_TICKER_EVENT); |
<> | 149:156823d33999 | 138 | #endif |
<> | 149:156823d33999 | 139 | nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW); |
<> | 149:156823d33999 | 140 | |
<> | 149:156823d33999 | 141 | // Interrupts on all related events are enabled permanently. Particular |
<> | 149:156823d33999 | 142 | // events will be enabled or disabled as needed (such approach is more |
<> | 149:156823d33999 | 143 | // energy efficient). |
<> | 149:156823d33999 | 144 | nrf_rtc_int_enable(COMMON_RTC_INSTANCE, |
AnnaBridge | 165:e614a9f1c9e2 | 145 | #if DEVICE_LOWPOWERTIMER |
<> | 149:156823d33999 | 146 | LP_TICKER_INT_MASK | |
AnnaBridge | 165:e614a9f1c9e2 | 147 | #endif |
<> | 149:156823d33999 | 148 | US_TICKER_INT_MASK | |
<> | 149:156823d33999 | 149 | NRF_RTC_INT_OVERFLOW_MASK); |
<> | 149:156823d33999 | 150 | |
<> | 149:156823d33999 | 151 | // This event is enabled permanently, since overflow indications are needed |
<> | 149:156823d33999 | 152 | // continuously. |
<> | 149:156823d33999 | 153 | nrf_rtc_event_enable(COMMON_RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK); |
<> | 149:156823d33999 | 154 | // All other relevant events are initially disabled. |
<> | 149:156823d33999 | 155 | nrf_rtc_event_disable(COMMON_RTC_INSTANCE, |
AnnaBridge | 165:e614a9f1c9e2 | 156 | #if defined(TARGET_MCU_NRF51822) |
<> | 149:156823d33999 | 157 | OS_TICK_INT_MASK | |
AnnaBridge | 165:e614a9f1c9e2 | 158 | #endif |
AnnaBridge | 165:e614a9f1c9e2 | 159 | #if DEVICE_LOWPOWERTIMER |
<> | 149:156823d33999 | 160 | LP_TICKER_INT_MASK | |
AnnaBridge | 165:e614a9f1c9e2 | 161 | #endif |
<> | 149:156823d33999 | 162 | US_TICKER_INT_MASK); |
<> | 149:156823d33999 | 163 | |
<> | 149:156823d33999 | 164 | nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE), |
<> | 150:02e0a0aed4ec | 165 | #ifdef NRF51 |
<> | 150:02e0a0aed4ec | 166 | APP_IRQ_PRIORITY_LOW |
AnnaBridge | 165:e614a9f1c9e2 | 167 | #elif defined(NRF52) || defined(NRF52840_XXAA) |
<> | 150:02e0a0aed4ec | 168 | APP_IRQ_PRIORITY_LOWEST |
<> | 150:02e0a0aed4ec | 169 | #endif |
<> | 150:02e0a0aed4ec | 170 | ); |
<> | 149:156823d33999 | 171 | |
<> | 149:156823d33999 | 172 | nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_START); |
<> | 149:156823d33999 | 173 | |
<> | 149:156823d33999 | 174 | m_common_rtc_enabled = true; |
<> | 149:156823d33999 | 175 | } |
<> | 149:156823d33999 | 176 | |
Anna Bridge |
163:74e0ce7f98e8 | 177 | __STATIC_INLINE void rtc_ovf_event_safe_check(void) |
Anna Bridge |
163:74e0ce7f98e8 | 178 | { |
Anna Bridge |
163:74e0ce7f98e8 | 179 | core_util_critical_section_enter(); |
Anna Bridge |
163:74e0ce7f98e8 | 180 | |
Anna Bridge |
163:74e0ce7f98e8 | 181 | rtc_ovf_event_check(); |
Anna Bridge |
163:74e0ce7f98e8 | 182 | |
Anna Bridge |
163:74e0ce7f98e8 | 183 | core_util_critical_section_exit(); |
Anna Bridge |
163:74e0ce7f98e8 | 184 | } |
Anna Bridge |
163:74e0ce7f98e8 | 185 | |
Anna Bridge |
163:74e0ce7f98e8 | 186 | |
<> | 149:156823d33999 | 187 | uint32_t common_rtc_32bit_ticks_get(void) |
<> | 149:156823d33999 | 188 | { |
Anna Bridge |
163:74e0ce7f98e8 | 189 | uint32_t ticks; |
Anna Bridge |
163:74e0ce7f98e8 | 190 | uint32_t prev_overflows; |
Anna Bridge |
163:74e0ce7f98e8 | 191 | |
Anna Bridge |
163:74e0ce7f98e8 | 192 | do { |
Anna Bridge |
163:74e0ce7f98e8 | 193 | prev_overflows = m_common_rtc_overflows; |
Anna Bridge |
163:74e0ce7f98e8 | 194 | |
Anna Bridge |
163:74e0ce7f98e8 | 195 | ticks = nrf_rtc_counter_get(COMMON_RTC_INSTANCE); |
Anna Bridge |
163:74e0ce7f98e8 | 196 | // The counter used for time measurements is less than 32 bit wide, |
Anna Bridge |
163:74e0ce7f98e8 | 197 | // so its value is complemented with the number of registered overflows |
Anna Bridge |
163:74e0ce7f98e8 | 198 | // of the counter. |
Anna Bridge |
163:74e0ce7f98e8 | 199 | ticks += (m_common_rtc_overflows << RTC_COUNTER_BITS); |
Anna Bridge |
163:74e0ce7f98e8 | 200 | |
Anna Bridge |
163:74e0ce7f98e8 | 201 | // Check in case that OVF occurred during execution of a RTC handler (apply if call was from RTC handler) |
Anna Bridge |
163:74e0ce7f98e8 | 202 | // m_common_rtc_overflows might been updated in this call. |
Anna Bridge |
163:74e0ce7f98e8 | 203 | rtc_ovf_event_safe_check(); |
Anna Bridge |
163:74e0ce7f98e8 | 204 | |
Anna Bridge |
163:74e0ce7f98e8 | 205 | // If call was made from a low priority level m_common_rtc_overflows might have been updated in RTC handler. |
Anna Bridge |
163:74e0ce7f98e8 | 206 | } while (m_common_rtc_overflows != prev_overflows); |
Anna Bridge |
163:74e0ce7f98e8 | 207 | |
<> | 149:156823d33999 | 208 | return ticks; |
<> | 149:156823d33999 | 209 | } |
<> | 149:156823d33999 | 210 | |
<> | 149:156823d33999 | 211 | uint64_t common_rtc_64bit_us_get(void) |
<> | 149:156823d33999 | 212 | { |
<> | 149:156823d33999 | 213 | uint32_t ticks = common_rtc_32bit_ticks_get(); |
<> | 149:156823d33999 | 214 | // [ticks -> microseconds] |
<> | 149:156823d33999 | 215 | return ROUNDED_DIV(((uint64_t)ticks) * 1000000, RTC_INPUT_FREQ); |
<> | 149:156823d33999 | 216 | } |
<> | 149:156823d33999 | 217 | |
<> | 149:156823d33999 | 218 | void common_rtc_set_interrupt(uint32_t us_timestamp, uint32_t cc_channel, |
<> | 149:156823d33999 | 219 | uint32_t int_mask) |
<> | 149:156823d33999 | 220 | { |
<> | 149:156823d33999 | 221 | // The internal counter is clocked with a frequency that cannot be easily |
<> | 149:156823d33999 | 222 | // multiplied to 1 MHz, therefore besides the translation of values |
<> | 149:156823d33999 | 223 | // (microsecond <-> ticks) a special care of overflows handling must be |
<> | 149:156823d33999 | 224 | // taken. Here the 32-bit timestamp value is complemented with information |
<> | 149:156823d33999 | 225 | // about current the system up time of (ticks + number of overflows of tick |
<> | 149:156823d33999 | 226 | // counter on upper bits, converted to microseconds), and such 64-bit value |
<> | 149:156823d33999 | 227 | // is then translated to counter ticks. Finally, the lower 24 bits of thus |
<> | 149:156823d33999 | 228 | // calculated value is written to the counter compare register to prepare |
<> | 149:156823d33999 | 229 | // the interrupt generation. |
<> | 149:156823d33999 | 230 | uint64_t current_time64 = common_rtc_64bit_us_get(); |
<> | 149:156823d33999 | 231 | // [add upper 32 bits from the current time to the timestamp value] |
<> | 149:156823d33999 | 232 | uint64_t timestamp64 = us_timestamp + |
<> | 149:156823d33999 | 233 | (current_time64 & ~(uint64_t)0xFFFFFFFF); |
<> | 149:156823d33999 | 234 | // [if the original timestamp value happens to be after the 32 bit counter |
<> | 149:156823d33999 | 235 | // of microsends overflows, correct the upper 32 bits accordingly] |
<> | 149:156823d33999 | 236 | if (us_timestamp < (uint32_t)(current_time64 & 0xFFFFFFFF)) { |
<> | 149:156823d33999 | 237 | timestamp64 += ((uint64_t)1 << 32); |
<> | 149:156823d33999 | 238 | } |
<> | 149:156823d33999 | 239 | // [microseconds -> ticks, always round the result up to avoid too early |
<> | 149:156823d33999 | 240 | // interrupt generation] |
<> | 149:156823d33999 | 241 | uint32_t compare_value = |
<> | 149:156823d33999 | 242 | (uint32_t)CEIL_DIV((timestamp64) * RTC_INPUT_FREQ, 1000000); |
<> | 149:156823d33999 | 243 | |
Anna Bridge |
163:74e0ce7f98e8 | 244 | |
Anna Bridge |
163:74e0ce7f98e8 | 245 | core_util_critical_section_enter(); |
<> | 149:156823d33999 | 246 | // The COMPARE event occurs when the value in compare register is N and |
<> | 149:156823d33999 | 247 | // the counter value changes from N-1 to N. Therefore, the minimal safe |
<> | 149:156823d33999 | 248 | // difference between the compare value to be set and the current counter |
<> | 149:156823d33999 | 249 | // value is 2 ticks. This guarantees that the compare trigger is properly |
<> | 149:156823d33999 | 250 | // setup before the compare condition occurs. |
<> | 149:156823d33999 | 251 | uint32_t closest_safe_compare = common_rtc_32bit_ticks_get() + 2; |
<> | 149:156823d33999 | 252 | if ((int)(compare_value - closest_safe_compare) <= 0) { |
<> | 149:156823d33999 | 253 | compare_value = closest_safe_compare; |
<> | 149:156823d33999 | 254 | } |
<> | 149:156823d33999 | 255 | |
<> | 149:156823d33999 | 256 | nrf_rtc_cc_set(COMMON_RTC_INSTANCE, cc_channel, RTC_WRAP(compare_value)); |
<> | 149:156823d33999 | 257 | nrf_rtc_event_enable(COMMON_RTC_INSTANCE, int_mask); |
Anna Bridge |
163:74e0ce7f98e8 | 258 | |
Anna Bridge |
163:74e0ce7f98e8 | 259 | core_util_critical_section_exit(); |
<> | 149:156823d33999 | 260 | } |
<> | 149:156823d33999 | 261 | //------------------------------------------------------------------------------ |
<> | 149:156823d33999 | 262 | |
<> | 149:156823d33999 | 263 | |
<> | 149:156823d33999 | 264 | void us_ticker_init(void) |
<> | 149:156823d33999 | 265 | { |
<> | 149:156823d33999 | 266 | common_rtc_init(); |
<> | 149:156823d33999 | 267 | } |
<> | 149:156823d33999 | 268 | |
<> | 149:156823d33999 | 269 | uint32_t us_ticker_read() |
<> | 149:156823d33999 | 270 | { |
<> | 149:156823d33999 | 271 | us_ticker_init(); |
<> | 149:156823d33999 | 272 | return (uint32_t)common_rtc_64bit_us_get(); |
<> | 149:156823d33999 | 273 | } |
<> | 149:156823d33999 | 274 | |
<> | 149:156823d33999 | 275 | void us_ticker_set_interrupt(timestamp_t timestamp) |
<> | 149:156823d33999 | 276 | { |
<> | 149:156823d33999 | 277 | common_rtc_set_interrupt(timestamp, |
<> | 149:156823d33999 | 278 | US_TICKER_CC_CHANNEL, US_TICKER_INT_MASK); |
<> | 149:156823d33999 | 279 | } |
<> | 149:156823d33999 | 280 | |
AnnaBridge | 174:b96e65c34a4d | 281 | void us_ticker_fire_interrupt(void) |
AnnaBridge | 174:b96e65c34a4d | 282 | { |
AnnaBridge | 183:a56a73fd2a6f | 283 | core_util_critical_section_enter(); |
AnnaBridge | 183:a56a73fd2a6f | 284 | m_common_sw_irq_flag |= US_TICKER_SW_IRQ_MASK; |
AnnaBridge | 183:a56a73fd2a6f | 285 | NVIC_SetPendingIRQ(RTC1_IRQn); |
AnnaBridge | 183:a56a73fd2a6f | 286 | core_util_critical_section_exit(); |
AnnaBridge | 174:b96e65c34a4d | 287 | } |
AnnaBridge | 174:b96e65c34a4d | 288 | |
<> | 149:156823d33999 | 289 | void us_ticker_disable_interrupt(void) |
<> | 149:156823d33999 | 290 | { |
<> | 149:156823d33999 | 291 | nrf_rtc_event_disable(COMMON_RTC_INSTANCE, US_TICKER_INT_MASK); |
<> | 149:156823d33999 | 292 | } |
<> | 149:156823d33999 | 293 | |
<> | 149:156823d33999 | 294 | void us_ticker_clear_interrupt(void) |
<> | 149:156823d33999 | 295 | { |
AnnaBridge | 183:a56a73fd2a6f | 296 | m_common_sw_irq_flag &= ~US_TICKER_SW_IRQ_MASK; |
<> | 149:156823d33999 | 297 | nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT); |
<> | 149:156823d33999 | 298 | } |
<> | 149:156823d33999 | 299 | |
<> | 149:156823d33999 | 300 | |
<> | 149:156823d33999 | 301 | // Since there is no SysTick on NRF51, the RTC1 channel 1 is used as an |
<> | 149:156823d33999 | 302 | // alternative source of RTOS ticks. |
<> | 149:156823d33999 | 303 | #if defined(TARGET_MCU_NRF51822) |
<> | 149:156823d33999 | 304 | |
<> | 160:d5399cc887bb | 305 | #include "mbed_toolchain.h" |
<> | 149:156823d33999 | 306 | |
<> | 149:156823d33999 | 307 | |
<> | 149:156823d33999 | 308 | #define MAX_RTC_COUNTER_VAL ((1uL << RTC_COUNTER_BITS) - 1) |
<> | 149:156823d33999 | 309 | |
AnnaBridge | 167:e84263d55307 | 310 | #ifndef RTC1_CONFIG_FREQUENCY |
AnnaBridge | 167:e84263d55307 | 311 | #define RTC1_CONFIG_FREQUENCY 32678 // [Hz] |
AnnaBridge | 167:e84263d55307 | 312 | #endif |
<> | 149:156823d33999 | 313 | |
AnnaBridge | 167:e84263d55307 | 314 | |
<> | 149:156823d33999 | 315 | |
AnnaBridge | 167:e84263d55307 | 316 | void COMMON_RTC_IRQ_HANDLER(void) |
<> | 149:156823d33999 | 317 | { |
AnnaBridge | 174:b96e65c34a4d | 318 | if(!nrf_rtc_event_pending(COMMON_RTC_INSTANCE, OS_TICK_EVENT)) { |
AnnaBridge | 167:e84263d55307 | 319 | common_rtc_irq_handler(); |
AnnaBridge | 167:e84263d55307 | 320 | } |
<> | 149:156823d33999 | 321 | } |
<> | 149:156823d33999 | 322 | |
AnnaBridge | 174:b96e65c34a4d | 323 | IRQn_Type mbed_get_m0_tick_irqn() |
AnnaBridge | 165:e614a9f1c9e2 | 324 | { |
AnnaBridge | 174:b96e65c34a4d | 325 | return SWI3_IRQn; |
<> | 149:156823d33999 | 326 | } |
<> | 149:156823d33999 | 327 | |
AnnaBridge | 167:e84263d55307 | 328 | |
<> | 149:156823d33999 | 329 | #endif // defined(TARGET_MCU_NRF51822) |