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Dependents:   STM32_F103-C8T6basecanblink_led

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targets/TARGET_NORDIC/TARGET_NRF5/itm_api.c@185:08ed48f1de7f, 2018-04-19 (annotated)

Committer:
AnnaBridge
Date:
Thu Apr 19 17:12:19 2018 +0100
Revision:
185:08ed48f1de7f
mbed-dev library. Release version 161

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 185:08ed48f1de7f 1 /* mbed Microcontroller Library
AnnaBridge 185:08ed48f1de7f 2 * Copyright (c) 2017 ARM Limited
AnnaBridge 185:08ed48f1de7f 3 *
AnnaBridge 185:08ed48f1de7f 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 185:08ed48f1de7f 5 * you may not use this file except in compliance with the License.
AnnaBridge 185:08ed48f1de7f 6 * You may obtain a copy of the License at
AnnaBridge 185:08ed48f1de7f 7 *
AnnaBridge 185:08ed48f1de7f 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 185:08ed48f1de7f 9 *
AnnaBridge 185:08ed48f1de7f 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 185:08ed48f1de7f 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 185:08ed48f1de7f 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 185:08ed48f1de7f 13 * See the License for the specific language governing permissions and
AnnaBridge 185:08ed48f1de7f 14 * limitations under the License.
AnnaBridge 185:08ed48f1de7f 15 */
AnnaBridge 185:08ed48f1de7f 16
AnnaBridge 185:08ed48f1de7f 17 #if defined(DEVICE_ITM)
AnnaBridge 185:08ed48f1de7f 18
AnnaBridge 185:08ed48f1de7f 19 #include "hal/itm_api.h"
AnnaBridge 185:08ed48f1de7f 20
AnnaBridge 185:08ed48f1de7f 21 #include "nrf.h"
AnnaBridge 185:08ed48f1de7f 22 #include "nrf5x_lf_clk_helper.h"
AnnaBridge 185:08ed48f1de7f 23
AnnaBridge 185:08ed48f1de7f 24 /* SWO frequency: 4000 kHz */
AnnaBridge 185:08ed48f1de7f 25 void itm_init(void)
AnnaBridge 185:08ed48f1de7f 26 {
AnnaBridge 185:08ed48f1de7f 27 /* Enable SWO trace functionality */
AnnaBridge 185:08ed48f1de7f 28 CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
AnnaBridge 185:08ed48f1de7f 29 NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
AnnaBridge 185:08ed48f1de7f 30
AnnaBridge 185:08ed48f1de7f 31 /* set SWO clock speed to 4 MHz */
AnnaBridge 185:08ed48f1de7f 32 NRF_CLOCK->TRACECONFIG = (NRF_CLOCK->TRACECONFIG & ~CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk) |
AnnaBridge 185:08ed48f1de7f 33 (CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos);
AnnaBridge 185:08ed48f1de7f 34
AnnaBridge 185:08ed48f1de7f 35 /* set SWO pin */
AnnaBridge 185:08ed48f1de7f 36 NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
AnnaBridge 185:08ed48f1de7f 37 (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
AnnaBridge 185:08ed48f1de7f 38 (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
AnnaBridge 185:08ed48f1de7f 39
AnnaBridge 185:08ed48f1de7f 40 /* set prescaler */
AnnaBridge 185:08ed48f1de7f 41 TPI->ACPR = 0;
AnnaBridge 185:08ed48f1de7f 42 }
AnnaBridge 185:08ed48f1de7f 43
AnnaBridge 185:08ed48f1de7f 44 #endif