Sankichi / USBDevice

Modified for PS3 Joystick

Dependents:   NiseKabuto

Fork of USBDevice by Samuel Mokrani

USBDevice/USBHAL_LPC17.cpp@1:ac5cca60029a, 2013-07-27 (annotated)

Committer:
sankichi
Date:
Sat Jul 27 14:05:26 2013 +0000
Revision:
1:ac5cca60029a
Parent:
0:140cdf8e2d60 
First Release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 0:140cdf8e2d60 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 0:140cdf8e2d60 2 *
samux 0:140cdf8e2d60 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 0:140cdf8e2d60 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 0:140cdf8e2d60 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 0:140cdf8e2d60 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 0:140cdf8e2d60 7 * Software is furnished to do so, subject to the following conditions:
samux 0:140cdf8e2d60 8 *
samux 0:140cdf8e2d60 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 0:140cdf8e2d60 10 * substantial portions of the Software.
samux 0:140cdf8e2d60 11 *
samux 0:140cdf8e2d60 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 0:140cdf8e2d60 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 0:140cdf8e2d60 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 0:140cdf8e2d60 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 0:140cdf8e2d60 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 0:140cdf8e2d60 17 */
samux 0:140cdf8e2d60 18
samux 0:140cdf8e2d60 19 #ifdef TARGET_LPC1768
samux 0:140cdf8e2d60 20
samux 0:140cdf8e2d60 21 #include "USBHAL.h"
samux 0:140cdf8e2d60 22
samux 0:140cdf8e2d60 23
samux 0:140cdf8e2d60 24 // Get endpoint direction
samux 0:140cdf8e2d60 25 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
samux 0:140cdf8e2d60 26 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
samux 0:140cdf8e2d60 27
samux 0:140cdf8e2d60 28 // Convert physical endpoint number to register bit
samux 0:140cdf8e2d60 29 #define EP(endpoint) (1UL<<endpoint)
samux 0:140cdf8e2d60 30
samux 0:140cdf8e2d60 31 // Power Control for Peripherals register
samux 0:140cdf8e2d60 32 #define PCUSB (1UL<<31)
samux 0:140cdf8e2d60 33
samux 0:140cdf8e2d60 34 // USB Clock Control register
samux 0:140cdf8e2d60 35 #define DEV_CLK_EN (1UL<<1)
samux 0:140cdf8e2d60 36 #define AHB_CLK_EN (1UL<<4)
samux 0:140cdf8e2d60 37
samux 0:140cdf8e2d60 38 // USB Clock Status register
samux 0:140cdf8e2d60 39 #define DEV_CLK_ON (1UL<<1)
samux 0:140cdf8e2d60 40 #define AHB_CLK_ON (1UL<<4)
samux 0:140cdf8e2d60 41
samux 0:140cdf8e2d60 42 // USB Device Interupt registers
samux 0:140cdf8e2d60 43 #define FRAME (1UL<<0)
samux 0:140cdf8e2d60 44 #define EP_FAST (1UL<<1)
samux 0:140cdf8e2d60 45 #define EP_SLOW (1UL<<2)
samux 0:140cdf8e2d60 46 #define DEV_STAT (1UL<<3)
samux 0:140cdf8e2d60 47 #define CCEMPTY (1UL<<4)
samux 0:140cdf8e2d60 48 #define CDFULL (1UL<<5)
samux 0:140cdf8e2d60 49 #define RxENDPKT (1UL<<6)
samux 0:140cdf8e2d60 50 #define TxENDPKT (1UL<<7)
samux 0:140cdf8e2d60 51 #define EP_RLZED (1UL<<8)
samux 0:140cdf8e2d60 52 #define ERR_INT (1UL<<9)
samux 0:140cdf8e2d60 53
samux 0:140cdf8e2d60 54 // USB Control register
samux 0:140cdf8e2d60 55 #define RD_EN (1<<0)
samux 0:140cdf8e2d60 56 #define WR_EN (1<<1)
samux 0:140cdf8e2d60 57 #define LOG_ENDPOINT(endpoint) ((endpoint>>1)<<2)
samux 0:140cdf8e2d60 58
samux 0:140cdf8e2d60 59 // USB Receive Packet Length register
samux 0:140cdf8e2d60 60 #define DV (1UL<<10)
samux 0:140cdf8e2d60 61 #define PKT_RDY (1UL<<11)
samux 0:140cdf8e2d60 62 #define PKT_LNGTH_MASK (0x3ff)
samux 0:140cdf8e2d60 63
samux 0:140cdf8e2d60 64 // Serial Interface Engine (SIE)
samux 0:140cdf8e2d60 65 #define SIE_WRITE (0x01)
samux 0:140cdf8e2d60 66 #define SIE_READ (0x02)
samux 0:140cdf8e2d60 67 #define SIE_COMMAND (0x05)
samux 0:140cdf8e2d60 68 #define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16))
samux 0:140cdf8e2d60 69
samux 0:140cdf8e2d60 70 // SIE Command codes
samux 0:140cdf8e2d60 71 #define SIE_CMD_SET_ADDRESS (0xD0)
samux 0:140cdf8e2d60 72 #define SIE_CMD_CONFIGURE_DEVICE (0xD8)
samux 0:140cdf8e2d60 73 #define SIE_CMD_SET_MODE (0xF3)
samux 0:140cdf8e2d60 74 #define SIE_CMD_READ_FRAME_NUMBER (0xF5)
samux 0:140cdf8e2d60 75 #define SIE_CMD_READ_TEST_REGISTER (0xFD)
samux 0:140cdf8e2d60 76 #define SIE_CMD_SET_DEVICE_STATUS (0xFE)
samux 0:140cdf8e2d60 77 #define SIE_CMD_GET_DEVICE_STATUS (0xFE)
samux 0:140cdf8e2d60 78 #define SIE_CMD_GET_ERROR_CODE (0xFF)
samux 0:140cdf8e2d60 79 #define SIE_CMD_READ_ERROR_STATUS (0xFB)
samux 0:140cdf8e2d60 80
samux 0:140cdf8e2d60 81 #define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+endpoint)
samux 0:140cdf8e2d60 82 #define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+endpoint)
samux 0:140cdf8e2d60 83 #define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+endpoint)
samux 0:140cdf8e2d60 84
samux 0:140cdf8e2d60 85 #define SIE_CMD_CLEAR_BUFFER (0xF2)
samux 0:140cdf8e2d60 86 #define SIE_CMD_VALIDATE_BUFFER (0xFA)
samux 0:140cdf8e2d60 87
samux 0:140cdf8e2d60 88 // SIE Device Status register
samux 0:140cdf8e2d60 89 #define SIE_DS_CON (1<<0)
samux 0:140cdf8e2d60 90 #define SIE_DS_CON_CH (1<<1)
samux 0:140cdf8e2d60 91 #define SIE_DS_SUS (1<<2)
samux 0:140cdf8e2d60 92 #define SIE_DS_SUS_CH (1<<3)
samux 0:140cdf8e2d60 93 #define SIE_DS_RST (1<<4)
samux 0:140cdf8e2d60 94
samux 0:140cdf8e2d60 95 // SIE Device Set Address register
samux 0:140cdf8e2d60 96 #define SIE_DSA_DEV_EN (1<<7)
samux 0:140cdf8e2d60 97
samux 0:140cdf8e2d60 98 // SIE Configue Device register
samux 0:140cdf8e2d60 99 #define SIE_CONF_DEVICE (1<<0)
samux 0:140cdf8e2d60 100
samux 0:140cdf8e2d60 101 // Select Endpoint register
samux 0:140cdf8e2d60 102 #define SIE_SE_FE (1<<0)
samux 0:140cdf8e2d60 103 #define SIE_SE_ST (1<<1)
samux 0:140cdf8e2d60 104 #define SIE_SE_STP (1<<2)
samux 0:140cdf8e2d60 105 #define SIE_SE_PO (1<<3)
samux 0:140cdf8e2d60 106 #define SIE_SE_EPN (1<<4)
samux 0:140cdf8e2d60 107 #define SIE_SE_B_1_FULL (1<<5)
samux 0:140cdf8e2d60 108 #define SIE_SE_B_2_FULL (1<<6)
samux 0:140cdf8e2d60 109
samux 0:140cdf8e2d60 110 // Set Endpoint Status command
samux 0:140cdf8e2d60 111 #define SIE_SES_ST (1<<0)
samux 0:140cdf8e2d60 112 #define SIE_SES_DA (1<<5)
samux 0:140cdf8e2d60 113 #define SIE_SES_RF_MO (1<<6)
samux 0:140cdf8e2d60 114 #define SIE_SES_CND_ST (1<<7)
samux 0:140cdf8e2d60 115
samux 0:140cdf8e2d60 116
samux 0:140cdf8e2d60 117 USBHAL * USBHAL::instance;
samux 0:140cdf8e2d60 118
samux 0:140cdf8e2d60 119 volatile int epComplete;
samux 0:140cdf8e2d60 120 uint32_t endpointStallState;
samux 0:140cdf8e2d60 121
samux 0:140cdf8e2d60 122 static void SIECommand(uint32_t command) {
samux 0:140cdf8e2d60 123 // The command phase of a SIE transaction
samux 0:140cdf8e2d60 124 LPC_USB->USBDevIntClr = CCEMPTY;
samux 0:140cdf8e2d60 125 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command);
samux 0:140cdf8e2d60 126 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
samux 0:140cdf8e2d60 127 }
samux 0:140cdf8e2d60 128
samux 0:140cdf8e2d60 129 static void SIEWriteData(uint8_t data) {
samux 0:140cdf8e2d60 130 // The data write phase of a SIE transaction
samux 0:140cdf8e2d60 131 LPC_USB->USBDevIntClr = CCEMPTY;
samux 0:140cdf8e2d60 132 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data);
samux 0:140cdf8e2d60 133 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
samux 0:140cdf8e2d60 134 }
samux 0:140cdf8e2d60 135
samux 0:140cdf8e2d60 136 static uint8_t SIEReadData(uint32_t command) {
samux 0:140cdf8e2d60 137 // The data read phase of a SIE transaction
samux 0:140cdf8e2d60 138 LPC_USB->USBDevIntClr = CDFULL;
samux 0:140cdf8e2d60 139 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command);
samux 0:140cdf8e2d60 140 while (!(LPC_USB->USBDevIntSt & CDFULL));
samux 0:140cdf8e2d60 141 return (uint8_t)LPC_USB->USBCmdData;
samux 0:140cdf8e2d60 142 }
samux 0:140cdf8e2d60 143
samux 0:140cdf8e2d60 144 static void SIEsetDeviceStatus(uint8_t status) {
samux 0:140cdf8e2d60 145 // Write SIE device status register
samux 0:140cdf8e2d60 146 SIECommand(SIE_CMD_SET_DEVICE_STATUS);
samux 0:140cdf8e2d60 147 SIEWriteData(status);
samux 0:140cdf8e2d60 148 }
samux 0:140cdf8e2d60 149
samux 0:140cdf8e2d60 150 static uint8_t SIEgetDeviceStatus(void) {
samux 0:140cdf8e2d60 151 // Read SIE device status register
samux 0:140cdf8e2d60 152 SIECommand(SIE_CMD_GET_DEVICE_STATUS);
samux 0:140cdf8e2d60 153 return SIEReadData(SIE_CMD_GET_DEVICE_STATUS);
samux 0:140cdf8e2d60 154 }
samux 0:140cdf8e2d60 155
samux 0:140cdf8e2d60 156 void SIEsetAddress(uint8_t address) {
samux 0:140cdf8e2d60 157 // Write SIE device address register
samux 0:140cdf8e2d60 158 SIECommand(SIE_CMD_SET_ADDRESS);
samux 0:140cdf8e2d60 159 SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN);
samux 0:140cdf8e2d60 160 }
samux 0:140cdf8e2d60 161
samux 0:140cdf8e2d60 162 static uint8_t SIEselectEndpoint(uint8_t endpoint) {
samux 0:140cdf8e2d60 163 // SIE select endpoint command
samux 0:140cdf8e2d60 164 SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint));
samux 0:140cdf8e2d60 165 return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint));
samux 0:140cdf8e2d60 166 }
samux 0:140cdf8e2d60 167
samux 0:140cdf8e2d60 168 static uint8_t SIEclearBuffer(void) {
samux 0:140cdf8e2d60 169 // SIE clear buffer command
samux 0:140cdf8e2d60 170 SIECommand(SIE_CMD_CLEAR_BUFFER);
samux 0:140cdf8e2d60 171 return SIEReadData(SIE_CMD_CLEAR_BUFFER);
samux 0:140cdf8e2d60 172 }
samux 0:140cdf8e2d60 173
samux 0:140cdf8e2d60 174 static void SIEvalidateBuffer(void) {
samux 0:140cdf8e2d60 175 // SIE validate buffer command
samux 0:140cdf8e2d60 176 SIECommand(SIE_CMD_VALIDATE_BUFFER);
samux 0:140cdf8e2d60 177 }
samux 0:140cdf8e2d60 178
samux 0:140cdf8e2d60 179 static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) {
samux 0:140cdf8e2d60 180 // SIE set endpoint status command
samux 0:140cdf8e2d60 181 SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint));
samux 0:140cdf8e2d60 182 SIEWriteData(status);
samux 0:140cdf8e2d60 183 }
samux 0:140cdf8e2d60 184
samux 0:140cdf8e2d60 185 static uint16_t SIEgetFrameNumber(void) __attribute__ ((unused));
samux 0:140cdf8e2d60 186 static uint16_t SIEgetFrameNumber(void) {
samux 0:140cdf8e2d60 187 // Read current frame number
samux 0:140cdf8e2d60 188 uint16_t lowByte;
samux 0:140cdf8e2d60 189 uint16_t highByte;
samux 0:140cdf8e2d60 190
samux 0:140cdf8e2d60 191 SIECommand(SIE_CMD_READ_FRAME_NUMBER);
samux 0:140cdf8e2d60 192 lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
samux 0:140cdf8e2d60 193 highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
samux 0:140cdf8e2d60 194
samux 0:140cdf8e2d60 195 return (highByte << 8) | lowByte;
samux 0:140cdf8e2d60 196 }
samux 0:140cdf8e2d60 197
samux 0:140cdf8e2d60 198 static void SIEconfigureDevice(void) {
samux 0:140cdf8e2d60 199 // SIE Configure device command
samux 0:140cdf8e2d60 200 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
samux 0:140cdf8e2d60 201 SIEWriteData(SIE_CONF_DEVICE);
samux 0:140cdf8e2d60 202 }
samux 0:140cdf8e2d60 203
samux 0:140cdf8e2d60 204 static void SIEunconfigureDevice(void) {
samux 0:140cdf8e2d60 205 // SIE Configure device command
samux 0:140cdf8e2d60 206 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
samux 0:140cdf8e2d60 207 SIEWriteData(0);
samux 0:140cdf8e2d60 208 }
samux 0:140cdf8e2d60 209
samux 0:140cdf8e2d60 210 static void SIEconnect(void) {
samux 0:140cdf8e2d60 211 // Connect USB device
samux 0:140cdf8e2d60 212 uint8_t status;
samux 0:140cdf8e2d60 213
samux 0:140cdf8e2d60 214 status = SIEgetDeviceStatus();
samux 0:140cdf8e2d60 215 SIEsetDeviceStatus(status | SIE_DS_CON);
samux 0:140cdf8e2d60 216 }
samux 0:140cdf8e2d60 217
samux 0:140cdf8e2d60 218
samux 0:140cdf8e2d60 219 static void SIEdisconnect(void) {
samux 0:140cdf8e2d60 220 // Disconnect USB device
samux 0:140cdf8e2d60 221 uint8_t status;
samux 0:140cdf8e2d60 222
samux 0:140cdf8e2d60 223 status = SIEgetDeviceStatus();
samux 0:140cdf8e2d60 224 SIEsetDeviceStatus(status & ~SIE_DS_CON);
samux 0:140cdf8e2d60 225 }
samux 0:140cdf8e2d60 226
samux 0:140cdf8e2d60 227
samux 0:140cdf8e2d60 228 static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) {
samux 0:140cdf8e2d60 229 // Implemented using using EP_INT_CLR.
samux 0:140cdf8e2d60 230 LPC_USB->USBEpIntClr = EP(endpoint);
samux 0:140cdf8e2d60 231 while (!(LPC_USB->USBDevIntSt & CDFULL));
samux 0:140cdf8e2d60 232 return (uint8_t)LPC_USB->USBCmdData;
samux 0:140cdf8e2d60 233 }
samux 0:140cdf8e2d60 234
samux 0:140cdf8e2d60 235
samux 0:140cdf8e2d60 236
samux 0:140cdf8e2d60 237
samux 0:140cdf8e2d60 238
samux 0:140cdf8e2d60 239 static void enableEndpointEvent(uint8_t endpoint) {
samux 0:140cdf8e2d60 240 // Enable an endpoint interrupt
samux 0:140cdf8e2d60 241 LPC_USB->USBEpIntEn |= EP(endpoint);
samux 0:140cdf8e2d60 242 }
samux 0:140cdf8e2d60 243
samux 0:140cdf8e2d60 244 static void disableEndpointEvent(uint8_t endpoint) __attribute__ ((unused));
samux 0:140cdf8e2d60 245 static void disableEndpointEvent(uint8_t endpoint) {
samux 0:140cdf8e2d60 246 // Disable an endpoint interrupt
samux 0:140cdf8e2d60 247 LPC_USB->USBEpIntEn &= ~EP(endpoint);
samux 0:140cdf8e2d60 248 }
samux 0:140cdf8e2d60 249
samux 0:140cdf8e2d60 250 static volatile uint32_t __attribute__((used)) dummyRead;
samux 0:140cdf8e2d60 251
samux 0:140cdf8e2d60 252
samux 0:140cdf8e2d60 253 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
samux 0:140cdf8e2d60 254 // Read from an OUT endpoint
samux 0:140cdf8e2d60 255 uint32_t size;
samux 0:140cdf8e2d60 256 uint32_t i;
samux 0:140cdf8e2d60 257 uint32_t data = 0;
samux 0:140cdf8e2d60 258 uint8_t offset;
samux 0:140cdf8e2d60 259
samux 0:140cdf8e2d60 260 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN;
samux 0:140cdf8e2d60 261 while (!(LPC_USB->USBRxPLen & PKT_RDY));
samux 0:140cdf8e2d60 262
samux 0:140cdf8e2d60 263 size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK;
samux 0:140cdf8e2d60 264
samux 0:140cdf8e2d60 265 offset = 0;
samux 0:140cdf8e2d60 266
samux 0:140cdf8e2d60 267 if (size > 0) {
samux 0:140cdf8e2d60 268 for (i=0; i<size; i++) {
samux 0:140cdf8e2d60 269 if (offset==0) {
samux 0:140cdf8e2d60 270 // Fetch up to four bytes of data as a word
samux 0:140cdf8e2d60 271 data = LPC_USB->USBRxData;
samux 0:140cdf8e2d60 272 }
samux 0:140cdf8e2d60 273
samux 0:140cdf8e2d60 274 // extract a byte
samux 0:140cdf8e2d60 275 *buffer = (data>>offset) & 0xff;
samux 0:140cdf8e2d60 276 buffer++;
samux 0:140cdf8e2d60 277
samux 0:140cdf8e2d60 278 // move on to the next byte
samux 0:140cdf8e2d60 279 offset = (offset + 8) % 32;
samux 0:140cdf8e2d60 280 }
samux 0:140cdf8e2d60 281 } else {
samux 0:140cdf8e2d60 282 dummyRead = LPC_USB->USBRxData;
samux 0:140cdf8e2d60 283 }
samux 0:140cdf8e2d60 284
samux 0:140cdf8e2d60 285 LPC_USB->USBCtrl = 0;
samux 0:140cdf8e2d60 286
samux 0:140cdf8e2d60 287 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
samux 0:140cdf8e2d60 288 SIEselectEndpoint(endpoint);
samux 0:140cdf8e2d60 289 SIEclearBuffer();
samux 0:140cdf8e2d60 290 }
samux 0:140cdf8e2d60 291
samux 0:140cdf8e2d60 292 return size;
samux 0:140cdf8e2d60 293 }
samux 0:140cdf8e2d60 294
samux 0:140cdf8e2d60 295 static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) {
samux 0:140cdf8e2d60 296 // Write to an IN endpoint
samux 0:140cdf8e2d60 297 uint32_t temp, data;
samux 0:140cdf8e2d60 298 uint8_t offset;
samux 0:140cdf8e2d60 299
samux 0:140cdf8e2d60 300 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN;
samux 0:140cdf8e2d60 301
samux 0:140cdf8e2d60 302 LPC_USB->USBTxPLen = size;
samux 0:140cdf8e2d60 303 offset = 0;
samux 0:140cdf8e2d60 304 data = 0;
samux 0:140cdf8e2d60 305
samux 0:140cdf8e2d60 306 if (size>0) {
samux 0:140cdf8e2d60 307 do {
samux 0:140cdf8e2d60 308 // Fetch next data byte into a word-sized temporary variable
samux 0:140cdf8e2d60 309 temp = *buffer++;
samux 0:140cdf8e2d60 310
samux 0:140cdf8e2d60 311 // Add to current data word
samux 0:140cdf8e2d60 312 temp = temp << offset;
samux 0:140cdf8e2d60 313 data = data | temp;
samux 0:140cdf8e2d60 314
samux 0:140cdf8e2d60 315 // move on to the next byte
samux 0:140cdf8e2d60 316 offset = (offset + 8) % 32;
samux 0:140cdf8e2d60 317 size--;
samux 0:140cdf8e2d60 318
samux 0:140cdf8e2d60 319 if ((offset==0) || (size==0)) {
samux 0:140cdf8e2d60 320 // Write the word to the endpoint
samux 0:140cdf8e2d60 321 LPC_USB->USBTxData = data;
samux 0:140cdf8e2d60 322 data = 0;
samux 0:140cdf8e2d60 323 }
samux 0:140cdf8e2d60 324 } while (size>0);
samux 0:140cdf8e2d60 325 } else {
samux 0:140cdf8e2d60 326 LPC_USB->USBTxData = 0;
samux 0:140cdf8e2d60 327 }
samux 0:140cdf8e2d60 328
samux 0:140cdf8e2d60 329 // Clear WR_EN to cover zero length packet case
samux 0:140cdf8e2d60 330 LPC_USB->USBCtrl=0;
samux 0:140cdf8e2d60 331
samux 0:140cdf8e2d60 332 SIEselectEndpoint(endpoint);
samux 0:140cdf8e2d60 333 SIEvalidateBuffer();
samux 0:140cdf8e2d60 334 }
samux 0:140cdf8e2d60 335
samux 0:140cdf8e2d60 336
samux 0:140cdf8e2d60 337
samux 0:140cdf8e2d60 338
samux 0:140cdf8e2d60 339
samux 0:140cdf8e2d60 340
samux 0:140cdf8e2d60 341
samux 0:140cdf8e2d60 342 USBHAL::USBHAL(void) {
samux 0:140cdf8e2d60 343 // Disable IRQ
samux 0:140cdf8e2d60 344 NVIC_DisableIRQ(USB_IRQn);
samux 0:140cdf8e2d60 345
samux 0:140cdf8e2d60 346 // Enable power to USB device controller
samux 0:140cdf8e2d60 347 LPC_SC->PCONP |= PCUSB;
samux 0:140cdf8e2d60 348
samux 0:140cdf8e2d60 349 // Enable USB clocks
samux 0:140cdf8e2d60 350 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
samux 0:140cdf8e2d60 351 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
samux 0:140cdf8e2d60 352
samux 0:140cdf8e2d60 353 // Configure pins P0.29 and P0.30 to be USB D+ and USB D-
samux 0:140cdf8e2d60 354 LPC_PINCON->PINSEL1 &= 0xc3ffffff;
samux 0:140cdf8e2d60 355 LPC_PINCON->PINSEL1 |= 0x14000000;
samux 0:140cdf8e2d60 356
samux 0:140cdf8e2d60 357 // Disconnect USB device
samux 0:140cdf8e2d60 358 SIEdisconnect();
samux 0:140cdf8e2d60 359
samux 0:140cdf8e2d60 360 // Configure pin P2.9 to be Connect
samux 0:140cdf8e2d60 361 LPC_PINCON->PINSEL4 &= 0xfffcffff;
samux 0:140cdf8e2d60 362 LPC_PINCON->PINSEL4 |= 0x00040000;
samux 0:140cdf8e2d60 363
samux 0:140cdf8e2d60 364 // Connect must be low for at least 2.5uS
samux 0:140cdf8e2d60 365 wait(0.3);
samux 0:140cdf8e2d60 366
samux 0:140cdf8e2d60 367 // Set the maximum packet size for the control endpoints
samux 0:140cdf8e2d60 368 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
samux 0:140cdf8e2d60 369 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
samux 0:140cdf8e2d60 370
samux 0:140cdf8e2d60 371 // Attach IRQ
samux 0:140cdf8e2d60 372 instance = this;
samux 0:140cdf8e2d60 373 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
samux 0:140cdf8e2d60 374 NVIC_EnableIRQ(USB_IRQn);
samux 0:140cdf8e2d60 375
samux 0:140cdf8e2d60 376 // Enable interrupts for device events and EP0
samux 0:140cdf8e2d60 377 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME;
samux 0:140cdf8e2d60 378 enableEndpointEvent(EP0IN);
samux 0:140cdf8e2d60 379 enableEndpointEvent(EP0OUT);
samux 0:140cdf8e2d60 380 }
samux 0:140cdf8e2d60 381
samux 0:140cdf8e2d60 382 USBHAL::~USBHAL(void) {
samux 0:140cdf8e2d60 383 // Ensure device disconnected
samux 0:140cdf8e2d60 384 SIEdisconnect();
samux 0:140cdf8e2d60 385
samux 0:140cdf8e2d60 386 // Disable USB interrupts
samux 0:140cdf8e2d60 387 NVIC_DisableIRQ(USB_IRQn);
samux 0:140cdf8e2d60 388 }
samux 0:140cdf8e2d60 389
samux 0:140cdf8e2d60 390 void USBHAL::connect(void) {
samux 0:140cdf8e2d60 391 // Connect USB device
samux 0:140cdf8e2d60 392 SIEconnect();
samux 0:140cdf8e2d60 393 }
samux 0:140cdf8e2d60 394
samux 0:140cdf8e2d60 395 void USBHAL::disconnect(void) {
samux 0:140cdf8e2d60 396 // Disconnect USB device
samux 0:140cdf8e2d60 397 SIEdisconnect();
samux 0:140cdf8e2d60 398 }
samux 0:140cdf8e2d60 399
samux 0:140cdf8e2d60 400 void USBHAL::configureDevice(void) {
samux 0:140cdf8e2d60 401 SIEconfigureDevice();
samux 0:140cdf8e2d60 402 }
samux 0:140cdf8e2d60 403
samux 0:140cdf8e2d60 404 void USBHAL::unconfigureDevice(void) {
samux 0:140cdf8e2d60 405 SIEunconfigureDevice();
samux 0:140cdf8e2d60 406 }
samux 0:140cdf8e2d60 407
samux 0:140cdf8e2d60 408 void USBHAL::setAddress(uint8_t address) {
samux 0:140cdf8e2d60 409 SIEsetAddress(address);
samux 0:140cdf8e2d60 410 }
samux 0:140cdf8e2d60 411
samux 0:140cdf8e2d60 412 void USBHAL::EP0setup(uint8_t *buffer) {
samux 0:140cdf8e2d60 413 endpointReadcore(EP0OUT, buffer);
samux 0:140cdf8e2d60 414 }
samux 0:140cdf8e2d60 415
samux 0:140cdf8e2d60 416 void USBHAL::EP0read(void) {
samux 0:140cdf8e2d60 417 // Not required
samux 0:140cdf8e2d60 418 }
samux 0:140cdf8e2d60 419
samux 0:140cdf8e2d60 420 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
samux 0:140cdf8e2d60 421 return endpointReadcore(EP0OUT, buffer);
samux 0:140cdf8e2d60 422 }
samux 0:140cdf8e2d60 423
samux 0:140cdf8e2d60 424 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
samux 0:140cdf8e2d60 425 endpointWritecore(EP0IN, buffer, size);
samux 0:140cdf8e2d60 426 }
samux 0:140cdf8e2d60 427
samux 0:140cdf8e2d60 428 void USBHAL::EP0getWriteResult(void) {
samux 0:140cdf8e2d60 429 // Not required
samux 0:140cdf8e2d60 430 }
samux 0:140cdf8e2d60 431
samux 0:140cdf8e2d60 432 void USBHAL::EP0stall(void) {
samux 0:140cdf8e2d60 433 // This will stall both control endpoints
samux 0:140cdf8e2d60 434 stallEndpoint(EP0OUT);
samux 0:140cdf8e2d60 435 }
samux 0:140cdf8e2d60 436
samux 0:140cdf8e2d60 437 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
samux 0:140cdf8e2d60 438 return EP_PENDING;
samux 0:140cdf8e2d60 439 }
samux 0:140cdf8e2d60 440
samux 0:140cdf8e2d60 441 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
samux 0:140cdf8e2d60 442
samux 0:140cdf8e2d60 443 //for isochronous endpoint, we don't wait an interrupt
samux 0:140cdf8e2d60 444 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
samux 0:140cdf8e2d60 445 if (!(epComplete & EP(endpoint)))
samux 0:140cdf8e2d60 446 return EP_PENDING;
samux 0:140cdf8e2d60 447 }
samux 0:140cdf8e2d60 448
samux 0:140cdf8e2d60 449 *bytesRead = endpointReadcore(endpoint, buffer);
samux 0:140cdf8e2d60 450 epComplete &= ~EP(endpoint);
samux 0:140cdf8e2d60 451 return EP_COMPLETED;
samux 0:140cdf8e2d60 452 }
samux 0:140cdf8e2d60 453
samux 0:140cdf8e2d60 454 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
samux 0:140cdf8e2d60 455 if (getEndpointStallState(endpoint)) {
samux 0:140cdf8e2d60 456 return EP_STALLED;
samux 0:140cdf8e2d60 457 }
samux 0:140cdf8e2d60 458
samux 0:140cdf8e2d60 459 epComplete &= ~EP(endpoint);
samux 0:140cdf8e2d60 460
samux 0:140cdf8e2d60 461 endpointWritecore(endpoint, data, size);
samux 0:140cdf8e2d60 462 return EP_PENDING;
samux 0:140cdf8e2d60 463 }
samux 0:140cdf8e2d60 464
samux 0:140cdf8e2d60 465 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
samux 0:140cdf8e2d60 466 if (epComplete & EP(endpoint)) {
samux 0:140cdf8e2d60 467 epComplete &= ~EP(endpoint);
samux 0:140cdf8e2d60 468 return EP_COMPLETED;
samux 0:140cdf8e2d60 469 }
samux 0:140cdf8e2d60 470
samux 0:140cdf8e2d60 471 return EP_PENDING;
samux 0:140cdf8e2d60 472 }
samux 0:140cdf8e2d60 473
samux 0:140cdf8e2d60 474 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
samux 0:140cdf8e2d60 475 // Realise an endpoint
samux 0:140cdf8e2d60 476 LPC_USB->USBDevIntClr = EP_RLZED;
samux 0:140cdf8e2d60 477 LPC_USB->USBReEp |= EP(endpoint);
samux 0:140cdf8e2d60 478 LPC_USB->USBEpInd = endpoint;
samux 0:140cdf8e2d60 479 LPC_USB->USBMaxPSize = maxPacket;
samux 0:140cdf8e2d60 480
samux 0:140cdf8e2d60 481 while (!(LPC_USB->USBDevIntSt & EP_RLZED));
samux 0:140cdf8e2d60 482 LPC_USB->USBDevIntClr = EP_RLZED;
samux 0:140cdf8e2d60 483
samux 0:140cdf8e2d60 484 // Clear stall state
samux 0:140cdf8e2d60 485 endpointStallState &= ~EP(endpoint);
samux 0:140cdf8e2d60 486
samux 0:140cdf8e2d60 487 enableEndpointEvent(endpoint);
samux 0:140cdf8e2d60 488 return true;
samux 0:140cdf8e2d60 489 }
samux 0:140cdf8e2d60 490
samux 0:140cdf8e2d60 491 void USBHAL::stallEndpoint(uint8_t endpoint) {
samux 0:140cdf8e2d60 492 // Stall an endpoint
samux 0:140cdf8e2d60 493 if ( (endpoint==EP0IN) || (endpoint==EP0OUT) ) {
samux 0:140cdf8e2d60 494 // Conditionally stall both control endpoints
samux 0:140cdf8e2d60 495 SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST);
samux 0:140cdf8e2d60 496 } else {
samux 0:140cdf8e2d60 497 SIEsetEndpointStatus(endpoint, SIE_SES_ST);
samux 0:140cdf8e2d60 498
samux 0:140cdf8e2d60 499 // Update stall state
samux 0:140cdf8e2d60 500 endpointStallState |= EP(endpoint);
samux 0:140cdf8e2d60 501 }
samux 0:140cdf8e2d60 502 }
samux 0:140cdf8e2d60 503
samux 0:140cdf8e2d60 504 void USBHAL::unstallEndpoint(uint8_t endpoint) {
samux 0:140cdf8e2d60 505 // Unstall an endpoint. The endpoint will also be reinitialised
samux 0:140cdf8e2d60 506 SIEsetEndpointStatus(endpoint, 0);
samux 0:140cdf8e2d60 507
samux 0:140cdf8e2d60 508 // Update stall state
samux 0:140cdf8e2d60 509 endpointStallState &= ~EP(endpoint);
samux 0:140cdf8e2d60 510 }
samux 0:140cdf8e2d60 511
samux 0:140cdf8e2d60 512 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
samux 0:140cdf8e2d60 513 // Returns true if endpoint stalled
samux 0:140cdf8e2d60 514 return endpointStallState & EP(endpoint);
samux 0:140cdf8e2d60 515 }
samux 0:140cdf8e2d60 516
samux 0:140cdf8e2d60 517 void USBHAL::remoteWakeup(void) {
samux 0:140cdf8e2d60 518 // Remote wakeup
samux 0:140cdf8e2d60 519 uint8_t status;
samux 0:140cdf8e2d60 520
samux 0:140cdf8e2d60 521 // Enable USB clocks
samux 0:140cdf8e2d60 522 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
samux 0:140cdf8e2d60 523 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
samux 0:140cdf8e2d60 524
samux 0:140cdf8e2d60 525 status = SIEgetDeviceStatus();
samux 0:140cdf8e2d60 526 SIEsetDeviceStatus(status & ~SIE_DS_SUS);
samux 0:140cdf8e2d60 527 }
samux 0:140cdf8e2d60 528
samux 0:140cdf8e2d60 529
samux 0:140cdf8e2d60 530
samux 0:140cdf8e2d60 531
samux 0:140cdf8e2d60 532
samux 0:140cdf8e2d60 533 void USBHAL::_usbisr(void) {
samux 0:140cdf8e2d60 534 instance->usbisr();
samux 0:140cdf8e2d60 535 }
samux 0:140cdf8e2d60 536
samux 0:140cdf8e2d60 537
samux 0:140cdf8e2d60 538 void USBHAL::usbisr(void) {
samux 0:140cdf8e2d60 539 uint8_t devStat;
samux 0:140cdf8e2d60 540
samux 0:140cdf8e2d60 541 if (LPC_USB->USBDevIntSt & FRAME) {
samux 0:140cdf8e2d60 542 // Start of frame event
samux 0:140cdf8e2d60 543 SOF(SIEgetFrameNumber());
samux 0:140cdf8e2d60 544 // Clear interrupt status flag
samux 0:140cdf8e2d60 545 LPC_USB->USBDevIntClr = FRAME;
samux 0:140cdf8e2d60 546 }
samux 0:140cdf8e2d60 547
samux 0:140cdf8e2d60 548 if (LPC_USB->USBDevIntSt & DEV_STAT) {
samux 0:140cdf8e2d60 549 // Device Status interrupt
samux 0:140cdf8e2d60 550 // Must clear the interrupt status flag before reading the device status from the SIE
samux 0:140cdf8e2d60 551 LPC_USB->USBDevIntClr = DEV_STAT;
samux 0:140cdf8e2d60 552
samux 0:140cdf8e2d60 553 // Read device status from SIE
samux 0:140cdf8e2d60 554 devStat = SIEgetDeviceStatus();
samux 0:140cdf8e2d60 555 //printf("devStat: %d\r\n", devStat);
samux 0:140cdf8e2d60 556
samux 0:140cdf8e2d60 557 if (devStat & SIE_DS_SUS_CH) {
samux 0:140cdf8e2d60 558 // Suspend status changed
samux 0:140cdf8e2d60 559 if((devStat & SIE_DS_SUS) != 0) {
samux 0:140cdf8e2d60 560 suspendStateChanged(0);
samux 0:140cdf8e2d60 561 }
samux 0:140cdf8e2d60 562 }
samux 0:140cdf8e2d60 563
samux 0:140cdf8e2d60 564 if (devStat & SIE_DS_RST) {
samux 0:140cdf8e2d60 565 // Bus reset
samux 0:140cdf8e2d60 566 if((devStat & SIE_DS_SUS) == 0) {
samux 0:140cdf8e2d60 567 suspendStateChanged(1);
samux 0:140cdf8e2d60 568 }
samux 0:140cdf8e2d60 569 busReset();
samux 0:140cdf8e2d60 570 }
samux 0:140cdf8e2d60 571 }
samux 0:140cdf8e2d60 572
samux 0:140cdf8e2d60 573 if (LPC_USB->USBDevIntSt & EP_SLOW) {
samux 0:140cdf8e2d60 574 // (Slow) Endpoint Interrupt
samux 0:140cdf8e2d60 575
samux 0:140cdf8e2d60 576 // Process each endpoint interrupt
samux 0:140cdf8e2d60 577 if (LPC_USB->USBEpIntSt & EP(EP0OUT)) {
samux 0:140cdf8e2d60 578 if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) {
samux 0:140cdf8e2d60 579 // this is a setup packet
samux 0:140cdf8e2d60 580 EP0setupCallback();
samux 0:140cdf8e2d60 581 } else {
samux 0:140cdf8e2d60 582 EP0out();
samux 0:140cdf8e2d60 583 }
samux 0:140cdf8e2d60 584 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 585 }
samux 0:140cdf8e2d60 586
samux 0:140cdf8e2d60 587 if (LPC_USB->USBEpIntSt & EP(EP0IN)) {
samux 0:140cdf8e2d60 588 selectEndpointClearInterrupt(EP0IN);
samux 0:140cdf8e2d60 589 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 590 EP0in();
samux 0:140cdf8e2d60 591 }
samux 0:140cdf8e2d60 592
samux 0:140cdf8e2d60 593 // TODO: This should cover all endpoints, not just EP1,2,3:
samux 0:140cdf8e2d60 594 if (LPC_USB->USBEpIntSt & EP(EP1IN)) {
samux 0:140cdf8e2d60 595 selectEndpointClearInterrupt(EP1IN);
samux 0:140cdf8e2d60 596 epComplete |= EP(EP1IN);
samux 0:140cdf8e2d60 597 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 598 if (EP1_IN_callback())
samux 0:140cdf8e2d60 599 epComplete &= ~EP(EP1IN);
samux 0:140cdf8e2d60 600 }
samux 0:140cdf8e2d60 601
samux 0:140cdf8e2d60 602 if (LPC_USB->USBEpIntSt & EP(EP1OUT)) {
samux 0:140cdf8e2d60 603 selectEndpointClearInterrupt(EP1OUT);
samux 0:140cdf8e2d60 604 epComplete |= EP(EP1OUT);
samux 0:140cdf8e2d60 605 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 606 if (EP1_OUT_callback())
samux 0:140cdf8e2d60 607 epComplete &= ~EP(EP1OUT);
samux 0:140cdf8e2d60 608 }
samux 0:140cdf8e2d60 609
samux 0:140cdf8e2d60 610 if (LPC_USB->USBEpIntSt & EP(EP2IN)) {
samux 0:140cdf8e2d60 611 selectEndpointClearInterrupt(EP2IN);
samux 0:140cdf8e2d60 612 epComplete |= EP(EP2IN);
samux 0:140cdf8e2d60 613 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 614 if (EP2_IN_callback())
samux 0:140cdf8e2d60 615 epComplete &= ~EP(EP2IN);
samux 0:140cdf8e2d60 616 }
samux 0:140cdf8e2d60 617
samux 0:140cdf8e2d60 618 if (LPC_USB->USBEpIntSt & EP(EP2OUT)) {
samux 0:140cdf8e2d60 619 selectEndpointClearInterrupt(EP2OUT);
samux 0:140cdf8e2d60 620 epComplete |= EP(EP2OUT);
samux 0:140cdf8e2d60 621 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 622 if (EP2_OUT_callback())
samux 0:140cdf8e2d60 623 epComplete &= ~EP(EP2OUT);
samux 0:140cdf8e2d60 624 }
samux 0:140cdf8e2d60 625
samux 0:140cdf8e2d60 626 if (LPC_USB->USBEpIntSt & EP(EP3IN)) {
samux 0:140cdf8e2d60 627 selectEndpointClearInterrupt(EP3IN);
samux 0:140cdf8e2d60 628 epComplete |= EP(EP3IN);
samux 0:140cdf8e2d60 629 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 630 if (EP3_IN_callback())
samux 0:140cdf8e2d60 631 epComplete &= ~EP(EP3IN);
samux 0:140cdf8e2d60 632 }
samux 0:140cdf8e2d60 633
samux 0:140cdf8e2d60 634 if (LPC_USB->USBEpIntSt & EP(EP3OUT)) {
samux 0:140cdf8e2d60 635 selectEndpointClearInterrupt(EP3OUT);
samux 0:140cdf8e2d60 636 epComplete |= EP(EP3OUT);
samux 0:140cdf8e2d60 637 LPC_USB->USBDevIntClr = EP_SLOW;
samux 0:140cdf8e2d60 638 if (EP3_OUT_callback())
samux 0:140cdf8e2d60 639 epComplete &= ~EP(EP3OUT);
samux 0:140cdf8e2d60 640 }
samux 0:140cdf8e2d60 641 }
samux 0:140cdf8e2d60 642 }
samux 0:140cdf8e2d60 643
samux 0:140cdf8e2d60 644 #endif