Samuel Mokrani / Mbed 2 deprecated USBMSD_SD_HID_HelloWorld

USB MSD HID composite device hello world

Dependencies:   USBDevice mbed

USBMSD_SD/USBMSD_SD.cpp@0:61e5ecd27a36, 2013-01-21 (annotated)

Committer:
samux
Date:
Mon Jan 21 12:03:05 2013 +0000
Revision:
0:61e5ecd27a36
USB MSD HID composite device hello world

Who changed what in which revision?

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samux 0:61e5ecd27a36 1 /* mbed Microcontroller Library
samux 0:61e5ecd27a36 2 * Copyright (c) 2006-2012 ARM Limited
samux 0:61e5ecd27a36 3 *
samux 0:61e5ecd27a36 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
samux 0:61e5ecd27a36 5 * of this software and associated documentation files (the "Software"), to deal
samux 0:61e5ecd27a36 6 * in the Software without restriction, including without limitation the rights
samux 0:61e5ecd27a36 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
samux 0:61e5ecd27a36 8 * copies of the Software, and to permit persons to whom the Software is
samux 0:61e5ecd27a36 9 * furnished to do so, subject to the following conditions:
samux 0:61e5ecd27a36 10 *
samux 0:61e5ecd27a36 11 * The above copyright notice and this permission notice shall be included in
samux 0:61e5ecd27a36 12 * all copies or substantial portions of the Software.
samux 0:61e5ecd27a36 13 *
samux 0:61e5ecd27a36 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
samux 0:61e5ecd27a36 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
samux 0:61e5ecd27a36 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
samux 0:61e5ecd27a36 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
samux 0:61e5ecd27a36 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 0:61e5ecd27a36 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
samux 0:61e5ecd27a36 20 * SOFTWARE.
samux 0:61e5ecd27a36 21 */
samux 0:61e5ecd27a36 22 /* Introduction
samux 0:61e5ecd27a36 23 * ------------
samux 0:61e5ecd27a36 24 * SD and MMC cards support a number of interfaces, but common to them all
samux 0:61e5ecd27a36 25 * is one based on SPI. This is the one I'm implmenting because it means
samux 0:61e5ecd27a36 26 * it is much more portable even though not so performant, and we already
samux 0:61e5ecd27a36 27 * have the mbed SPI Interface!
samux 0:61e5ecd27a36 28 *
samux 0:61e5ecd27a36 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
samux 0:61e5ecd27a36 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
samux 0:61e5ecd27a36 31 *
samux 0:61e5ecd27a36 32 * SPI Startup
samux 0:61e5ecd27a36 33 * -----------
samux 0:61e5ecd27a36 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
samux 0:61e5ecd27a36 35 * asserting CS low and sending the reset command (CMD0). The card will
samux 0:61e5ecd27a36 36 * respond with a (R1) response.
samux 0:61e5ecd27a36 37 *
samux 0:61e5ecd27a36 38 * CMD8 is optionally sent to determine the voltage range supported, and
samux 0:61e5ecd27a36 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
samux 0:61e5ecd27a36 40 * version 2.x. I'll just ignore this for now.
samux 0:61e5ecd27a36 41 *
samux 0:61e5ecd27a36 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
samux 0:61e5ecd27a36 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
samux 0:61e5ecd27a36 44 *
samux 0:61e5ecd27a36 45 * You should also indicate whether the host supports High Capicity cards,
samux 0:61e5ecd27a36 46 * and check whether the card is high capacity - i'll also ignore this
samux 0:61e5ecd27a36 47 *
samux 0:61e5ecd27a36 48 * SPI Protocol
samux 0:61e5ecd27a36 49 * ------------
samux 0:61e5ecd27a36 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
samux 0:61e5ecd27a36 51 * the host starting every bus transaction by asserting the CS signal low. The
samux 0:61e5ecd27a36 52 * card always responds to commands, data blocks and errors.
samux 0:61e5ecd27a36 53 *
samux 0:61e5ecd27a36 54 * The protocol supports a CRC, but by default it is off (except for the
samux 0:61e5ecd27a36 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
samux 0:61e5ecd27a36 56 * I'll leave the CRC off I think!
samux 0:61e5ecd27a36 57 *
samux 0:61e5ecd27a36 58 * Standard capacity cards have variable data block sizes, whereas High
samux 0:61e5ecd27a36 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
samux 0:61e5ecd27a36 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
samux 0:61e5ecd27a36 61 * This is set with CMD16.
samux 0:61e5ecd27a36 62 *
samux 0:61e5ecd27a36 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
samux 0:61e5ecd27a36 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
samux 0:61e5ecd27a36 65 * the card gets a read command, it responds with a response token, and then
samux 0:61e5ecd27a36 66 * a data token or an error.
samux 0:61e5ecd27a36 67 *
samux 0:61e5ecd27a36 68 * SPI Command Format
samux 0:61e5ecd27a36 69 * ------------------
samux 0:61e5ecd27a36 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
samux 0:61e5ecd27a36 71 *
samux 0:61e5ecd27a36 72 * +---------------+------------+------------+-----------+----------+--------------+
samux 0:61e5ecd27a36 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
samux 0:61e5ecd27a36 74 * +---------------+------------+------------+-----------+----------+--------------+
samux 0:61e5ecd27a36 75 *
samux 0:61e5ecd27a36 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
samux 0:61e5ecd27a36 77 *
samux 0:61e5ecd27a36 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
samux 0:61e5ecd27a36 79 *
samux 0:61e5ecd27a36 80 * SPI Response Format
samux 0:61e5ecd27a36 81 * -------------------
samux 0:61e5ecd27a36 82 * The main response format (R1) is a status byte (normally zero). Key flags:
samux 0:61e5ecd27a36 83 * idle - 1 if the card is in an idle state/initialising
samux 0:61e5ecd27a36 84 * cmd - 1 if an illegal command code was detected
samux 0:61e5ecd27a36 85 *
samux 0:61e5ecd27a36 86 * +-------------------------------------------------+
samux 0:61e5ecd27a36 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
samux 0:61e5ecd27a36 88 * +-------------------------------------------------+
samux 0:61e5ecd27a36 89 *
samux 0:61e5ecd27a36 90 * R1b is the same, except it is followed by a busy signal (zeros) until
samux 0:61e5ecd27a36 91 * the first non-zero byte when it is ready again.
samux 0:61e5ecd27a36 92 *
samux 0:61e5ecd27a36 93 * Data Response Token
samux 0:61e5ecd27a36 94 * -------------------
samux 0:61e5ecd27a36 95 * Every data block written to the card is acknowledged by a byte
samux 0:61e5ecd27a36 96 * response token
samux 0:61e5ecd27a36 97 *
samux 0:61e5ecd27a36 98 * +----------------------+
samux 0:61e5ecd27a36 99 * | xxx | 0 | status | 1 |
samux 0:61e5ecd27a36 100 * +----------------------+
samux 0:61e5ecd27a36 101 * 010 - OK!
samux 0:61e5ecd27a36 102 * 101 - CRC Error
samux 0:61e5ecd27a36 103 * 110 - Write Error
samux 0:61e5ecd27a36 104 *
samux 0:61e5ecd27a36 105 * Single Block Read and Write
samux 0:61e5ecd27a36 106 * ---------------------------
samux 0:61e5ecd27a36 107 *
samux 0:61e5ecd27a36 108 * Block transfers have a byte header, followed by the data, followed
samux 0:61e5ecd27a36 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
samux 0:61e5ecd27a36 110 *
samux 0:61e5ecd27a36 111 * +------+---------+---------+- - - -+---------+-----------+----------+
samux 0:61e5ecd27a36 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
samux 0:61e5ecd27a36 113 * +------+---------+---------+- - - -+---------+-----------+----------+
samux 0:61e5ecd27a36 114 */
samux 0:61e5ecd27a36 115 #include "USBMSD_SD.h"
samux 0:61e5ecd27a36 116 #include "mbed_debug.h"
samux 0:61e5ecd27a36 117
samux 0:61e5ecd27a36 118 #define SD_COMMAND_TIMEOUT 5000
samux 0:61e5ecd27a36 119
samux 0:61e5ecd27a36 120 #define SD_DBG 0
samux 0:61e5ecd27a36 121
samux 0:61e5ecd27a36 122 USBMSD_SD::USBMSD_SD(PinName mosi, PinName miso, PinName sclk, PinName cs, uint8_t output_report_length, uint8_t input_report_length) :
samux 0:61e5ecd27a36 123 USBMSD_HID(output_report_length, input_report_length),
samux 0:61e5ecd27a36 124 _spi(mosi, miso, sclk),
samux 0:61e5ecd27a36 125 _cs(cs) {
samux 0:61e5ecd27a36 126 _cs = 1;
samux 0:61e5ecd27a36 127
samux 0:61e5ecd27a36 128 //no init
samux 0:61e5ecd27a36 129 _status = 0x01;
samux 0:61e5ecd27a36 130
samux 0:61e5ecd27a36 131 connect();
samux 0:61e5ecd27a36 132 }
samux 0:61e5ecd27a36 133
samux 0:61e5ecd27a36 134 #define R1_IDLE_STATE (1 << 0)
samux 0:61e5ecd27a36 135 #define R1_ERASE_RESET (1 << 1)
samux 0:61e5ecd27a36 136 #define R1_ILLEGAL_COMMAND (1 << 2)
samux 0:61e5ecd27a36 137 #define R1_COM_CRC_ERROR (1 << 3)
samux 0:61e5ecd27a36 138 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
samux 0:61e5ecd27a36 139 #define R1_ADDRESS_ERROR (1 << 5)
samux 0:61e5ecd27a36 140 #define R1_PARAMETER_ERROR (1 << 6)
samux 0:61e5ecd27a36 141
samux 0:61e5ecd27a36 142 // Types
samux 0:61e5ecd27a36 143 // - v1.x Standard Capacity
samux 0:61e5ecd27a36 144 // - v2.x Standard Capacity
samux 0:61e5ecd27a36 145 // - v2.x High Capacity
samux 0:61e5ecd27a36 146 // - Not recognised as an SD Card
samux 0:61e5ecd27a36 147 #define SDCARD_FAIL 0
samux 0:61e5ecd27a36 148 #define SDCARD_V1 1
samux 0:61e5ecd27a36 149 #define SDCARD_V2 2
samux 0:61e5ecd27a36 150 #define SDCARD_V2HC 3
samux 0:61e5ecd27a36 151
samux 0:61e5ecd27a36 152 int USBMSD_SD::initialise_card() {
samux 0:61e5ecd27a36 153 // Set to 100kHz for initialisation, and clock card with cs = 1
samux 0:61e5ecd27a36 154 _spi.frequency(100000);
samux 0:61e5ecd27a36 155 _cs = 1;
samux 0:61e5ecd27a36 156 for (int i = 0; i < 16; i++) {
samux 0:61e5ecd27a36 157 _spi.write(0xFF);
samux 0:61e5ecd27a36 158 }
samux 0:61e5ecd27a36 159 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
samux 0:61e5ecd27a36 160 if (_cmd(0, 0) != R1_IDLE_STATE) {
samux 0:61e5ecd27a36 161 debug("No disk, or could not put SD card in to SPI idle state\n");
samux 0:61e5ecd27a36 162 return SDCARD_FAIL;
samux 0:61e5ecd27a36 163 }
samux 0:61e5ecd27a36 164
samux 0:61e5ecd27a36 165 // send CMD8 to determine whther it is ver 2.x
samux 0:61e5ecd27a36 166 int r = _cmd8();
samux 0:61e5ecd27a36 167 if (r == R1_IDLE_STATE) {
samux 0:61e5ecd27a36 168 return initialise_card_v2();
samux 0:61e5ecd27a36 169 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
samux 0:61e5ecd27a36 170 return initialise_card_v1();
samux 0:61e5ecd27a36 171 } else {
samux 0:61e5ecd27a36 172 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
samux 0:61e5ecd27a36 173 return SDCARD_FAIL;
samux 0:61e5ecd27a36 174 }
samux 0:61e5ecd27a36 175 }
samux 0:61e5ecd27a36 176
samux 0:61e5ecd27a36 177 int USBMSD_SD::initialise_card_v1() {
samux 0:61e5ecd27a36 178 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:61e5ecd27a36 179 _cmd(55, 0);
samux 0:61e5ecd27a36 180 if (_cmd(41, 0) == 0) {
samux 0:61e5ecd27a36 181 cdv = 512;
samux 0:61e5ecd27a36 182 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
samux 0:61e5ecd27a36 183 return SDCARD_V1;
samux 0:61e5ecd27a36 184 }
samux 0:61e5ecd27a36 185 }
samux 0:61e5ecd27a36 186
samux 0:61e5ecd27a36 187 debug("Timeout waiting for v1.x card\n");
samux 0:61e5ecd27a36 188 return SDCARD_FAIL;
samux 0:61e5ecd27a36 189 }
samux 0:61e5ecd27a36 190
samux 0:61e5ecd27a36 191 int USBMSD_SD::initialise_card_v2() {
samux 0:61e5ecd27a36 192 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:61e5ecd27a36 193 wait_ms(50);
samux 0:61e5ecd27a36 194 _cmd58();
samux 0:61e5ecd27a36 195 _cmd(55, 0);
samux 0:61e5ecd27a36 196 if (_cmd(41, 0x40000000) == 0) {
samux 0:61e5ecd27a36 197 _cmd58();
samux 0:61e5ecd27a36 198 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
samux 0:61e5ecd27a36 199 cdv = 1;
samux 0:61e5ecd27a36 200 return SDCARD_V2;
samux 0:61e5ecd27a36 201 }
samux 0:61e5ecd27a36 202 }
samux 0:61e5ecd27a36 203
samux 0:61e5ecd27a36 204 debug("Timeout waiting for v2.x card\n");
samux 0:61e5ecd27a36 205 return SDCARD_FAIL;
samux 0:61e5ecd27a36 206 }
samux 0:61e5ecd27a36 207
samux 0:61e5ecd27a36 208 int USBMSD_SD::disk_initialize() {
samux 0:61e5ecd27a36 209 int i = initialise_card();
samux 0:61e5ecd27a36 210 debug_if(SD_DBG, "init card = %d\n", i);
samux 0:61e5ecd27a36 211 _sectors = _sd_sectors();
samux 0:61e5ecd27a36 212
samux 0:61e5ecd27a36 213 // Set block length to 512 (CMD16)
samux 0:61e5ecd27a36 214 if (_cmd(16, 512) != 0) {
samux 0:61e5ecd27a36 215 debug("Set 512-byte block timed out\n");
samux 0:61e5ecd27a36 216 return 1;
samux 0:61e5ecd27a36 217 }
samux 0:61e5ecd27a36 218
samux 0:61e5ecd27a36 219 _spi.frequency(5000000); // Set to 5MHz for data transfer
samux 0:61e5ecd27a36 220
samux 0:61e5ecd27a36 221 // OK
samux 0:61e5ecd27a36 222 _status = 0x00;
samux 0:61e5ecd27a36 223
samux 0:61e5ecd27a36 224 return 0;
samux 0:61e5ecd27a36 225 }
samux 0:61e5ecd27a36 226
samux 0:61e5ecd27a36 227 int USBMSD_SD::disk_write(const uint8_t *buffer, uint64_t block_number) {
samux 0:61e5ecd27a36 228 // set write address for single block (CMD24)
samux 0:61e5ecd27a36 229 if (_cmd(24, block_number * cdv) != 0) {
samux 0:61e5ecd27a36 230 return 1;
samux 0:61e5ecd27a36 231 }
samux 0:61e5ecd27a36 232
samux 0:61e5ecd27a36 233 // send the data block
samux 0:61e5ecd27a36 234 _write(buffer, 512);
samux 0:61e5ecd27a36 235 return 0;
samux 0:61e5ecd27a36 236 }
samux 0:61e5ecd27a36 237
samux 0:61e5ecd27a36 238 int USBMSD_SD::disk_read(uint8_t *buffer, uint64_t block_number) {
samux 0:61e5ecd27a36 239 // set read address for single block (CMD17)
samux 0:61e5ecd27a36 240 if (_cmd(17, block_number * cdv) != 0) {
samux 0:61e5ecd27a36 241 return 1;
samux 0:61e5ecd27a36 242 }
samux 0:61e5ecd27a36 243
samux 0:61e5ecd27a36 244 // receive the data
samux 0:61e5ecd27a36 245 _read(buffer, 512);
samux 0:61e5ecd27a36 246 return 0;
samux 0:61e5ecd27a36 247 }
samux 0:61e5ecd27a36 248
samux 0:61e5ecd27a36 249 int USBMSD_SD::disk_status() { return _status; }
samux 0:61e5ecd27a36 250 int USBMSD_SD::disk_sync() { return 0; }
samux 0:61e5ecd27a36 251 uint64_t USBMSD_SD::disk_sectors() { return _sectors; }
samux 0:61e5ecd27a36 252
samux 0:61e5ecd27a36 253
samux 0:61e5ecd27a36 254 // PRIVATE FUNCTIONS
samux 0:61e5ecd27a36 255 int USBMSD_SD::_cmd(int cmd, int arg) {
samux 0:61e5ecd27a36 256 _cs = 0;
samux 0:61e5ecd27a36 257
samux 0:61e5ecd27a36 258 // send a command
samux 0:61e5ecd27a36 259 _spi.write(0x40 | cmd);
samux 0:61e5ecd27a36 260 _spi.write(arg >> 24);
samux 0:61e5ecd27a36 261 _spi.write(arg >> 16);
samux 0:61e5ecd27a36 262 _spi.write(arg >> 8);
samux 0:61e5ecd27a36 263 _spi.write(arg >> 0);
samux 0:61e5ecd27a36 264 _spi.write(0x95);
samux 0:61e5ecd27a36 265
samux 0:61e5ecd27a36 266 // wait for the repsonse (response[7] == 0)
samux 0:61e5ecd27a36 267 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:61e5ecd27a36 268 int response = _spi.write(0xFF);
samux 0:61e5ecd27a36 269 if (!(response & 0x80)) {
samux 0:61e5ecd27a36 270 _cs = 1;
samux 0:61e5ecd27a36 271 _spi.write(0xFF);
samux 0:61e5ecd27a36 272 return response;
samux 0:61e5ecd27a36 273 }
samux 0:61e5ecd27a36 274 }
samux 0:61e5ecd27a36 275 _cs = 1;
samux 0:61e5ecd27a36 276 _spi.write(0xFF);
samux 0:61e5ecd27a36 277 return -1; // timeout
samux 0:61e5ecd27a36 278 }
samux 0:61e5ecd27a36 279 int USBMSD_SD::_cmdx(int cmd, int arg) {
samux 0:61e5ecd27a36 280 _cs = 0;
samux 0:61e5ecd27a36 281
samux 0:61e5ecd27a36 282 // send a command
samux 0:61e5ecd27a36 283 _spi.write(0x40 | cmd);
samux 0:61e5ecd27a36 284 _spi.write(arg >> 24);
samux 0:61e5ecd27a36 285 _spi.write(arg >> 16);
samux 0:61e5ecd27a36 286 _spi.write(arg >> 8);
samux 0:61e5ecd27a36 287 _spi.write(arg >> 0);
samux 0:61e5ecd27a36 288 _spi.write(0x95);
samux 0:61e5ecd27a36 289
samux 0:61e5ecd27a36 290 // wait for the repsonse (response[7] == 0)
samux 0:61e5ecd27a36 291 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:61e5ecd27a36 292 int response = _spi.write(0xFF);
samux 0:61e5ecd27a36 293 if (!(response & 0x80)) {
samux 0:61e5ecd27a36 294 return response;
samux 0:61e5ecd27a36 295 }
samux 0:61e5ecd27a36 296 }
samux 0:61e5ecd27a36 297 _cs = 1;
samux 0:61e5ecd27a36 298 _spi.write(0xFF);
samux 0:61e5ecd27a36 299 return -1; // timeout
samux 0:61e5ecd27a36 300 }
samux 0:61e5ecd27a36 301
samux 0:61e5ecd27a36 302
samux 0:61e5ecd27a36 303 int USBMSD_SD::_cmd58() {
samux 0:61e5ecd27a36 304 _cs = 0;
samux 0:61e5ecd27a36 305 int arg = 0;
samux 0:61e5ecd27a36 306
samux 0:61e5ecd27a36 307 // send a command
samux 0:61e5ecd27a36 308 _spi.write(0x40 | 58);
samux 0:61e5ecd27a36 309 _spi.write(arg >> 24);
samux 0:61e5ecd27a36 310 _spi.write(arg >> 16);
samux 0:61e5ecd27a36 311 _spi.write(arg >> 8);
samux 0:61e5ecd27a36 312 _spi.write(arg >> 0);
samux 0:61e5ecd27a36 313 _spi.write(0x95);
samux 0:61e5ecd27a36 314
samux 0:61e5ecd27a36 315 // wait for the repsonse (response[7] == 0)
samux 0:61e5ecd27a36 316 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:61e5ecd27a36 317 int response = _spi.write(0xFF);
samux 0:61e5ecd27a36 318 if (!(response & 0x80)) {
samux 0:61e5ecd27a36 319 int ocr = _spi.write(0xFF) << 24;
samux 0:61e5ecd27a36 320 ocr |= _spi.write(0xFF) << 16;
samux 0:61e5ecd27a36 321 ocr |= _spi.write(0xFF) << 8;
samux 0:61e5ecd27a36 322 ocr |= _spi.write(0xFF) << 0;
samux 0:61e5ecd27a36 323 _cs = 1;
samux 0:61e5ecd27a36 324 _spi.write(0xFF);
samux 0:61e5ecd27a36 325 return response;
samux 0:61e5ecd27a36 326 }
samux 0:61e5ecd27a36 327 }
samux 0:61e5ecd27a36 328 _cs = 1;
samux 0:61e5ecd27a36 329 _spi.write(0xFF);
samux 0:61e5ecd27a36 330 return -1; // timeout
samux 0:61e5ecd27a36 331 }
samux 0:61e5ecd27a36 332
samux 0:61e5ecd27a36 333 int USBMSD_SD::_cmd8() {
samux 0:61e5ecd27a36 334 _cs = 0;
samux 0:61e5ecd27a36 335
samux 0:61e5ecd27a36 336 // send a command
samux 0:61e5ecd27a36 337 _spi.write(0x40 | 8); // CMD8
samux 0:61e5ecd27a36 338 _spi.write(0x00); // reserved
samux 0:61e5ecd27a36 339 _spi.write(0x00); // reserved
samux 0:61e5ecd27a36 340 _spi.write(0x01); // 3.3v
samux 0:61e5ecd27a36 341 _spi.write(0xAA); // check pattern
samux 0:61e5ecd27a36 342 _spi.write(0x87); // crc
samux 0:61e5ecd27a36 343
samux 0:61e5ecd27a36 344 // wait for the repsonse (response[7] == 0)
samux 0:61e5ecd27a36 345 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
samux 0:61e5ecd27a36 346 char response[5];
samux 0:61e5ecd27a36 347 response[0] = _spi.write(0xFF);
samux 0:61e5ecd27a36 348 if (!(response[0] & 0x80)) {
samux 0:61e5ecd27a36 349 for (int j = 1; j < 5; j++) {
samux 0:61e5ecd27a36 350 response[i] = _spi.write(0xFF);
samux 0:61e5ecd27a36 351 }
samux 0:61e5ecd27a36 352 _cs = 1;
samux 0:61e5ecd27a36 353 _spi.write(0xFF);
samux 0:61e5ecd27a36 354 return response[0];
samux 0:61e5ecd27a36 355 }
samux 0:61e5ecd27a36 356 }
samux 0:61e5ecd27a36 357 _cs = 1;
samux 0:61e5ecd27a36 358 _spi.write(0xFF);
samux 0:61e5ecd27a36 359 return -1; // timeout
samux 0:61e5ecd27a36 360 }
samux 0:61e5ecd27a36 361
samux 0:61e5ecd27a36 362 int USBMSD_SD::_read(uint8_t *buffer, uint32_t length) {
samux 0:61e5ecd27a36 363 _cs = 0;
samux 0:61e5ecd27a36 364
samux 0:61e5ecd27a36 365 // read until start byte (0xFF)
samux 0:61e5ecd27a36 366 while (_spi.write(0xFF) != 0xFE);
samux 0:61e5ecd27a36 367
samux 0:61e5ecd27a36 368 // read data
samux 0:61e5ecd27a36 369 for (int i = 0; i < length; i++) {
samux 0:61e5ecd27a36 370 buffer[i] = _spi.write(0xFF);
samux 0:61e5ecd27a36 371 }
samux 0:61e5ecd27a36 372 _spi.write(0xFF); // checksum
samux 0:61e5ecd27a36 373 _spi.write(0xFF);
samux 0:61e5ecd27a36 374
samux 0:61e5ecd27a36 375 _cs = 1;
samux 0:61e5ecd27a36 376 _spi.write(0xFF);
samux 0:61e5ecd27a36 377 return 0;
samux 0:61e5ecd27a36 378 }
samux 0:61e5ecd27a36 379
samux 0:61e5ecd27a36 380 int USBMSD_SD::_write(const uint8_t*buffer, uint32_t length) {
samux 0:61e5ecd27a36 381 _cs = 0;
samux 0:61e5ecd27a36 382
samux 0:61e5ecd27a36 383 // indicate start of block
samux 0:61e5ecd27a36 384 _spi.write(0xFE);
samux 0:61e5ecd27a36 385
samux 0:61e5ecd27a36 386 // write the data
samux 0:61e5ecd27a36 387 for (int i = 0; i < length; i++) {
samux 0:61e5ecd27a36 388 _spi.write(buffer[i]);
samux 0:61e5ecd27a36 389 }
samux 0:61e5ecd27a36 390
samux 0:61e5ecd27a36 391 // write the checksum
samux 0:61e5ecd27a36 392 _spi.write(0xFF);
samux 0:61e5ecd27a36 393 _spi.write(0xFF);
samux 0:61e5ecd27a36 394
samux 0:61e5ecd27a36 395 // check the response token
samux 0:61e5ecd27a36 396 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
samux 0:61e5ecd27a36 397 _cs = 1;
samux 0:61e5ecd27a36 398 _spi.write(0xFF);
samux 0:61e5ecd27a36 399 return 1;
samux 0:61e5ecd27a36 400 }
samux 0:61e5ecd27a36 401
samux 0:61e5ecd27a36 402 // wait for write to finish
samux 0:61e5ecd27a36 403 while (_spi.write(0xFF) == 0);
samux 0:61e5ecd27a36 404
samux 0:61e5ecd27a36 405 _cs = 1;
samux 0:61e5ecd27a36 406 _spi.write(0xFF);
samux 0:61e5ecd27a36 407 return 0;
samux 0:61e5ecd27a36 408 }
samux 0:61e5ecd27a36 409
samux 0:61e5ecd27a36 410 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
samux 0:61e5ecd27a36 411 uint32_t bits = 0;
samux 0:61e5ecd27a36 412 uint32_t size = 1 + msb - lsb;
samux 0:61e5ecd27a36 413 for (int i = 0; i < size; i++) {
samux 0:61e5ecd27a36 414 uint32_t position = lsb + i;
samux 0:61e5ecd27a36 415 uint32_t byte = 15 - (position >> 3);
samux 0:61e5ecd27a36 416 uint32_t bit = position & 0x7;
samux 0:61e5ecd27a36 417 uint32_t value = (data[byte] >> bit) & 1;
samux 0:61e5ecd27a36 418 bits |= value << i;
samux 0:61e5ecd27a36 419 }
samux 0:61e5ecd27a36 420 return bits;
samux 0:61e5ecd27a36 421 }
samux 0:61e5ecd27a36 422
samux 0:61e5ecd27a36 423 uint64_t USBMSD_SD::_sd_sectors() {
samux 0:61e5ecd27a36 424 uint32_t c_size, c_size_mult, read_bl_len;
samux 0:61e5ecd27a36 425 uint32_t block_len, mult, blocknr, capacity;
samux 0:61e5ecd27a36 426 uint32_t hc_c_size;
samux 0:61e5ecd27a36 427 uint64_t blocks;
samux 0:61e5ecd27a36 428
samux 0:61e5ecd27a36 429 // CMD9, Response R2 (R1 byte + 16-byte block read)
samux 0:61e5ecd27a36 430 if (_cmdx(9, 0) != 0) {
samux 0:61e5ecd27a36 431 debug("Didn't get a response from the disk\n");
samux 0:61e5ecd27a36 432 return 0;
samux 0:61e5ecd27a36 433 }
samux 0:61e5ecd27a36 434
samux 0:61e5ecd27a36 435 uint8_t csd[16];
samux 0:61e5ecd27a36 436 if (_read(csd, 16) != 0) {
samux 0:61e5ecd27a36 437 debug("Couldn't read csd response from disk\n");
samux 0:61e5ecd27a36 438 return 0;
samux 0:61e5ecd27a36 439 }
samux 0:61e5ecd27a36 440
samux 0:61e5ecd27a36 441 // csd_structure : csd[127:126]
samux 0:61e5ecd27a36 442 // c_size : csd[73:62]
samux 0:61e5ecd27a36 443 // c_size_mult : csd[49:47]
samux 0:61e5ecd27a36 444 // read_bl_len : csd[83:80] - the *maximum* read block length
samux 0:61e5ecd27a36 445
samux 0:61e5ecd27a36 446 int csd_structure = ext_bits(csd, 127, 126);
samux 0:61e5ecd27a36 447
samux 0:61e5ecd27a36 448 switch (csd_structure) {
samux 0:61e5ecd27a36 449 case 0:
samux 0:61e5ecd27a36 450 cdv = 512;
samux 0:61e5ecd27a36 451 c_size = ext_bits(csd, 73, 62);
samux 0:61e5ecd27a36 452 c_size_mult = ext_bits(csd, 49, 47);
samux 0:61e5ecd27a36 453 read_bl_len = ext_bits(csd, 83, 80);
samux 0:61e5ecd27a36 454
samux 0:61e5ecd27a36 455 block_len = 1 << read_bl_len;
samux 0:61e5ecd27a36 456 mult = 1 << (c_size_mult + 2);
samux 0:61e5ecd27a36 457 blocknr = (c_size + 1) * mult;
samux 0:61e5ecd27a36 458 capacity = blocknr * block_len;
samux 0:61e5ecd27a36 459 blocks = capacity / 512;
samux 0:61e5ecd27a36 460 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
samux 0:61e5ecd27a36 461 break;
samux 0:61e5ecd27a36 462
samux 0:61e5ecd27a36 463 case 1:
samux 0:61e5ecd27a36 464 cdv = 1;
samux 0:61e5ecd27a36 465 hc_c_size = ext_bits(csd, 63, 48);
samux 0:61e5ecd27a36 466 blocks = (hc_c_size+1)*1024;
samux 0:61e5ecd27a36 467 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
samux 0:61e5ecd27a36 468 break;
samux 0:61e5ecd27a36 469
samux 0:61e5ecd27a36 470 default:
samux 0:61e5ecd27a36 471 debug("CSD struct unsupported\r\n");
samux 0:61e5ecd27a36 472 return 0;
samux 0:61e5ecd27a36 473 };
samux 0:61e5ecd27a36 474 return blocks;
samux 0:61e5ecd27a36 475 }