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Fork of SoftSerial by
SoftSerial_rx.cpp@10:236fce2e5b8c, 2014-07-05 (annotated)
- Committer:
- Sissors
- Date:
- Sat Jul 05 13:22:43 2014 +0000
- Revision:
- 10:236fce2e5b8c
- Parent:
- 6:517082212c00
Little bit faster initial read
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sissors | 0:8edaa7abe724 | 1 | #include "SoftSerial.h" |
| Sissors | 0:8edaa7abe724 | 2 | |
| Sissors | 10:236fce2e5b8c | 3 | uint32_t overhead_us = 200 * 1000000 / SystemCoreClock; //Random estimation of the overhead of mbed libs, makes slow devices like LPC812 @ 12MHz perform better |
| Sissors | 10:236fce2e5b8c | 4 | |
| Sissors | 0:8edaa7abe724 | 5 | int SoftSerial::_getc( void ) { |
| Sissors | 1:f8b4b764ace7 | 6 | while(!readable()); |
| Sissors | 1:f8b4b764ace7 | 7 | out_valid = false; |
| Sissors | 1:f8b4b764ace7 | 8 | return out_buffer; |
| Sissors | 1:f8b4b764ace7 | 9 | } |
| Sissors | 0:8edaa7abe724 | 10 | |
| Sissors | 1:f8b4b764ace7 | 11 | int SoftSerial::readable(void) { |
| Sissors | 1:f8b4b764ace7 | 12 | return out_valid; |
| Sissors | 1:f8b4b764ace7 | 13 | } |
| Sissors | 1:f8b4b764ace7 | 14 | |
| Sissors | 1:f8b4b764ace7 | 15 | //Start receiving byte |
| Sissors | 0:8edaa7abe724 | 16 | void SoftSerial::rx_gpio_irq_handler(void) { |
| Sissors | 6:517082212c00 | 17 | rxticker.prime(); |
| Sissors | 10:236fce2e5b8c | 18 | rxticker.setNext(bit_period + (bit_period >> 1) - overhead_us); |
| Sissors | 1:f8b4b764ace7 | 19 | rx->fall(NULL); |
| Sissors | 1:f8b4b764ace7 | 20 | rx_bit = 0; |
| Sissors | 1:f8b4b764ace7 | 21 | rx_error = false; |
| Sissors | 0:8edaa7abe724 | 22 | }; |
| Sissors | 1:f8b4b764ace7 | 23 | |
| Sissors | 1:f8b4b764ace7 | 24 | void SoftSerial::rx_handler(void) { |
| Sissors | 10:236fce2e5b8c | 25 | //Receive data |
| Sissors | 10:236fce2e5b8c | 26 | int val = rx->read(); |
| Sissors | 10:236fce2e5b8c | 27 | |
| Sissors | 6:517082212c00 | 28 | rxticker.setNext(bit_period); |
| Sissors | 1:f8b4b764ace7 | 29 | rx_bit++; |
| Sissors | 1:f8b4b764ace7 | 30 | |
| Sissors | 10:236fce2e5b8c | 31 | |
| Sissors | 1:f8b4b764ace7 | 32 | if (rx_bit <= _bits) { |
| Sissors | 1:f8b4b764ace7 | 33 | read_buffer |= val << (rx_bit - 1); |
| Sissors | 1:f8b4b764ace7 | 34 | return; |
| Sissors | 1:f8b4b764ace7 | 35 | } |
| Sissors | 1:f8b4b764ace7 | 36 | |
| Sissors | 1:f8b4b764ace7 | 37 | //Receive parity |
| Sissors | 1:f8b4b764ace7 | 38 | bool parity_count; |
| Sissors | 1:f8b4b764ace7 | 39 | if (rx_bit == _bits + 1) { |
| Sissors | 1:f8b4b764ace7 | 40 | switch (_parity) { |
| Sissors | 1:f8b4b764ace7 | 41 | case Forced1: |
| Sissors | 1:f8b4b764ace7 | 42 | if (val == 0) |
| Sissors | 1:f8b4b764ace7 | 43 | rx_error = true; |
| Sissors | 1:f8b4b764ace7 | 44 | return; |
| Sissors | 1:f8b4b764ace7 | 45 | case Forced0: |
| Sissors | 1:f8b4b764ace7 | 46 | if (val == 1) |
| Sissors | 1:f8b4b764ace7 | 47 | rx_error = true; |
| Sissors | 1:f8b4b764ace7 | 48 | return; |
| Sissors | 1:f8b4b764ace7 | 49 | case Even: |
| Sissors | 1:f8b4b764ace7 | 50 | case Odd: |
| Sissors | 1:f8b4b764ace7 | 51 | parity_count = val; |
| Sissors | 1:f8b4b764ace7 | 52 | for (int i = 0; i<_bits; i++) { |
| Sissors | 1:f8b4b764ace7 | 53 | if (((read_buffer >> i) & 0x01) == 1) |
| Sissors | 1:f8b4b764ace7 | 54 | parity_count = !parity_count; |
| Sissors | 1:f8b4b764ace7 | 55 | } |
| Sissors | 1:f8b4b764ace7 | 56 | if ((parity_count) && (_parity == Even)) |
| Sissors | 1:f8b4b764ace7 | 57 | rx_error = true; |
| Sissors | 1:f8b4b764ace7 | 58 | if ((!parity_count) && (_parity == Odd)) |
| Sissors | 1:f8b4b764ace7 | 59 | rx_error = true; |
| Sissors | 1:f8b4b764ace7 | 60 | return; |
| Sissors | 1:f8b4b764ace7 | 61 | } |
| Sissors | 1:f8b4b764ace7 | 62 | } |
| Sissors | 1:f8b4b764ace7 | 63 | |
| Sissors | 1:f8b4b764ace7 | 64 | //Receive stop |
| Sissors | 1:f8b4b764ace7 | 65 | if (rx_bit < _bits + (bool)_parity + _stop_bits) { |
| Sissors | 1:f8b4b764ace7 | 66 | if (!val) |
| Sissors | 1:f8b4b764ace7 | 67 | rx_error = true; |
| Sissors | 1:f8b4b764ace7 | 68 | return; |
| Sissors | 1:f8b4b764ace7 | 69 | } |
| Sissors | 1:f8b4b764ace7 | 70 | |
| Sissors | 1:f8b4b764ace7 | 71 | //The last stop bit |
| Sissors | 1:f8b4b764ace7 | 72 | if (!val) |
| Sissors | 1:f8b4b764ace7 | 73 | rx_error = true; |
| Sissors | 1:f8b4b764ace7 | 74 | |
| Sissors | 1:f8b4b764ace7 | 75 | if (!rx_error) { |
| Sissors | 1:f8b4b764ace7 | 76 | out_valid = true; |
| Sissors | 1:f8b4b764ace7 | 77 | out_buffer = read_buffer; |
| Sissors | 4:c010265ed202 | 78 | fpointer[RxIrq].call(); |
| Sissors | 1:f8b4b764ace7 | 79 | } |
| Sissors | 1:f8b4b764ace7 | 80 | read_buffer = 0; |
| Sissors | 3:7238e9bb74d2 | 81 | rxticker.detach(); |
| Sissors | 1:f8b4b764ace7 | 82 | rx->fall(this, &SoftSerial::rx_gpio_irq_handler); |
| Sissors | 1:f8b4b764ace7 | 83 | } |
| Sissors | 1:f8b4b764ace7 | 84 |
