Romilly Cocking / Mbed 2 deprecated Ser23K256

Library to drive the Microchip 23K256 SRAM over SPI.

Dependencies:   mbed

Ser23K256.h@3:d2314b1ac797, 2010-08-15 (annotated)

Committer:
romilly
Date:
Sun Aug 15 14:28:05 2010 +0000
Revision:
3:d2314b1ac797
Parent:
2:f96c3c85aa3b 
Added DOXYGEN comments

Who changed what in which revision?

UserRevisionLine numberNew contents of line
romilly 3:d2314b1ac797 1 /** Ser23K256 - drive the Microchip 23K256 SRAM using SPI
romilly 3:d2314b1ac797 2 * Copyright (c) 2010 Romilly Cocking
romilly 3:d2314b1ac797 3 * Released under the MIT License: http://mbed.org/license/mit
romilly 3:d2314b1ac797 4 *
romilly 3:d2314b1ac797 5 * 23K256 data sheet at http://ww1.microchip.com/downloads/en/DeviceDoc/22100B.pdf
romilly 3:d2314b1ac797 6 *
romilly 3:d2314b1ac797 7 * Page-mode commands have not been implemented; I have found no need for them yet.
romilly 3:d2314b1ac797 8 *
romilly 3:d2314b1ac797 9 * Assumes spi mode is default (8,0).
romilly 3:d2314b1ac797 10 *
romilly 3:d2314b1ac797 11 * You can clock the 23K256 at up to 20MHz, so it supports the mbed's maximum SPI frequency of 12MHz.
romilly 3:d2314b1ac797 12 */
romilly 2:f96c3c85aa3b 13
romilly 2:f96c3c85aa3b 14 #include "mbed.h"
romilly 2:f96c3c85aa3b 15
romilly 2:f96c3c85aa3b 16 #ifndef SER23K256_H
romilly 2:f96c3c85aa3b 17 #define SER23K256_H
romilly 2:f96c3c85aa3b 18
romilly 2:f96c3c85aa3b 19 // mode codes for 23K256
romilly 2:f96c3c85aa3b 20 #define BYTE_MODE 0x00
romilly 2:f96c3c85aa3b 21 #define SEQUENTIAL_MODE 0x40
romilly 2:f96c3c85aa3b 22
romilly 2:f96c3c85aa3b 23 // command codes for 23K256
romilly 2:f96c3c85aa3b 24 #define READ 0x03
romilly 2:f96c3c85aa3b 25 #define WRITE 0x02
romilly 2:f96c3c85aa3b 26 #define READ_STATUS 0x05 // called RDSR in datasheet
romilly 2:f96c3c85aa3b 27 #define WRITE_STATUS 0x01 // called WRSR in datasheet
romilly 2:f96c3c85aa3b 28
romilly 3:d2314b1ac797 29 /** An interface for the Microchip 32k byte 23K256 SRAM over SPI
romilly 3:d2314b1ac797 30 *
romilly 3:d2314b1ac797 31 *
romilly 3:d2314b1ac797 32 *
romilly 3:d2314b1ac797 33 * @code
romilly 3:d2314b1ac797 34 * #include "mbed.h"
romilly 3:d2314b1ac797 35 * #include "Ser23K256.h"
romilly 3:d2314b1ac797 36 *
romilly 3:d2314b1ac797 37 *
romilly 3:d2314b1ac797 38 * SPI spi(p5,p6,p7);
romilly 3:d2314b1ac797 39 * Ser23K256 sram(spi,p14);
romilly 3:d2314b1ac797 40 *
romilly 3:d2314b1ac797 41 * int main() {
romilly 3:d2314b1ac797 42 * char buff[50];
romilly 3:d2314b1ac797 43 * sram.write(0, 'h');
romilly 3:d2314b1ac797 44 * sram.write(1, 'i');
romilly 3:d2314b1ac797 45 * sram.write(2, '!');
romilly 3:d2314b1ac797 46 * sram.write(3, '\0');
romilly 3:d2314b1ac797 47 * for (int address = 0; address < 4; address++) {
romilly 3:d2314b1ac797 48 * buff[address] = sram.read(address);
romilly 3:d2314b1ac797 49 * }
romilly 3:d2314b1ac797 50 * printf("sram = %s\r\n", buff);
romilly 3:d2314b1ac797 51 * sram.write(0, "Hello world!",12);
romilly 3:d2314b1ac797 52 * sram.read(0, buff, 12);
romilly 3:d2314b1ac797 53 * buff[12]='\0';
romilly 3:d2314b1ac797 54 * printf("now = %s\r\n", buff);
romilly 3:d2314b1ac797 55 *}
romilly 3:d2314b1ac797 56 * @endcode
romilly 3:d2314b1ac797 57 * connections:
romilly 3:d2314b1ac797 58 * chip pin 1 to mbed ncs (see below)
romilly 3:d2314b1ac797 59 * chip pin 2 SO to mbed MISO
romilly 3:d2314b1ac797 60 * chip pin 3 - no connection
romilly 3:d2314b1ac797 61 * chip pin 4 to mbed Gnd
romilly 3:d2314b1ac797 62 * chip pin 5 SI pin to mbed MOSI
romilly 3:d2314b1ac797 63 * chip pin 6 SCK to mbed sck
romilly 3:d2314b1ac797 64 * chip pin 7 (notHOLD) to mbed Vout
romilly 3:d2314b1ac797 65 * chip pin 8 to mbed Vout
romilly 3:d2314b1ac797 66 */
romilly 2:f96c3c85aa3b 67 class Ser23K256 {
romilly 2:f96c3c85aa3b 68 public:
romilly 3:d2314b1ac797 69 /** Create an interface
romilly 3:d2314b1ac797 70 *
romilly 3:d2314b1ac797 71 *
romilly 3:d2314b1ac797 72 * @param spi An SPI object
romilly 3:d2314b1ac797 73 * @param ncs Not chip select pin - any free Digital pin will do
romilly 3:d2314b1ac797 74 */
romilly 2:f96c3c85aa3b 75 Ser23K256(SPI& spi, PinName ncs);
romilly 3:d2314b1ac797 76 /** read a byte from SRAM
romilly 3:d2314b1ac797 77 * @param address The address to read from
romilly 3:d2314b1ac797 78 * @return the character at that address
romilly 3:d2314b1ac797 79 */
romilly 2:f96c3c85aa3b 80 char read(int address);
romilly 3:d2314b1ac797 81 /** read multiple bytes from SRAM into a buffer
romilly 3:d2314b1ac797 82 * @param address The SRAM address to read from
romilly 3:d2314b1ac797 83 * @param buffer The buffer to read into (must be big enough!)
romilly 3:d2314b1ac797 84 * @param count The number of bytes to read
romilly 3:d2314b1ac797 85 */
romilly 2:f96c3c85aa3b 86 void read(int address, char * buffer, int count);
romilly 3:d2314b1ac797 87 /** write a byte to SRAM
romilly 3:d2314b1ac797 88 * @param address The address SRAM to write to
romilly 3:d2314b1ac797 89 * @param byte The byte to write there
romilly 3:d2314b1ac797 90 */
romilly 2:f96c3c85aa3b 91 void write(int address, char byte);
romilly 3:d2314b1ac797 92 /** write multiple bytes to SRAM from a buffer
romilly 3:d2314b1ac797 93 * @param address The SRAM address write to
romilly 3:d2314b1ac797 94 * @param buffer The buffer to write from
romilly 3:d2314b1ac797 95 * @param count The number of bytes to write
romilly 3:d2314b1ac797 96 */
romilly 2:f96c3c85aa3b 97 void write(int address, char * buffer, int count);
romilly 2:f96c3c85aa3b 98 private:
romilly 2:f96c3c85aa3b 99 SPI& _spi;
romilly 2:f96c3c85aa3b 100 DigitalOut _ncs;
romilly 2:f96c3c85aa3b 101 char readStatus();
romilly 2:f96c3c85aa3b 102 void writeStatus(char status);
romilly 2:f96c3c85aa3b 103 void prepareCommand(char command, int address);
romilly 2:f96c3c85aa3b 104 void select();
romilly 2:f96c3c85aa3b 105 void deselect();
romilly 2:f96c3c85aa3b 106 };
romilly 2:f96c3c85aa3b 107
romilly 2:f96c3c85aa3b 108 #endif