Ricardo Benitez / mbed

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TARGET_LPC4088/PeripheralNames.h@71:8fabd470bb6e, 2013-12-03 (annotated)

Committer:
bogdanm
Date:
Tue Dec 03 13:02:41 2013 +0200
Revision:
71:8fabd470bb6e
Parent:
66:9c8f0e3462fb 
Release 71 of the mbed library



Main changes:



- fix scatter file for LPC4088

- sleep/deepsleep support for KL25ZZ and LPC81x

- improved baudrate calculation for LPC targets

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 66:9c8f0e3462fb 1 /* mbed Microcontroller Library
bogdanm 66:9c8f0e3462fb 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 66:9c8f0e3462fb 3 *
bogdanm 66:9c8f0e3462fb 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 66:9c8f0e3462fb 5 * you may not use this file except in compliance with the License.
bogdanm 66:9c8f0e3462fb 6 * You may obtain a copy of the License at
bogdanm 66:9c8f0e3462fb 7 *
bogdanm 66:9c8f0e3462fb 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 66:9c8f0e3462fb 9 *
bogdanm 66:9c8f0e3462fb 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 66:9c8f0e3462fb 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 66:9c8f0e3462fb 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 66:9c8f0e3462fb 13 * See the License for the specific language governing permissions and
bogdanm 66:9c8f0e3462fb 14 * limitations under the License.
bogdanm 66:9c8f0e3462fb 15 */
bogdanm 66:9c8f0e3462fb 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 66:9c8f0e3462fb 17 #define MBED_PERIPHERALNAMES_H
bogdanm 66:9c8f0e3462fb 18
bogdanm 66:9c8f0e3462fb 19 #include "cmsis.h"
bogdanm 66:9c8f0e3462fb 20
bogdanm 66:9c8f0e3462fb 21 #ifdef __cplusplus
bogdanm 66:9c8f0e3462fb 22 extern "C" {
bogdanm 66:9c8f0e3462fb 23 #endif
bogdanm 66:9c8f0e3462fb 24
bogdanm 66:9c8f0e3462fb 25 typedef enum {
bogdanm 66:9c8f0e3462fb 26 UART_0 = (int)LPC_UART0_BASE,
bogdanm 66:9c8f0e3462fb 27 UART_1 = (int)LPC_UART1_BASE,
bogdanm 66:9c8f0e3462fb 28 UART_2 = (int)LPC_UART2_BASE,
bogdanm 66:9c8f0e3462fb 29 UART_3 = (int)LPC_UART3_BASE,
bogdanm 66:9c8f0e3462fb 30 UART_4 = (int)LPC_UART4_BASE
bogdanm 66:9c8f0e3462fb 31 } UARTName;
bogdanm 66:9c8f0e3462fb 32
bogdanm 66:9c8f0e3462fb 33 typedef enum {
bogdanm 66:9c8f0e3462fb 34 ADC0_0 = 0,
bogdanm 66:9c8f0e3462fb 35 ADC0_1,
bogdanm 66:9c8f0e3462fb 36 ADC0_2,
bogdanm 66:9c8f0e3462fb 37 ADC0_3,
bogdanm 66:9c8f0e3462fb 38 ADC0_4,
bogdanm 66:9c8f0e3462fb 39 ADC0_5,
bogdanm 66:9c8f0e3462fb 40 ADC0_6,
bogdanm 66:9c8f0e3462fb 41 ADC0_7
bogdanm 66:9c8f0e3462fb 42 } ADCName;
bogdanm 66:9c8f0e3462fb 43
bogdanm 66:9c8f0e3462fb 44 typedef enum {
bogdanm 66:9c8f0e3462fb 45 DAC_0 = 0
bogdanm 66:9c8f0e3462fb 46 } DACName;
bogdanm 66:9c8f0e3462fb 47
bogdanm 66:9c8f0e3462fb 48 typedef enum {
bogdanm 66:9c8f0e3462fb 49 SPI_0 = (int)LPC_SSP0_BASE,
bogdanm 66:9c8f0e3462fb 50 SPI_1 = (int)LPC_SSP1_BASE,
bogdanm 66:9c8f0e3462fb 51 SPI_2 = (int)LPC_SSP2_BASE
bogdanm 66:9c8f0e3462fb 52 } SPIName;
bogdanm 66:9c8f0e3462fb 53
bogdanm 66:9c8f0e3462fb 54 typedef enum {
bogdanm 66:9c8f0e3462fb 55 I2C_0 = (int)LPC_I2C0_BASE,
bogdanm 66:9c8f0e3462fb 56 I2C_1 = (int)LPC_I2C1_BASE,
bogdanm 66:9c8f0e3462fb 57 I2C_2 = (int)LPC_I2C2_BASE
bogdanm 66:9c8f0e3462fb 58 } I2CName;
bogdanm 66:9c8f0e3462fb 59
bogdanm 66:9c8f0e3462fb 60 typedef enum {
bogdanm 66:9c8f0e3462fb 61 PWM0_1 = 1,
bogdanm 66:9c8f0e3462fb 62 PWM0_2,
bogdanm 66:9c8f0e3462fb 63 PWM0_3,
bogdanm 66:9c8f0e3462fb 64 PWM0_4,
bogdanm 66:9c8f0e3462fb 65 PWM0_5,
bogdanm 66:9c8f0e3462fb 66 PWM0_6,
bogdanm 66:9c8f0e3462fb 67 PWM1_1,
bogdanm 66:9c8f0e3462fb 68 PWM1_2,
bogdanm 66:9c8f0e3462fb 69 PWM1_3,
bogdanm 66:9c8f0e3462fb 70 PWM1_4,
bogdanm 66:9c8f0e3462fb 71 PWM1_5,
bogdanm 66:9c8f0e3462fb 72 PWM1_6
bogdanm 66:9c8f0e3462fb 73 } PWMName;
bogdanm 66:9c8f0e3462fb 74
bogdanm 66:9c8f0e3462fb 75 typedef enum {
bogdanm 66:9c8f0e3462fb 76 CAN_1 = (int)LPC_CAN1_BASE,
bogdanm 66:9c8f0e3462fb 77 CAN_2 = (int)LPC_CAN2_BASE
bogdanm 66:9c8f0e3462fb 78 } CANName;
bogdanm 66:9c8f0e3462fb 79
bogdanm 66:9c8f0e3462fb 80 #define STDIO_UART_TX USBTX
bogdanm 66:9c8f0e3462fb 81 #define STDIO_UART_RX USBRX
bogdanm 66:9c8f0e3462fb 82 #define STDIO_UART UART_0
bogdanm 66:9c8f0e3462fb 83
bogdanm 71:8fabd470bb6e 84 // Default peripherals
bogdanm 71:8fabd470bb6e 85 #define MBED_SPI0 p5, p6, p7
bogdanm 71:8fabd470bb6e 86 #define MBED_SPI1 p11, p12, p13, p14
bogdanm 71:8fabd470bb6e 87 #define MBED_SPI2 p39, p38, p32, p31
bogdanm 71:8fabd470bb6e 88
bogdanm 71:8fabd470bb6e 89 #define MBED_UART3 p9, p10
bogdanm 71:8fabd470bb6e 90 #define MBED_UART4 p37, p31
bogdanm 71:8fabd470bb6e 91 #define MBED_UARTUSB USBTX, USBRX
bogdanm 71:8fabd470bb6e 92
bogdanm 71:8fabd470bb6e 93 #define MBED_I2C0 p32, p31
bogdanm 71:8fabd470bb6e 94 #define MBED_I2C1 p9, p10
bogdanm 71:8fabd470bb6e 95
bogdanm 71:8fabd470bb6e 96 #define MBED_CAN1 p9, p10
bogdanm 71:8fabd470bb6e 97 #define MBED_CAN2 p34, p33
bogdanm 71:8fabd470bb6e 98
bogdanm 71:8fabd470bb6e 99 #define MBED_ANALOGOUT0 p18
bogdanm 71:8fabd470bb6e 100
bogdanm 71:8fabd470bb6e 101 #define MBED_ANALOGIN0 p15
bogdanm 71:8fabd470bb6e 102 #define MBED_ANALOGIN1 p16
bogdanm 71:8fabd470bb6e 103 #define MBED_ANALOGIN2 p17
bogdanm 71:8fabd470bb6e 104 #define MBED_ANALOGIN3 p18
bogdanm 71:8fabd470bb6e 105 #define MBED_ANALOGIN4 p19
bogdanm 71:8fabd470bb6e 106 #define MBED_ANALOGIN5 p20
bogdanm 71:8fabd470bb6e 107
bogdanm 71:8fabd470bb6e 108 #define MBED_PWMOUT0 p30
bogdanm 71:8fabd470bb6e 109 #define MBED_PWMOUT1 p29
bogdanm 71:8fabd470bb6e 110 #define MBED_PWMOUT2 p28
bogdanm 71:8fabd470bb6e 111 #define MBED_PWMOUT3 p27
bogdanm 71:8fabd470bb6e 112 #define MBED_PWMOUT4 p26
bogdanm 71:8fabd470bb6e 113 #define MBED_PWMOUT5 p25
bogdanm 71:8fabd470bb6e 114
bogdanm 66:9c8f0e3462fb 115 #ifdef __cplusplus
bogdanm 66:9c8f0e3462fb 116 }
bogdanm 66:9c8f0e3462fb 117 #endif
bogdanm 66:9c8f0e3462fb 118
bogdanm 66:9c8f0e3462fb 119 #endif