Ricardo Benitez / mbed

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Fork of mbed by mbed official

TARGET_RZ_A1H/ostm_iodefine.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /*******************************************************************************
bogdanm 92:4fc01daae5a5 2 * DISCLAIMER
bogdanm 92:4fc01daae5a5 3 * This software is supplied by Renesas Electronics Corporation and is only
bogdanm 92:4fc01daae5a5 4 * intended for use with Renesas products. No other uses are authorized. This
bogdanm 92:4fc01daae5a5 5 * software is owned by Renesas Electronics Corporation and is protected under
bogdanm 92:4fc01daae5a5 6 * all applicable laws, including copyright laws.
bogdanm 92:4fc01daae5a5 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
bogdanm 92:4fc01daae5a5 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
bogdanm 92:4fc01daae5a5 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
bogdanm 92:4fc01daae5a5 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
bogdanm 92:4fc01daae5a5 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
bogdanm 92:4fc01daae5a5 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
bogdanm 92:4fc01daae5a5 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
bogdanm 92:4fc01daae5a5 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
bogdanm 92:4fc01daae5a5 16 * Renesas reserves the right, without notice, to make changes to this software
bogdanm 92:4fc01daae5a5 17 * and to discontinue the availability of this software. By using this software,
bogdanm 92:4fc01daae5a5 18 * you agree to the additional terms and conditions found by accessing the
bogdanm 92:4fc01daae5a5 19 * following link:
bogdanm 92:4fc01daae5a5 20 * http://www.renesas.com/disclaimer*
bogdanm 92:4fc01daae5a5 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
bogdanm 92:4fc01daae5a5 22 *******************************************************************************/
bogdanm 92:4fc01daae5a5 23 /*******************************************************************************
bogdanm 92:4fc01daae5a5 24 * File Name : ostm_iodefine.h
bogdanm 92:4fc01daae5a5 25 * $Rev: $
bogdanm 92:4fc01daae5a5 26 * $Date:: $
bogdanm 92:4fc01daae5a5 27 * Description : Definition of I/O Register (V1.00a)
bogdanm 92:4fc01daae5a5 28 ******************************************************************************/
bogdanm 92:4fc01daae5a5 29 #ifndef OSTM_IODEFINE_H
bogdanm 92:4fc01daae5a5 30 #define OSTM_IODEFINE_H
bogdanm 92:4fc01daae5a5 31 /* ->SEC M1.10.1 : Not magic number */
bogdanm 92:4fc01daae5a5 32
bogdanm 92:4fc01daae5a5 33 struct st_ostm
bogdanm 92:4fc01daae5a5 34 { /* OSTM */
bogdanm 92:4fc01daae5a5 35 volatile uint32_t OSTMnCMP; /* OSTMnCMP */
bogdanm 92:4fc01daae5a5 36 volatile uint32_t OSTMnCNT; /* OSTMnCNT */
bogdanm 92:4fc01daae5a5 37 volatile uint8_t dummy1[8]; /* */
bogdanm 92:4fc01daae5a5 38 volatile uint8_t OSTMnTE; /* OSTMnTE */
bogdanm 92:4fc01daae5a5 39 volatile uint8_t dummy2[3]; /* */
bogdanm 92:4fc01daae5a5 40 volatile uint8_t OSTMnTS; /* OSTMnTS */
bogdanm 92:4fc01daae5a5 41 volatile uint8_t dummy3[3]; /* */
bogdanm 92:4fc01daae5a5 42 volatile uint8_t OSTMnTT; /* OSTMnTT */
bogdanm 92:4fc01daae5a5 43 volatile uint8_t dummy4[7]; /* */
bogdanm 92:4fc01daae5a5 44 volatile uint8_t OSTMnCTL; /* OSTMnCTL */
bogdanm 92:4fc01daae5a5 45 };
bogdanm 92:4fc01daae5a5 46
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 #define OSTM0 (*(struct st_ostm *)0xFCFEC000uL) /* OSTM0 */
bogdanm 92:4fc01daae5a5 49 #define OSTM1 (*(struct st_ostm *)0xFCFEC400uL) /* OSTM1 */
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51
bogdanm 92:4fc01daae5a5 52 /* Start of channnel array defines of OSTM */
bogdanm 92:4fc01daae5a5 53
bogdanm 92:4fc01daae5a5 54 /* Channnel array defines of OSTM */
bogdanm 92:4fc01daae5a5 55 /*(Sample) value = OSTM[ channel ]->OSTMnCMP; */
bogdanm 92:4fc01daae5a5 56 #define OSTM_COUNT 2
bogdanm 92:4fc01daae5a5 57 #define OSTM_ADDRESS_LIST \
bogdanm 92:4fc01daae5a5 58 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
bogdanm 92:4fc01daae5a5 59 &OSTM0, &OSTM1 \
bogdanm 92:4fc01daae5a5 60 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
bogdanm 92:4fc01daae5a5 61
bogdanm 92:4fc01daae5a5 62 /* End of channnel array defines of OSTM */
bogdanm 92:4fc01daae5a5 63
bogdanm 92:4fc01daae5a5 64
bogdanm 92:4fc01daae5a5 65 #define OSTM0CMP OSTM0.OSTMnCMP
bogdanm 92:4fc01daae5a5 66 #define OSTM0CNT OSTM0.OSTMnCNT
bogdanm 92:4fc01daae5a5 67 #define OSTM0TE OSTM0.OSTMnTE
bogdanm 92:4fc01daae5a5 68 #define OSTM0TS OSTM0.OSTMnTS
bogdanm 92:4fc01daae5a5 69 #define OSTM0TT OSTM0.OSTMnTT
bogdanm 92:4fc01daae5a5 70 #define OSTM0CTL OSTM0.OSTMnCTL
bogdanm 92:4fc01daae5a5 71 #define OSTM1CMP OSTM1.OSTMnCMP
bogdanm 92:4fc01daae5a5 72 #define OSTM1CNT OSTM1.OSTMnCNT
bogdanm 92:4fc01daae5a5 73 #define OSTM1TE OSTM1.OSTMnTE
bogdanm 92:4fc01daae5a5 74 #define OSTM1TS OSTM1.OSTMnTS
bogdanm 92:4fc01daae5a5 75 #define OSTM1TT OSTM1.OSTMnTT
bogdanm 92:4fc01daae5a5 76 #define OSTM1CTL OSTM1.OSTMnCTL
bogdanm 92:4fc01daae5a5 77 /* <-SEC M1.10.1 */
bogdanm 92:4fc01daae5a5 78 #endif