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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_sai.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Child:
99:dbbf35b96557
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_sai.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SAI HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SAI_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SAI_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 49 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 52 * @{
bogdanm 92:4fc01daae5a5 53 */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup SAI
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 60
bogdanm 92:4fc01daae5a5 61 /**
bogdanm 92:4fc01daae5a5 62 * @brief SAI Init Structure definition
bogdanm 92:4fc01daae5a5 63 */
bogdanm 92:4fc01daae5a5 64 typedef struct
bogdanm 92:4fc01daae5a5 65 {
bogdanm 92:4fc01daae5a5 66 uint32_t Protocol; /*!< Specifies the SAI Block protocol.
bogdanm 92:4fc01daae5a5 67 This parameter can be a value of @ref SAI_Block_Protocol */
bogdanm 92:4fc01daae5a5 68
bogdanm 92:4fc01daae5a5 69 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode.
bogdanm 92:4fc01daae5a5 70 This parameter can be a value of @ref SAI_Block_Mode */
bogdanm 92:4fc01daae5a5 71
bogdanm 92:4fc01daae5a5 72 uint32_t DataSize; /*!< Specifies the SAI Block data size.
bogdanm 92:4fc01daae5a5 73 This parameter can be a value of @ref SAI_Block_Data_Size */
bogdanm 92:4fc01daae5a5 74
bogdanm 92:4fc01daae5a5 75 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm 92:4fc01daae5a5 76 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */
bogdanm 92:4fc01daae5a5 77
bogdanm 92:4fc01daae5a5 78 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity.
bogdanm 92:4fc01daae5a5 79 This parameter can be a value of @ref SAI_Block_Clock_Strobing */
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 uint32_t Synchro; /*!< Specifies SAI Block synchronization
bogdanm 92:4fc01daae5a5 82 This parameter can be a value of @ref SAI_Block_Synchronization */
bogdanm 92:4fc01daae5a5 83
bogdanm 92:4fc01daae5a5 84 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven.
bogdanm 92:4fc01daae5a5 85 This parameter can be a value of @ref SAI_Block_Output_Drive
bogdanm 92:4fc01daae5a5 86 @note this value has to be set before enabling the audio block
bogdanm 92:4fc01daae5a5 87 but after the audio block configuration. */
bogdanm 92:4fc01daae5a5 88
bogdanm 92:4fc01daae5a5 89 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not.
bogdanm 92:4fc01daae5a5 90 This parameter can be a value of @ref SAI_Block_NoDivider
bogdanm 92:4fc01daae5a5 91 @note: If bit NODIV in the SAI_xCR1 register is cleared, the frame length
bogdanm 92:4fc01daae5a5 92 should be aligned to a number equal to a power of 2, from 8 to 256.
bogdanm 92:4fc01daae5a5 93 If bit NODIV in the SAI_xCR1 register is set, the frame length can
bogdanm 92:4fc01daae5a5 94 take any of the values without constraint since the input clock of
bogdanm 92:4fc01daae5a5 95 the audio block should be equal to the bit clock.
bogdanm 92:4fc01daae5a5 96 There is no MCLK_x clock which can be output. */
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold.
bogdanm 92:4fc01daae5a5 99 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */
bogdanm 92:4fc01daae5a5 100
bogdanm 92:4fc01daae5a5 101 uint32_t ClockSource; /*!< Specifies the SAI Block x Clock source.
bogdanm 92:4fc01daae5a5 102 This parameter can be a value of @ref SAI_Clock_Source
bogdanm 92:4fc01daae5a5 103 @note: If ClockSource is equal to SAI_CLKSource_Ext, the PLLI2S
bogdanm 92:4fc01daae5a5 104 and PLLSAI divisions factors will be ignored. */
bogdanm 92:4fc01daae5a5 105
bogdanm 92:4fc01daae5a5 106 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling.
bogdanm 92:4fc01daae5a5 107 This parameter can be a value of @ref SAI_Audio_Frequency */
bogdanm 92:4fc01daae5a5 108
bogdanm 92:4fc01daae5a5 109 }SAI_InitTypeDef;
bogdanm 92:4fc01daae5a5 110
bogdanm 92:4fc01daae5a5 111 /**
bogdanm 92:4fc01daae5a5 112 * @brief SAI Block Frame Init structure definition
bogdanm 92:4fc01daae5a5 113 */
bogdanm 92:4fc01daae5a5 114
bogdanm 92:4fc01daae5a5 115 typedef struct
bogdanm 92:4fc01daae5a5 116 {
bogdanm 92:4fc01daae5a5 117
bogdanm 92:4fc01daae5a5 118 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame.
bogdanm 92:4fc01daae5a5 119 This parameter must be a number between Min_Data = 8 and Max_Data = 256.
bogdanm 92:4fc01daae5a5 120 @note: If master clock MCLK_x pin is declared as an output, the frame length
bogdanm 92:4fc01daae5a5 121 should be aligned to a number equal to power of 2 in order to keep
bogdanm 92:4fc01daae5a5 122 in an audio frame, an integer number of MCLK pulses by bit Clock. */
bogdanm 92:4fc01daae5a5 123
bogdanm 92:4fc01daae5a5 124 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length.
bogdanm 92:4fc01daae5a5 125 This Parameter specifies the length in number of bit clock (SCK + 1)
bogdanm 92:4fc01daae5a5 126 of the active level of FS signal in audio frame.
bogdanm 92:4fc01daae5a5 127 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */
bogdanm 92:4fc01daae5a5 128
bogdanm 92:4fc01daae5a5 129 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition.
bogdanm 92:4fc01daae5a5 130 This parameter can be a value of @ref SAI_Block_FS_Definition */
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity.
bogdanm 92:4fc01daae5a5 133 This parameter can be a value of @ref SAI_Block_FS_Polarity */
bogdanm 92:4fc01daae5a5 134
bogdanm 92:4fc01daae5a5 135 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset.
bogdanm 92:4fc01daae5a5 136 This parameter can be a value of @ref SAI_Block_FS_Offset */
bogdanm 92:4fc01daae5a5 137
bogdanm 92:4fc01daae5a5 138 }SAI_FrameInitTypeDef;
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 /**
bogdanm 92:4fc01daae5a5 141 * @brief SAI Block Slot Init Structure definition
bogdanm 92:4fc01daae5a5 142 */
bogdanm 92:4fc01daae5a5 143
bogdanm 92:4fc01daae5a5 144 typedef struct
bogdanm 92:4fc01daae5a5 145 {
bogdanm 92:4fc01daae5a5 146 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot.
bogdanm 92:4fc01daae5a5 147 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */
bogdanm 92:4fc01daae5a5 148
bogdanm 92:4fc01daae5a5 149 uint32_t SlotSize; /*!< Specifies the Slot Size.
bogdanm 92:4fc01daae5a5 150 This parameter can be a value of @ref SAI_Block_Slot_Size */
bogdanm 92:4fc01daae5a5 151
bogdanm 92:4fc01daae5a5 152 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame.
bogdanm 92:4fc01daae5a5 153 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
bogdanm 92:4fc01daae5a5 154
bogdanm 92:4fc01daae5a5 155 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated.
bogdanm 92:4fc01daae5a5 156 This parameter can be a value of @ref SAI_Block_Slot_Active */
bogdanm 92:4fc01daae5a5 157 }SAI_SlotInitTypeDef;
bogdanm 92:4fc01daae5a5 158
bogdanm 92:4fc01daae5a5 159 /**
bogdanm 92:4fc01daae5a5 160 * @brief HAL State structures definition
bogdanm 92:4fc01daae5a5 161 */
bogdanm 92:4fc01daae5a5 162 typedef enum
bogdanm 92:4fc01daae5a5 163 {
bogdanm 92:4fc01daae5a5 164 HAL_SAI_STATE_RESET = 0x00, /*!< SAI not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 165 HAL_SAI_STATE_READY = 0x01, /*!< SAI initialized and ready for use */
bogdanm 92:4fc01daae5a5 166 HAL_SAI_STATE_BUSY = 0x02, /*!< SAI internal process is ongoing */
bogdanm 92:4fc01daae5a5 167 HAL_SAI_STATE_BUSY_TX = 0x12, /*!< Data transmission process is ongoing */
bogdanm 92:4fc01daae5a5 168 HAL_SAI_STATE_BUSY_RX = 0x22, /*!< Data reception process is ongoing */
bogdanm 92:4fc01daae5a5 169 HAL_SAI_STATE_TIMEOUT = 0x03, /*!< SAI timeout state */
bogdanm 92:4fc01daae5a5 170 HAL_SAI_STATE_ERROR = 0x04 /*!< SAI error state */
bogdanm 92:4fc01daae5a5 171
bogdanm 92:4fc01daae5a5 172 }HAL_SAI_StateTypeDef;
bogdanm 92:4fc01daae5a5 173
bogdanm 92:4fc01daae5a5 174 /**
bogdanm 92:4fc01daae5a5 175 * @brief SAI handle Structure definition
bogdanm 92:4fc01daae5a5 176 */
bogdanm 92:4fc01daae5a5 177 typedef struct
bogdanm 92:4fc01daae5a5 178 {
bogdanm 92:4fc01daae5a5 179 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */
bogdanm 92:4fc01daae5a5 180
bogdanm 92:4fc01daae5a5 181 SAI_InitTypeDef Init; /*!< SAI communication parameters */
bogdanm 92:4fc01daae5a5 182
bogdanm 92:4fc01daae5a5 183 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */
bogdanm 92:4fc01daae5a5 184
bogdanm 92:4fc01daae5a5 185 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */
bogdanm 92:4fc01daae5a5 186
bogdanm 92:4fc01daae5a5 187 uint16_t *pTxBuffPtr; /*!< Pointer to SAI Tx transfer Buffer */
bogdanm 92:4fc01daae5a5 188
bogdanm 92:4fc01daae5a5 189 uint16_t TxXferSize; /*!< SAI Tx transfer size */
bogdanm 92:4fc01daae5a5 190
bogdanm 92:4fc01daae5a5 191 uint16_t TxXferCount; /*!< SAI Tx transfer counter */
bogdanm 92:4fc01daae5a5 192
bogdanm 92:4fc01daae5a5 193 uint16_t *pRxBuffPtr; /*!< Pointer to SAI Rx transfer buffer */
bogdanm 92:4fc01daae5a5 194
bogdanm 92:4fc01daae5a5 195 uint16_t RxXferSize; /*!< SAI Rx transfer size */
bogdanm 92:4fc01daae5a5 196
bogdanm 92:4fc01daae5a5 197 uint16_t RxXferCount; /*!< SAI Rx transfer counter */
bogdanm 92:4fc01daae5a5 198
bogdanm 92:4fc01daae5a5 199 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */
bogdanm 92:4fc01daae5a5 200
bogdanm 92:4fc01daae5a5 201 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */
bogdanm 92:4fc01daae5a5 202
bogdanm 92:4fc01daae5a5 203 HAL_LockTypeDef Lock; /*!< SAI locking object */
bogdanm 92:4fc01daae5a5 204
bogdanm 92:4fc01daae5a5 205 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */
bogdanm 92:4fc01daae5a5 206
bogdanm 92:4fc01daae5a5 207 __IO uint32_t ErrorCode; /*!< SAI Error code */
bogdanm 92:4fc01daae5a5 208 }SAI_HandleTypeDef;
bogdanm 92:4fc01daae5a5 209
bogdanm 92:4fc01daae5a5 210 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 211
bogdanm 92:4fc01daae5a5 212 /** @defgroup SAI_Exported_Constants
bogdanm 92:4fc01daae5a5 213 * @{
bogdanm 92:4fc01daae5a5 214 */
bogdanm 92:4fc01daae5a5 215 /** @defgroup SAI Error Code
bogdanm 92:4fc01daae5a5 216 * @{
bogdanm 92:4fc01daae5a5 217 */
bogdanm 92:4fc01daae5a5 218 #define HAL_SAI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
bogdanm 92:4fc01daae5a5 219 #define HAL_SAI_ERROR_OVR ((uint32_t)0x00000001) /*!< Overrun Error */
bogdanm 92:4fc01daae5a5 220 #define HAL_SAI_ERROR_UDR ((uint32_t)0x00000002) /*!< Underrun error */
bogdanm 92:4fc01daae5a5 221 #define HAL_SAI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
bogdanm 92:4fc01daae5a5 222 /**
bogdanm 92:4fc01daae5a5 223 * @}
bogdanm 92:4fc01daae5a5 224 */
bogdanm 92:4fc01daae5a5 225
bogdanm 92:4fc01daae5a5 226 /** @defgroup SAI_Clock_Source
bogdanm 92:4fc01daae5a5 227 * @{
bogdanm 92:4fc01daae5a5 228 */
bogdanm 92:4fc01daae5a5 229 #define SAI_CLKSOURCE_PLLSAI ((uint32_t)RCC_SAIACLKSOURCE_PLLSAI)
bogdanm 92:4fc01daae5a5 230 #define SAI_CLKSOURCE_PLLI2S ((uint32_t)RCC_SAIACLKSOURCE_PLLI2S)
bogdanm 92:4fc01daae5a5 231 #define SAI_CLKSOURCE_EXT ((uint32_t)RCC_SAIACLKSOURCE_EXT)
bogdanm 92:4fc01daae5a5 232
bogdanm 92:4fc01daae5a5 233 #define IS_SAI_CLK_SOURCE(SOURCE) (((SOURCE) == SAI_CLKSOURCE_PLLSAI) ||\
bogdanm 92:4fc01daae5a5 234 ((SOURCE) == SAI_CLKSOURCE_PLLI2S) ||\
bogdanm 92:4fc01daae5a5 235 ((SOURCE) == SAI_CLKSOURCE_EXT))
bogdanm 92:4fc01daae5a5 236 /**
bogdanm 92:4fc01daae5a5 237 * @}
bogdanm 92:4fc01daae5a5 238 */
bogdanm 92:4fc01daae5a5 239
bogdanm 92:4fc01daae5a5 240 /** @defgroup SAI_Audio_Frequency
bogdanm 92:4fc01daae5a5 241 * @{
bogdanm 92:4fc01daae5a5 242 */
bogdanm 92:4fc01daae5a5 243 #define SAI_AUDIO_FREQUENCY_192K ((uint32_t)192000)
bogdanm 92:4fc01daae5a5 244 #define SAI_AUDIO_FREQUENCY_96K ((uint32_t)96000)
bogdanm 92:4fc01daae5a5 245 #define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000)
bogdanm 92:4fc01daae5a5 246 #define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100)
bogdanm 92:4fc01daae5a5 247 #define SAI_AUDIO_FREQUENCY_32K ((uint32_t)32000)
bogdanm 92:4fc01daae5a5 248 #define SAI_AUDIO_FREQUENCY_22K ((uint32_t)22050)
bogdanm 92:4fc01daae5a5 249 #define SAI_AUDIO_FREQUENCY_16K ((uint32_t)16000)
bogdanm 92:4fc01daae5a5 250 #define SAI_AUDIO_FREQUENCY_11K ((uint32_t)11025)
bogdanm 92:4fc01daae5a5 251 #define SAI_AUDIO_FREQUENCY_8K ((uint32_t)8000)
bogdanm 92:4fc01daae5a5 252
bogdanm 92:4fc01daae5a5 253 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \
bogdanm 92:4fc01daae5a5 254 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \
bogdanm 92:4fc01daae5a5 255 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \
bogdanm 92:4fc01daae5a5 256 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \
bogdanm 92:4fc01daae5a5 257 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K))
bogdanm 92:4fc01daae5a5 258 /**
bogdanm 92:4fc01daae5a5 259 * @}
bogdanm 92:4fc01daae5a5 260 */
bogdanm 92:4fc01daae5a5 261
bogdanm 92:4fc01daae5a5 262 /** @defgroup SAI_Block_Mode
bogdanm 92:4fc01daae5a5 263 * @{
bogdanm 92:4fc01daae5a5 264 */
bogdanm 92:4fc01daae5a5 265 #define SAI_MODEMASTER_TX ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 266 #define SAI_MODEMASTER_RX ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 267 #define SAI_MODESLAVE_TX ((uint32_t)0x00000002)
bogdanm 92:4fc01daae5a5 268 #define SAI_MODESLAVE_RX ((uint32_t)0x00000003)
bogdanm 92:4fc01daae5a5 269 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \
bogdanm 92:4fc01daae5a5 270 ((MODE) == SAI_MODEMASTER_RX) || \
bogdanm 92:4fc01daae5a5 271 ((MODE) == SAI_MODESLAVE_TX) || \
bogdanm 92:4fc01daae5a5 272 ((MODE) == SAI_MODESLAVE_RX))
bogdanm 92:4fc01daae5a5 273 /**
bogdanm 92:4fc01daae5a5 274 * @}
bogdanm 92:4fc01daae5a5 275 */
bogdanm 92:4fc01daae5a5 276
bogdanm 92:4fc01daae5a5 277 /** @defgroup SAI_Block_Protocol
bogdanm 92:4fc01daae5a5 278 * @{
bogdanm 92:4fc01daae5a5 279 */
bogdanm 92:4fc01daae5a5 280
bogdanm 92:4fc01daae5a5 281 #define SAI_FREE_PROTOCOL ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 282 #define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1)
bogdanm 92:4fc01daae5a5 283
bogdanm 92:4fc01daae5a5 284 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \
bogdanm 92:4fc01daae5a5 285 ((PROTOCOL) == SAI_AC97_PROTOCOL))
bogdanm 92:4fc01daae5a5 286 /**
bogdanm 92:4fc01daae5a5 287 * @}
bogdanm 92:4fc01daae5a5 288 */
bogdanm 92:4fc01daae5a5 289
bogdanm 92:4fc01daae5a5 290 /** @defgroup SAI_Block_Data_Size
bogdanm 92:4fc01daae5a5 291 * @{
bogdanm 92:4fc01daae5a5 292 */
bogdanm 92:4fc01daae5a5 293 #define SAI_DATASIZE_8 ((uint32_t)0x00000040)
bogdanm 92:4fc01daae5a5 294 #define SAI_DATASIZE_10 ((uint32_t)0x00000060)
bogdanm 92:4fc01daae5a5 295 #define SAI_DATASIZE_16 ((uint32_t)0x00000080)
bogdanm 92:4fc01daae5a5 296 #define SAI_DATASIZE_20 ((uint32_t)0x000000A0)
bogdanm 92:4fc01daae5a5 297 #define SAI_DATASIZE_24 ((uint32_t)0x000000C0)
bogdanm 92:4fc01daae5a5 298 #define SAI_DATASIZE_32 ((uint32_t)0x000000E0)
bogdanm 92:4fc01daae5a5 299
bogdanm 92:4fc01daae5a5 300 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \
bogdanm 92:4fc01daae5a5 301 ((DATASIZE) == SAI_DATASIZE_10) || \
bogdanm 92:4fc01daae5a5 302 ((DATASIZE) == SAI_DATASIZE_16) || \
bogdanm 92:4fc01daae5a5 303 ((DATASIZE) == SAI_DATASIZE_20) || \
bogdanm 92:4fc01daae5a5 304 ((DATASIZE) == SAI_DATASIZE_24) || \
bogdanm 92:4fc01daae5a5 305 ((DATASIZE) == SAI_DATASIZE_32))
bogdanm 92:4fc01daae5a5 306 /**
bogdanm 92:4fc01daae5a5 307 * @}
bogdanm 92:4fc01daae5a5 308 */
bogdanm 92:4fc01daae5a5 309
bogdanm 92:4fc01daae5a5 310 /** @defgroup SAI_Block_MSB_LSB_transmission
bogdanm 92:4fc01daae5a5 311 * @{
bogdanm 92:4fc01daae5a5 312 */
bogdanm 92:4fc01daae5a5 313
bogdanm 92:4fc01daae5a5 314 #define SAI_FIRSTBIT_MSB ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 315 #define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST)
bogdanm 92:4fc01daae5a5 316
bogdanm 92:4fc01daae5a5 317 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \
bogdanm 92:4fc01daae5a5 318 ((BIT) == SAI_FIRSTBIT_LSB))
bogdanm 92:4fc01daae5a5 319 /**
bogdanm 92:4fc01daae5a5 320 * @}
bogdanm 92:4fc01daae5a5 321 */
bogdanm 92:4fc01daae5a5 322
bogdanm 92:4fc01daae5a5 323 /** @defgroup SAI_Block_Clock_Strobing
bogdanm 92:4fc01daae5a5 324 * @{
bogdanm 92:4fc01daae5a5 325 */
bogdanm 92:4fc01daae5a5 326 #define SAI_CLOCKSTROBING_FALLINGEDGE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 327 #define SAI_CLOCKSTROBING_RISINGEDGE ((uint32_t)SAI_xCR1_CKSTR)
bogdanm 92:4fc01daae5a5 328
bogdanm 92:4fc01daae5a5 329 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \
bogdanm 92:4fc01daae5a5 330 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE))
bogdanm 92:4fc01daae5a5 331 /**
bogdanm 92:4fc01daae5a5 332 * @}
bogdanm 92:4fc01daae5a5 333 */
bogdanm 92:4fc01daae5a5 334
bogdanm 92:4fc01daae5a5 335 /** @defgroup SAI_Block_Synchronization
bogdanm 92:4fc01daae5a5 336 * @{
bogdanm 92:4fc01daae5a5 337 */
bogdanm 92:4fc01daae5a5 338 #define SAI_ASYNCHRONOUS ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 339 #define SAI_SYNCHRONOUS ((uint32_t)SAI_xCR1_SYNCEN_0)
bogdanm 92:4fc01daae5a5 340
bogdanm 92:4fc01daae5a5 341 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \
bogdanm 92:4fc01daae5a5 342 ((SYNCHRO) == SAI_SYNCHRONOUS))
bogdanm 92:4fc01daae5a5 343 /**
bogdanm 92:4fc01daae5a5 344 * @}
bogdanm 92:4fc01daae5a5 345 */
bogdanm 92:4fc01daae5a5 346
bogdanm 92:4fc01daae5a5 347 /** @defgroup SAI_Block_Output_Drive
bogdanm 92:4fc01daae5a5 348 * @{
bogdanm 92:4fc01daae5a5 349 */
bogdanm 92:4fc01daae5a5 350 #define SAI_OUTPUTDRIVE_DISABLED ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 351 #define SAI_OUTPUTDRIVE_ENABLED ((uint32_t)SAI_xCR1_OUTDRIV)
bogdanm 92:4fc01daae5a5 352
bogdanm 92:4fc01daae5a5 353 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLED) || \
bogdanm 92:4fc01daae5a5 354 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLED))
bogdanm 92:4fc01daae5a5 355 /**
bogdanm 92:4fc01daae5a5 356 * @}
bogdanm 92:4fc01daae5a5 357 */
bogdanm 92:4fc01daae5a5 358
bogdanm 92:4fc01daae5a5 359 /** @defgroup SAI_Block_NoDivider
bogdanm 92:4fc01daae5a5 360 * @{
bogdanm 92:4fc01daae5a5 361 */
bogdanm 92:4fc01daae5a5 362 #define SAI_MASTERDIVIDER_ENABLED ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 363 #define SAI_MASTERDIVIDER_DISABLED ((uint32_t)SAI_xCR1_NODIV)
bogdanm 92:4fc01daae5a5 364
bogdanm 92:4fc01daae5a5 365 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLED) || \
bogdanm 92:4fc01daae5a5 366 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLED))
bogdanm 92:4fc01daae5a5 367 /**
bogdanm 92:4fc01daae5a5 368 * @}
bogdanm 92:4fc01daae5a5 369 */
bogdanm 92:4fc01daae5a5 370
bogdanm 92:4fc01daae5a5 371 /** @defgroup SAI_Block_Master_Divider
bogdanm 92:4fc01daae5a5 372 * @{
bogdanm 92:4fc01daae5a5 373 */
bogdanm 92:4fc01daae5a5 374 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15)
bogdanm 92:4fc01daae5a5 375 /**
bogdanm 92:4fc01daae5a5 376 * @}
bogdanm 92:4fc01daae5a5 377 */
bogdanm 92:4fc01daae5a5 378
bogdanm 92:4fc01daae5a5 379 /** @defgroup SAI_Block_Frame_Length
bogdanm 92:4fc01daae5a5 380 * @{
bogdanm 92:4fc01daae5a5 381 */
bogdanm 92:4fc01daae5a5 382 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8 <= (LENGTH)) && ((LENGTH) <= 256))
bogdanm 92:4fc01daae5a5 383 /**
bogdanm 92:4fc01daae5a5 384 * @}
bogdanm 92:4fc01daae5a5 385 */
bogdanm 92:4fc01daae5a5 386
bogdanm 92:4fc01daae5a5 387 /** @defgroup SAI_Block_Active_FrameLength
bogdanm 92:4fc01daae5a5 388 * @{
bogdanm 92:4fc01daae5a5 389 */
bogdanm 92:4fc01daae5a5 390 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1 <= (LENGTH)) && ((LENGTH) <= 128))
bogdanm 92:4fc01daae5a5 391 /**
bogdanm 92:4fc01daae5a5 392 * @}
bogdanm 92:4fc01daae5a5 393 */
bogdanm 92:4fc01daae5a5 394
bogdanm 92:4fc01daae5a5 395 /** @defgroup SAI_Block_FS_Definition
bogdanm 92:4fc01daae5a5 396 * @{
bogdanm 92:4fc01daae5a5 397 */
bogdanm 92:4fc01daae5a5 398 #define SAI_FS_STARTFRAME ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 399 #define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF)
bogdanm 92:4fc01daae5a5 400
bogdanm 92:4fc01daae5a5 401 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \
bogdanm 92:4fc01daae5a5 402 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION))
bogdanm 92:4fc01daae5a5 403 /**
bogdanm 92:4fc01daae5a5 404 * @}
bogdanm 92:4fc01daae5a5 405 */
bogdanm 92:4fc01daae5a5 406
bogdanm 92:4fc01daae5a5 407 /** @defgroup SAI_Block_FS_Polarity
bogdanm 92:4fc01daae5a5 408 * @{
bogdanm 92:4fc01daae5a5 409 */
bogdanm 92:4fc01daae5a5 410 #define SAI_FS_ACTIVE_LOW ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 411 #define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPO)
bogdanm 92:4fc01daae5a5 412
bogdanm 92:4fc01daae5a5 413 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \
bogdanm 92:4fc01daae5a5 414 ((POLARITY) == SAI_FS_ACTIVE_HIGH))
bogdanm 92:4fc01daae5a5 415 /**
bogdanm 92:4fc01daae5a5 416 * @}
bogdanm 92:4fc01daae5a5 417 */
bogdanm 92:4fc01daae5a5 418
bogdanm 92:4fc01daae5a5 419 /** @defgroup SAI_Block_FS_Offset
bogdanm 92:4fc01daae5a5 420 * @{
bogdanm 92:4fc01daae5a5 421 */
bogdanm 92:4fc01daae5a5 422 #define SAI_FS_FIRSTBIT ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 423 #define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF)
bogdanm 92:4fc01daae5a5 424
bogdanm 92:4fc01daae5a5 425 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \
bogdanm 92:4fc01daae5a5 426 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT))
bogdanm 92:4fc01daae5a5 427 /**
bogdanm 92:4fc01daae5a5 428 * @}
bogdanm 92:4fc01daae5a5 429 */
bogdanm 92:4fc01daae5a5 430
bogdanm 92:4fc01daae5a5 431 /** @defgroup SAI_Block_Slot_FirstBit_Offset
bogdanm 92:4fc01daae5a5 432 * @{
bogdanm 92:4fc01daae5a5 433 */
bogdanm 92:4fc01daae5a5 434 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24)
bogdanm 92:4fc01daae5a5 435 /**
bogdanm 92:4fc01daae5a5 436 * @}
bogdanm 92:4fc01daae5a5 437 */
bogdanm 92:4fc01daae5a5 438
bogdanm 92:4fc01daae5a5 439 /** @defgroup SAI_Block_Slot_Size
bogdanm 92:4fc01daae5a5 440 * @{
bogdanm 92:4fc01daae5a5 441 */
bogdanm 92:4fc01daae5a5 442 #define SAI_SLOTSIZE_DATASIZE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 443 #define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0)
bogdanm 92:4fc01daae5a5 444 #define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1)
bogdanm 92:4fc01daae5a5 445
bogdanm 92:4fc01daae5a5 446 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \
bogdanm 92:4fc01daae5a5 447 ((SIZE) == SAI_SLOTSIZE_16B) || \
bogdanm 92:4fc01daae5a5 448 ((SIZE) == SAI_SLOTSIZE_32B))
bogdanm 92:4fc01daae5a5 449 /**
bogdanm 92:4fc01daae5a5 450 * @}
bogdanm 92:4fc01daae5a5 451 */
bogdanm 92:4fc01daae5a5 452
bogdanm 92:4fc01daae5a5 453 /** @defgroup SAI_Block_Slot_Number
bogdanm 92:4fc01daae5a5 454 * @{
bogdanm 92:4fc01daae5a5 455 */
bogdanm 92:4fc01daae5a5 456 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1 <= (NUMBER)) && ((NUMBER) <= 16))
bogdanm 92:4fc01daae5a5 457 /**
bogdanm 92:4fc01daae5a5 458 * @}
bogdanm 92:4fc01daae5a5 459 */
bogdanm 92:4fc01daae5a5 460
bogdanm 92:4fc01daae5a5 461 /** @defgroup SAI_Block_Slot_Active
bogdanm 92:4fc01daae5a5 462 * @{
bogdanm 92:4fc01daae5a5 463 */
bogdanm 92:4fc01daae5a5 464 #define SAI_SLOT_NOTACTIVE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 465 #define SAI_SLOTACTIVE_0 ((uint32_t)0x00010000)
bogdanm 92:4fc01daae5a5 466 #define SAI_SLOTACTIVE_1 ((uint32_t)0x00020000)
bogdanm 92:4fc01daae5a5 467 #define SAI_SLOTACTIVE_2 ((uint32_t)0x00040000)
bogdanm 92:4fc01daae5a5 468 #define SAI_SLOTACTIVE_3 ((uint32_t)0x00080000)
bogdanm 92:4fc01daae5a5 469 #define SAI_SLOTACTIVE_4 ((uint32_t)0x00100000)
bogdanm 92:4fc01daae5a5 470 #define SAI_SLOTACTIVE_5 ((uint32_t)0x00200000)
bogdanm 92:4fc01daae5a5 471 #define SAI_SLOTACTIVE_6 ((uint32_t)0x00400000)
bogdanm 92:4fc01daae5a5 472 #define SAI_SLOTACTIVE_7 ((uint32_t)0x00800000)
bogdanm 92:4fc01daae5a5 473 #define SAI_SLOTACTIVE_8 ((uint32_t)0x01000000)
bogdanm 92:4fc01daae5a5 474 #define SAI_SLOTACTIVE_9 ((uint32_t)0x02000000)
bogdanm 92:4fc01daae5a5 475 #define SAI_SLOTACTIVE_10 ((uint32_t)0x04000000)
bogdanm 92:4fc01daae5a5 476 #define SAI_SLOTACTIVE_11 ((uint32_t)0x08000000)
bogdanm 92:4fc01daae5a5 477 #define SAI_SLOTACTIVE_12 ((uint32_t)0x10000000)
bogdanm 92:4fc01daae5a5 478 #define SAI_SLOTACTIVE_13 ((uint32_t)0x20000000)
bogdanm 92:4fc01daae5a5 479 #define SAI_SLOTACTIVE_14 ((uint32_t)0x40000000)
bogdanm 92:4fc01daae5a5 480 #define SAI_SLOTACTIVE_15 ((uint32_t)0x80000000)
bogdanm 92:4fc01daae5a5 481 #define SAI_SLOTACTIVE_ALL ((uint32_t)0xFFFF0000)
bogdanm 92:4fc01daae5a5 482
bogdanm 92:4fc01daae5a5 483 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) != 0)
bogdanm 92:4fc01daae5a5 484
bogdanm 92:4fc01daae5a5 485 /**
bogdanm 92:4fc01daae5a5 486 * @}
bogdanm 92:4fc01daae5a5 487 */
bogdanm 92:4fc01daae5a5 488
bogdanm 92:4fc01daae5a5 489 /** @defgroup SAI_Mono_Stereo_Mode
bogdanm 92:4fc01daae5a5 490 * @{
bogdanm 92:4fc01daae5a5 491 */
bogdanm 92:4fc01daae5a5 492 #define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO)
bogdanm 92:4fc01daae5a5 493 #define SAI_STREOMODE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 494
bogdanm 92:4fc01daae5a5 495 #define IS_SAI_BLOCK_MONO_STREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\
bogdanm 92:4fc01daae5a5 496 ((MODE) == SAI_STREOMODE))
bogdanm 92:4fc01daae5a5 497 /**
bogdanm 92:4fc01daae5a5 498 * @}
bogdanm 92:4fc01daae5a5 499 */
bogdanm 92:4fc01daae5a5 500
bogdanm 92:4fc01daae5a5 501 /** @defgroup SAI_TRIState_Management
bogdanm 92:4fc01daae5a5 502 * @{
bogdanm 92:4fc01daae5a5 503 */
bogdanm 92:4fc01daae5a5 504 #define SAI_OUTPUT_NOTRELEASED ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 505 #define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS)
bogdanm 92:4fc01daae5a5 506
bogdanm 92:4fc01daae5a5 507 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\
bogdanm 92:4fc01daae5a5 508 ((STATE) == SAI_OUTPUT_RELEASED))
bogdanm 92:4fc01daae5a5 509 /**
bogdanm 92:4fc01daae5a5 510 * @}
bogdanm 92:4fc01daae5a5 511 */
bogdanm 92:4fc01daae5a5 512
bogdanm 92:4fc01daae5a5 513 /** @defgroup SAI_Block_Fifo_Threshold
bogdanm 92:4fc01daae5a5 514 * @{
bogdanm 92:4fc01daae5a5 515 */
bogdanm 92:4fc01daae5a5 516 #define SAI_FIFOTHRESHOLD_EMPTY ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 517 #define SAI_FIFOTHRESHOLD_1QF ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 518 #define SAI_FIFOTHRESHOLD_HF ((uint32_t)0x00000002)
bogdanm 92:4fc01daae5a5 519 #define SAI_FIFOTHRESHOLD_3QF ((uint32_t)0x00000003)
bogdanm 92:4fc01daae5a5 520 #define SAI_FIFOTHRESHOLD_FULL ((uint32_t)0x00000004)
bogdanm 92:4fc01daae5a5 521
bogdanm 92:4fc01daae5a5 522 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \
bogdanm 92:4fc01daae5a5 523 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \
bogdanm 92:4fc01daae5a5 524 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \
bogdanm 92:4fc01daae5a5 525 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \
bogdanm 92:4fc01daae5a5 526 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL))
bogdanm 92:4fc01daae5a5 527 /**
bogdanm 92:4fc01daae5a5 528 * @}
bogdanm 92:4fc01daae5a5 529 */
bogdanm 92:4fc01daae5a5 530
bogdanm 92:4fc01daae5a5 531 /** @defgroup SAI_Block_Companding_Mode
bogdanm 92:4fc01daae5a5 532 * @{
bogdanm 92:4fc01daae5a5 533 */
bogdanm 92:4fc01daae5a5 534 #define SAI_NOCOMPANDING ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 535 #define SAI_ULAW_1CPL_COMPANDING ((uint32_t)0x00008000)
bogdanm 92:4fc01daae5a5 536 #define SAI_ALAW_1CPL_COMPANDING ((uint32_t)0x0000C000)
bogdanm 92:4fc01daae5a5 537 #define SAI_ULAW_2CPL_COMPANDING ((uint32_t)0x0000A000)
bogdanm 92:4fc01daae5a5 538 #define SAI_ALAW_2CPL_COMPANDING ((uint32_t)0x0000E000)
bogdanm 92:4fc01daae5a5 539
bogdanm 92:4fc01daae5a5 540 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \
bogdanm 92:4fc01daae5a5 541 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \
bogdanm 92:4fc01daae5a5 542 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \
bogdanm 92:4fc01daae5a5 543 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \
bogdanm 92:4fc01daae5a5 544 ((MODE) == SAI_ALAW_2CPL_COMPANDING))
bogdanm 92:4fc01daae5a5 545 /**
bogdanm 92:4fc01daae5a5 546 * @}
bogdanm 92:4fc01daae5a5 547 */
bogdanm 92:4fc01daae5a5 548
bogdanm 92:4fc01daae5a5 549 /** @defgroup SAI_Block_Mute_Value
bogdanm 92:4fc01daae5a5 550 * @{
bogdanm 92:4fc01daae5a5 551 */
bogdanm 92:4fc01daae5a5 552 #define SAI_ZERO_VALUE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 553 #define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL)
bogdanm 92:4fc01daae5a5 554
bogdanm 92:4fc01daae5a5 555 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \
bogdanm 92:4fc01daae5a5 556 ((VALUE) == SAI_LAST_SENT_VALUE))
bogdanm 92:4fc01daae5a5 557 /**
bogdanm 92:4fc01daae5a5 558 * @}
bogdanm 92:4fc01daae5a5 559 */
bogdanm 92:4fc01daae5a5 560
bogdanm 92:4fc01daae5a5 561 /** @defgroup SAI_Block_Mute_Frame_Counter
bogdanm 92:4fc01daae5a5 562 * @{
bogdanm 92:4fc01daae5a5 563 */
bogdanm 92:4fc01daae5a5 564 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63)
bogdanm 92:4fc01daae5a5 565 /**
bogdanm 92:4fc01daae5a5 566 * @}
bogdanm 92:4fc01daae5a5 567 */
bogdanm 92:4fc01daae5a5 568
bogdanm 92:4fc01daae5a5 569 /** @defgroup SAI_Block_Interrupts_Definition
bogdanm 92:4fc01daae5a5 570 * @{
bogdanm 92:4fc01daae5a5 571 */
bogdanm 92:4fc01daae5a5 572 #define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE)
bogdanm 92:4fc01daae5a5 573 #define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE)
bogdanm 92:4fc01daae5a5 574 #define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE)
bogdanm 92:4fc01daae5a5 575 #define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE)
bogdanm 92:4fc01daae5a5 576 #define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE)
bogdanm 92:4fc01daae5a5 577 #define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE)
bogdanm 92:4fc01daae5a5 578 #define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE)
bogdanm 92:4fc01daae5a5 579
bogdanm 92:4fc01daae5a5 580 #define IS_SAI_BLOCK_CONFIG_IT(IT) (((IT) == SAI_IT_OVRUDR) || \
bogdanm 92:4fc01daae5a5 581 ((IT) == SAI_IT_MUTEDET) || \
bogdanm 92:4fc01daae5a5 582 ((IT) == SAI_IT_WCKCFG) || \
bogdanm 92:4fc01daae5a5 583 ((IT) == SAI_IT_FREQ) || \
bogdanm 92:4fc01daae5a5 584 ((IT) == SAI_IT_CNRDY) || \
bogdanm 92:4fc01daae5a5 585 ((IT) == SAI_IT_AFSDET) || \
bogdanm 92:4fc01daae5a5 586 ((IT) == SAI_IT_LFSDET))
bogdanm 92:4fc01daae5a5 587 /**
bogdanm 92:4fc01daae5a5 588 * @}
bogdanm 92:4fc01daae5a5 589 */
bogdanm 92:4fc01daae5a5 590
bogdanm 92:4fc01daae5a5 591 /** @defgroup SAI_Block_Flags_Definition
bogdanm 92:4fc01daae5a5 592 * @{
bogdanm 92:4fc01daae5a5 593 */
bogdanm 92:4fc01daae5a5 594 #define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR)
bogdanm 92:4fc01daae5a5 595 #define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET)
bogdanm 92:4fc01daae5a5 596 #define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG)
bogdanm 92:4fc01daae5a5 597 #define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ)
bogdanm 92:4fc01daae5a5 598 #define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY)
bogdanm 92:4fc01daae5a5 599 #define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET)
bogdanm 92:4fc01daae5a5 600 #define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET)
bogdanm 92:4fc01daae5a5 601
bogdanm 92:4fc01daae5a5 602 #define IS_SAI_BLOCK_GET_FLAG(FLAG) (((FLAG) == SAI_FLAG_OVRUDR) || \
bogdanm 92:4fc01daae5a5 603 ((FLAG) == SAI_FLAG_MUTEDET) || \
bogdanm 92:4fc01daae5a5 604 ((FLAG) == SAI_FLAG_WCKCFG) || \
bogdanm 92:4fc01daae5a5 605 ((FLAG) == SAI_FLAG_FREQ) || \
bogdanm 92:4fc01daae5a5 606 ((FLAG) == SAI_FLAG_CNRDY) || \
bogdanm 92:4fc01daae5a5 607 ((FLAG) == SAI_FLAG_AFSDET) || \
bogdanm 92:4fc01daae5a5 608 ((FLAG) == SAI_FLAG_LFSDET))
bogdanm 92:4fc01daae5a5 609
bogdanm 92:4fc01daae5a5 610 #define IS_SAI_BLOCK_CLEAR_FLAG(FLAG) (((FLAG) == SAI_FLAG_OVRUDR) || \
bogdanm 92:4fc01daae5a5 611 ((FLAG) == SAI_FLAG_MUTEDET) || \
bogdanm 92:4fc01daae5a5 612 ((FLAG) == SAI_FLAG_WCKCFG) || \
bogdanm 92:4fc01daae5a5 613 ((FLAG) == SAI_FLAG_FREQ) || \
bogdanm 92:4fc01daae5a5 614 ((FLAG) == SAI_FLAG_CNRDY) || \
bogdanm 92:4fc01daae5a5 615 ((FLAG) == SAI_FLAG_AFSDET) || \
bogdanm 92:4fc01daae5a5 616 ((FLAG) == SAI_FLAG_LFSDET))
bogdanm 92:4fc01daae5a5 617 /**
bogdanm 92:4fc01daae5a5 618 * @}
bogdanm 92:4fc01daae5a5 619 */
bogdanm 92:4fc01daae5a5 620
bogdanm 92:4fc01daae5a5 621 /** @defgroup SAI_Block_Fifo_Status_Level
bogdanm 92:4fc01daae5a5 622 * @{
bogdanm 92:4fc01daae5a5 623 */
bogdanm 92:4fc01daae5a5 624 #define SAI_FIFOStatus_Empty ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 625 #define SAI_FIFOStatus_Less1QuarterFull ((uint32_t)0x00010000)
bogdanm 92:4fc01daae5a5 626 #define SAI_FIFOStatus_1QuarterFull ((uint32_t)0x00020000)
bogdanm 92:4fc01daae5a5 627 #define SAI_FIFOStatus_HalfFull ((uint32_t)0x00030000)
bogdanm 92:4fc01daae5a5 628 #define SAI_FIFOStatus_3QuartersFull ((uint32_t)0x00040000)
bogdanm 92:4fc01daae5a5 629 #define SAI_FIFOStatus_Full ((uint32_t)0x00050000)
bogdanm 92:4fc01daae5a5 630
bogdanm 92:4fc01daae5a5 631 #define IS_SAI_BLOCK_FIFO_STATUS(STATUS) (((STATUS) == SAI_FIFOStatus_Less1QuarterFull ) || \
bogdanm 92:4fc01daae5a5 632 ((STATUS) == SAI_FIFOStatus_HalfFull) || \
bogdanm 92:4fc01daae5a5 633 ((STATUS) == SAI_FIFOStatus_1QuarterFull) || \
bogdanm 92:4fc01daae5a5 634 ((STATUS) == SAI_FIFOStatus_3QuartersFull) || \
bogdanm 92:4fc01daae5a5 635 ((STATUS) == SAI_FIFOStatus_Full) || \
bogdanm 92:4fc01daae5a5 636 ((STATUS) == SAI_FIFOStatus_Empty))
bogdanm 92:4fc01daae5a5 637 /**
bogdanm 92:4fc01daae5a5 638 * @}
bogdanm 92:4fc01daae5a5 639 */
bogdanm 92:4fc01daae5a5 640
bogdanm 92:4fc01daae5a5 641
bogdanm 92:4fc01daae5a5 642 /**
bogdanm 92:4fc01daae5a5 643 * @}
bogdanm 92:4fc01daae5a5 644 */
bogdanm 92:4fc01daae5a5 645
bogdanm 92:4fc01daae5a5 646 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 647 /** @brief Reset SAI handle state
bogdanm 92:4fc01daae5a5 648 * @param __HANDLE__: specifies the SAI Handle.
bogdanm 92:4fc01daae5a5 649 * @retval None
bogdanm 92:4fc01daae5a5 650 */
bogdanm 92:4fc01daae5a5 651 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET)
bogdanm 92:4fc01daae5a5 652
bogdanm 92:4fc01daae5a5 653 /** @brief Enable or disable the specified SAI interrupts.
bogdanm 92:4fc01daae5a5 654 * @param __HANDLE__: specifies the SAI Handle.
bogdanm 92:4fc01daae5a5 655 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 92:4fc01daae5a5 656 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 657 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
bogdanm 92:4fc01daae5a5 658 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable
bogdanm 92:4fc01daae5a5 659 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
bogdanm 92:4fc01daae5a5 660 * @arg SAI_IT_FREQ: FIFO request interrupt enable
bogdanm 92:4fc01daae5a5 661 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable
bogdanm 92:4fc01daae5a5 662 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
bogdanm 92:4fc01daae5a5 663 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enabl
bogdanm 92:4fc01daae5a5 664 * @retval None
bogdanm 92:4fc01daae5a5 665 */
bogdanm 92:4fc01daae5a5 666
bogdanm 92:4fc01daae5a5 667 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 668 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__)))
bogdanm 92:4fc01daae5a5 669
bogdanm 92:4fc01daae5a5 670 /** @brief Check if the specified SAI interrupt source is enabled or disabled.
bogdanm 92:4fc01daae5a5 671 * @param __HANDLE__: specifies the SAI Handle.
bogdanm 92:4fc01daae5a5 672 * This parameter can be SAI where x: 1, 2, or 3 to select the SAI peripheral.
bogdanm 92:4fc01daae5a5 673 * @param __INTERRUPT__: specifies the SAI interrupt source to check.
bogdanm 92:4fc01daae5a5 674 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 675 * @arg SAI_IT_TXE: Tx buffer empty interrupt enable.
bogdanm 92:4fc01daae5a5 676 * @arg SAI_IT_RXNE: Rx buffer not empty interrupt enable.
bogdanm 92:4fc01daae5a5 677 * @arg SAI_IT_ERR: Error interrupt enable.
bogdanm 92:4fc01daae5a5 678 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 679 */
bogdanm 92:4fc01daae5a5 680 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 92:4fc01daae5a5 681
bogdanm 92:4fc01daae5a5 682 /** @brief Check whether the specified SAI flag is set or not.
bogdanm 92:4fc01daae5a5 683 * @param __HANDLE__: specifies the SAI Handle.
bogdanm 92:4fc01daae5a5 684 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 685 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 686 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag.
bogdanm 92:4fc01daae5a5 687 * @arg SAI_FLAG_MUTEDET: Mute detection flag.
bogdanm 92:4fc01daae5a5 688 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag.
bogdanm 92:4fc01daae5a5 689 * @arg SAI_FLAG_FREQ: FIFO request flag.
bogdanm 92:4fc01daae5a5 690 * @arg SAI_FLAG_CNRDY: Codec not ready flag.
bogdanm 92:4fc01daae5a5 691 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag.
bogdanm 92:4fc01daae5a5 692 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag.
bogdanm 92:4fc01daae5a5 693 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 694 */
bogdanm 92:4fc01daae5a5 695 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 696
bogdanm 92:4fc01daae5a5 697 /** @brief Clears the specified SAI pending flag.
bogdanm 92:4fc01daae5a5 698 * @param __HANDLE__: specifies the SAI Handle.
bogdanm 92:4fc01daae5a5 699 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 700 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 701 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun
bogdanm 92:4fc01daae5a5 702 * @arg SAI_FLAG_MUTEDET: Clear Mute detection
bogdanm 92:4fc01daae5a5 703 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration
bogdanm 92:4fc01daae5a5 704 * @arg SAI_FLAG_FREQ: Clear FIFO request
bogdanm 92:4fc01daae5a5 705 * @arg SAI_FLAG_CNRDY: Clear Codec not ready
bogdanm 92:4fc01daae5a5 706 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection
bogdanm 92:4fc01daae5a5 707 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection
bogdanm 92:4fc01daae5a5 708 *
bogdanm 92:4fc01daae5a5 709 * @retval None
bogdanm 92:4fc01daae5a5 710 */
bogdanm 92:4fc01daae5a5 711 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__))
bogdanm 92:4fc01daae5a5 712
bogdanm 92:4fc01daae5a5 713 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN)
bogdanm 92:4fc01daae5a5 714 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN)
bogdanm 92:4fc01daae5a5 715
bogdanm 92:4fc01daae5a5 716 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 717
bogdanm 92:4fc01daae5a5 718 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 719 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 720 HAL_StatusTypeDef HAL_SAI_DeInit (SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 721 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 722 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 723
bogdanm 92:4fc01daae5a5 724 /* I/O operation functions *****************************************************/
bogdanm 92:4fc01daae5a5 725 /* Blocking mode: Polling */
bogdanm 92:4fc01daae5a5 726 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 727 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 728
bogdanm 92:4fc01daae5a5 729 /* Non-Blocking mode: Interrupt */
bogdanm 92:4fc01daae5a5 730 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 731 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 732
bogdanm 92:4fc01daae5a5 733 /* Non-Blocking mode: DMA */
bogdanm 92:4fc01daae5a5 734 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 735 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 736 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 737 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 738 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 739
bogdanm 92:4fc01daae5a5 740 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
bogdanm 92:4fc01daae5a5 741 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 742 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 743 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 744 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 745 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 746 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 747
bogdanm 92:4fc01daae5a5 748 /* Peripheral State functions **************************************************/
bogdanm 92:4fc01daae5a5 749 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 750 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai);
bogdanm 92:4fc01daae5a5 751
bogdanm 92:4fc01daae5a5 752 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 92:4fc01daae5a5 753 /**
bogdanm 92:4fc01daae5a5 754 * @}
bogdanm 92:4fc01daae5a5 755 */
bogdanm 92:4fc01daae5a5 756
bogdanm 92:4fc01daae5a5 757 /**
bogdanm 92:4fc01daae5a5 758 * @}
bogdanm 92:4fc01daae5a5 759 */
bogdanm 92:4fc01daae5a5 760
bogdanm 92:4fc01daae5a5 761 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 762 }
bogdanm 92:4fc01daae5a5 763 #endif
bogdanm 92:4fc01daae5a5 764
bogdanm 92:4fc01daae5a5 765 #endif /* __STM32F4xx_HAL_SAI_H */
bogdanm 92:4fc01daae5a5 766
bogdanm 92:4fc01daae5a5 767 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/