Ricardo Benitez / mbed

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Fork of mbed by mbed official

TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_rng.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Child:
99:dbbf35b96557
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_rng.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of RNG HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_RNG_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_RNG_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
bogdanm 92:4fc01daae5a5 47 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
bogdanm 92:4fc01daae5a5 48 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 49 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 52 * @{
bogdanm 92:4fc01daae5a5 53 */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup RNG
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 60
bogdanm 92:4fc01daae5a5 61 /**
bogdanm 92:4fc01daae5a5 62 * @brief RNG HAL State Structure definition
bogdanm 92:4fc01daae5a5 63 */
bogdanm 92:4fc01daae5a5 64 typedef enum
bogdanm 92:4fc01daae5a5 65 {
bogdanm 92:4fc01daae5a5 66 HAL_RNG_STATE_RESET = 0x00, /*!< RNG not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 67 HAL_RNG_STATE_READY = 0x01, /*!< RNG initialized and ready for use */
bogdanm 92:4fc01daae5a5 68 HAL_RNG_STATE_BUSY = 0x02, /*!< RNG internal process is ongoing */
bogdanm 92:4fc01daae5a5 69 HAL_RNG_STATE_TIMEOUT = 0x03, /*!< RNG timeout state */
bogdanm 92:4fc01daae5a5 70 HAL_RNG_STATE_ERROR = 0x04 /*!< RNG error state */
bogdanm 92:4fc01daae5a5 71
bogdanm 92:4fc01daae5a5 72 }HAL_RNG_StateTypeDef;
bogdanm 92:4fc01daae5a5 73
bogdanm 92:4fc01daae5a5 74 /**
bogdanm 92:4fc01daae5a5 75 * @brief RNG Handle Structure definition
bogdanm 92:4fc01daae5a5 76 */
bogdanm 92:4fc01daae5a5 77 typedef struct
bogdanm 92:4fc01daae5a5 78 {
bogdanm 92:4fc01daae5a5 79 RNG_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 HAL_LockTypeDef Lock; /*!< RNG locking object */
bogdanm 92:4fc01daae5a5 82
bogdanm 92:4fc01daae5a5 83 __IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 }RNG_HandleTypeDef;
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 88
bogdanm 92:4fc01daae5a5 89 /** @defgroup RNG_Exported_Constants
bogdanm 92:4fc01daae5a5 90 * @{
bogdanm 92:4fc01daae5a5 91 */
bogdanm 92:4fc01daae5a5 92
bogdanm 92:4fc01daae5a5 93 /** @defgroup RNG_Interrupt_definition
bogdanm 92:4fc01daae5a5 94 * @{
bogdanm 92:4fc01daae5a5 95 */
bogdanm 92:4fc01daae5a5 96 #define RNG_IT_CEI ((uint32_t)0x20) /*!< Clock error interrupt */
bogdanm 92:4fc01daae5a5 97 #define RNG_IT_SEI ((uint32_t)0x40) /*!< Seed error interrupt */
bogdanm 92:4fc01daae5a5 98
bogdanm 92:4fc01daae5a5 99 #define IS_RNG_IT(IT) (((IT) == RNG_IT_CEI) || \
bogdanm 92:4fc01daae5a5 100 ((IT) == RNG_IT_SEI))
bogdanm 92:4fc01daae5a5 101 /**
bogdanm 92:4fc01daae5a5 102 * @}
bogdanm 92:4fc01daae5a5 103 */
bogdanm 92:4fc01daae5a5 104
bogdanm 92:4fc01daae5a5 105
bogdanm 92:4fc01daae5a5 106 /** @defgroup RNG_Flag_definition
bogdanm 92:4fc01daae5a5 107 * @{
bogdanm 92:4fc01daae5a5 108 */
bogdanm 92:4fc01daae5a5 109 #define RNG_FLAG_DRDY ((uint32_t)0x0001) /*!< Data ready */
bogdanm 92:4fc01daae5a5 110 #define RNG_FLAG_CECS ((uint32_t)0x0002) /*!< Clock error current status */
bogdanm 92:4fc01daae5a5 111 #define RNG_FLAG_SECS ((uint32_t)0x0004) /*!< Seed error current status */
bogdanm 92:4fc01daae5a5 112
bogdanm 92:4fc01daae5a5 113 #define IS_RNG_FLAG(FLAG) (((FLAG) == RNG_FLAG_DRDY) || \
bogdanm 92:4fc01daae5a5 114 ((FLAG) == RNG_FLAG_CECS) || \
bogdanm 92:4fc01daae5a5 115 ((FLAG) == RNG_FLAG_SECS))
bogdanm 92:4fc01daae5a5 116 /**
bogdanm 92:4fc01daae5a5 117 * @}
bogdanm 92:4fc01daae5a5 118 */
bogdanm 92:4fc01daae5a5 119
bogdanm 92:4fc01daae5a5 120 /**
bogdanm 92:4fc01daae5a5 121 * @}
bogdanm 92:4fc01daae5a5 122 */
bogdanm 92:4fc01daae5a5 123
bogdanm 92:4fc01daae5a5 124 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 /** @brief Reset RNG handle state
bogdanm 92:4fc01daae5a5 127 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 128 * @retval None
bogdanm 92:4fc01daae5a5 129 */
bogdanm 92:4fc01daae5a5 130 #define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET)
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 /**
bogdanm 92:4fc01daae5a5 133 * @brief Enables the RNG peripheral.
bogdanm 92:4fc01daae5a5 134 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 135 * @retval None
bogdanm 92:4fc01daae5a5 136 */
bogdanm 92:4fc01daae5a5 137 #define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN)
bogdanm 92:4fc01daae5a5 138
bogdanm 92:4fc01daae5a5 139 /**
bogdanm 92:4fc01daae5a5 140 * @brief Disables the RNG peripheral.
bogdanm 92:4fc01daae5a5 141 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 142 * @retval None
bogdanm 92:4fc01daae5a5 143 */
bogdanm 92:4fc01daae5a5 144 #define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN)
bogdanm 92:4fc01daae5a5 145
bogdanm 92:4fc01daae5a5 146 /**
bogdanm 92:4fc01daae5a5 147 * @brief Gets the selected RNG's flag status.
bogdanm 92:4fc01daae5a5 148 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 149 * @param __FLAG__: RNG flag
bogdanm 92:4fc01daae5a5 150 * @retval The new state of RNG_FLAG (SET or RESET).
bogdanm 92:4fc01daae5a5 151 */
bogdanm 92:4fc01daae5a5 152 #define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 153
bogdanm 92:4fc01daae5a5 154 /**
bogdanm 92:4fc01daae5a5 155 * @brief Clears the RNG's pending flags.
bogdanm 92:4fc01daae5a5 156 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 157 * @param __FLAG__: RNG flag
bogdanm 92:4fc01daae5a5 158 * @retval None
bogdanm 92:4fc01daae5a5 159 */
bogdanm 92:4fc01daae5a5 160 #define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
bogdanm 92:4fc01daae5a5 161
bogdanm 92:4fc01daae5a5 162 /**
bogdanm 92:4fc01daae5a5 163 * @brief Enables the RNG interrupts.
bogdanm 92:4fc01daae5a5 164 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 165 * @retval None
bogdanm 92:4fc01daae5a5 166 */
bogdanm 92:4fc01daae5a5 167 #define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE)
bogdanm 92:4fc01daae5a5 168
bogdanm 92:4fc01daae5a5 169 /**
bogdanm 92:4fc01daae5a5 170 * @brief Disables the RNG interrupts.
bogdanm 92:4fc01daae5a5 171 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 172 * @retval None
bogdanm 92:4fc01daae5a5 173 */
bogdanm 92:4fc01daae5a5 174 #define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE)
bogdanm 92:4fc01daae5a5 175
bogdanm 92:4fc01daae5a5 176 /**
bogdanm 92:4fc01daae5a5 177 * @brief Checks whether the specified RNG interrupt has occurred or not.
bogdanm 92:4fc01daae5a5 178 * @param __HANDLE__: RNG Handle
bogdanm 92:4fc01daae5a5 179 * @param __INTERRUPT__: specifies the RNG interrupt source to check.
bogdanm 92:4fc01daae5a5 180 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 181 * @arg RNG_FLAG_DRDY: Data ready interrupt
bogdanm 92:4fc01daae5a5 182 * @arg RNG_FLAG_CECS: Clock error interrupt
bogdanm 92:4fc01daae5a5 183 * @arg RNG_FLAG_SECS: Seed error interrupt
bogdanm 92:4fc01daae5a5 184 * @retval The new state of RNG_FLAG (SET or RESET).
bogdanm 92:4fc01daae5a5 185 */
bogdanm 92:4fc01daae5a5 186 #define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 187
bogdanm 92:4fc01daae5a5 188 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 189
bogdanm 92:4fc01daae5a5 190 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 191 HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 192 HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 193 void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 194 void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 195
bogdanm 92:4fc01daae5a5 196 /* Peripheral Control functions ************************************************/
bogdanm 92:4fc01daae5a5 197 uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 198 uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 199 void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 200 void HAL_RNG_ReadyCallback(RNG_HandleTypeDef* hrng);
bogdanm 92:4fc01daae5a5 201 void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 202
bogdanm 92:4fc01daae5a5 203 /* Peripheral State functions **************************************************/
bogdanm 92:4fc01daae5a5 204 HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng);
bogdanm 92:4fc01daae5a5 205
bogdanm 92:4fc01daae5a5 206 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 92:4fc01daae5a5 207
bogdanm 92:4fc01daae5a5 208 /**
bogdanm 92:4fc01daae5a5 209 * @}
bogdanm 92:4fc01daae5a5 210 */
bogdanm 92:4fc01daae5a5 211
bogdanm 92:4fc01daae5a5 212 /**
bogdanm 92:4fc01daae5a5 213 * @}
bogdanm 92:4fc01daae5a5 214 */
bogdanm 92:4fc01daae5a5 215
bogdanm 92:4fc01daae5a5 216 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 217 }
bogdanm 92:4fc01daae5a5 218 #endif
bogdanm 92:4fc01daae5a5 219
bogdanm 92:4fc01daae5a5 220 #endif /* __STM32F4xx_HAL_RNG_H */
bogdanm 92:4fc01daae5a5 221
bogdanm 92:4fc01daae5a5 222 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/