Ricardo Benitez
meh
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mbed official
TARGET_NUCLEO_F103RB/stm32f10x_i2c.h@73:1efda918f0ba, 2013-12-09 (annotated)
- Committer:
- bogdanm
- Date:
- Mon Dec 09 18:43:03 2013 +0200
- Revision:
- 73:1efda918f0ba
- Child:
- 76:824293ae5e43
Release 73 of the mbed library
Main changes:
- added support for KL46Z and NUCLEO_F103RB
- STM32 USB device support
- various bug fixes
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 73:1efda918f0ba | 1 | /** |
| bogdanm | 73:1efda918f0ba | 2 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 3 | * @file stm32f10x_i2c.h |
| bogdanm | 73:1efda918f0ba | 4 | * @author MCD Application Team |
| bogdanm | 73:1efda918f0ba | 5 | * @version V3.5.0 |
| bogdanm | 73:1efda918f0ba | 6 | * @date 11-March-2011 |
| bogdanm | 73:1efda918f0ba | 7 | * @brief This file contains all the functions prototypes for the I2C firmware |
| bogdanm | 73:1efda918f0ba | 8 | * library. |
| bogdanm | 73:1efda918f0ba | 9 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 10 | * @attention |
| bogdanm | 73:1efda918f0ba | 11 | * |
| bogdanm | 73:1efda918f0ba | 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| bogdanm | 73:1efda918f0ba | 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
| bogdanm | 73:1efda918f0ba | 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
| bogdanm | 73:1efda918f0ba | 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
| bogdanm | 73:1efda918f0ba | 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
| bogdanm | 73:1efda918f0ba | 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
| bogdanm | 73:1efda918f0ba | 18 | * |
| bogdanm | 73:1efda918f0ba | 19 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
| bogdanm | 73:1efda918f0ba | 20 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 21 | */ |
| bogdanm | 73:1efda918f0ba | 22 | |
| bogdanm | 73:1efda918f0ba | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 24 | #ifndef __STM32F10x_I2C_H |
| bogdanm | 73:1efda918f0ba | 25 | #define __STM32F10x_I2C_H |
| bogdanm | 73:1efda918f0ba | 26 | |
| bogdanm | 73:1efda918f0ba | 27 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 28 | extern "C" { |
| bogdanm | 73:1efda918f0ba | 29 | #endif |
| bogdanm | 73:1efda918f0ba | 30 | |
| bogdanm | 73:1efda918f0ba | 31 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 32 | #include "stm32f10x.h" |
| bogdanm | 73:1efda918f0ba | 33 | |
| bogdanm | 73:1efda918f0ba | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver |
| bogdanm | 73:1efda918f0ba | 35 | * @{ |
| bogdanm | 73:1efda918f0ba | 36 | */ |
| bogdanm | 73:1efda918f0ba | 37 | |
| bogdanm | 73:1efda918f0ba | 38 | /** @addtogroup I2C |
| bogdanm | 73:1efda918f0ba | 39 | * @{ |
| bogdanm | 73:1efda918f0ba | 40 | */ |
| bogdanm | 73:1efda918f0ba | 41 | |
| bogdanm | 73:1efda918f0ba | 42 | /** @defgroup I2C_Exported_Types |
| bogdanm | 73:1efda918f0ba | 43 | * @{ |
| bogdanm | 73:1efda918f0ba | 44 | */ |
| bogdanm | 73:1efda918f0ba | 45 | |
| bogdanm | 73:1efda918f0ba | 46 | /** |
| bogdanm | 73:1efda918f0ba | 47 | * @brief I2C Init structure definition |
| bogdanm | 73:1efda918f0ba | 48 | */ |
| bogdanm | 73:1efda918f0ba | 49 | |
| bogdanm | 73:1efda918f0ba | 50 | typedef struct |
| bogdanm | 73:1efda918f0ba | 51 | { |
| bogdanm | 73:1efda918f0ba | 52 | uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency. |
| bogdanm | 73:1efda918f0ba | 53 | This parameter must be set to a value lower than 400kHz */ |
| bogdanm | 73:1efda918f0ba | 54 | |
| bogdanm | 73:1efda918f0ba | 55 | uint16_t I2C_Mode; /*!< Specifies the I2C mode. |
| bogdanm | 73:1efda918f0ba | 56 | This parameter can be a value of @ref I2C_mode */ |
| bogdanm | 73:1efda918f0ba | 57 | |
| bogdanm | 73:1efda918f0ba | 58 | uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
| bogdanm | 73:1efda918f0ba | 59 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
| bogdanm | 73:1efda918f0ba | 60 | |
| bogdanm | 73:1efda918f0ba | 61 | uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address. |
| bogdanm | 73:1efda918f0ba | 62 | This parameter can be a 7-bit or 10-bit address. */ |
| bogdanm | 73:1efda918f0ba | 63 | |
| bogdanm | 73:1efda918f0ba | 64 | uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement. |
| bogdanm | 73:1efda918f0ba | 65 | This parameter can be a value of @ref I2C_acknowledgement */ |
| bogdanm | 73:1efda918f0ba | 66 | |
| bogdanm | 73:1efda918f0ba | 67 | uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged. |
| bogdanm | 73:1efda918f0ba | 68 | This parameter can be a value of @ref I2C_acknowledged_address */ |
| bogdanm | 73:1efda918f0ba | 69 | }I2C_InitTypeDef; |
| bogdanm | 73:1efda918f0ba | 70 | |
| bogdanm | 73:1efda918f0ba | 71 | /** |
| bogdanm | 73:1efda918f0ba | 72 | * @} |
| bogdanm | 73:1efda918f0ba | 73 | */ |
| bogdanm | 73:1efda918f0ba | 74 | |
| bogdanm | 73:1efda918f0ba | 75 | |
| bogdanm | 73:1efda918f0ba | 76 | /** @defgroup I2C_Exported_Constants |
| bogdanm | 73:1efda918f0ba | 77 | * @{ |
| bogdanm | 73:1efda918f0ba | 78 | */ |
| bogdanm | 73:1efda918f0ba | 79 | |
| bogdanm | 73:1efda918f0ba | 80 | #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ |
| bogdanm | 73:1efda918f0ba | 81 | ((PERIPH) == I2C2)) |
| bogdanm | 73:1efda918f0ba | 82 | /** @defgroup I2C_mode |
| bogdanm | 73:1efda918f0ba | 83 | * @{ |
| bogdanm | 73:1efda918f0ba | 84 | */ |
| bogdanm | 73:1efda918f0ba | 85 | |
| bogdanm | 73:1efda918f0ba | 86 | #define I2C_Mode_I2C ((uint16_t)0x0000) |
| bogdanm | 73:1efda918f0ba | 87 | #define I2C_Mode_SMBusDevice ((uint16_t)0x0002) |
| bogdanm | 73:1efda918f0ba | 88 | #define I2C_Mode_SMBusHost ((uint16_t)0x000A) |
| bogdanm | 73:1efda918f0ba | 89 | #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ |
| bogdanm | 73:1efda918f0ba | 90 | ((MODE) == I2C_Mode_SMBusDevice) || \ |
| bogdanm | 73:1efda918f0ba | 91 | ((MODE) == I2C_Mode_SMBusHost)) |
| bogdanm | 73:1efda918f0ba | 92 | /** |
| bogdanm | 73:1efda918f0ba | 93 | * @} |
| bogdanm | 73:1efda918f0ba | 94 | */ |
| bogdanm | 73:1efda918f0ba | 95 | |
| bogdanm | 73:1efda918f0ba | 96 | /** @defgroup I2C_duty_cycle_in_fast_mode |
| bogdanm | 73:1efda918f0ba | 97 | * @{ |
| bogdanm | 73:1efda918f0ba | 98 | */ |
| bogdanm | 73:1efda918f0ba | 99 | |
| bogdanm | 73:1efda918f0ba | 100 | #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */ |
| bogdanm | 73:1efda918f0ba | 101 | #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */ |
| bogdanm | 73:1efda918f0ba | 102 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \ |
| bogdanm | 73:1efda918f0ba | 103 | ((CYCLE) == I2C_DutyCycle_2)) |
| bogdanm | 73:1efda918f0ba | 104 | /** |
| bogdanm | 73:1efda918f0ba | 105 | * @} |
| bogdanm | 73:1efda918f0ba | 106 | */ |
| bogdanm | 73:1efda918f0ba | 107 | |
| bogdanm | 73:1efda918f0ba | 108 | /** @defgroup I2C_acknowledgement |
| bogdanm | 73:1efda918f0ba | 109 | * @{ |
| bogdanm | 73:1efda918f0ba | 110 | */ |
| bogdanm | 73:1efda918f0ba | 111 | |
| bogdanm | 73:1efda918f0ba | 112 | #define I2C_Ack_Enable ((uint16_t)0x0400) |
| bogdanm | 73:1efda918f0ba | 113 | #define I2C_Ack_Disable ((uint16_t)0x0000) |
| bogdanm | 73:1efda918f0ba | 114 | #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ |
| bogdanm | 73:1efda918f0ba | 115 | ((STATE) == I2C_Ack_Disable)) |
| bogdanm | 73:1efda918f0ba | 116 | /** |
| bogdanm | 73:1efda918f0ba | 117 | * @} |
| bogdanm | 73:1efda918f0ba | 118 | */ |
| bogdanm | 73:1efda918f0ba | 119 | |
| bogdanm | 73:1efda918f0ba | 120 | /** @defgroup I2C_transfer_direction |
| bogdanm | 73:1efda918f0ba | 121 | * @{ |
| bogdanm | 73:1efda918f0ba | 122 | */ |
| bogdanm | 73:1efda918f0ba | 123 | |
| bogdanm | 73:1efda918f0ba | 124 | #define I2C_Direction_Transmitter ((uint8_t)0x00) |
| bogdanm | 73:1efda918f0ba | 125 | #define I2C_Direction_Receiver ((uint8_t)0x01) |
| bogdanm | 73:1efda918f0ba | 126 | #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ |
| bogdanm | 73:1efda918f0ba | 127 | ((DIRECTION) == I2C_Direction_Receiver)) |
| bogdanm | 73:1efda918f0ba | 128 | /** |
| bogdanm | 73:1efda918f0ba | 129 | * @} |
| bogdanm | 73:1efda918f0ba | 130 | */ |
| bogdanm | 73:1efda918f0ba | 131 | |
| bogdanm | 73:1efda918f0ba | 132 | /** @defgroup I2C_acknowledged_address |
| bogdanm | 73:1efda918f0ba | 133 | * @{ |
| bogdanm | 73:1efda918f0ba | 134 | */ |
| bogdanm | 73:1efda918f0ba | 135 | |
| bogdanm | 73:1efda918f0ba | 136 | #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) |
| bogdanm | 73:1efda918f0ba | 137 | #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) |
| bogdanm | 73:1efda918f0ba | 138 | #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ |
| bogdanm | 73:1efda918f0ba | 139 | ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) |
| bogdanm | 73:1efda918f0ba | 140 | /** |
| bogdanm | 73:1efda918f0ba | 141 | * @} |
| bogdanm | 73:1efda918f0ba | 142 | */ |
| bogdanm | 73:1efda918f0ba | 143 | |
| bogdanm | 73:1efda918f0ba | 144 | /** @defgroup I2C_registers |
| bogdanm | 73:1efda918f0ba | 145 | * @{ |
| bogdanm | 73:1efda918f0ba | 146 | */ |
| bogdanm | 73:1efda918f0ba | 147 | |
| bogdanm | 73:1efda918f0ba | 148 | #define I2C_Register_CR1 ((uint8_t)0x00) |
| bogdanm | 73:1efda918f0ba | 149 | #define I2C_Register_CR2 ((uint8_t)0x04) |
| bogdanm | 73:1efda918f0ba | 150 | #define I2C_Register_OAR1 ((uint8_t)0x08) |
| bogdanm | 73:1efda918f0ba | 151 | #define I2C_Register_OAR2 ((uint8_t)0x0C) |
| bogdanm | 73:1efda918f0ba | 152 | #define I2C_Register_DR ((uint8_t)0x10) |
| bogdanm | 73:1efda918f0ba | 153 | #define I2C_Register_SR1 ((uint8_t)0x14) |
| bogdanm | 73:1efda918f0ba | 154 | #define I2C_Register_SR2 ((uint8_t)0x18) |
| bogdanm | 73:1efda918f0ba | 155 | #define I2C_Register_CCR ((uint8_t)0x1C) |
| bogdanm | 73:1efda918f0ba | 156 | #define I2C_Register_TRISE ((uint8_t)0x20) |
| bogdanm | 73:1efda918f0ba | 157 | #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ |
| bogdanm | 73:1efda918f0ba | 158 | ((REGISTER) == I2C_Register_CR2) || \ |
| bogdanm | 73:1efda918f0ba | 159 | ((REGISTER) == I2C_Register_OAR1) || \ |
| bogdanm | 73:1efda918f0ba | 160 | ((REGISTER) == I2C_Register_OAR2) || \ |
| bogdanm | 73:1efda918f0ba | 161 | ((REGISTER) == I2C_Register_DR) || \ |
| bogdanm | 73:1efda918f0ba | 162 | ((REGISTER) == I2C_Register_SR1) || \ |
| bogdanm | 73:1efda918f0ba | 163 | ((REGISTER) == I2C_Register_SR2) || \ |
| bogdanm | 73:1efda918f0ba | 164 | ((REGISTER) == I2C_Register_CCR) || \ |
| bogdanm | 73:1efda918f0ba | 165 | ((REGISTER) == I2C_Register_TRISE)) |
| bogdanm | 73:1efda918f0ba | 166 | /** |
| bogdanm | 73:1efda918f0ba | 167 | * @} |
| bogdanm | 73:1efda918f0ba | 168 | */ |
| bogdanm | 73:1efda918f0ba | 169 | |
| bogdanm | 73:1efda918f0ba | 170 | /** @defgroup I2C_SMBus_alert_pin_level |
| bogdanm | 73:1efda918f0ba | 171 | * @{ |
| bogdanm | 73:1efda918f0ba | 172 | */ |
| bogdanm | 73:1efda918f0ba | 173 | |
| bogdanm | 73:1efda918f0ba | 174 | #define I2C_SMBusAlert_Low ((uint16_t)0x2000) |
| bogdanm | 73:1efda918f0ba | 175 | #define I2C_SMBusAlert_High ((uint16_t)0xDFFF) |
| bogdanm | 73:1efda918f0ba | 176 | #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \ |
| bogdanm | 73:1efda918f0ba | 177 | ((ALERT) == I2C_SMBusAlert_High)) |
| bogdanm | 73:1efda918f0ba | 178 | /** |
| bogdanm | 73:1efda918f0ba | 179 | * @} |
| bogdanm | 73:1efda918f0ba | 180 | */ |
| bogdanm | 73:1efda918f0ba | 181 | |
| bogdanm | 73:1efda918f0ba | 182 | /** @defgroup I2C_PEC_position |
| bogdanm | 73:1efda918f0ba | 183 | * @{ |
| bogdanm | 73:1efda918f0ba | 184 | */ |
| bogdanm | 73:1efda918f0ba | 185 | |
| bogdanm | 73:1efda918f0ba | 186 | #define I2C_PECPosition_Next ((uint16_t)0x0800) |
| bogdanm | 73:1efda918f0ba | 187 | #define I2C_PECPosition_Current ((uint16_t)0xF7FF) |
| bogdanm | 73:1efda918f0ba | 188 | #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \ |
| bogdanm | 73:1efda918f0ba | 189 | ((POSITION) == I2C_PECPosition_Current)) |
| bogdanm | 73:1efda918f0ba | 190 | /** |
| bogdanm | 73:1efda918f0ba | 191 | * @} |
| bogdanm | 73:1efda918f0ba | 192 | */ |
| bogdanm | 73:1efda918f0ba | 193 | |
| bogdanm | 73:1efda918f0ba | 194 | /** @defgroup I2C_NCAK_position |
| bogdanm | 73:1efda918f0ba | 195 | * @{ |
| bogdanm | 73:1efda918f0ba | 196 | */ |
| bogdanm | 73:1efda918f0ba | 197 | |
| bogdanm | 73:1efda918f0ba | 198 | #define I2C_NACKPosition_Next ((uint16_t)0x0800) |
| bogdanm | 73:1efda918f0ba | 199 | #define I2C_NACKPosition_Current ((uint16_t)0xF7FF) |
| bogdanm | 73:1efda918f0ba | 200 | #define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \ |
| bogdanm | 73:1efda918f0ba | 201 | ((POSITION) == I2C_NACKPosition_Current)) |
| bogdanm | 73:1efda918f0ba | 202 | /** |
| bogdanm | 73:1efda918f0ba | 203 | * @} |
| bogdanm | 73:1efda918f0ba | 204 | */ |
| bogdanm | 73:1efda918f0ba | 205 | |
| bogdanm | 73:1efda918f0ba | 206 | /** @defgroup I2C_interrupts_definition |
| bogdanm | 73:1efda918f0ba | 207 | * @{ |
| bogdanm | 73:1efda918f0ba | 208 | */ |
| bogdanm | 73:1efda918f0ba | 209 | |
| bogdanm | 73:1efda918f0ba | 210 | #define I2C_IT_BUF ((uint16_t)0x0400) |
| bogdanm | 73:1efda918f0ba | 211 | #define I2C_IT_EVT ((uint16_t)0x0200) |
| bogdanm | 73:1efda918f0ba | 212 | #define I2C_IT_ERR ((uint16_t)0x0100) |
| bogdanm | 73:1efda918f0ba | 213 | #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00)) |
| bogdanm | 73:1efda918f0ba | 214 | /** |
| bogdanm | 73:1efda918f0ba | 215 | * @} |
| bogdanm | 73:1efda918f0ba | 216 | */ |
| bogdanm | 73:1efda918f0ba | 217 | |
| bogdanm | 73:1efda918f0ba | 218 | /** @defgroup I2C_interrupts_definition |
| bogdanm | 73:1efda918f0ba | 219 | * @{ |
| bogdanm | 73:1efda918f0ba | 220 | */ |
| bogdanm | 73:1efda918f0ba | 221 | |
| bogdanm | 73:1efda918f0ba | 222 | #define I2C_IT_SMBALERT ((uint32_t)0x01008000) |
| bogdanm | 73:1efda918f0ba | 223 | #define I2C_IT_TIMEOUT ((uint32_t)0x01004000) |
| bogdanm | 73:1efda918f0ba | 224 | #define I2C_IT_PECERR ((uint32_t)0x01001000) |
| bogdanm | 73:1efda918f0ba | 225 | #define I2C_IT_OVR ((uint32_t)0x01000800) |
| bogdanm | 73:1efda918f0ba | 226 | #define I2C_IT_AF ((uint32_t)0x01000400) |
| bogdanm | 73:1efda918f0ba | 227 | #define I2C_IT_ARLO ((uint32_t)0x01000200) |
| bogdanm | 73:1efda918f0ba | 228 | #define I2C_IT_BERR ((uint32_t)0x01000100) |
| bogdanm | 73:1efda918f0ba | 229 | #define I2C_IT_TXE ((uint32_t)0x06000080) |
| bogdanm | 73:1efda918f0ba | 230 | #define I2C_IT_RXNE ((uint32_t)0x06000040) |
| bogdanm | 73:1efda918f0ba | 231 | #define I2C_IT_STOPF ((uint32_t)0x02000010) |
| bogdanm | 73:1efda918f0ba | 232 | #define I2C_IT_ADD10 ((uint32_t)0x02000008) |
| bogdanm | 73:1efda918f0ba | 233 | #define I2C_IT_BTF ((uint32_t)0x02000004) |
| bogdanm | 73:1efda918f0ba | 234 | #define I2C_IT_ADDR ((uint32_t)0x02000002) |
| bogdanm | 73:1efda918f0ba | 235 | #define I2C_IT_SB ((uint32_t)0x02000001) |
| bogdanm | 73:1efda918f0ba | 236 | |
| bogdanm | 73:1efda918f0ba | 237 | #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00)) |
| bogdanm | 73:1efda918f0ba | 238 | |
| bogdanm | 73:1efda918f0ba | 239 | #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \ |
| bogdanm | 73:1efda918f0ba | 240 | ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \ |
| bogdanm | 73:1efda918f0ba | 241 | ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \ |
| bogdanm | 73:1efda918f0ba | 242 | ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \ |
| bogdanm | 73:1efda918f0ba | 243 | ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \ |
| bogdanm | 73:1efda918f0ba | 244 | ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \ |
| bogdanm | 73:1efda918f0ba | 245 | ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB)) |
| bogdanm | 73:1efda918f0ba | 246 | /** |
| bogdanm | 73:1efda918f0ba | 247 | * @} |
| bogdanm | 73:1efda918f0ba | 248 | */ |
| bogdanm | 73:1efda918f0ba | 249 | |
| bogdanm | 73:1efda918f0ba | 250 | /** @defgroup I2C_flags_definition |
| bogdanm | 73:1efda918f0ba | 251 | * @{ |
| bogdanm | 73:1efda918f0ba | 252 | */ |
| bogdanm | 73:1efda918f0ba | 253 | |
| bogdanm | 73:1efda918f0ba | 254 | /** |
| bogdanm | 73:1efda918f0ba | 255 | * @brief SR2 register flags |
| bogdanm | 73:1efda918f0ba | 256 | */ |
| bogdanm | 73:1efda918f0ba | 257 | |
| bogdanm | 73:1efda918f0ba | 258 | #define I2C_FLAG_DUALF ((uint32_t)0x00800000) |
| bogdanm | 73:1efda918f0ba | 259 | #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) |
| bogdanm | 73:1efda918f0ba | 260 | #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) |
| bogdanm | 73:1efda918f0ba | 261 | #define I2C_FLAG_GENCALL ((uint32_t)0x00100000) |
| bogdanm | 73:1efda918f0ba | 262 | #define I2C_FLAG_TRA ((uint32_t)0x00040000) |
| bogdanm | 73:1efda918f0ba | 263 | #define I2C_FLAG_BUSY ((uint32_t)0x00020000) |
| bogdanm | 73:1efda918f0ba | 264 | #define I2C_FLAG_MSL ((uint32_t)0x00010000) |
| bogdanm | 73:1efda918f0ba | 265 | |
| bogdanm | 73:1efda918f0ba | 266 | /** |
| bogdanm | 73:1efda918f0ba | 267 | * @brief SR1 register flags |
| bogdanm | 73:1efda918f0ba | 268 | */ |
| bogdanm | 73:1efda918f0ba | 269 | |
| bogdanm | 73:1efda918f0ba | 270 | #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) |
| bogdanm | 73:1efda918f0ba | 271 | #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) |
| bogdanm | 73:1efda918f0ba | 272 | #define I2C_FLAG_PECERR ((uint32_t)0x10001000) |
| bogdanm | 73:1efda918f0ba | 273 | #define I2C_FLAG_OVR ((uint32_t)0x10000800) |
| bogdanm | 73:1efda918f0ba | 274 | #define I2C_FLAG_AF ((uint32_t)0x10000400) |
| bogdanm | 73:1efda918f0ba | 275 | #define I2C_FLAG_ARLO ((uint32_t)0x10000200) |
| bogdanm | 73:1efda918f0ba | 276 | #define I2C_FLAG_BERR ((uint32_t)0x10000100) |
| bogdanm | 73:1efda918f0ba | 277 | #define I2C_FLAG_TXE ((uint32_t)0x10000080) |
| bogdanm | 73:1efda918f0ba | 278 | #define I2C_FLAG_RXNE ((uint32_t)0x10000040) |
| bogdanm | 73:1efda918f0ba | 279 | #define I2C_FLAG_STOPF ((uint32_t)0x10000010) |
| bogdanm | 73:1efda918f0ba | 280 | #define I2C_FLAG_ADD10 ((uint32_t)0x10000008) |
| bogdanm | 73:1efda918f0ba | 281 | #define I2C_FLAG_BTF ((uint32_t)0x10000004) |
| bogdanm | 73:1efda918f0ba | 282 | #define I2C_FLAG_ADDR ((uint32_t)0x10000002) |
| bogdanm | 73:1efda918f0ba | 283 | #define I2C_FLAG_SB ((uint32_t)0x10000001) |
| bogdanm | 73:1efda918f0ba | 284 | |
| bogdanm | 73:1efda918f0ba | 285 | #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00)) |
| bogdanm | 73:1efda918f0ba | 286 | |
| bogdanm | 73:1efda918f0ba | 287 | #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \ |
| bogdanm | 73:1efda918f0ba | 288 | ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \ |
| bogdanm | 73:1efda918f0ba | 289 | ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \ |
| bogdanm | 73:1efda918f0ba | 290 | ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \ |
| bogdanm | 73:1efda918f0ba | 291 | ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \ |
| bogdanm | 73:1efda918f0ba | 292 | ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \ |
| bogdanm | 73:1efda918f0ba | 293 | ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \ |
| bogdanm | 73:1efda918f0ba | 294 | ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \ |
| bogdanm | 73:1efda918f0ba | 295 | ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \ |
| bogdanm | 73:1efda918f0ba | 296 | ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \ |
| bogdanm | 73:1efda918f0ba | 297 | ((FLAG) == I2C_FLAG_SB)) |
| bogdanm | 73:1efda918f0ba | 298 | /** |
| bogdanm | 73:1efda918f0ba | 299 | * @} |
| bogdanm | 73:1efda918f0ba | 300 | */ |
| bogdanm | 73:1efda918f0ba | 301 | |
| bogdanm | 73:1efda918f0ba | 302 | /** @defgroup I2C_Events |
| bogdanm | 73:1efda918f0ba | 303 | * @{ |
| bogdanm | 73:1efda918f0ba | 304 | */ |
| bogdanm | 73:1efda918f0ba | 305 | |
| bogdanm | 73:1efda918f0ba | 306 | /*======================================== |
| bogdanm | 73:1efda918f0ba | 307 | |
| bogdanm | 73:1efda918f0ba | 308 | I2C Master Events (Events grouped in order of communication) |
| bogdanm | 73:1efda918f0ba | 309 | ==========================================*/ |
| bogdanm | 73:1efda918f0ba | 310 | /** |
| bogdanm | 73:1efda918f0ba | 311 | * @brief Communication start |
| bogdanm | 73:1efda918f0ba | 312 | * |
| bogdanm | 73:1efda918f0ba | 313 | * After sending the START condition (I2C_GenerateSTART() function) the master |
| bogdanm | 73:1efda918f0ba | 314 | * has to wait for this event. It means that the Start condition has been correctly |
| bogdanm | 73:1efda918f0ba | 315 | * released on the I2C bus (the bus is free, no other devices is communicating). |
| bogdanm | 73:1efda918f0ba | 316 | * |
| bogdanm | 73:1efda918f0ba | 317 | */ |
| bogdanm | 73:1efda918f0ba | 318 | /* --EV5 */ |
| bogdanm | 73:1efda918f0ba | 319 | #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ |
| bogdanm | 73:1efda918f0ba | 320 | |
| bogdanm | 73:1efda918f0ba | 321 | /** |
| bogdanm | 73:1efda918f0ba | 322 | * @brief Address Acknowledge |
| bogdanm | 73:1efda918f0ba | 323 | * |
| bogdanm | 73:1efda918f0ba | 324 | * After checking on EV5 (start condition correctly released on the bus), the |
| bogdanm | 73:1efda918f0ba | 325 | * master sends the address of the slave(s) with which it will communicate |
| bogdanm | 73:1efda918f0ba | 326 | * (I2C_Send7bitAddress() function, it also determines the direction of the communication: |
| bogdanm | 73:1efda918f0ba | 327 | * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges |
| bogdanm | 73:1efda918f0ba | 328 | * his address. If an acknowledge is sent on the bus, one of the following events will |
| bogdanm | 73:1efda918f0ba | 329 | * be set: |
| bogdanm | 73:1efda918f0ba | 330 | * |
| bogdanm | 73:1efda918f0ba | 331 | * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED |
| bogdanm | 73:1efda918f0ba | 332 | * event is set. |
| bogdanm | 73:1efda918f0ba | 333 | * |
| bogdanm | 73:1efda918f0ba | 334 | * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED |
| bogdanm | 73:1efda918f0ba | 335 | * is set |
| bogdanm | 73:1efda918f0ba | 336 | * |
| bogdanm | 73:1efda918f0ba | 337 | * 3) In case of 10-Bit addressing mode, the master (just after generating the START |
| bogdanm | 73:1efda918f0ba | 338 | * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() |
| bogdanm | 73:1efda918f0ba | 339 | * function). Then master should wait on EV9. It means that the 10-bit addressing |
| bogdanm | 73:1efda918f0ba | 340 | * header has been correctly sent on the bus. Then master should send the second part of |
| bogdanm | 73:1efda918f0ba | 341 | * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master |
| bogdanm | 73:1efda918f0ba | 342 | * should wait for event EV6. |
| bogdanm | 73:1efda918f0ba | 343 | * |
| bogdanm | 73:1efda918f0ba | 344 | */ |
| bogdanm | 73:1efda918f0ba | 345 | |
| bogdanm | 73:1efda918f0ba | 346 | /* --EV6 */ |
| bogdanm | 73:1efda918f0ba | 347 | #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ |
| bogdanm | 73:1efda918f0ba | 348 | #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ |
| bogdanm | 73:1efda918f0ba | 349 | /* --EV9 */ |
| bogdanm | 73:1efda918f0ba | 350 | #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ |
| bogdanm | 73:1efda918f0ba | 351 | |
| bogdanm | 73:1efda918f0ba | 352 | /** |
| bogdanm | 73:1efda918f0ba | 353 | * @brief Communication events |
| bogdanm | 73:1efda918f0ba | 354 | * |
| bogdanm | 73:1efda918f0ba | 355 | * If a communication is established (START condition generated and slave address |
| bogdanm | 73:1efda918f0ba | 356 | * acknowledged) then the master has to check on one of the following events for |
| bogdanm | 73:1efda918f0ba | 357 | * communication procedures: |
| bogdanm | 73:1efda918f0ba | 358 | * |
| bogdanm | 73:1efda918f0ba | 359 | * 1) Master Receiver mode: The master has to wait on the event EV7 then to read |
| bogdanm | 73:1efda918f0ba | 360 | * the data received from the slave (I2C_ReceiveData() function). |
| bogdanm | 73:1efda918f0ba | 361 | * |
| bogdanm | 73:1efda918f0ba | 362 | * 2) Master Transmitter mode: The master has to send data (I2C_SendData() |
| bogdanm | 73:1efda918f0ba | 363 | * function) then to wait on event EV8 or EV8_2. |
| bogdanm | 73:1efda918f0ba | 364 | * These two events are similar: |
| bogdanm | 73:1efda918f0ba | 365 | * - EV8 means that the data has been written in the data register and is |
| bogdanm | 73:1efda918f0ba | 366 | * being shifted out. |
| bogdanm | 73:1efda918f0ba | 367 | * - EV8_2 means that the data has been physically shifted out and output |
| bogdanm | 73:1efda918f0ba | 368 | * on the bus. |
| bogdanm | 73:1efda918f0ba | 369 | * In most cases, using EV8 is sufficient for the application. |
| bogdanm | 73:1efda918f0ba | 370 | * Using EV8_2 leads to a slower communication but ensure more reliable test. |
| bogdanm | 73:1efda918f0ba | 371 | * EV8_2 is also more suitable than EV8 for testing on the last data transmission |
| bogdanm | 73:1efda918f0ba | 372 | * (before Stop condition generation). |
| bogdanm | 73:1efda918f0ba | 373 | * |
| bogdanm | 73:1efda918f0ba | 374 | * @note In case the user software does not guarantee that this event EV7 is |
| bogdanm | 73:1efda918f0ba | 375 | * managed before the current byte end of transfer, then user may check on EV7 |
| bogdanm | 73:1efda918f0ba | 376 | * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)). |
| bogdanm | 73:1efda918f0ba | 377 | * In this case the communication may be slower. |
| bogdanm | 73:1efda918f0ba | 378 | * |
| bogdanm | 73:1efda918f0ba | 379 | */ |
| bogdanm | 73:1efda918f0ba | 380 | |
| bogdanm | 73:1efda918f0ba | 381 | /* Master RECEIVER mode -----------------------------*/ |
| bogdanm | 73:1efda918f0ba | 382 | /* --EV7 */ |
| bogdanm | 73:1efda918f0ba | 383 | #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ |
| bogdanm | 73:1efda918f0ba | 384 | |
| bogdanm | 73:1efda918f0ba | 385 | /* Master TRANSMITTER mode --------------------------*/ |
| bogdanm | 73:1efda918f0ba | 386 | /* --EV8 */ |
| bogdanm | 73:1efda918f0ba | 387 | #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ |
| bogdanm | 73:1efda918f0ba | 388 | /* --EV8_2 */ |
| bogdanm | 73:1efda918f0ba | 389 | #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ |
| bogdanm | 73:1efda918f0ba | 390 | |
| bogdanm | 73:1efda918f0ba | 391 | |
| bogdanm | 73:1efda918f0ba | 392 | /*======================================== |
| bogdanm | 73:1efda918f0ba | 393 | |
| bogdanm | 73:1efda918f0ba | 394 | I2C Slave Events (Events grouped in order of communication) |
| bogdanm | 73:1efda918f0ba | 395 | ==========================================*/ |
| bogdanm | 73:1efda918f0ba | 396 | |
| bogdanm | 73:1efda918f0ba | 397 | /** |
| bogdanm | 73:1efda918f0ba | 398 | * @brief Communication start events |
| bogdanm | 73:1efda918f0ba | 399 | * |
| bogdanm | 73:1efda918f0ba | 400 | * Wait on one of these events at the start of the communication. It means that |
| bogdanm | 73:1efda918f0ba | 401 | * the I2C peripheral detected a Start condition on the bus (generated by master |
| bogdanm | 73:1efda918f0ba | 402 | * device) followed by the peripheral address. The peripheral generates an ACK |
| bogdanm | 73:1efda918f0ba | 403 | * condition on the bus (if the acknowledge feature is enabled through function |
| bogdanm | 73:1efda918f0ba | 404 | * I2C_AcknowledgeConfig()) and the events listed above are set : |
| bogdanm | 73:1efda918f0ba | 405 | * |
| bogdanm | 73:1efda918f0ba | 406 | * 1) In normal case (only one address managed by the slave), when the address |
| bogdanm | 73:1efda918f0ba | 407 | * sent by the master matches the own address of the peripheral (configured by |
| bogdanm | 73:1efda918f0ba | 408 | * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set |
| bogdanm | 73:1efda918f0ba | 409 | * (where XXX could be TRANSMITTER or RECEIVER). |
| bogdanm | 73:1efda918f0ba | 410 | * |
| bogdanm | 73:1efda918f0ba | 411 | * 2) In case the address sent by the master matches the second address of the |
| bogdanm | 73:1efda918f0ba | 412 | * peripheral (configured by the function I2C_OwnAddress2Config() and enabled |
| bogdanm | 73:1efda918f0ba | 413 | * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED |
| bogdanm | 73:1efda918f0ba | 414 | * (where XXX could be TRANSMITTER or RECEIVER) are set. |
| bogdanm | 73:1efda918f0ba | 415 | * |
| bogdanm | 73:1efda918f0ba | 416 | * 3) In case the address sent by the master is General Call (address 0x00) and |
| bogdanm | 73:1efda918f0ba | 417 | * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) |
| bogdanm | 73:1efda918f0ba | 418 | * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. |
| bogdanm | 73:1efda918f0ba | 419 | * |
| bogdanm | 73:1efda918f0ba | 420 | */ |
| bogdanm | 73:1efda918f0ba | 421 | |
| bogdanm | 73:1efda918f0ba | 422 | /* --EV1 (all the events below are variants of EV1) */ |
| bogdanm | 73:1efda918f0ba | 423 | /* 1) Case of One Single Address managed by the slave */ |
| bogdanm | 73:1efda918f0ba | 424 | #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ |
| bogdanm | 73:1efda918f0ba | 425 | #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ |
| bogdanm | 73:1efda918f0ba | 426 | |
| bogdanm | 73:1efda918f0ba | 427 | /* 2) Case of Dual address managed by the slave */ |
| bogdanm | 73:1efda918f0ba | 428 | #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ |
| bogdanm | 73:1efda918f0ba | 429 | #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ |
| bogdanm | 73:1efda918f0ba | 430 | |
| bogdanm | 73:1efda918f0ba | 431 | /* 3) Case of General Call enabled for the slave */ |
| bogdanm | 73:1efda918f0ba | 432 | #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ |
| bogdanm | 73:1efda918f0ba | 433 | |
| bogdanm | 73:1efda918f0ba | 434 | /** |
| bogdanm | 73:1efda918f0ba | 435 | * @brief Communication events |
| bogdanm | 73:1efda918f0ba | 436 | * |
| bogdanm | 73:1efda918f0ba | 437 | * Wait on one of these events when EV1 has already been checked and: |
| bogdanm | 73:1efda918f0ba | 438 | * |
| bogdanm | 73:1efda918f0ba | 439 | * - Slave RECEIVER mode: |
| bogdanm | 73:1efda918f0ba | 440 | * - EV2: When the application is expecting a data byte to be received. |
| bogdanm | 73:1efda918f0ba | 441 | * - EV4: When the application is expecting the end of the communication: master |
| bogdanm | 73:1efda918f0ba | 442 | * sends a stop condition and data transmission is stopped. |
| bogdanm | 73:1efda918f0ba | 443 | * |
| bogdanm | 73:1efda918f0ba | 444 | * - Slave Transmitter mode: |
| bogdanm | 73:1efda918f0ba | 445 | * - EV3: When a byte has been transmitted by the slave and the application is expecting |
| bogdanm | 73:1efda918f0ba | 446 | * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and |
| bogdanm | 73:1efda918f0ba | 447 | * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be |
| bogdanm | 73:1efda918f0ba | 448 | * used when the user software doesn't guarantee the EV3 is managed before the |
| bogdanm | 73:1efda918f0ba | 449 | * current byte end of transfer. |
| bogdanm | 73:1efda918f0ba | 450 | * - EV3_2: When the master sends a NACK in order to tell slave that data transmission |
| bogdanm | 73:1efda918f0ba | 451 | * shall end (before sending the STOP condition). In this case slave has to stop sending |
| bogdanm | 73:1efda918f0ba | 452 | * data bytes and expect a Stop condition on the bus. |
| bogdanm | 73:1efda918f0ba | 453 | * |
| bogdanm | 73:1efda918f0ba | 454 | * @note In case the user software does not guarantee that the event EV2 is |
| bogdanm | 73:1efda918f0ba | 455 | * managed before the current byte end of transfer, then user may check on EV2 |
| bogdanm | 73:1efda918f0ba | 456 | * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)). |
| bogdanm | 73:1efda918f0ba | 457 | * In this case the communication may be slower. |
| bogdanm | 73:1efda918f0ba | 458 | * |
| bogdanm | 73:1efda918f0ba | 459 | */ |
| bogdanm | 73:1efda918f0ba | 460 | |
| bogdanm | 73:1efda918f0ba | 461 | /* Slave RECEIVER mode --------------------------*/ |
| bogdanm | 73:1efda918f0ba | 462 | /* --EV2 */ |
| bogdanm | 73:1efda918f0ba | 463 | #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ |
| bogdanm | 73:1efda918f0ba | 464 | /* --EV4 */ |
| bogdanm | 73:1efda918f0ba | 465 | #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ |
| bogdanm | 73:1efda918f0ba | 466 | |
| bogdanm | 73:1efda918f0ba | 467 | /* Slave TRANSMITTER mode -----------------------*/ |
| bogdanm | 73:1efda918f0ba | 468 | /* --EV3 */ |
| bogdanm | 73:1efda918f0ba | 469 | #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ |
| bogdanm | 73:1efda918f0ba | 470 | #define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */ |
| bogdanm | 73:1efda918f0ba | 471 | /* --EV3_2 */ |
| bogdanm | 73:1efda918f0ba | 472 | #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ |
| bogdanm | 73:1efda918f0ba | 473 | |
| bogdanm | 73:1efda918f0ba | 474 | /*=========================== End of Events Description ==========================================*/ |
| bogdanm | 73:1efda918f0ba | 475 | |
| bogdanm | 73:1efda918f0ba | 476 | #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ |
| bogdanm | 73:1efda918f0ba | 477 | ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ |
| bogdanm | 73:1efda918f0ba | 478 | ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \ |
| bogdanm | 73:1efda918f0ba | 479 | ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \ |
| bogdanm | 73:1efda918f0ba | 480 | ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ |
| bogdanm | 73:1efda918f0ba | 481 | ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ |
| bogdanm | 73:1efda918f0ba | 482 | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \ |
| bogdanm | 73:1efda918f0ba | 483 | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \ |
| bogdanm | 73:1efda918f0ba | 484 | ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ |
| bogdanm | 73:1efda918f0ba | 485 | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \ |
| bogdanm | 73:1efda918f0ba | 486 | ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \ |
| bogdanm | 73:1efda918f0ba | 487 | ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ |
| bogdanm | 73:1efda918f0ba | 488 | ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ |
| bogdanm | 73:1efda918f0ba | 489 | ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ |
| bogdanm | 73:1efda918f0ba | 490 | ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ |
| bogdanm | 73:1efda918f0ba | 491 | ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ |
| bogdanm | 73:1efda918f0ba | 492 | ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ |
| bogdanm | 73:1efda918f0ba | 493 | ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ |
| bogdanm | 73:1efda918f0ba | 494 | ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \ |
| bogdanm | 73:1efda918f0ba | 495 | ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE)) |
| bogdanm | 73:1efda918f0ba | 496 | /** |
| bogdanm | 73:1efda918f0ba | 497 | * @} |
| bogdanm | 73:1efda918f0ba | 498 | */ |
| bogdanm | 73:1efda918f0ba | 499 | |
| bogdanm | 73:1efda918f0ba | 500 | /** @defgroup I2C_own_address1 |
| bogdanm | 73:1efda918f0ba | 501 | * @{ |
| bogdanm | 73:1efda918f0ba | 502 | */ |
| bogdanm | 73:1efda918f0ba | 503 | |
| bogdanm | 73:1efda918f0ba | 504 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF) |
| bogdanm | 73:1efda918f0ba | 505 | /** |
| bogdanm | 73:1efda918f0ba | 506 | * @} |
| bogdanm | 73:1efda918f0ba | 507 | */ |
| bogdanm | 73:1efda918f0ba | 508 | |
| bogdanm | 73:1efda918f0ba | 509 | /** @defgroup I2C_clock_speed |
| bogdanm | 73:1efda918f0ba | 510 | * @{ |
| bogdanm | 73:1efda918f0ba | 511 | */ |
| bogdanm | 73:1efda918f0ba | 512 | |
| bogdanm | 73:1efda918f0ba | 513 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000)) |
| bogdanm | 73:1efda918f0ba | 514 | /** |
| bogdanm | 73:1efda918f0ba | 515 | * @} |
| bogdanm | 73:1efda918f0ba | 516 | */ |
| bogdanm | 73:1efda918f0ba | 517 | |
| bogdanm | 73:1efda918f0ba | 518 | /** |
| bogdanm | 73:1efda918f0ba | 519 | * @} |
| bogdanm | 73:1efda918f0ba | 520 | */ |
| bogdanm | 73:1efda918f0ba | 521 | |
| bogdanm | 73:1efda918f0ba | 522 | /** @defgroup I2C_Exported_Macros |
| bogdanm | 73:1efda918f0ba | 523 | * @{ |
| bogdanm | 73:1efda918f0ba | 524 | */ |
| bogdanm | 73:1efda918f0ba | 525 | |
| bogdanm | 73:1efda918f0ba | 526 | /** |
| bogdanm | 73:1efda918f0ba | 527 | * @} |
| bogdanm | 73:1efda918f0ba | 528 | */ |
| bogdanm | 73:1efda918f0ba | 529 | |
| bogdanm | 73:1efda918f0ba | 530 | /** @defgroup I2C_Exported_Functions |
| bogdanm | 73:1efda918f0ba | 531 | * @{ |
| bogdanm | 73:1efda918f0ba | 532 | */ |
| bogdanm | 73:1efda918f0ba | 533 | |
| bogdanm | 73:1efda918f0ba | 534 | void I2C_DeInit(I2C_TypeDef* I2Cx); |
| bogdanm | 73:1efda918f0ba | 535 | void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); |
| bogdanm | 73:1efda918f0ba | 536 | void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); |
| bogdanm | 73:1efda918f0ba | 537 | void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 538 | void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 539 | void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 540 | void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 541 | void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 542 | void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 543 | void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); |
| bogdanm | 73:1efda918f0ba | 544 | void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 545 | void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 546 | void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 547 | void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); |
| bogdanm | 73:1efda918f0ba | 548 | uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); |
| bogdanm | 73:1efda918f0ba | 549 | void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); |
| bogdanm | 73:1efda918f0ba | 550 | uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); |
| bogdanm | 73:1efda918f0ba | 551 | void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 552 | void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition); |
| bogdanm | 73:1efda918f0ba | 553 | void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); |
| bogdanm | 73:1efda918f0ba | 554 | void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 555 | void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); |
| bogdanm | 73:1efda918f0ba | 556 | void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 557 | uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); |
| bogdanm | 73:1efda918f0ba | 558 | void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 559 | void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 560 | void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); |
| bogdanm | 73:1efda918f0ba | 561 | |
| bogdanm | 73:1efda918f0ba | 562 | /** |
| bogdanm | 73:1efda918f0ba | 563 | * @brief |
| bogdanm | 73:1efda918f0ba | 564 | **************************************************************************************** |
| bogdanm | 73:1efda918f0ba | 565 | * |
| bogdanm | 73:1efda918f0ba | 566 | * I2C State Monitoring Functions |
| bogdanm | 73:1efda918f0ba | 567 | * |
| bogdanm | 73:1efda918f0ba | 568 | **************************************************************************************** |
| bogdanm | 73:1efda918f0ba | 569 | * This I2C driver provides three different ways for I2C state monitoring |
| bogdanm | 73:1efda918f0ba | 570 | * depending on the application requirements and constraints: |
| bogdanm | 73:1efda918f0ba | 571 | * |
| bogdanm | 73:1efda918f0ba | 572 | * |
| bogdanm | 73:1efda918f0ba | 573 | * 1) Basic state monitoring: |
| bogdanm | 73:1efda918f0ba | 574 | * Using I2C_CheckEvent() function: |
| bogdanm | 73:1efda918f0ba | 575 | * It compares the status registers (SR1 and SR2) content to a given event |
| bogdanm | 73:1efda918f0ba | 576 | * (can be the combination of one or more flags). |
| bogdanm | 73:1efda918f0ba | 577 | * It returns SUCCESS if the current status includes the given flags |
| bogdanm | 73:1efda918f0ba | 578 | * and returns ERROR if one or more flags are missing in the current status. |
| bogdanm | 73:1efda918f0ba | 579 | * - When to use: |
| bogdanm | 73:1efda918f0ba | 580 | * - This function is suitable for most applications as well as for startup |
| bogdanm | 73:1efda918f0ba | 581 | * activity since the events are fully described in the product reference manual |
| bogdanm | 73:1efda918f0ba | 582 | * (RM0008). |
| bogdanm | 73:1efda918f0ba | 583 | * - It is also suitable for users who need to define their own events. |
| bogdanm | 73:1efda918f0ba | 584 | * - Limitations: |
| bogdanm | 73:1efda918f0ba | 585 | * - If an error occurs (ie. error flags are set besides to the monitored flags), |
| bogdanm | 73:1efda918f0ba | 586 | * the I2C_CheckEvent() function may return SUCCESS despite the communication |
| bogdanm | 73:1efda918f0ba | 587 | * hold or corrupted real state. |
| bogdanm | 73:1efda918f0ba | 588 | * In this case, it is advised to use error interrupts to monitor the error |
| bogdanm | 73:1efda918f0ba | 589 | * events and handle them in the interrupt IRQ handler. |
| bogdanm | 73:1efda918f0ba | 590 | * |
| bogdanm | 73:1efda918f0ba | 591 | * @note |
| bogdanm | 73:1efda918f0ba | 592 | * For error management, it is advised to use the following functions: |
| bogdanm | 73:1efda918f0ba | 593 | * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). |
| bogdanm | 73:1efda918f0ba | 594 | * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. |
| bogdanm | 73:1efda918f0ba | 595 | * Where x is the peripheral instance (I2C1, I2C2 ...) |
| bogdanm | 73:1efda918f0ba | 596 | * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() |
| bogdanm | 73:1efda918f0ba | 597 | * in order to determine which error occurred. |
| bogdanm | 73:1efda918f0ba | 598 | * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() |
| bogdanm | 73:1efda918f0ba | 599 | * and/or I2C_GenerateStop() in order to clear the error flag and source, |
| bogdanm | 73:1efda918f0ba | 600 | * and return to correct communication status. |
| bogdanm | 73:1efda918f0ba | 601 | * |
| bogdanm | 73:1efda918f0ba | 602 | * |
| bogdanm | 73:1efda918f0ba | 603 | * 2) Advanced state monitoring: |
| bogdanm | 73:1efda918f0ba | 604 | * Using the function I2C_GetLastEvent() which returns the image of both status |
| bogdanm | 73:1efda918f0ba | 605 | * registers in a single word (uint32_t) (Status Register 2 value is shifted left |
| bogdanm | 73:1efda918f0ba | 606 | * by 16 bits and concatenated to Status Register 1). |
| bogdanm | 73:1efda918f0ba | 607 | * - When to use: |
| bogdanm | 73:1efda918f0ba | 608 | * - This function is suitable for the same applications above but it allows to |
| bogdanm | 73:1efda918f0ba | 609 | * overcome the limitations of I2C_GetFlagStatus() function (see below). |
| bogdanm | 73:1efda918f0ba | 610 | * The returned value could be compared to events already defined in the |
| bogdanm | 73:1efda918f0ba | 611 | * library (stm32f10x_i2c.h) or to custom values defined by user. |
| bogdanm | 73:1efda918f0ba | 612 | * - This function is suitable when multiple flags are monitored at the same time. |
| bogdanm | 73:1efda918f0ba | 613 | * - At the opposite of I2C_CheckEvent() function, this function allows user to |
| bogdanm | 73:1efda918f0ba | 614 | * choose when an event is accepted (when all events flags are set and no |
| bogdanm | 73:1efda918f0ba | 615 | * other flags are set or just when the needed flags are set like |
| bogdanm | 73:1efda918f0ba | 616 | * I2C_CheckEvent() function). |
| bogdanm | 73:1efda918f0ba | 617 | * - Limitations: |
| bogdanm | 73:1efda918f0ba | 618 | * - User may need to define his own events. |
| bogdanm | 73:1efda918f0ba | 619 | * - Same remark concerning the error management is applicable for this |
| bogdanm | 73:1efda918f0ba | 620 | * function if user decides to check only regular communication flags (and |
| bogdanm | 73:1efda918f0ba | 621 | * ignores error flags). |
| bogdanm | 73:1efda918f0ba | 622 | * |
| bogdanm | 73:1efda918f0ba | 623 | * |
| bogdanm | 73:1efda918f0ba | 624 | * 3) Flag-based state monitoring: |
| bogdanm | 73:1efda918f0ba | 625 | * Using the function I2C_GetFlagStatus() which simply returns the status of |
| bogdanm | 73:1efda918f0ba | 626 | * one single flag (ie. I2C_FLAG_RXNE ...). |
| bogdanm | 73:1efda918f0ba | 627 | * - When to use: |
| bogdanm | 73:1efda918f0ba | 628 | * - This function could be used for specific applications or in debug phase. |
| bogdanm | 73:1efda918f0ba | 629 | * - It is suitable when only one flag checking is needed (most I2C events |
| bogdanm | 73:1efda918f0ba | 630 | * are monitored through multiple flags). |
| bogdanm | 73:1efda918f0ba | 631 | * - Limitations: |
| bogdanm | 73:1efda918f0ba | 632 | * - When calling this function, the Status register is accessed. Some flags are |
| bogdanm | 73:1efda918f0ba | 633 | * cleared when the status register is accessed. So checking the status |
| bogdanm | 73:1efda918f0ba | 634 | * of one Flag, may clear other ones. |
| bogdanm | 73:1efda918f0ba | 635 | * - Function may need to be called twice or more in order to monitor one |
| bogdanm | 73:1efda918f0ba | 636 | * single event. |
| bogdanm | 73:1efda918f0ba | 637 | * |
| bogdanm | 73:1efda918f0ba | 638 | */ |
| bogdanm | 73:1efda918f0ba | 639 | |
| bogdanm | 73:1efda918f0ba | 640 | /** |
| bogdanm | 73:1efda918f0ba | 641 | * |
| bogdanm | 73:1efda918f0ba | 642 | * 1) Basic state monitoring |
| bogdanm | 73:1efda918f0ba | 643 | ******************************************************************************* |
| bogdanm | 73:1efda918f0ba | 644 | */ |
| bogdanm | 73:1efda918f0ba | 645 | ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); |
| bogdanm | 73:1efda918f0ba | 646 | /** |
| bogdanm | 73:1efda918f0ba | 647 | * |
| bogdanm | 73:1efda918f0ba | 648 | * 2) Advanced state monitoring |
| bogdanm | 73:1efda918f0ba | 649 | ******************************************************************************* |
| bogdanm | 73:1efda918f0ba | 650 | */ |
| bogdanm | 73:1efda918f0ba | 651 | uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); |
| bogdanm | 73:1efda918f0ba | 652 | /** |
| bogdanm | 73:1efda918f0ba | 653 | * |
| bogdanm | 73:1efda918f0ba | 654 | * 3) Flag-based state monitoring |
| bogdanm | 73:1efda918f0ba | 655 | ******************************************************************************* |
| bogdanm | 73:1efda918f0ba | 656 | */ |
| bogdanm | 73:1efda918f0ba | 657 | FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); |
| bogdanm | 73:1efda918f0ba | 658 | /** |
| bogdanm | 73:1efda918f0ba | 659 | * |
| bogdanm | 73:1efda918f0ba | 660 | ******************************************************************************* |
| bogdanm | 73:1efda918f0ba | 661 | */ |
| bogdanm | 73:1efda918f0ba | 662 | |
| bogdanm | 73:1efda918f0ba | 663 | void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); |
| bogdanm | 73:1efda918f0ba | 664 | ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); |
| bogdanm | 73:1efda918f0ba | 665 | void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); |
| bogdanm | 73:1efda918f0ba | 666 | |
| bogdanm | 73:1efda918f0ba | 667 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 668 | } |
| bogdanm | 73:1efda918f0ba | 669 | #endif |
| bogdanm | 73:1efda918f0ba | 670 | |
| bogdanm | 73:1efda918f0ba | 671 | #endif /*__STM32F10x_I2C_H */ |
| bogdanm | 73:1efda918f0ba | 672 | /** |
| bogdanm | 73:1efda918f0ba | 673 | * @} |
| bogdanm | 73:1efda918f0ba | 674 | */ |
| bogdanm | 73:1efda918f0ba | 675 | |
| bogdanm | 73:1efda918f0ba | 676 | /** |
| bogdanm | 73:1efda918f0ba | 677 | * @} |
| bogdanm | 73:1efda918f0ba | 678 | */ |
| bogdanm | 73:1efda918f0ba | 679 | |
| bogdanm | 73:1efda918f0ba | 680 | /** |
| bogdanm | 73:1efda918f0ba | 681 | * @} |
| bogdanm | 73:1efda918f0ba | 682 | */ |
| bogdanm | 73:1efda918f0ba | 683 | |
| bogdanm | 73:1efda918f0ba | 684 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |