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TARGET_NUCLEO_F030R8/stm32f0xx_hal.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
90:cb3d968589d8
Child:
93:e188a91d3eaa
dgdgr

Who changed what in which revision?

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Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32f0xx_hal.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 03-Oct-2014
Kojto 90:cb3d968589d8 7 * @brief This file contains all the functions prototypes for the HAL
Kojto 90:cb3d968589d8 8 * module driver.
Kojto 90:cb3d968589d8 9 ******************************************************************************
Kojto 90:cb3d968589d8 10 * @attention
Kojto 90:cb3d968589d8 11 *
Kojto 90:cb3d968589d8 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 13 *
Kojto 90:cb3d968589d8 14 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 15 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 16 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 17 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 19 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 20 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 22 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 23 * without specific prior written permission.
Kojto 90:cb3d968589d8 24 *
Kojto 90:cb3d968589d8 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 35 *
Kojto 90:cb3d968589d8 36 ******************************************************************************
Kojto 90:cb3d968589d8 37 */
Kojto 90:cb3d968589d8 38
Kojto 90:cb3d968589d8 39 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 40 #ifndef __STM32F0xx_HAL_H
Kojto 90:cb3d968589d8 41 #define __STM32F0xx_HAL_H
Kojto 90:cb3d968589d8 42
Kojto 90:cb3d968589d8 43 #ifdef __cplusplus
Kojto 90:cb3d968589d8 44 extern "C" {
Kojto 90:cb3d968589d8 45 #endif
Kojto 90:cb3d968589d8 46
Kojto 90:cb3d968589d8 47 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 48 #include "stm32f0xx_hal_conf.h"
Kojto 90:cb3d968589d8 49
Kojto 90:cb3d968589d8 50 /** @addtogroup STM32F0xx_HAL_Driver
Kojto 90:cb3d968589d8 51 * @{
Kojto 90:cb3d968589d8 52 */
Kojto 90:cb3d968589d8 53
Kojto 90:cb3d968589d8 54 /** @addtogroup HAL
Kojto 90:cb3d968589d8 55 * @{
Kojto 90:cb3d968589d8 56 */
Kojto 90:cb3d968589d8 57
Kojto 90:cb3d968589d8 58 /* Exported types ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 59 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 60 /** @defgroup HAL_Exported_Constants HAL Exported Constants
Kojto 90:cb3d968589d8 61 * @{
Kojto 90:cb3d968589d8 62 */
Kojto 90:cb3d968589d8 63
Kojto 90:cb3d968589d8 64 #if defined(SYSCFG_CFGR1_DMA_RMP)
Kojto 90:cb3d968589d8 65 /** @defgroup HAL_DMA_remapping HAL DMA remapping
Kojto 90:cb3d968589d8 66 * Elements values convention: 0xYYYYYYYY
Kojto 90:cb3d968589d8 67 * - YYYYYYYY : Position in the SYSCFG register CFGR1
Kojto 90:cb3d968589d8 68 * @{
Kojto 90:cb3d968589d8 69 */
Kojto 90:cb3d968589d8 70 #define HAL_REMAPDMA_ADC_DMA_CH2 ((uint32_t)SYSCFG_CFGR1_ADC_DMA_RMP) /*!< ADC DMA remap
Kojto 90:cb3d968589d8 71 0: No remap (ADC DMA requests mapped on DMA channel 1
Kojto 90:cb3d968589d8 72 1: Remap (ADC DMA requests mapped on DMA channel 2 */
Kojto 90:cb3d968589d8 73 #define HAL_REMAPDMA_USART1_TX_DMA_CH4 ((uint32_t)SYSCFG_CFGR1_USART1TX_DMA_RMP) /*!< USART1 TX DMA remap
Kojto 90:cb3d968589d8 74 0: No remap (USART1_TX DMA request mapped on DMA channel 2
Kojto 90:cb3d968589d8 75 1: Remap (USART1_TX DMA request mapped on DMA channel 4 */
Kojto 90:cb3d968589d8 76 #define HAL_REMAPDMA_USART1_RX_DMA_CH5 ((uint32_t)SYSCFG_CFGR1_USART1RX_DMA_RMP) /*!< USART1 RX DMA remap
Kojto 90:cb3d968589d8 77 0: No remap (USART1_RX DMA request mapped on DMA channel 3
Kojto 90:cb3d968589d8 78 1: Remap (USART1_RX DMA request mapped on DMA channel 5 */
Kojto 90:cb3d968589d8 79 #define HAL_REMAPDMA_TIM16_DMA_CH4 ((uint32_t)SYSCFG_CFGR1_TIM16_DMA_RMP) /*!< TIM16 DMA request remap
Kojto 90:cb3d968589d8 80 0: No remap (TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 3)
Kojto 90:cb3d968589d8 81 1: Remap (TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 4) */
Kojto 90:cb3d968589d8 82 #define HAL_REMAPDMA_TIM17_DMA_CH2 ((uint32_t)SYSCFG_CFGR1_TIM17_DMA_RMP) /*!< TIM17 DMA request remap
Kojto 90:cb3d968589d8 83 0: No remap (TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 1
Kojto 90:cb3d968589d8 84 1: Remap (TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 2) */
Kojto 90:cb3d968589d8 85
Kojto 90:cb3d968589d8 86 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx)
Kojto 90:cb3d968589d8 87 #define HAL_REMAPDMA_TIM16_DMA_CH6 ((uint32_t)SYSCFG_CFGR1_TIM16_DMA_RMP2) /*!< TIM16 alternate DMA request remapping bit. Available on STM32F07x devices only
Kojto 90:cb3d968589d8 88 0: No alternate remap (TIM16 DMA requestsmapped according to TIM16_DMA_RMP bit)
Kojto 90:cb3d968589d8 89 1: Alternate remap (TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 6) */
Kojto 90:cb3d968589d8 90 #define HAL_REMAPDMA_TIM17_DMA_CH7 ((uint32_t)SYSCFG_CFGR1_TIM17_DMA_RMP2) /*!< TIM17 alternate DMA request remapping bit. Available on STM32F07x devices only
Kojto 90:cb3d968589d8 91 0: No alternate remap (TIM17 DMA requestsmapped according to TIM17_DMA_RMP bit)
Kojto 90:cb3d968589d8 92 1: Alternate remap (TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 7) */
Kojto 90:cb3d968589d8 93 #define HAL_REMAPDMA_SPI2_DMA_CH67 ((uint32_t)SYSCFG_CFGR1_SPI2_DMA_RMP) /*!< SPI2 DMA request remapping bit. Available on STM32F07x devices only.
Kojto 90:cb3d968589d8 94 0: No remap (SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 4 and 5 respectively)
Kojto 90:cb3d968589d8 95 1: 1: Remap (SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 6 and 7 respectively) */
Kojto 90:cb3d968589d8 96 #define HAL_REMAPDMA_USART2_DMA_CH67 ((uint32_t)SYSCFG_CFGR1_USART2_DMA_RMP) /*!< USART2 DMA request remapping bit. Available on STM32F07x devices only.
Kojto 90:cb3d968589d8 97 0: No remap (USART2_RX and USART2_TX DMA requests mapped on DMA channel 5 and 4 respectively)
Kojto 90:cb3d968589d8 98 1: 1: Remap (USART2_RX and USART2_TX DMA requests mapped on DMA channel 6 and 7 respectively) */
Kojto 90:cb3d968589d8 99 #define HAL_REMAPDMA_USART3_DMA_CH32 ((uint32_t)SYSCFG_CFGR1_USART3_DMA_RMP) /*!< USART3 DMA request remapping bit. Available on STM32F07x devices only.
Kojto 90:cb3d968589d8 100 0: No remap (USART3_RX and USART3_TX DMA requests mapped on DMA channel 6 and 7 respectively)
Kojto 90:cb3d968589d8 101 1: 1: Remap (USART3_RX and USART3_TX DMA requests mapped on DMA channel 3 and 2 respectively) */
Kojto 90:cb3d968589d8 102 #define HAL_REMAPDMA_I2C1_DMA_CH76 ((uint32_t)SYSCFG_CFGR1_I2C1_DMA_RMP) /*!< I2C1 DMA request remapping bit. Available on STM32F07x devices only.
Kojto 90:cb3d968589d8 103 0: No remap (I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 3 and 2 respectively)
Kojto 90:cb3d968589d8 104 1: Remap (I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 7 and 6 respectively) */
Kojto 90:cb3d968589d8 105 #define HAL_REMAPDMA_TIM1_DMA_CH6 ((uint32_t)SYSCFG_CFGR1_TIM1_DMA_RMP) /*!< TIM1 DMA request remapping bit. Available on STM32F07x devices only.
Kojto 90:cb3d968589d8 106 0: No remap (TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 2, 3 and 4 respectively)
Kojto 90:cb3d968589d8 107 1: Remap (TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 6 */
Kojto 90:cb3d968589d8 108 #define HAL_REMAPDMA_TIM2_DMA_CH7 ((uint32_t)SYSCFG_CFGR1_TIM2_DMA_RMP) /*!< TIM2 DMA request remapping bit. Available on STM32F07x devices only.
Kojto 90:cb3d968589d8 109 0: No remap (TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 3 and 4 respectively)
Kojto 90:cb3d968589d8 110 1: Remap (TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 7 */
Kojto 90:cb3d968589d8 111 #define HAL_REMAPDMA_TIM3_DMA_CH6 ((uint32_t)SYSCFG_CFGR1_TIM3_DMA_RMP) /*!< TIM3 DMA request remapping bit. Available on STM32F07x devices only.
Kojto 90:cb3d968589d8 112 0: No remap (TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 4)
Kojto 90:cb3d968589d8 113 1: Remap (TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 6) */
Kojto 90:cb3d968589d8 114 #endif
Kojto 90:cb3d968589d8 115
Kojto 90:cb3d968589d8 116 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx)
Kojto 90:cb3d968589d8 117 #define IS_HAL_REMAPDMA(RMP) (((RMP) == HAL_REMAPDMA_ADC_DMA_CH2) || \
Kojto 90:cb3d968589d8 118 ((RMP) == HAL_REMAPDMA_USART1_TX_DMA_CH4) || \
Kojto 90:cb3d968589d8 119 ((RMP) == HAL_REMAPDMA_USART1_RX_DMA_CH5) || \
Kojto 90:cb3d968589d8 120 ((RMP) == HAL_REMAPDMA_TIM16_DMA_CH4) || \
Kojto 90:cb3d968589d8 121 ((RMP) == HAL_REMAPDMA_TIM17_DMA_CH2) || \
Kojto 90:cb3d968589d8 122 ((RMP) == HAL_REMAPDMA_TIM16_DMA_CH6) || \
Kojto 90:cb3d968589d8 123 ((RMP) == HAL_REMAPDMA_TIM17_DMA_CH7) || \
Kojto 90:cb3d968589d8 124 ((RMP) == HAL_REMAPDMA_SPI2_DMA_CH67) || \
Kojto 90:cb3d968589d8 125 ((RMP) == HAL_REMAPDMA_USART2_DMA_CH67) || \
Kojto 90:cb3d968589d8 126 ((RMP) == HAL_REMAPDMA_USART3_DMA_CH32) || \
Kojto 90:cb3d968589d8 127 ((RMP) == HAL_REMAPDMA_I2C1_DMA_CH76) || \
Kojto 90:cb3d968589d8 128 ((RMP) == HAL_REMAPDMA_TIM1_DMA_CH6) || \
Kojto 90:cb3d968589d8 129 ((RMP) == HAL_REMAPDMA_TIM2_DMA_CH7) || \
Kojto 90:cb3d968589d8 130 ((RMP) == HAL_REMAPDMA_TIM3_DMA_CH6))
Kojto 90:cb3d968589d8 131 #else
Kojto 90:cb3d968589d8 132 #define IS_HAL_REMAPDMA(RMP) (((RMP) == HAL_REMAPDMA_ADC_DMA_CH2) || \
Kojto 90:cb3d968589d8 133 ((RMP) == HAL_REMAPDMA_USART1_TX_DMA_CH4) || \
Kojto 90:cb3d968589d8 134 ((RMP) == HAL_REMAPDMA_USART1_RX_DMA_CH5) || \
Kojto 90:cb3d968589d8 135 ((RMP) == HAL_REMAPDMA_TIM16_DMA_CH4) || \
Kojto 90:cb3d968589d8 136 ((RMP) == HAL_REMAPDMA_TIM17_DMA_CH2))
Kojto 90:cb3d968589d8 137 #endif
Kojto 90:cb3d968589d8 138 /**
Kojto 90:cb3d968589d8 139 * @}
Kojto 90:cb3d968589d8 140 */
Kojto 90:cb3d968589d8 141 #endif /* SYSCFG_CFGR1_DMA_RMP */
Kojto 90:cb3d968589d8 142
Kojto 90:cb3d968589d8 143 #if defined(SYSCFG_CFGR1_PA11_PA12_RMP)
Kojto 90:cb3d968589d8 144 /** @defgroup HAL_Pin_remapping HAL Pin remapping
Kojto 90:cb3d968589d8 145 * @{
Kojto 90:cb3d968589d8 146 */
Kojto 90:cb3d968589d8 147 #define HAL_REMAP_PA11_PA12 (SYSCFG_CFGR1_PA11_PA12_RMP) /*!< PA11 and PA12 remapping bit for small packages (28 and 20 pins).
Kojto 90:cb3d968589d8 148 0: No remap (pin pair PA9/10 mapped on the pins)
Kojto 90:cb3d968589d8 149 1: Remap (pin pair PA11/12 mapped instead of PA9/10) */
Kojto 90:cb3d968589d8 150
Kojto 90:cb3d968589d8 151 #define IS_HAL_REMAP_PIN(RMP) ((RMP) == HAL_REMAP_PA11_PA12)
Kojto 90:cb3d968589d8 152 /**
Kojto 90:cb3d968589d8 153 * @}
Kojto 90:cb3d968589d8 154 */
Kojto 90:cb3d968589d8 155 #endif /* SYSCFG_CFGR1_PA11_PA12_RMP */
Kojto 90:cb3d968589d8 156
Kojto 90:cb3d968589d8 157 #if defined(STM32F091xC)
Kojto 90:cb3d968589d8 158 /** @defgroup HAL_IRDA_ENV_SEL HAL IRDA Enveloppe Selection
Kojto 90:cb3d968589d8 159 * @{
Kojto 90:cb3d968589d8 160 */
Kojto 90:cb3d968589d8 161 #define HAL_SYSCFG_IRDA_ENV_SEL_TIM16 (SYSCFG_CFGR1_IRDA_ENV_SEL_0 & SYSCFG_CFGR1_IRDA_ENV_SEL_1) /* 00: Timer16 is selected as IRDA Modulation enveloppe source */
Kojto 90:cb3d968589d8 162 #define HAL_SYSCFG_IRDA_ENV_SEL_USART1 (SYSCFG_CFGR1_IRDA_ENV_SEL_0) /* 01: USART1 is selected as IRDA Modulation enveloppe source */
Kojto 90:cb3d968589d8 163 #define HAL_SYSCFG_IRDA_ENV_SEL_USART4 (SYSCFG_CFGR1_IRDA_ENV_SEL_1) /* 10: USART4 is selected as IRDA Modulation enveloppe source */
Kojto 90:cb3d968589d8 164
Kojto 90:cb3d968589d8 165 #define IS_HAL_SYSCFG_IRDA_ENV_SEL(SEL) (((SEL) == HAL_SYSCFG_IRDA_ENV_SEL_TIM16) || \
Kojto 90:cb3d968589d8 166 ((SEL) == HAL_SYSCFG_IRDA_ENV_SEL_USART1) || \
Kojto 90:cb3d968589d8 167 ((SEL) == HAL_SYSCFG_IRDA_ENV_SEL_USART4))
Kojto 90:cb3d968589d8 168 /**
Kojto 90:cb3d968589d8 169 * @}
Kojto 90:cb3d968589d8 170 */
Kojto 90:cb3d968589d8 171 #endif /* STM32F091xC */
Kojto 90:cb3d968589d8 172
Kojto 90:cb3d968589d8 173
Kojto 90:cb3d968589d8 174 /** @defgroup HAL_FastModePlus_I2C HAL FastModePlus I2C
Kojto 90:cb3d968589d8 175 * @{
Kojto 90:cb3d968589d8 176 */
Kojto 90:cb3d968589d8 177 #if defined(SYSCFG_CFGR1_I2C_FMP_PB6)
Kojto 90:cb3d968589d8 178 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 (SYSCFG_CFGR1_I2C_FMP_PB6) /*!< Fast Mode Plus (FM+) driving capability activation on the pad
Kojto 90:cb3d968589d8 179 0: PB6 pin operates in standard mode
Kojto 90:cb3d968589d8 180 1: I2C FM+ mode enabled on PB6 pin, and the Speed control is bypassed */
Kojto 90:cb3d968589d8 181 #endif /* SYSCFG_CFGR1_I2C_FMP_PB6 */
Kojto 90:cb3d968589d8 182
Kojto 90:cb3d968589d8 183 #if defined(SYSCFG_CFGR1_I2C_FMP_PB7)
Kojto 90:cb3d968589d8 184 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 (SYSCFG_CFGR1_I2C_FMP_PB7) /*!< Fast Mode Plus (FM+) driving capability activation on the pad
Kojto 90:cb3d968589d8 185 0: PB7 pin operates in standard mode
Kojto 90:cb3d968589d8 186 1: I2C FM+ mode enabled on PB7 pin, and the Speed control is bypassed */
Kojto 90:cb3d968589d8 187 #endif /* SYSCFG_CFGR1_I2C_FMP_PB7 */
Kojto 90:cb3d968589d8 188
Kojto 90:cb3d968589d8 189 #if defined(SYSCFG_CFGR1_I2C_FMP_PB8)
Kojto 90:cb3d968589d8 190 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 (SYSCFG_CFGR1_I2C_FMP_PB8) /*!< Fast Mode Plus (FM+) driving capability activation on the pad
Kojto 90:cb3d968589d8 191 0: PB8 pin operates in standard mode
Kojto 90:cb3d968589d8 192 1: I2C FM+ mode enabled on PB8 pin, and the Speed control is bypassed */
Kojto 90:cb3d968589d8 193 #endif /* SYSCFG_CFGR1_I2C_FMP_PB8 */
Kojto 90:cb3d968589d8 194
Kojto 90:cb3d968589d8 195 #if defined(SYSCFG_CFGR1_I2C_FMP_PB9)
Kojto 90:cb3d968589d8 196 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 (SYSCFG_CFGR1_I2C_FMP_PB9) /*!< Fast Mode Plus (FM+) driving capability activation on the pad
Kojto 90:cb3d968589d8 197 0: PB9 pin operates in standard mode
Kojto 90:cb3d968589d8 198 1: I2C FM+ mode enabled on PB9 pin, and the Speed control is bypassed */
Kojto 90:cb3d968589d8 199 #endif /* SYSCFG_CFGR1_I2C_FMP_PB9 */
Kojto 90:cb3d968589d8 200
Kojto 90:cb3d968589d8 201 #if defined(SYSCFG_CFGR1_I2C_FMP_I2C1)
Kojto 90:cb3d968589d8 202 #define HAL_SYSCFG_FASTMODEPLUS_I2C1 (SYSCFG_CFGR1_I2C_FMP_I2C1) /*!< I2C1 fast mode Plus driving capability activation
Kojto 90:cb3d968589d8 203 0: FM+ mode is not enabled on I2C1 pins selected through AF selection bits
Kojto 90:cb3d968589d8 204 1: FM+ mode is enabled on I2C1 pins selected through AF selection bits */
Kojto 90:cb3d968589d8 205 #endif /* SYSCFG_CFGR1_I2C_FMP_I2C1 */
Kojto 90:cb3d968589d8 206
Kojto 90:cb3d968589d8 207 #if defined(SYSCFG_CFGR1_I2C_FMP_I2C2)
Kojto 90:cb3d968589d8 208 #define HAL_SYSCFG_FASTMODEPLUS_I2C2 (SYSCFG_CFGR1_I2C_FMP_I2C2) /*!< I2C2 fast mode Plus driving capability activation
Kojto 90:cb3d968589d8 209 0: FM+ mode is not enabled on I2C2 pins selected through AF selection bits
Kojto 90:cb3d968589d8 210 1: FM+ mode is enabled on I2C2 pins selected through AF selection bits */
Kojto 90:cb3d968589d8 211 #endif /* SYSCFG_CFGR1_I2C_FMP_I2C2 */
Kojto 90:cb3d968589d8 212
Kojto 90:cb3d968589d8 213 #if defined(SYSCFG_CFGR1_I2C_FMP_PA9)
Kojto 90:cb3d968589d8 214 #define HAL_SYSCFG_FASTMODEPLUS_I2C2_PA9 (SYSCFG_CFGR1_I2C_FMP_PA9) /*!< Fast Mode Plus (FM+) driving capability activation on the pad
Kojto 90:cb3d968589d8 215 0: PA9 pin operates in standard mode
Kojto 90:cb3d968589d8 216 1: FM+ mode is enabled on PA9 pin, and the Speed control is bypassed */
Kojto 90:cb3d968589d8 217 #endif /* SYSCFG_CFGR1_I2C_FMP_PA9 */
Kojto 90:cb3d968589d8 218
Kojto 90:cb3d968589d8 219 #if defined(SYSCFG_CFGR1_I2C_FMP_PA10)
Kojto 90:cb3d968589d8 220 #define HAL_SYSCFG_FASTMODEPLUS_I2C2_PA10 (SYSCFG_CFGR1_I2C_FMP_PA10) /*!< Fast Mode Plus (FM+) driving capability activation on the pad
Kojto 90:cb3d968589d8 221 0: PA10 pin operates in standard mode
Kojto 90:cb3d968589d8 222 1: FM+ mode is enabled on PA10 pin, and the Speed control is bypassed */
Kojto 90:cb3d968589d8 223 #endif /* SYSCFG_CFGR1_I2C_FMP_PA10 */
Kojto 90:cb3d968589d8 224
Kojto 90:cb3d968589d8 225 #if defined(STM32F091xC)|| defined(STM32F098xx)
Kojto 90:cb3d968589d8 226 #define IS_HAL_SYSCFG_FASTMODEPLUS_CONFIG(CONFIG) (((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C1) || \
Kojto 90:cb3d968589d8 227 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C2) || \
Kojto 90:cb3d968589d8 228 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C2_PA9) || \
Kojto 90:cb3d968589d8 229 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C2_PA10) || \
Kojto 90:cb3d968589d8 230 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB6) || \
Kojto 90:cb3d968589d8 231 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB7) || \
Kojto 90:cb3d968589d8 232 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB8) || \
Kojto 90:cb3d968589d8 233 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB9))
Kojto 90:cb3d968589d8 234 #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)
Kojto 90:cb3d968589d8 235 #define IS_HAL_SYSCFG_FASTMODEPLUS_CONFIG(CONFIG) (((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C1) || \
Kojto 90:cb3d968589d8 236 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C2) || \
Kojto 90:cb3d968589d8 237 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB6) || \
Kojto 90:cb3d968589d8 238 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB7) || \
Kojto 90:cb3d968589d8 239 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB8) || \
Kojto 90:cb3d968589d8 240 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB9))
Kojto 90:cb3d968589d8 241 #elif defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx)
Kojto 90:cb3d968589d8 242 #define IS_HAL_SYSCFG_FASTMODEPLUS_CONFIG(CONFIG) (((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C1) || \
Kojto 90:cb3d968589d8 243 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C2_PA9) || \
Kojto 90:cb3d968589d8 244 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C2_PA10) || \
Kojto 90:cb3d968589d8 245 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB6) || \
Kojto 90:cb3d968589d8 246 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB7) || \
Kojto 90:cb3d968589d8 247 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB8) || \
Kojto 90:cb3d968589d8 248 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB9))
Kojto 90:cb3d968589d8 249 #elif defined(STM32F042x6) || defined(STM32F048xx)
Kojto 90:cb3d968589d8 250 #define IS_HAL_SYSCFG_FASTMODEPLUS_CONFIG(CONFIG) (((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C1) || \
Kojto 90:cb3d968589d8 251 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB6) || \
Kojto 90:cb3d968589d8 252 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB7) || \
Kojto 90:cb3d968589d8 253 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB8) || \
Kojto 90:cb3d968589d8 254 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB9))
Kojto 90:cb3d968589d8 255 #else
Kojto 90:cb3d968589d8 256 #define IS_HAL_SYSCFG_FASTMODEPLUS_CONFIG(CONFIG) (((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB6) || \
Kojto 90:cb3d968589d8 257 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB7) || \
Kojto 90:cb3d968589d8 258 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB8) || \
Kojto 90:cb3d968589d8 259 ((CONFIG) == HAL_SYSCFG_FASTMODEPLUS_I2C_PB9))
Kojto 90:cb3d968589d8 260 #endif
Kojto 90:cb3d968589d8 261
Kojto 90:cb3d968589d8 262 /**
Kojto 90:cb3d968589d8 263 * @}
Kojto 90:cb3d968589d8 264 */
Kojto 90:cb3d968589d8 265
Kojto 90:cb3d968589d8 266 #if defined(STM32F091xC) || defined (STM32F098xx)
Kojto 90:cb3d968589d8 267 /** @defgroup HAL_ISR_Wrapper HAL ISR Wrapper
Kojto 90:cb3d968589d8 268 * @{
Kojto 90:cb3d968589d8 269 */
Kojto 90:cb3d968589d8 270 #define HAL_SYSCFG_ITLINE0 ((uint32_t) 0x00000000)
Kojto 90:cb3d968589d8 271 #define HAL_SYSCFG_ITLINE1 ((uint32_t) 0x00000001)
Kojto 90:cb3d968589d8 272 #define HAL_SYSCFG_ITLINE2 ((uint32_t) 0x00000002)
Kojto 90:cb3d968589d8 273 #define HAL_SYSCFG_ITLINE3 ((uint32_t) 0x00000003)
Kojto 90:cb3d968589d8 274 #define HAL_SYSCFG_ITLINE4 ((uint32_t) 0x00000004)
Kojto 90:cb3d968589d8 275 #define HAL_SYSCFG_ITLINE5 ((uint32_t) 0x00000005)
Kojto 90:cb3d968589d8 276 #define HAL_SYSCFG_ITLINE6 ((uint32_t) 0x00000006)
Kojto 90:cb3d968589d8 277 #define HAL_SYSCFG_ITLINE7 ((uint32_t) 0x00000007)
Kojto 90:cb3d968589d8 278 #define HAL_SYSCFG_ITLINE8 ((uint32_t) 0x00000008)
Kojto 90:cb3d968589d8 279 #define HAL_SYSCFG_ITLINE9 ((uint32_t) 0x00000009)
Kojto 90:cb3d968589d8 280 #define HAL_SYSCFG_ITLINE10 ((uint32_t) 0x0000000A)
Kojto 90:cb3d968589d8 281 #define HAL_SYSCFG_ITLINE11 ((uint32_t) 0x0000000B)
Kojto 90:cb3d968589d8 282 #define HAL_SYSCFG_ITLINE12 ((uint32_t) 0x0000000C)
Kojto 90:cb3d968589d8 283 #define HAL_SYSCFG_ITLINE13 ((uint32_t) 0x0000000D)
Kojto 90:cb3d968589d8 284 #define HAL_SYSCFG_ITLINE14 ((uint32_t) 0x0000000E)
Kojto 90:cb3d968589d8 285 #define HAL_SYSCFG_ITLINE15 ((uint32_t) 0x0000000F)
Kojto 90:cb3d968589d8 286 #define HAL_SYSCFG_ITLINE16 ((uint32_t) 0x00000010)
Kojto 90:cb3d968589d8 287 #define HAL_SYSCFG_ITLINE17 ((uint32_t) 0x00000011)
Kojto 90:cb3d968589d8 288 #define HAL_SYSCFG_ITLINE18 ((uint32_t) 0x00000012)
Kojto 90:cb3d968589d8 289 #define HAL_SYSCFG_ITLINE19 ((uint32_t) 0x00000013)
Kojto 90:cb3d968589d8 290 #define HAL_SYSCFG_ITLINE20 ((uint32_t) 0x00000014)
Kojto 90:cb3d968589d8 291 #define HAL_SYSCFG_ITLINE21 ((uint32_t) 0x00000015)
Kojto 90:cb3d968589d8 292 #define HAL_SYSCFG_ITLINE22 ((uint32_t) 0x00000016)
Kojto 90:cb3d968589d8 293 #define HAL_SYSCFG_ITLINE23 ((uint32_t) 0x00000017)
Kojto 90:cb3d968589d8 294 #define HAL_SYSCFG_ITLINE24 ((uint32_t) 0x00000018)
Kojto 90:cb3d968589d8 295 #define HAL_SYSCFG_ITLINE25 ((uint32_t) 0x00000019)
Kojto 90:cb3d968589d8 296 #define HAL_SYSCFG_ITLINE26 ((uint32_t) 0x0000001A)
Kojto 90:cb3d968589d8 297 #define HAL_SYSCFG_ITLINE27 ((uint32_t) 0x0000001B)
Kojto 90:cb3d968589d8 298 #define HAL_SYSCFG_ITLINE28 ((uint32_t) 0x0000001C)
Kojto 90:cb3d968589d8 299 #define HAL_SYSCFG_ITLINE29 ((uint32_t) 0x0000001D)
Kojto 90:cb3d968589d8 300 #define HAL_SYSCFG_ITLINE30 ((uint32_t) 0x0000001E)
Kojto 90:cb3d968589d8 301 #define HAL_SYSCFG_ITLINE31 ((uint32_t) 0x0000001F)
Kojto 90:cb3d968589d8 302
Kojto 90:cb3d968589d8 303 #define HAL_ITLINE_EWDG ((uint32_t) ((HAL_SYSCFG_ITLINE0 << 0x18) | SYSCFG_ITLINE0_SR_EWDG)) /* EWDG has expired .... */
Kojto 90:cb3d968589d8 304 #if defined(STM32F091xC)
Kojto 90:cb3d968589d8 305 #define HAL_ITLINE_PVDOUT ((uint32_t) ((HAL_SYSCFG_ITLINE1 << 0x18) | SYSCFG_ITLINE1_SR_PVDOUT)) /* Power voltage detection Interrupt .... */
Kojto 90:cb3d968589d8 306 #endif
Kojto 90:cb3d968589d8 307 #define HAL_ITLINE_VDDIO2 ((uint32_t) ((HAL_SYSCFG_ITLINE1 << 0x18) | SYSCFG_ITLINE1_SR_VDDIO2)) /* VDDIO2 Interrupt .... */
Kojto 90:cb3d968589d8 308 #define HAL_ITLINE_RTC_WAKEUP ((uint32_t) ((HAL_SYSCFG_ITLINE2 << 0x18) | SYSCFG_ITLINE2_SR_RTC_WAKEUP)) /* RTC WAKEUP -> exti[20] Interrupt */
Kojto 90:cb3d968589d8 309 #define HAL_ITLINE_RTC_TSTAMP ((uint32_t) ((HAL_SYSCFG_ITLINE2 << 0x18) | SYSCFG_ITLINE2_SR_RTC_TSTAMP)) /* RTC Time Stamp -> exti[19] interrupt */
Kojto 90:cb3d968589d8 310 #define HAL_ITLINE_RTC_ALRA ((uint32_t) ((HAL_SYSCFG_ITLINE2 << 0x18) | SYSCFG_ITLINE2_SR_RTC_ALRA)) /* RTC Alarm -> exti[17] interrupt .... */
Kojto 90:cb3d968589d8 311 #define HAL_ITLINE_FLASH_ITF ((uint32_t) ((HAL_SYSCFG_ITLINE3 << 0x18) | SYSCFG_ITLINE3_SR_FLASH_ITF)) /* Flash ITF Interrupt */
Kojto 90:cb3d968589d8 312 #define HAL_ITLINE_CRS ((uint32_t) ((HAL_SYSCFG_ITLINE4 << 0x18) | SYSCFG_ITLINE4_SR_CRS)) /* CRS Interrupt */
Kojto 90:cb3d968589d8 313 #define HAL_ITLINE_CLK_CTRL ((uint32_t) ((HAL_SYSCFG_ITLINE4 << 0x18) | SYSCFG_ITLINE4_SR_CLK_CTRL)) /* CLK Control Interrupt */
Kojto 90:cb3d968589d8 314 #define HAL_ITLINE_EXTI0 ((uint32_t) ((HAL_SYSCFG_ITLINE5 << 0x18) | SYSCFG_ITLINE5_SR_EXTI0)) /* External Interrupt 0 */
Kojto 90:cb3d968589d8 315 #define HAL_ITLINE_EXTI1 ((uint32_t) ((HAL_SYSCFG_ITLINE5 << 0x18) | SYSCFG_ITLINE5_SR_EXTI1)) /* External Interrupt 1 */
Kojto 90:cb3d968589d8 316 #define HAL_ITLINE_EXTI2 ((uint32_t) ((HAL_SYSCFG_ITLINE6 << 0x18) | SYSCFG_ITLINE6_SR_EXTI2)) /* External Interrupt 2 */
Kojto 90:cb3d968589d8 317 #define HAL_ITLINE_EXTI3 ((uint32_t) ((HAL_SYSCFG_ITLINE6 << 0x18) | SYSCFG_ITLINE6_SR_EXTI3)) /* External Interrupt 3 */
Kojto 90:cb3d968589d8 318 #define HAL_ITLINE_EXTI4 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI4)) /* EXTI4 Interrupt */
Kojto 90:cb3d968589d8 319 #define HAL_ITLINE_EXTI5 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI5)) /* EXTI5 Interrupt */
Kojto 90:cb3d968589d8 320 #define HAL_ITLINE_EXTI6 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI6)) /* EXTI6 Interrupt */
Kojto 90:cb3d968589d8 321 #define HAL_ITLINE_EXTI7 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI7)) /* EXTI7 Interrupt */
Kojto 90:cb3d968589d8 322 #define HAL_ITLINE_EXTI8 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI8)) /* EXTI8 Interrupt */
Kojto 90:cb3d968589d8 323 #define HAL_ITLINE_EXTI9 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI9)) /* EXTI9 Interrupt */
Kojto 90:cb3d968589d8 324 #define HAL_ITLINE_EXTI10 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI10)) /* EXTI10 Interrupt */
Kojto 90:cb3d968589d8 325 #define HAL_ITLINE_EXTI11 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI11)) /* EXTI11 Interrupt */
Kojto 90:cb3d968589d8 326 #define HAL_ITLINE_EXTI12 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI12)) /* EXTI12 Interrupt */
Kojto 90:cb3d968589d8 327 #define HAL_ITLINE_EXTI13 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI13)) /* EXTI13 Interrupt */
Kojto 90:cb3d968589d8 328 #define HAL_ITLINE_EXTI14 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI14)) /* EXTI14 Interrupt */
Kojto 90:cb3d968589d8 329 #define HAL_ITLINE_EXTI15 ((uint32_t) ((HAL_SYSCFG_ITLINE7 << 0x18) | SYSCFG_ITLINE7_SR_EXTI15)) /* EXTI15 Interrupt */
Kojto 90:cb3d968589d8 330 #define HAL_ITLINE_TSC_EOA ((uint32_t) ((HAL_SYSCFG_ITLINE8 << 0x18) | SYSCFG_ITLINE8_SR_TSC_EOA)) /* Touch control EOA Interrupt */
Kojto 90:cb3d968589d8 331 #define HAL_ITLINE_TSC_MCE ((uint32_t) ((HAL_SYSCFG_ITLINE8 << 0x18) | SYSCFG_ITLINE8_SR_TSC_MCE)) /* Touch control MCE Interrupt */
Kojto 90:cb3d968589d8 332 #define HAL_ITLINE_DMA1_CH1 ((uint32_t) ((HAL_SYSCFG_ITLINE9 << 0x18) | SYSCFG_ITLINE9_SR_DMA1_CH1)) /* DMA1 Channel 1 Interrupt */
Kojto 90:cb3d968589d8 333 #define HAL_ITLINE_DMA1_CH2 ((uint32_t) ((HAL_SYSCFG_ITLINE10 << 0x18) | SYSCFG_ITLINE10_SR_DMA1_CH2)) /* DMA1 Channel 2 Interrupt */
Kojto 90:cb3d968589d8 334 #define HAL_ITLINE_DMA1_CH3 ((uint32_t) ((HAL_SYSCFG_ITLINE10 << 0x18) | SYSCFG_ITLINE10_SR_DMA1_CH3)) /* DMA1 Channel 3 Interrupt */
Kojto 90:cb3d968589d8 335 #define HAL_ITLINE_DMA2_CH1 ((uint32_t) ((HAL_SYSCFG_ITLINE10 << 0x18) | SYSCFG_ITLINE10_SR_DMA2_CH1)) /* DMA2 Channel 1 Interrupt */
Kojto 90:cb3d968589d8 336 #define HAL_ITLINE_DMA2_CH2 ((uint32_t) ((HAL_SYSCFG_ITLINE10 << 0x18) | SYSCFG_ITLINE10_SR_DMA2_CH2)) /* DMA2 Channel 2 Interrupt */
Kojto 90:cb3d968589d8 337 #define HAL_ITLINE_DMA1_CH4 ((uint32_t) ((HAL_SYSCFG_ITLINE11 << 0x18) | SYSCFG_ITLINE11_SR_DMA1_CH4)) /* DMA1 Channel 4 Interrupt */
Kojto 90:cb3d968589d8 338 #define HAL_ITLINE_DMA1_CH5 ((uint32_t) ((HAL_SYSCFG_ITLINE11 << 0x18) | SYSCFG_ITLINE11_SR_DMA1_CH5)) /* DMA1 Channel 5 Interrupt */
Kojto 90:cb3d968589d8 339 #define HAL_ITLINE_DMA1_CH6 ((uint32_t) ((HAL_SYSCFG_ITLINE11 << 0x18) | SYSCFG_ITLINE11_SR_DMA1_CH6)) /* DMA1 Channel 6 Interrupt */
Kojto 90:cb3d968589d8 340 #define HAL_ITLINE_DMA1_CH7 ((uint32_t) ((HAL_SYSCFG_ITLINE11 << 0x18) | SYSCFG_ITLINE11_SR_DMA1_CH7)) /* DMA1 Channel 7 Interrupt */
Kojto 90:cb3d968589d8 341 #define HAL_ITLINE_DMA2_CH3 ((uint32_t) ((HAL_SYSCFG_ITLINE11 << 0x18) | SYSCFG_ITLINE11_SR_DMA2_CH3)) /* DMA2 Channel 3 Interrupt */
Kojto 90:cb3d968589d8 342 #define HAL_ITLINE_DMA2_CH4 ((uint32_t) ((HAL_SYSCFG_ITLINE11 << 0x18) | SYSCFG_ITLINE11_SR_DMA2_CH4)) /* DMA2 Channel 4 Interrupt */
Kojto 90:cb3d968589d8 343 #define HAL_ITLINE_DMA2_CH5 ((uint32_t) ((HAL_SYSCFG_ITLINE11 << 0x18) | SYSCFG_ITLINE11_SR_DMA2_CH5)) /* DMA2 Channel 5 Interrupt */
Kojto 90:cb3d968589d8 344 #define HAL_ITLINE_ADC ((uint32_t) ((HAL_SYSCFG_ITLINE12 << 0x18) | SYSCFG_ITLINE12_SR_ADC)) /* ADC Interrupt */
Kojto 90:cb3d968589d8 345 #define HAL_ITLINE_COMP1 ((uint32_t) ((HAL_SYSCFG_ITLINE12 << 0x18) | SYSCFG_ITLINE12_SR_COMP1)) /* COMP1 Interrupt -> exti[21] */
Kojto 90:cb3d968589d8 346 #define HAL_ITLINE_COMP2 ((uint32_t) ((HAL_SYSCFG_ITLINE12 << 0x18) | SYSCFG_ITLINE12_SR_COMP2)) /* COMP2 Interrupt -> exti[21] */
Kojto 90:cb3d968589d8 347 #define HAL_ITLINE_TIM1_BRK ((uint32_t) ((HAL_SYSCFG_ITLINE13 << 0x18) | SYSCFG_ITLINE13_SR_TIM1_BRK)) /* TIM1 BRK Interrupt */
Kojto 90:cb3d968589d8 348 #define HAL_ITLINE_TIM1_UPD ((uint32_t) ((HAL_SYSCFG_ITLINE13 << 0x18) | SYSCFG_ITLINE13_SR_TIM1_UPD)) /* TIM1 UPD Interrupt */
Kojto 90:cb3d968589d8 349 #define HAL_ITLINE_TIM1_TRG ((uint32_t) ((HAL_SYSCFG_ITLINE13 << 0x18) | SYSCFG_ITLINE13_SR_TIM1_TRG)) /* TIM1 TRG Interrupt */
Kojto 90:cb3d968589d8 350 #define HAL_ITLINE_TIM1_CCU ((uint32_t) ((HAL_SYSCFG_ITLINE13 << 0x18) | SYSCFG_ITLINE13_SR_TIM1_CCU)) /* TIM1 CCU Interrupt */
Kojto 90:cb3d968589d8 351 #define HAL_ITLINE_TIM1_CC ((uint32_t) ((HAL_SYSCFG_ITLINE14 << 0x18) | SYSCFG_ITLINE14_SR_TIM1_CC)) /* TIM1 CC Interrupt */
Kojto 90:cb3d968589d8 352 #define HAL_ITLINE_TIM2 ((uint32_t) ((HAL_SYSCFG_ITLINE15 << 0x18) | SYSCFG_ITLINE15_SR_TIM2_GLB)) /* TIM2 Interrupt */
Kojto 90:cb3d968589d8 353 #define HAL_ITLINE_TIM3 ((uint32_t) ((HAL_SYSCFG_ITLINE16 << 0x18) | SYSCFG_ITLINE16_SR_TIM3_GLB)) /* TIM3 Interrupt */
Kojto 90:cb3d968589d8 354 #define HAL_ITLINE_DAC ((uint32_t) ((HAL_SYSCFG_ITLINE17 << 0x18) | SYSCFG_ITLINE17_SR_DAC)) /* DAC Interrupt */
Kojto 90:cb3d968589d8 355 #define HAL_ITLINE_TIM6 ((uint32_t) ((HAL_SYSCFG_ITLINE17 << 0x18) | SYSCFG_ITLINE17_SR_TIM6_GLB)) /* TIM6 Interrupt */
Kojto 90:cb3d968589d8 356 #define HAL_ITLINE_TIM7 ((uint32_t) ((HAL_SYSCFG_ITLINE18 << 0x18) | SYSCFG_ITLINE18_SR_TIM7_GLB)) /* TIM7 Interrupt */
Kojto 90:cb3d968589d8 357 #define HAL_ITLINE_TIM14 ((uint32_t) ((HAL_SYSCFG_ITLINE19 << 0x18) | SYSCFG_ITLINE19_SR_TIM14_GLB)) /* TIM14 Interrupt */
Kojto 90:cb3d968589d8 358 #define HAL_ITLINE_TIM15 ((uint32_t) ((HAL_SYSCFG_ITLINE20 << 0x18) | SYSCFG_ITLINE20_SR_TIM15_GLB)) /* TIM15 Interrupt */
Kojto 90:cb3d968589d8 359 #define HAL_ITLINE_TIM16 ((uint32_t) ((HAL_SYSCFG_ITLINE21 << 0x18) | SYSCFG_ITLINE21_SR_TIM16_GLB)) /* TIM16 Interrupt */
Kojto 90:cb3d968589d8 360 #define HAL_ITLINE_TIM17 ((uint32_t) ((HAL_SYSCFG_ITLINE22 << 0x18) | SYSCFG_ITLINE22_SR_TIM17_GLB)) /* TIM17 Interrupt */
Kojto 90:cb3d968589d8 361 #define HAL_ITLINE_I2C1 ((uint32_t) ((HAL_SYSCFG_ITLINE23 << 0x18) | SYSCFG_ITLINE23_SR_I2C1_GLB)) /* I2C1 Interrupt -> exti[23] */
Kojto 90:cb3d968589d8 362 #define HAL_ITLINE_I2C2 ((uint32_t) ((HAL_SYSCFG_ITLINE24 << 0x18) | SYSCFG_ITLINE24_SR_I2C2_GLB)) /* I2C2 Interrupt */
Kojto 90:cb3d968589d8 363 #define HAL_ITLINE_SPI1 ((uint32_t) ((HAL_SYSCFG_ITLINE25 << 0x18) | SYSCFG_ITLINE25_SR_SPI1)) /* I2C1 Interrupt -> exti[23] */
Kojto 90:cb3d968589d8 364 #define HAL_ITLINE_SPI2 ((uint32_t) ((HAL_SYSCFG_ITLINE26 << 0x18) | SYSCFG_ITLINE26_SR_SPI2)) /* SPI1 Interrupt */
Kojto 90:cb3d968589d8 365 #define HAL_ITLINE_USART1 ((uint32_t) ((HAL_SYSCFG_ITLINE27 << 0x18) | SYSCFG_ITLINE27_SR_USART1_GLB)) /*!< USART1 GLB Interrupt -> exti[25] */
Kojto 90:cb3d968589d8 366 #define HAL_ITLINE_USART2 ((uint32_t) ((HAL_SYSCFG_ITLINE28 << 0x18) | SYSCFG_ITLINE28_SR_USART2_GLB)) /*!< USART2 GLB Interrupt -> exti[26] */
Kojto 90:cb3d968589d8 367 #define HAL_ITLINE_USART3 ((uint32_t) ((HAL_SYSCFG_ITLINE29 << 0x18) | SYSCFG_ITLINE29_SR_USART3_GLB)) /* USART3 Interrupt .... */
Kojto 90:cb3d968589d8 368 #define HAL_ITLINE_USART4 ((uint32_t) ((HAL_SYSCFG_ITLINE29 << 0x18) | SYSCFG_ITLINE29_SR_USART4_GLB)) /* USART4 Interrupt .... */
Kojto 90:cb3d968589d8 369 #define HAL_ITLINE_USART5 ((uint32_t) ((HAL_SYSCFG_ITLINE29 << 0x18) | SYSCFG_ITLINE29_SR_USART5_GLB)) /* USART5 Interrupt .... */
Kojto 90:cb3d968589d8 370 #define HAL_ITLINE_USART6 ((uint32_t) ((HAL_SYSCFG_ITLINE29 << 0x18) | SYSCFG_ITLINE29_SR_USART6_GLB)) /* USART6 Interrupt .... */
Kojto 90:cb3d968589d8 371 #define HAL_ITLINE_USART7 ((uint32_t) ((HAL_SYSCFG_ITLINE29 << 0x18) | SYSCFG_ITLINE29_SR_USART7_GLB)) /* USART7 Interrupt .... */
Kojto 90:cb3d968589d8 372 #define HAL_ITLINE_USART8 ((uint32_t) ((HAL_SYSCFG_ITLINE29 << 0x18) | SYSCFG_ITLINE29_SR_USART8_GLB)) /* USART8 Interrupt .... */
Kojto 90:cb3d968589d8 373 #define HAL_ITLINE_CAN ((uint32_t) ((HAL_SYSCFG_ITLINE30 << 0x18) | SYSCFG_ITLINE30_SR_CAN)) /* CAN Interrupt */
Kojto 90:cb3d968589d8 374 #define HAL_ITLINE_CEC ((uint32_t) ((HAL_SYSCFG_ITLINE30 << 0x18) | SYSCFG_ITLINE30_SR_CEC)) /* CEC Interrupt -> exti[27] */
Kojto 90:cb3d968589d8 375 /**
Kojto 90:cb3d968589d8 376 * @}
Kojto 90:cb3d968589d8 377 */
Kojto 90:cb3d968589d8 378 #endif /* STM32F091xC || STM32F098xx */
Kojto 90:cb3d968589d8 379
Kojto 90:cb3d968589d8 380 /**
Kojto 90:cb3d968589d8 381 * @}
Kojto 90:cb3d968589d8 382 */
Kojto 90:cb3d968589d8 383
Kojto 90:cb3d968589d8 384 /* Exported macros -----------------------------------------------------------*/
Kojto 90:cb3d968589d8 385 /** @defgroup HAL_Exported_Macros HAL Exported Macros
Kojto 90:cb3d968589d8 386 * @{
Kojto 90:cb3d968589d8 387 */
Kojto 90:cb3d968589d8 388
Kojto 90:cb3d968589d8 389 /** @defgroup HAL_Freeze_Unfreeze_Peripherals HAL Freeze Unfreeze Peripherals
Kojto 90:cb3d968589d8 390 * @brief Freeze/Unfreeze Peripherals in Debug mode
Kojto 90:cb3d968589d8 391 * @{
Kojto 90:cb3d968589d8 392 */
Kojto 90:cb3d968589d8 393
Kojto 90:cb3d968589d8 394 #if defined(DBGMCU_APB1_FZ_DBG_CAN_STOP)
Kojto 90:cb3d968589d8 395 #define __HAL_FREEZE_CAN_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN_STOP))
Kojto 90:cb3d968589d8 396 #define __HAL_UNFREEZE_CAN_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN_STOP))
Kojto 90:cb3d968589d8 397 #endif /* DBGMCU_APB1_FZ_DBG_CAN_STOP */
Kojto 90:cb3d968589d8 398
Kojto 90:cb3d968589d8 399 #if defined(DBGMCU_APB1_FZ_DBG_RTC_STOP)
Kojto 90:cb3d968589d8 400 #define __HAL_FREEZE_RTC_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
Kojto 90:cb3d968589d8 401 #define __HAL_UNFREEZE_RTC_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
Kojto 90:cb3d968589d8 402 #endif /* DBGMCU_APB1_FZ_DBG_RTC_STOP */
Kojto 90:cb3d968589d8 403
Kojto 90:cb3d968589d8 404 #if defined(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
Kojto 90:cb3d968589d8 405 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
Kojto 90:cb3d968589d8 406 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
Kojto 90:cb3d968589d8 407 #endif /* DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT */
Kojto 90:cb3d968589d8 408
Kojto 90:cb3d968589d8 409 #if defined(DBGMCU_APB1_FZ_DBG_IWDG_STOP)
Kojto 90:cb3d968589d8 410 #define __HAL_FREEZE_IWDG_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
Kojto 90:cb3d968589d8 411 #define __HAL_UNFREEZE_IWDG_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
Kojto 90:cb3d968589d8 412 #endif /* DBGMCU_APB1_FZ_DBG_IWDG_STOP */
Kojto 90:cb3d968589d8 413
Kojto 90:cb3d968589d8 414 #if defined(DBGMCU_APB1_FZ_DBG_WWDG_STOP)
Kojto 90:cb3d968589d8 415 #define __HAL_FREEZE_WWDG_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
Kojto 90:cb3d968589d8 416 #define __HAL_UNFREEZE_WWDG_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
Kojto 90:cb3d968589d8 417 #endif /* DBGMCU_APB1_FZ_DBG_WWDG_STOP */
Kojto 90:cb3d968589d8 418
Kojto 90:cb3d968589d8 419 #if defined(DBGMCU_APB1_FZ_DBG_TIM2_STOP)
Kojto 90:cb3d968589d8 420 #define __HAL_FREEZE_TIM2_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
Kojto 90:cb3d968589d8 421 #define __HAL_UNFREEZE_TIM2_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
Kojto 90:cb3d968589d8 422 #endif /* DBGMCU_APB1_FZ_DBG_TIM2_STOP */
Kojto 90:cb3d968589d8 423
Kojto 90:cb3d968589d8 424 #if defined(DBGMCU_APB1_FZ_DBG_TIM3_STOP)
Kojto 90:cb3d968589d8 425 #define __HAL_FREEZE_TIM3_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
Kojto 90:cb3d968589d8 426 #define __HAL_UNFREEZE_TIM3_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
Kojto 90:cb3d968589d8 427 #endif /* DBGMCU_APB1_FZ_DBG_TIM3_STOP */
Kojto 90:cb3d968589d8 428
Kojto 90:cb3d968589d8 429 #if defined(DBGMCU_APB1_FZ_DBG_TIM6_STOP)
Kojto 90:cb3d968589d8 430 #define __HAL_FREEZE_TIM6_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
Kojto 90:cb3d968589d8 431 #define __HAL_UNFREEZE_TIM6_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
Kojto 90:cb3d968589d8 432 #endif /* DBGMCU_APB1_FZ_DBG_TIM6_STOP */
Kojto 90:cb3d968589d8 433
Kojto 90:cb3d968589d8 434 #if defined(DBGMCU_APB1_FZ_DBG_TIM7_STOP)
Kojto 90:cb3d968589d8 435 #define __HAL_FREEZE_TIM7_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
Kojto 90:cb3d968589d8 436 #define __HAL_UNFREEZE_TIM7_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
Kojto 90:cb3d968589d8 437 #endif /* DBGMCU_APB1_FZ_DBG_TIM7_STOP */
Kojto 90:cb3d968589d8 438
Kojto 90:cb3d968589d8 439 #if defined(DBGMCU_APB1_FZ_DBG_TIM14_STOP)
Kojto 90:cb3d968589d8 440 #define __HAL_FREEZE_TIM14_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
Kojto 90:cb3d968589d8 441 #define __HAL_UNFREEZE_TIM14_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
Kojto 90:cb3d968589d8 442 #endif /* DBGMCU_APB1_FZ_DBG_TIM14_STOP */
Kojto 90:cb3d968589d8 443
Kojto 90:cb3d968589d8 444 #if defined(DBGMCU_APB2_FZ_DBG_TIM1_STOP)
Kojto 90:cb3d968589d8 445 #define __HAL_FREEZE_TIM1_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
Kojto 90:cb3d968589d8 446 #define __HAL_UNFREEZE_TIM1_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
Kojto 90:cb3d968589d8 447 #endif /* DBGMCU_APB2_FZ_DBG_TIM1_STOP */
Kojto 90:cb3d968589d8 448
Kojto 90:cb3d968589d8 449 #if defined(DBGMCU_APB2_FZ_DBG_TIM15_STOP)
Kojto 90:cb3d968589d8 450 #define __HAL_FREEZE_TIM15_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM15_STOP))
Kojto 90:cb3d968589d8 451 #define __HAL_UNFREEZE_TIM15_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM15_STOP))
Kojto 90:cb3d968589d8 452 #endif /* DBGMCU_APB2_FZ_DBG_TIM15_STOP */
Kojto 90:cb3d968589d8 453
Kojto 90:cb3d968589d8 454 #if defined(DBGMCU_APB2_FZ_DBG_TIM16_STOP)
Kojto 90:cb3d968589d8 455 #define __HAL_FREEZE_TIM16_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM16_STOP))
Kojto 90:cb3d968589d8 456 #define __HAL_UNFREEZE_TIM16_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM16_STOP))
Kojto 90:cb3d968589d8 457 #endif /* DBGMCU_APB2_FZ_DBG_TIM16_STOP */
Kojto 90:cb3d968589d8 458
Kojto 90:cb3d968589d8 459 #if defined(DBGMCU_APB2_FZ_DBG_TIM17_STOP)
Kojto 90:cb3d968589d8 460 #define __HAL_FREEZE_TIM17_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM17_STOP))
Kojto 90:cb3d968589d8 461 #define __HAL_UNFREEZE_TIM17_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM17_STOP))
Kojto 90:cb3d968589d8 462 #endif /* DBGMCU_APB2_FZ_DBG_TIM17_STOP */
Kojto 90:cb3d968589d8 463
Kojto 90:cb3d968589d8 464 /**
Kojto 90:cb3d968589d8 465 * @}
Kojto 90:cb3d968589d8 466 */
Kojto 90:cb3d968589d8 467
Kojto 90:cb3d968589d8 468 /** @defgroup Memory_Mapping_Selection Memory Mapping Selection
Kojto 90:cb3d968589d8 469 * @{
Kojto 90:cb3d968589d8 470 */
Kojto 90:cb3d968589d8 471 #if defined(SYSCFG_CFGR1_MEM_MODE)
Kojto 90:cb3d968589d8 472 /** @brief Main Flash memory mapped at 0x00000000
Kojto 90:cb3d968589d8 473 */
Kojto 90:cb3d968589d8 474 #define __HAL_REMAPMEMORY_FLASH() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE))
Kojto 90:cb3d968589d8 475 #endif /* SYSCFG_CFGR1_MEM_MODE */
Kojto 90:cb3d968589d8 476
Kojto 90:cb3d968589d8 477 #if defined(SYSCFG_CFGR1_MEM_MODE_0)
Kojto 90:cb3d968589d8 478 /** @brief System Flash memory mapped at 0x00000000
Kojto 90:cb3d968589d8 479 */
Kojto 90:cb3d968589d8 480 #define __HAL_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
Kojto 90:cb3d968589d8 481 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE_0; \
Kojto 90:cb3d968589d8 482 }while(0)
Kojto 90:cb3d968589d8 483 #endif /* SYSCFG_CFGR1_MEM_MODE_0 */
Kojto 90:cb3d968589d8 484
Kojto 90:cb3d968589d8 485 #if defined(SYSCFG_CFGR1_MEM_MODE_0) && defined(SYSCFG_CFGR1_MEM_MODE_1)
Kojto 90:cb3d968589d8 486 /** @brief Embedded SRAM mapped at 0x00000000
Kojto 90:cb3d968589d8 487 */
Kojto 90:cb3d968589d8 488 #define __HAL_REMAPMEMORY_SRAM() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
Kojto 90:cb3d968589d8 489 SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1); \
Kojto 90:cb3d968589d8 490 }while(0)
Kojto 90:cb3d968589d8 491 #endif /* SYSCFG_CFGR1_MEM_MODE_0 && SYSCFG_CFGR1_MEM_MODE_1 */
Kojto 90:cb3d968589d8 492 /**
Kojto 90:cb3d968589d8 493 * @}
Kojto 90:cb3d968589d8 494 */
Kojto 90:cb3d968589d8 495
Kojto 90:cb3d968589d8 496 #if defined(SYSCFG_CFGR1_DMA_RMP)
Kojto 90:cb3d968589d8 497 /** @defgroup HAL_DMA_remap HAL DMA remap
Kojto 90:cb3d968589d8 498 * @brief DMA remapping enable/disable macros
Kojto 90:cb3d968589d8 499 * @param __DMA_REMAP__: This parameter can be a value of @ref HAL_DMA_remapping
Kojto 90:cb3d968589d8 500 * @{
Kojto 90:cb3d968589d8 501 */
Kojto 90:cb3d968589d8 502 #define __HAL_REMAPDMA_CHANNEL_ENABLE(__DMA_REMAP__) do {assert_param(IS_HAL_REMAPDMA((__DMA_REMAP__))); \
Kojto 90:cb3d968589d8 503 SYSCFG->CFGR1 |= (__DMA_REMAP__); \
Kojto 90:cb3d968589d8 504 }while(0)
Kojto 90:cb3d968589d8 505 #define __HAL_REMAPDMA_CHANNEL_DISABLE(__DMA_REMAP__) do {assert_param(IS_HAL_REMAPDMA((__DMA_REMAP__))); \
Kojto 90:cb3d968589d8 506 SYSCFG->CFGR1 &= ~(__DMA_REMAP__); \
Kojto 90:cb3d968589d8 507 }while(0)
Kojto 90:cb3d968589d8 508 /**
Kojto 90:cb3d968589d8 509 * @}
Kojto 90:cb3d968589d8 510 */
Kojto 90:cb3d968589d8 511 #endif /* SYSCFG_CFGR1_DMA_RMP */
Kojto 90:cb3d968589d8 512
Kojto 90:cb3d968589d8 513 #if defined(SYSCFG_CFGR1_PA11_PA12_RMP)
Kojto 90:cb3d968589d8 514 /** @defgroup HAL_Pin_remap HAL Pin remap
Kojto 90:cb3d968589d8 515 * @brief Pin remapping enable/disable macros
Kojto 90:cb3d968589d8 516 * @param __PIN_REMAP__: This parameter can be a value of @ref HAL_Pin_remapping
Kojto 90:cb3d968589d8 517 * @{
Kojto 90:cb3d968589d8 518 */
Kojto 90:cb3d968589d8 519 #define __HAL_REMAP_PIN_ENABLE(__PIN_REMAP__) do {assert_param(IS_HAL_REMAP_PIN((__PIN_REMAP__))); \
Kojto 90:cb3d968589d8 520 SYSCFG->CFGR1 |= (__PIN_REMAP__); \
Kojto 90:cb3d968589d8 521 }while(0)
Kojto 90:cb3d968589d8 522 #define __HAL_REMAP_PIN_DISABLE(__PIN_REMAP__) do {assert_param(IS_HAL_REMAP_PIN((__PIN_REMAP__))); \
Kojto 90:cb3d968589d8 523 SYSCFG->CFGR1 &= ~(__PIN_REMAP__); \
Kojto 90:cb3d968589d8 524 }while(0)
Kojto 90:cb3d968589d8 525 /**
Kojto 90:cb3d968589d8 526 * @}
Kojto 90:cb3d968589d8 527 */
Kojto 90:cb3d968589d8 528 #endif /* SYSCFG_CFGR1_PA11_PA12_RMP */
Kojto 90:cb3d968589d8 529
Kojto 90:cb3d968589d8 530 /** @defgroup HAL_Fast_mode_plus_driving_cap HAL Fast mode plus driving cap
Kojto 90:cb3d968589d8 531 * @brief Fast mode Plus driving capability enable/disable macros
Kojto 90:cb3d968589d8 532 * @param __FASTMODEPLUS__: This parameter can be a value of @ref HAL_FastModePlus_I2C
Kojto 90:cb3d968589d8 533 * @{
Kojto 90:cb3d968589d8 534 */
Kojto 90:cb3d968589d8 535 #define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_HAL_SYSCFG_FASTMODEPLUS_CONFIG((__FASTMODEPLUS__))); \
Kojto 90:cb3d968589d8 536 SYSCFG->CFGR1 |= (__FASTMODEPLUS__); \
Kojto 90:cb3d968589d8 537 }while(0)
Kojto 90:cb3d968589d8 538
Kojto 90:cb3d968589d8 539 #define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_HAL_SYSCFG_FASTMODEPLUS_CONFIG((__FASTMODEPLUS__))); \
Kojto 90:cb3d968589d8 540 SYSCFG->CFGR1 &= ~(__FASTMODEPLUS__); \
Kojto 90:cb3d968589d8 541 }while(0)
Kojto 90:cb3d968589d8 542 /**
Kojto 90:cb3d968589d8 543 * @}
Kojto 90:cb3d968589d8 544 */
Kojto 90:cb3d968589d8 545
Kojto 90:cb3d968589d8 546 #if defined(SYSCFG_CFGR2_LOCKUP_LOCK)
Kojto 90:cb3d968589d8 547 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
Kojto 90:cb3d968589d8 548 * @{
Kojto 90:cb3d968589d8 549 */
Kojto 90:cb3d968589d8 550 /** @brief SYSCFG Break Lockup lock
Kojto 90:cb3d968589d8 551 * Enables and locks the connection of Cortex-M0 LOCKUP (Hardfault) output to TIM1/15/16/17 Break input
Kojto 90:cb3d968589d8 552 * @note The selected configuration is locked and can be unlocked by system reset
Kojto 90:cb3d968589d8 553 */
Kojto 90:cb3d968589d8 554 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
Kojto 90:cb3d968589d8 555 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
Kojto 90:cb3d968589d8 556 }while(0)
Kojto 90:cb3d968589d8 557 /**
Kojto 90:cb3d968589d8 558 * @}
Kojto 90:cb3d968589d8 559 */
Kojto 90:cb3d968589d8 560 #endif /* SYSCFG_CFGR2_LOCKUP_LOCK */
Kojto 90:cb3d968589d8 561
Kojto 90:cb3d968589d8 562 #if defined(SYSCFG_CFGR2_PVD_LOCK)
Kojto 90:cb3d968589d8 563 /** @defgroup PVD_Lock_Enable PVD Lock
Kojto 90:cb3d968589d8 564 * @{
Kojto 90:cb3d968589d8 565 */
Kojto 90:cb3d968589d8 566 /** @brief SYSCFG Break PVD lock
Kojto 90:cb3d968589d8 567 * Enables and locks the PVD connection with Timer1/8/15/16/17 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
Kojto 90:cb3d968589d8 568 * @note The selected configuration is locked and can be unlocked by system reset
Kojto 90:cb3d968589d8 569 */
Kojto 90:cb3d968589d8 570 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
Kojto 90:cb3d968589d8 571 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
Kojto 90:cb3d968589d8 572 }while(0)
Kojto 90:cb3d968589d8 573 /**
Kojto 90:cb3d968589d8 574 * @}
Kojto 90:cb3d968589d8 575 */
Kojto 90:cb3d968589d8 576 #endif /* SYSCFG_CFGR2_PVD_LOCK */
Kojto 90:cb3d968589d8 577
Kojto 90:cb3d968589d8 578 #if defined(SYSCFG_CFGR2_SRAM_PARITY_LOCK)
Kojto 90:cb3d968589d8 579 /** @defgroup SRAM_Parity_Lock SRAM Parity Lock
Kojto 90:cb3d968589d8 580 * @{
Kojto 90:cb3d968589d8 581 */
Kojto 90:cb3d968589d8 582 /** @brief SYSCFG Break SRAM PARITY lock
Kojto 90:cb3d968589d8 583 * Enables and locks the SRAM_PARITY error signal with Break Input of TIMER1/8/15/16/17
Kojto 90:cb3d968589d8 584 * @note The selected configuration is locked and can be unlocked by system reset
Kojto 90:cb3d968589d8 585 */
Kojto 90:cb3d968589d8 586 #define __HAL_SYSCFG_BREAK_SRAMPARITY_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_SRAM_PARITY_LOCK); \
Kojto 90:cb3d968589d8 587 SYSCFG->CFGR2 |= SYSCFG_CFGR2_SRAM_PARITY_LOCK; \
Kojto 90:cb3d968589d8 588 }while(0)
Kojto 90:cb3d968589d8 589 /**
Kojto 90:cb3d968589d8 590 * @}
Kojto 90:cb3d968589d8 591 */
Kojto 90:cb3d968589d8 592 #endif /* SYSCFG_CFGR2_SRAM_PARITY_LOCK */
Kojto 90:cb3d968589d8 593
Kojto 90:cb3d968589d8 594 #if defined(SYSCFG_CFGR2_SRAM_PEF)
Kojto 90:cb3d968589d8 595 /** @defgroup HAL_SYSCFG_Parity_check_on_RAM HAL SYSCFG Parity check on RAM
Kojto 90:cb3d968589d8 596 * @brief Parity check on RAM disable macro
Kojto 90:cb3d968589d8 597 * @note Disabling the parity check on RAM locks the configuration bit.
Kojto 90:cb3d968589d8 598 * To re-enable the parity check on RAM perform a system reset.
Kojto 90:cb3d968589d8 599 * @{
Kojto 90:cb3d968589d8 600 */
Kojto 90:cb3d968589d8 601 #define __HAL_SYSCFG_RAM_PARITYCHECK_DISABLE() (SYSCFG->CFGR2 |= SYSCFG_CFGR2_SRAM_PEF)
Kojto 90:cb3d968589d8 602 /**
Kojto 90:cb3d968589d8 603 * @}
Kojto 90:cb3d968589d8 604 */
Kojto 90:cb3d968589d8 605 #endif /* SYSCFG_CFGR2_SRAM_PEF */
Kojto 90:cb3d968589d8 606
Kojto 90:cb3d968589d8 607
Kojto 90:cb3d968589d8 608 #if defined(STM32F091xC) || defined (STM32F098xx)
Kojto 90:cb3d968589d8 609 /** @defgroup HAL_ISR_wrapper_check HAL ISR wrapper check
Kojto 90:cb3d968589d8 610 * @brief ISR wrapper check
Kojto 90:cb3d968589d8 611 * @note Allow to determine interrupt source per line.
Kojto 90:cb3d968589d8 612 * @{
Kojto 90:cb3d968589d8 613 */
Kojto 90:cb3d968589d8 614 #define __HAL_GET_PENDING_IT(__SOURCE__) (SYSCFG->IT_LINE_SR[((__SOURCE__) >> 0x18)] & ((__SOURCE__) & 0x00FFFFFF))
Kojto 90:cb3d968589d8 615 /**
Kojto 90:cb3d968589d8 616 * @}
Kojto 90:cb3d968589d8 617 */
Kojto 90:cb3d968589d8 618 #endif /* (STM32F091xC) || defined (STM32F098xx)*/
Kojto 90:cb3d968589d8 619
Kojto 90:cb3d968589d8 620 #if defined(STM32F091xC) || defined (STM32F098xx)
Kojto 90:cb3d968589d8 621 /** @defgroup HAL_SYSCFG_IRDA_modulation_envelope_selection HAL SYSCFG IRDA modulation envelope selection
Kojto 90:cb3d968589d8 622 * @brief selection of the modulation envelope signal macro, using bits [7:6] of SYS_CTRL(CFGR1) register
Kojto 90:cb3d968589d8 623 * @param __SOURCE__: This parameter can be a value of @ref HAL_IRDA_ENV_SEL
Kojto 90:cb3d968589d8 624 * @{
Kojto 90:cb3d968589d8 625 */
Kojto 90:cb3d968589d8 626 #define __HAL_SYSCFG_IRDA_ENV_SELECTION(__SOURCE__) do {assert_param(IS_HAL_SYSCFG_IRDA_ENV_SEL((__SOURCE__))); \
Kojto 90:cb3d968589d8 627 SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_IRDA_ENV_SEL); \
Kojto 90:cb3d968589d8 628 SYSCFG->CFGR1 |= (__SOURCE__); \
Kojto 90:cb3d968589d8 629 }while(0)
Kojto 90:cb3d968589d8 630
Kojto 90:cb3d968589d8 631 #define __HAL_SYSCFG_GET_IRDA_ENV_SELECTION() ((SYSCFG->CFGR1) & 0x000000C0)
Kojto 90:cb3d968589d8 632 /**
Kojto 90:cb3d968589d8 633 * @}
Kojto 90:cb3d968589d8 634 */
Kojto 90:cb3d968589d8 635 #endif /* (STM32F091xC) || defined (STM32F098xx)*/
Kojto 90:cb3d968589d8 636
Kojto 90:cb3d968589d8 637 /**
Kojto 90:cb3d968589d8 638 * @}
Kojto 90:cb3d968589d8 639 */
Kojto 90:cb3d968589d8 640 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 641 /** @addtogroup HAL_Exported_Functions HAL Exported Functions
Kojto 90:cb3d968589d8 642 * @{
Kojto 90:cb3d968589d8 643 */
Kojto 90:cb3d968589d8 644
Kojto 90:cb3d968589d8 645 /** @addtogroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
Kojto 90:cb3d968589d8 646 * @brief Initialization and de-initialization functions
Kojto 90:cb3d968589d8 647 * @{
Kojto 90:cb3d968589d8 648 */
Kojto 90:cb3d968589d8 649 /* Initialization and de-initialization functions ******************************/
Kojto 90:cb3d968589d8 650 HAL_StatusTypeDef HAL_Init(void);
Kojto 90:cb3d968589d8 651 HAL_StatusTypeDef HAL_DeInit(void);
Kojto 90:cb3d968589d8 652 void HAL_MspInit(void);
Kojto 90:cb3d968589d8 653 void HAL_MspDeInit(void);
Kojto 90:cb3d968589d8 654 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
Kojto 90:cb3d968589d8 655 /**
Kojto 90:cb3d968589d8 656 * @}
Kojto 90:cb3d968589d8 657 */
Kojto 90:cb3d968589d8 658
Kojto 90:cb3d968589d8 659 /** @addtogroup HAL_Exported_Functions_Group2 HAL Control functions
Kojto 90:cb3d968589d8 660 * @brief HAL Control functions
Kojto 90:cb3d968589d8 661 * @{
Kojto 90:cb3d968589d8 662 */
Kojto 90:cb3d968589d8 663 /* Peripheral Control functions **********************************************/
Kojto 90:cb3d968589d8 664 void HAL_IncTick(void);
Kojto 90:cb3d968589d8 665 void HAL_Delay(__IO uint32_t Delay);
Kojto 90:cb3d968589d8 666 uint32_t HAL_GetTick(void);
Kojto 90:cb3d968589d8 667 void HAL_SuspendTick(void);
Kojto 90:cb3d968589d8 668 void HAL_ResumeTick(void);
Kojto 90:cb3d968589d8 669 uint32_t HAL_GetHalVersion(void);
Kojto 90:cb3d968589d8 670 uint32_t HAL_GetREVID(void);
Kojto 90:cb3d968589d8 671 uint32_t HAL_GetDEVID(void);
Kojto 90:cb3d968589d8 672 void HAL_EnableDBGStopMode(void);
Kojto 90:cb3d968589d8 673 void HAL_DisableDBGStopMode(void);
Kojto 90:cb3d968589d8 674 void HAL_EnableDBGStandbyMode(void);
Kojto 90:cb3d968589d8 675 void HAL_DisableDBGStandbyMode(void);
Kojto 90:cb3d968589d8 676 /**
Kojto 90:cb3d968589d8 677 * @}
Kojto 90:cb3d968589d8 678 */
Kojto 90:cb3d968589d8 679
Kojto 90:cb3d968589d8 680 /**
Kojto 90:cb3d968589d8 681 * @}
Kojto 90:cb3d968589d8 682 */
Kojto 90:cb3d968589d8 683
Kojto 90:cb3d968589d8 684 /**
Kojto 90:cb3d968589d8 685 * @}
Kojto 90:cb3d968589d8 686 */
Kojto 90:cb3d968589d8 687
Kojto 90:cb3d968589d8 688 /**
Kojto 90:cb3d968589d8 689 * @}
Kojto 90:cb3d968589d8 690 */
Kojto 90:cb3d968589d8 691
Kojto 90:cb3d968589d8 692 #ifdef __cplusplus
Kojto 90:cb3d968589d8 693 }
Kojto 90:cb3d968589d8 694 #endif
Kojto 90:cb3d968589d8 695
Kojto 90:cb3d968589d8 696 #endif /* __STM32F0xx_HAL_H */
Kojto 90:cb3d968589d8 697
Kojto 90:cb3d968589d8 698 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/