Umar Naeem / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by Umar Naeem

targets/TARGET_Maxim/TARGET_MAX32625/mxc/wdt.c@165:2dd56e6daeec, 2017-05-23 (annotated)

Committer:
ranaumarnaeem
Date:
Tue May 23 12:54:50 2017 +0000
Revision:
165:2dd56e6daeec
Parent:
150:02e0a0aed4ec 
jhjg

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 *
<> 150:02e0a0aed4ec 32 * $Date: 2016-03-21 15:44:11 -0500 (Mon, 21 Mar 2016) $
<> 150:02e0a0aed4ec 33 * $Revision: 22024 $
<> 150:02e0a0aed4ec 34 *
<> 150:02e0a0aed4ec 35 ******************************************************************************/
<> 150:02e0a0aed4ec 36
<> 150:02e0a0aed4ec 37 /**
<> 150:02e0a0aed4ec 38 * @file wdt.c
<> 150:02e0a0aed4ec 39 * @brief Watchdog driver source.
<> 150:02e0a0aed4ec 40 */
<> 150:02e0a0aed4ec 41
<> 150:02e0a0aed4ec 42 #include <stddef.h>
<> 150:02e0a0aed4ec 43 #include "wdt.h"
<> 150:02e0a0aed4ec 44
<> 150:02e0a0aed4ec 45 static uint32_t interruptEnable = 0; //keeps track to interrupts to enable in start function
<> 150:02e0a0aed4ec 46
<> 150:02e0a0aed4ec 47 /******************************************************************************/
<> 150:02e0a0aed4ec 48 int WDT_Init(mxc_wdt_regs_t *wdt, const sys_cfg_wdt_t *cfg, uint8_t unlock_key)
<> 150:02e0a0aed4ec 49 {
<> 150:02e0a0aed4ec 50 if ((wdt == NULL) || (cfg == NULL))
<> 150:02e0a0aed4ec 51 return E_NULL_PTR;
<> 150:02e0a0aed4ec 52
<> 150:02e0a0aed4ec 53 //setup watchdog clock
<> 150:02e0a0aed4ec 54 SYS_WDT_Init(wdt, cfg);
<> 150:02e0a0aed4ec 55
<> 150:02e0a0aed4ec 56 //unlock ctrl to be writable
<> 150:02e0a0aed4ec 57 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 58
<> 150:02e0a0aed4ec 59 //check to make sure it unlocked
<> 150:02e0a0aed4ec 60 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 61 return E_BAD_STATE;
<> 150:02e0a0aed4ec 62
<> 150:02e0a0aed4ec 63 //disable all interrupts
<> 150:02e0a0aed4ec 64 interruptEnable = 0;
<> 150:02e0a0aed4ec 65 wdt->enable = interruptEnable;
<> 150:02e0a0aed4ec 66
<> 150:02e0a0aed4ec 67 //enable the watchdog clock and clear all other settings
<> 150:02e0a0aed4ec 68 wdt->ctrl = MXC_F_WDT_CTRL_EN_CLOCK;
<> 150:02e0a0aed4ec 69
<> 150:02e0a0aed4ec 70 //clear all interrupt flags
<> 150:02e0a0aed4ec 71 wdt->flags = WDT_FLAGS_CLEAR_ALL;
<> 150:02e0a0aed4ec 72
<> 150:02e0a0aed4ec 73 //lock ctrl to read-only
<> 150:02e0a0aed4ec 74 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 75
<> 150:02e0a0aed4ec 76 return E_NO_ERROR;
<> 150:02e0a0aed4ec 77 }
<> 150:02e0a0aed4ec 78
<> 150:02e0a0aed4ec 79 /******************************************************************************/
<> 150:02e0a0aed4ec 80 int WDT_EnableInt(mxc_wdt_regs_t *wdt, wdt_period_t int_period, uint8_t unlock_key)
<> 150:02e0a0aed4ec 81 {
<> 150:02e0a0aed4ec 82 //unlock ctrl to be writable
<> 150:02e0a0aed4ec 83 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 84
<> 150:02e0a0aed4ec 85 //check to make sure it unlocked
<> 150:02e0a0aed4ec 86 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 87 return E_BAD_STATE;
<> 150:02e0a0aed4ec 88
<> 150:02e0a0aed4ec 89 //stop timer and clear interval period
<> 150:02e0a0aed4ec 90 wdt->ctrl &= ~(MXC_F_WDT_CTRL_INT_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
<> 150:02e0a0aed4ec 91
<> 150:02e0a0aed4ec 92 //set interval period
<> 150:02e0a0aed4ec 93 wdt->ctrl |= (int_period << MXC_F_WDT_CTRL_INT_PERIOD_POS);
<> 150:02e0a0aed4ec 94
<> 150:02e0a0aed4ec 95 //enable timeout interrupt
<> 150:02e0a0aed4ec 96 interruptEnable |= MXC_F_WDT_ENABLE_TIMEOUT;
<> 150:02e0a0aed4ec 97
<> 150:02e0a0aed4ec 98 //lock ctrl to read-only
<> 150:02e0a0aed4ec 99 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 100
<> 150:02e0a0aed4ec 101 return E_NO_ERROR;
<> 150:02e0a0aed4ec 102 }
<> 150:02e0a0aed4ec 103
<> 150:02e0a0aed4ec 104 /******************************************************************************/
<> 150:02e0a0aed4ec 105 int WDT_DisableInt(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 150:02e0a0aed4ec 106 {
<> 150:02e0a0aed4ec 107 //unlock register to be writable
<> 150:02e0a0aed4ec 108 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 109
<> 150:02e0a0aed4ec 110 //check to make sure it unlocked
<> 150:02e0a0aed4ec 111 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 112 return E_BAD_STATE;
<> 150:02e0a0aed4ec 113
<> 150:02e0a0aed4ec 114 //disable timeout interrupt
<> 150:02e0a0aed4ec 115 interruptEnable &= ~MXC_F_WDT_ENABLE_TIMEOUT;
<> 150:02e0a0aed4ec 116 wdt->enable = interruptEnable;
<> 150:02e0a0aed4ec 117
<> 150:02e0a0aed4ec 118 //lock register to read-only
<> 150:02e0a0aed4ec 119 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 120
<> 150:02e0a0aed4ec 121 return E_NO_ERROR;
<> 150:02e0a0aed4ec 122 }
<> 150:02e0a0aed4ec 123
<> 150:02e0a0aed4ec 124 /******************************************************************************/
<> 150:02e0a0aed4ec 125 int WDT_EnableWait(mxc_wdt_regs_t *wdt, wdt_period_t wait_period, uint8_t unlock_key)
<> 150:02e0a0aed4ec 126 {
<> 150:02e0a0aed4ec 127 // Make sure wait_period is valid
<> 150:02e0a0aed4ec 128 if (wait_period >= WDT_PERIOD_MAX)
<> 150:02e0a0aed4ec 129 return E_INVALID;
<> 150:02e0a0aed4ec 130
<> 150:02e0a0aed4ec 131 //unlock ctrl to be writable
<> 150:02e0a0aed4ec 132 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 133
<> 150:02e0a0aed4ec 134 //check to make sure it unlocked
<> 150:02e0a0aed4ec 135 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 136 return E_BAD_STATE;
<> 150:02e0a0aed4ec 137
<> 150:02e0a0aed4ec 138 //stop timer and clear wait period
<> 150:02e0a0aed4ec 139 wdt->ctrl &= ~(MXC_F_WDT_CTRL_WAIT_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
<> 150:02e0a0aed4ec 140
<> 150:02e0a0aed4ec 141 //set wait period
<> 150:02e0a0aed4ec 142 wdt->ctrl |= (wait_period << MXC_F_WDT_CTRL_WAIT_PERIOD_POS);
<> 150:02e0a0aed4ec 143
<> 150:02e0a0aed4ec 144 //enable wait interrupt
<> 150:02e0a0aed4ec 145 interruptEnable |= MXC_F_WDT_ENABLE_PRE_WIN;
<> 150:02e0a0aed4ec 146
<> 150:02e0a0aed4ec 147 //lock ctrl to read-only
<> 150:02e0a0aed4ec 148 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 149
<> 150:02e0a0aed4ec 150 return E_NO_ERROR;
<> 150:02e0a0aed4ec 151 }
<> 150:02e0a0aed4ec 152
<> 150:02e0a0aed4ec 153 /******************************************************************************/
<> 150:02e0a0aed4ec 154 int WDT_DisableWait(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 150:02e0a0aed4ec 155 {
<> 150:02e0a0aed4ec 156 //unlock register to be writable
<> 150:02e0a0aed4ec 157 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 158
<> 150:02e0a0aed4ec 159 //check to make sure it unlocked
<> 150:02e0a0aed4ec 160 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 161 return E_BAD_STATE;
<> 150:02e0a0aed4ec 162
<> 150:02e0a0aed4ec 163 //disable wait interrupt
<> 150:02e0a0aed4ec 164 interruptEnable &= ~MXC_F_WDT_ENABLE_PRE_WIN;
<> 150:02e0a0aed4ec 165 wdt->enable = interruptEnable;
<> 150:02e0a0aed4ec 166
<> 150:02e0a0aed4ec 167 //lock register to read-only
<> 150:02e0a0aed4ec 168 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 169
<> 150:02e0a0aed4ec 170 return E_NO_ERROR;
<> 150:02e0a0aed4ec 171 }
<> 150:02e0a0aed4ec 172
<> 150:02e0a0aed4ec 173 /******************************************************************************/
<> 150:02e0a0aed4ec 174 int WDT_EnableReset(mxc_wdt_regs_t *wdt, wdt_period_t rst_period, uint8_t unlock_key)
<> 150:02e0a0aed4ec 175 {
<> 150:02e0a0aed4ec 176 // Make sure wait_period is valid
<> 150:02e0a0aed4ec 177 if (rst_period >= WDT_PERIOD_MAX)
<> 150:02e0a0aed4ec 178 return E_INVALID;
<> 150:02e0a0aed4ec 179
<> 150:02e0a0aed4ec 180 //unlock ctrl to be writable
<> 150:02e0a0aed4ec 181 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 182
<> 150:02e0a0aed4ec 183 //check to make sure it unlocked
<> 150:02e0a0aed4ec 184 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 185 return E_BAD_STATE;
<> 150:02e0a0aed4ec 186
<> 150:02e0a0aed4ec 187 //stop timer and clear reset period
<> 150:02e0a0aed4ec 188 wdt->ctrl &= ~(MXC_F_WDT_CTRL_RST_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
<> 150:02e0a0aed4ec 189
<> 150:02e0a0aed4ec 190 //set reset period
<> 150:02e0a0aed4ec 191 wdt->ctrl |= (rst_period << MXC_F_WDT_CTRL_RST_PERIOD_POS);
<> 150:02e0a0aed4ec 192
<> 150:02e0a0aed4ec 193 //enable reset0
<> 150:02e0a0aed4ec 194 interruptEnable |= MXC_F_WDT_ENABLE_RESET_OUT;
<> 150:02e0a0aed4ec 195
<> 150:02e0a0aed4ec 196 //lock ctrl to read-only
<> 150:02e0a0aed4ec 197 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 198
<> 150:02e0a0aed4ec 199 return E_NO_ERROR;
<> 150:02e0a0aed4ec 200 }
<> 150:02e0a0aed4ec 201
<> 150:02e0a0aed4ec 202 /******************************************************************************/
<> 150:02e0a0aed4ec 203 int WDT_DisableReset(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 150:02e0a0aed4ec 204 {
<> 150:02e0a0aed4ec 205 //unlock register to be writable
<> 150:02e0a0aed4ec 206 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 207
<> 150:02e0a0aed4ec 208 //check to make sure it unlocked
<> 150:02e0a0aed4ec 209 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 210 return E_BAD_STATE;
<> 150:02e0a0aed4ec 211
<> 150:02e0a0aed4ec 212 //disable reset0
<> 150:02e0a0aed4ec 213 interruptEnable &= ~MXC_F_WDT_ENABLE_RESET_OUT;
<> 150:02e0a0aed4ec 214 wdt->enable = interruptEnable;
<> 150:02e0a0aed4ec 215
<> 150:02e0a0aed4ec 216 //lock register to read-only
<> 150:02e0a0aed4ec 217 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 218
<> 150:02e0a0aed4ec 219 return E_NO_ERROR;
<> 150:02e0a0aed4ec 220 }
<> 150:02e0a0aed4ec 221
<> 150:02e0a0aed4ec 222 /******************************************************************************/
<> 150:02e0a0aed4ec 223 int WDT_Start(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 150:02e0a0aed4ec 224 {
<> 150:02e0a0aed4ec 225 //check if watchdog is already running
<> 150:02e0a0aed4ec 226 if(WDT_IsActive(wdt))
<> 150:02e0a0aed4ec 227 return E_BAD_STATE;
<> 150:02e0a0aed4ec 228
<> 150:02e0a0aed4ec 229 //unlock ctrl to be writable
<> 150:02e0a0aed4ec 230 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 231
<> 150:02e0a0aed4ec 232 //check to make sure it unlocked
<> 150:02e0a0aed4ec 233 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 234 return E_BAD_STATE;
<> 150:02e0a0aed4ec 235
<> 150:02e0a0aed4ec 236 WDT_Reset(wdt);
<> 150:02e0a0aed4ec 237
<> 150:02e0a0aed4ec 238 //enable interrupts
<> 150:02e0a0aed4ec 239 wdt->enable = interruptEnable;
<> 150:02e0a0aed4ec 240
<> 150:02e0a0aed4ec 241 //start timer
<> 150:02e0a0aed4ec 242 wdt->ctrl |= MXC_F_WDT_CTRL_EN_TIMER;
<> 150:02e0a0aed4ec 243
<> 150:02e0a0aed4ec 244 //lock ctrl to read-only
<> 150:02e0a0aed4ec 245 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 246
<> 150:02e0a0aed4ec 247 return E_NO_ERROR;
<> 150:02e0a0aed4ec 248 }
<> 150:02e0a0aed4ec 249
<> 150:02e0a0aed4ec 250 /******************************************************************************/
<> 150:02e0a0aed4ec 251 void WDT_Reset(mxc_wdt_regs_t *wdt)
<> 150:02e0a0aed4ec 252 {
<> 150:02e0a0aed4ec 253 //reset the watchdog counter
<> 150:02e0a0aed4ec 254 wdt->clear = MXC_V_WDT_RESET_KEY_0;
<> 150:02e0a0aed4ec 255 wdt->clear = MXC_V_WDT_RESET_KEY_1;
<> 150:02e0a0aed4ec 256
<> 150:02e0a0aed4ec 257 //clear all interrupt flags
<> 150:02e0a0aed4ec 258 wdt->flags = WDT_FLAGS_CLEAR_ALL;
<> 150:02e0a0aed4ec 259
<> 150:02e0a0aed4ec 260 //wait for all interrupts to clear
<> 150:02e0a0aed4ec 261 while(wdt->flags != 0) {
<> 150:02e0a0aed4ec 262 wdt->flags = WDT_FLAGS_CLEAR_ALL;
<> 150:02e0a0aed4ec 263 }
<> 150:02e0a0aed4ec 264
<> 150:02e0a0aed4ec 265 return;
<> 150:02e0a0aed4ec 266 }
<> 150:02e0a0aed4ec 267
<> 150:02e0a0aed4ec 268 /******************************************************************************/
<> 150:02e0a0aed4ec 269 int WDT_Stop(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 150:02e0a0aed4ec 270 {
<> 150:02e0a0aed4ec 271 //unlock ctrl to be writable
<> 150:02e0a0aed4ec 272 wdt->lock_ctrl = unlock_key;
<> 150:02e0a0aed4ec 273
<> 150:02e0a0aed4ec 274 //check to make sure it unlocked
<> 150:02e0a0aed4ec 275 if (wdt->lock_ctrl & 0x01)
<> 150:02e0a0aed4ec 276 return E_BAD_STATE;
<> 150:02e0a0aed4ec 277
<> 150:02e0a0aed4ec 278 //disabled the timer and interrupts
<> 150:02e0a0aed4ec 279 wdt->enable = 0;
<> 150:02e0a0aed4ec 280 wdt->ctrl &= ~(MXC_F_WDT_CTRL_EN_TIMER);
<> 150:02e0a0aed4ec 281
<> 150:02e0a0aed4ec 282 //lock ctrl to read-only
<> 150:02e0a0aed4ec 283 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 150:02e0a0aed4ec 284
<> 150:02e0a0aed4ec 285 return E_NO_ERROR;
<> 150:02e0a0aed4ec 286 }