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mbed-client/test/mbedclient/utest/m2minterfaceimpl/m2minterfaceimpltest.cpp@0:a2cb7295a1f7, 2017-05-14 (annotated)
- Committer:
- ram54288
- Date:
- Sun May 14 18:35:07 2017 +0000
- Revision:
- 0:a2cb7295a1f7
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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ram54288 | 0:a2cb7295a1f7 | 1 | /* |
ram54288 | 0:a2cb7295a1f7 | 2 | * Copyright (c) 2015 ARM Limited. All rights reserved. |
ram54288 | 0:a2cb7295a1f7 | 3 | * SPDX-License-Identifier: Apache-2.0 |
ram54288 | 0:a2cb7295a1f7 | 4 | * Licensed under the Apache License, Version 2.0 (the License); you may |
ram54288 | 0:a2cb7295a1f7 | 5 | * not use this file except in compliance with the License. |
ram54288 | 0:a2cb7295a1f7 | 6 | * You may obtain a copy of the License at |
ram54288 | 0:a2cb7295a1f7 | 7 | * |
ram54288 | 0:a2cb7295a1f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
ram54288 | 0:a2cb7295a1f7 | 9 | * |
ram54288 | 0:a2cb7295a1f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
ram54288 | 0:a2cb7295a1f7 | 11 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
ram54288 | 0:a2cb7295a1f7 | 12 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
ram54288 | 0:a2cb7295a1f7 | 13 | * See the License for the specific language governing permissions and |
ram54288 | 0:a2cb7295a1f7 | 14 | * limitations under the License. |
ram54288 | 0:a2cb7295a1f7 | 15 | */ |
ram54288 | 0:a2cb7295a1f7 | 16 | //CppUTest includes should be after your and system includes |
ram54288 | 0:a2cb7295a1f7 | 17 | #include "CppUTest/TestHarness.h" |
ram54288 | 0:a2cb7295a1f7 | 18 | #include "test_m2minterfaceimpl.h" |
ram54288 | 0:a2cb7295a1f7 | 19 | #include "m2mnsdlinterface_stub.h" |
ram54288 | 0:a2cb7295a1f7 | 20 | |
ram54288 | 0:a2cb7295a1f7 | 21 | TEST_GROUP(M2MInterfaceImpl) |
ram54288 | 0:a2cb7295a1f7 | 22 | { |
ram54288 | 0:a2cb7295a1f7 | 23 | Test_M2MInterfaceImpl* m2m_interface_impl; |
ram54288 | 0:a2cb7295a1f7 | 24 | |
ram54288 | 0:a2cb7295a1f7 | 25 | void setup() |
ram54288 | 0:a2cb7295a1f7 | 26 | { |
ram54288 | 0:a2cb7295a1f7 | 27 | m2mnsdlinterface_stub::string_value = new String(); |
ram54288 | 0:a2cb7295a1f7 | 28 | m2m_interface_impl = new Test_M2MInterfaceImpl(); |
ram54288 | 0:a2cb7295a1f7 | 29 | } |
ram54288 | 0:a2cb7295a1f7 | 30 | void teardown() |
ram54288 | 0:a2cb7295a1f7 | 31 | { |
ram54288 | 0:a2cb7295a1f7 | 32 | delete m2mnsdlinterface_stub::string_value; |
ram54288 | 0:a2cb7295a1f7 | 33 | delete m2m_interface_impl; |
ram54288 | 0:a2cb7295a1f7 | 34 | } |
ram54288 | 0:a2cb7295a1f7 | 35 | }; |
ram54288 | 0:a2cb7295a1f7 | 36 | |
ram54288 | 0:a2cb7295a1f7 | 37 | TEST(M2MInterfaceImpl, create) |
ram54288 | 0:a2cb7295a1f7 | 38 | { |
ram54288 | 0:a2cb7295a1f7 | 39 | CHECK(m2m_interface_impl->impl != NULL); |
ram54288 | 0:a2cb7295a1f7 | 40 | } |
ram54288 | 0:a2cb7295a1f7 | 41 | |
ram54288 | 0:a2cb7295a1f7 | 42 | TEST(M2MInterfaceImpl, test_constructor) |
ram54288 | 0:a2cb7295a1f7 | 43 | { |
ram54288 | 0:a2cb7295a1f7 | 44 | m2m_interface_impl->test_constructor(); |
ram54288 | 0:a2cb7295a1f7 | 45 | } |
ram54288 | 0:a2cb7295a1f7 | 46 | |
ram54288 | 0:a2cb7295a1f7 | 47 | TEST(M2MInterfaceImpl, bootstrap) |
ram54288 | 0:a2cb7295a1f7 | 48 | { |
ram54288 | 0:a2cb7295a1f7 | 49 | m2m_interface_impl->test_bootstrap(); |
ram54288 | 0:a2cb7295a1f7 | 50 | } |
ram54288 | 0:a2cb7295a1f7 | 51 | |
ram54288 | 0:a2cb7295a1f7 | 52 | TEST(M2MInterfaceImpl, cancel_bootstrap) |
ram54288 | 0:a2cb7295a1f7 | 53 | { |
ram54288 | 0:a2cb7295a1f7 | 54 | m2m_interface_impl->test_cancel_bootstrap(); |
ram54288 | 0:a2cb7295a1f7 | 55 | } |
ram54288 | 0:a2cb7295a1f7 | 56 | |
ram54288 | 0:a2cb7295a1f7 | 57 | TEST(M2MInterfaceImpl, register_object) |
ram54288 | 0:a2cb7295a1f7 | 58 | { |
ram54288 | 0:a2cb7295a1f7 | 59 | m2m_interface_impl->test_register_object(); |
ram54288 | 0:a2cb7295a1f7 | 60 | } |
ram54288 | 0:a2cb7295a1f7 | 61 | |
ram54288 | 0:a2cb7295a1f7 | 62 | TEST(M2MInterfaceImpl, update_registration) |
ram54288 | 0:a2cb7295a1f7 | 63 | { |
ram54288 | 0:a2cb7295a1f7 | 64 | m2m_interface_impl->test_update_registration(); |
ram54288 | 0:a2cb7295a1f7 | 65 | } |
ram54288 | 0:a2cb7295a1f7 | 66 | |
ram54288 | 0:a2cb7295a1f7 | 67 | TEST(M2MInterfaceImpl, unregister_object) |
ram54288 | 0:a2cb7295a1f7 | 68 | { |
ram54288 | 0:a2cb7295a1f7 | 69 | m2m_interface_impl->test_unregister_object(); |
ram54288 | 0:a2cb7295a1f7 | 70 | } |
ram54288 | 0:a2cb7295a1f7 | 71 | |
ram54288 | 0:a2cb7295a1f7 | 72 | TEST(M2MInterfaceImpl, set_queue_sleep_handler) |
ram54288 | 0:a2cb7295a1f7 | 73 | { |
ram54288 | 0:a2cb7295a1f7 | 74 | m2m_interface_impl->test_set_queue_sleep_handler(); |
ram54288 | 0:a2cb7295a1f7 | 75 | } |
ram54288 | 0:a2cb7295a1f7 | 76 | |
ram54288 | 0:a2cb7295a1f7 | 77 | TEST(M2MInterfaceImpl, test_set_random_number_callback) |
ram54288 | 0:a2cb7295a1f7 | 78 | { |
ram54288 | 0:a2cb7295a1f7 | 79 | m2m_interface_impl->test_set_random_number_callback(); |
ram54288 | 0:a2cb7295a1f7 | 80 | } |
ram54288 | 0:a2cb7295a1f7 | 81 | |
ram54288 | 0:a2cb7295a1f7 | 82 | TEST(M2MInterfaceImpl, test_set_entropy_callback) |
ram54288 | 0:a2cb7295a1f7 | 83 | { |
ram54288 | 0:a2cb7295a1f7 | 84 | m2m_interface_impl->test_set_entropy_callback(); |
ram54288 | 0:a2cb7295a1f7 | 85 | } |
ram54288 | 0:a2cb7295a1f7 | 86 | |
ram54288 | 0:a2cb7295a1f7 | 87 | TEST(M2MInterfaceImpl, test_set_platform_network_handler) |
ram54288 | 0:a2cb7295a1f7 | 88 | { |
ram54288 | 0:a2cb7295a1f7 | 89 | m2m_interface_impl->test_set_platform_network_handler(); |
ram54288 | 0:a2cb7295a1f7 | 90 | } |
ram54288 | 0:a2cb7295a1f7 | 91 | |
ram54288 | 0:a2cb7295a1f7 | 92 | TEST(M2MInterfaceImpl, coap_message_ready) |
ram54288 | 0:a2cb7295a1f7 | 93 | { |
ram54288 | 0:a2cb7295a1f7 | 94 | m2m_interface_impl->test_coap_message_ready(); |
ram54288 | 0:a2cb7295a1f7 | 95 | } |
ram54288 | 0:a2cb7295a1f7 | 96 | |
ram54288 | 0:a2cb7295a1f7 | 97 | TEST(M2MInterfaceImpl, client_registered) |
ram54288 | 0:a2cb7295a1f7 | 98 | { |
ram54288 | 0:a2cb7295a1f7 | 99 | m2m_interface_impl->test_client_registered(); |
ram54288 | 0:a2cb7295a1f7 | 100 | } |
ram54288 | 0:a2cb7295a1f7 | 101 | |
ram54288 | 0:a2cb7295a1f7 | 102 | TEST(M2MInterfaceImpl, test_registration_updated) |
ram54288 | 0:a2cb7295a1f7 | 103 | { |
ram54288 | 0:a2cb7295a1f7 | 104 | m2m_interface_impl->test_registration_updated(); |
ram54288 | 0:a2cb7295a1f7 | 105 | } |
ram54288 | 0:a2cb7295a1f7 | 106 | |
ram54288 | 0:a2cb7295a1f7 | 107 | TEST(M2MInterfaceImpl, registration_error) |
ram54288 | 0:a2cb7295a1f7 | 108 | { |
ram54288 | 0:a2cb7295a1f7 | 109 | m2m_interface_impl->test_registration_error(); |
ram54288 | 0:a2cb7295a1f7 | 110 | } |
ram54288 | 0:a2cb7295a1f7 | 111 | |
ram54288 | 0:a2cb7295a1f7 | 112 | TEST(M2MInterfaceImpl, client_unregistered) |
ram54288 | 0:a2cb7295a1f7 | 113 | { |
ram54288 | 0:a2cb7295a1f7 | 114 | m2m_interface_impl->test_client_unregistered(); |
ram54288 | 0:a2cb7295a1f7 | 115 | } |
ram54288 | 0:a2cb7295a1f7 | 116 | |
ram54288 | 0:a2cb7295a1f7 | 117 | TEST(M2MInterfaceImpl, bootstrap_wait) |
ram54288 | 0:a2cb7295a1f7 | 118 | { |
ram54288 | 0:a2cb7295a1f7 | 119 | m2m_interface_impl->test_bootstrap_wait(); |
ram54288 | 0:a2cb7295a1f7 | 120 | } |
ram54288 | 0:a2cb7295a1f7 | 121 | |
ram54288 | 0:a2cb7295a1f7 | 122 | TEST(M2MInterfaceImpl, bootstrap_done) |
ram54288 | 0:a2cb7295a1f7 | 123 | { |
ram54288 | 0:a2cb7295a1f7 | 124 | m2m_interface_impl->test_bootstrap_done(); |
ram54288 | 0:a2cb7295a1f7 | 125 | } |
ram54288 | 0:a2cb7295a1f7 | 126 | |
ram54288 | 0:a2cb7295a1f7 | 127 | TEST(M2MInterfaceImpl, bootstrap_error) |
ram54288 | 0:a2cb7295a1f7 | 128 | { |
ram54288 | 0:a2cb7295a1f7 | 129 | m2m_interface_impl->test_bootstrap_error(); |
ram54288 | 0:a2cb7295a1f7 | 130 | } |
ram54288 | 0:a2cb7295a1f7 | 131 | |
ram54288 | 0:a2cb7295a1f7 | 132 | TEST(M2MInterfaceImpl, coap_data_processed) |
ram54288 | 0:a2cb7295a1f7 | 133 | { |
ram54288 | 0:a2cb7295a1f7 | 134 | m2m_interface_impl->test_coap_data_processed(); |
ram54288 | 0:a2cb7295a1f7 | 135 | } |
ram54288 | 0:a2cb7295a1f7 | 136 | |
ram54288 | 0:a2cb7295a1f7 | 137 | TEST(M2MInterfaceImpl, test_value_updated) |
ram54288 | 0:a2cb7295a1f7 | 138 | { |
ram54288 | 0:a2cb7295a1f7 | 139 | m2m_interface_impl->test_value_updated(); |
ram54288 | 0:a2cb7295a1f7 | 140 | } |
ram54288 | 0:a2cb7295a1f7 | 141 | |
ram54288 | 0:a2cb7295a1f7 | 142 | TEST(M2MInterfaceImpl, data_available) |
ram54288 | 0:a2cb7295a1f7 | 143 | { |
ram54288 | 0:a2cb7295a1f7 | 144 | m2m_interface_impl->test_data_available(); |
ram54288 | 0:a2cb7295a1f7 | 145 | } |
ram54288 | 0:a2cb7295a1f7 | 146 | |
ram54288 | 0:a2cb7295a1f7 | 147 | TEST(M2MInterfaceImpl, socket_error) |
ram54288 | 0:a2cb7295a1f7 | 148 | { |
ram54288 | 0:a2cb7295a1f7 | 149 | m2m_interface_impl->test_socket_error(); |
ram54288 | 0:a2cb7295a1f7 | 150 | } |
ram54288 | 0:a2cb7295a1f7 | 151 | |
ram54288 | 0:a2cb7295a1f7 | 152 | TEST(M2MInterfaceImpl, address_ready) |
ram54288 | 0:a2cb7295a1f7 | 153 | { |
ram54288 | 0:a2cb7295a1f7 | 154 | m2m_interface_impl->test_address_ready(); |
ram54288 | 0:a2cb7295a1f7 | 155 | } |
ram54288 | 0:a2cb7295a1f7 | 156 | |
ram54288 | 0:a2cb7295a1f7 | 157 | TEST(M2MInterfaceImpl, data_sent) |
ram54288 | 0:a2cb7295a1f7 | 158 | { |
ram54288 | 0:a2cb7295a1f7 | 159 | m2m_interface_impl->test_data_sent(); |
ram54288 | 0:a2cb7295a1f7 | 160 | } |
ram54288 | 0:a2cb7295a1f7 | 161 | |
ram54288 | 0:a2cb7295a1f7 | 162 | TEST(M2MInterfaceImpl, timer_expired) |
ram54288 | 0:a2cb7295a1f7 | 163 | { |
ram54288 | 0:a2cb7295a1f7 | 164 | m2m_interface_impl->test_timer_expired(); |
ram54288 | 0:a2cb7295a1f7 | 165 | } |
ram54288 | 0:a2cb7295a1f7 | 166 |