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Fork of ST_I2S by
targets/TARGET_STM/stm_i2s_api.c@21:7cf6b1538d29, 2017-01-30 (annotated)
- Committer:
- Wolfgang Betz
- Date:
- Mon Jan 30 15:13:59 2017 +0100
- Revision:
- 21:7cf6b1538d29
- Parent:
- 20:54b1a9b620c5
- Child:
- 22:e04af8667cad
Always enable MCLK
- MCLK always enabled to simplify harmonization
- harmonize starting from higher frequency (needs MCLK always enabled)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Wolfgang Betz |
1:f90318e0923b | 1 | #include "mbed_assert.h" |
Wolfgang Betz |
1:f90318e0923b | 2 | #include "mbed_error.h" |
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1:f90318e0923b | 3 | #include "stm_i2s_api.h" |
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1:f90318e0923b | 4 | |
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1:f90318e0923b | 5 | #include "stm_dma_caps.h" |
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1:f90318e0923b | 6 | |
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1:f90318e0923b | 7 | #if DEVICE_I2S |
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1:f90318e0923b | 8 | |
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1:f90318e0923b | 9 | #include <math.h> |
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1:f90318e0923b | 10 | #include <string.h> |
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1:f90318e0923b | 11 | #include "cmsis.h" |
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1:f90318e0923b | 12 | #include "pinmap.h" |
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1:f90318e0923b | 13 | #include "PeripheralPins.h" |
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5:74da3773bf43 | 14 | #include "StmI2sPeripheralPins.h" |
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1:f90318e0923b | 15 | |
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16:04e1abb4cca3 | 16 | // #define DEBUG_STDIO 1 |
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1:f90318e0923b | 17 | |
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1:f90318e0923b | 18 | #ifndef DEBUG_STDIO |
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1:f90318e0923b | 19 | # define DEBUG_STDIO 0 |
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1:f90318e0923b | 20 | #endif |
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1:f90318e0923b | 21 | |
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1:f90318e0923b | 22 | #if DEBUG_STDIO |
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1:f90318e0923b | 23 | # include <stdio.h> |
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1:f90318e0923b | 24 | # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0) |
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1:f90318e0923b | 25 | #else |
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1:f90318e0923b | 26 | # define DEBUG_PRINTF(...) {} |
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1:f90318e0923b | 27 | #endif |
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1:f90318e0923b | 28 | |
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1:f90318e0923b | 29 | typedef enum { |
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1:f90318e0923b | 30 | I2S_TRANSFER_TYPE_TX = 1, |
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1:f90318e0923b | 31 | I2S_TRANSFER_TYPE_RX = 2, |
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1:f90318e0923b | 32 | I2S_TRANSFER_TYPE_TXRX = 3, |
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1:f90318e0923b | 33 | } transfer_type_t; |
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1:f90318e0923b | 34 | |
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1:f90318e0923b | 35 | typedef struct { |
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1:f90318e0923b | 36 | DMA_HandleTypeDef tx_dma_handle; |
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1:f90318e0923b | 37 | DMA_HandleTypeDef rx_dma_handle; |
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1:f90318e0923b | 38 | } dma_handles_t; |
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1:f90318e0923b | 39 | |
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19:ef6ef1795e30 | 40 | #define I2S_NUM (5) // TODO: this approach wastes quite a bit of memory - TO BE IMPROVED!?!? |
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1:f90318e0923b | 41 | |
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1:f90318e0923b | 42 | static I2S_HandleTypeDef I2sHandle[I2S_NUM]; |
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1:f90318e0923b | 43 | static DMA_HandleTypeDef DMaHandles[I2S_NUM][NUM_OF_DIRECTIONS]; |
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1:f90318e0923b | 44 | |
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5:74da3773bf43 | 45 | static void init_i2s(i2s_t *obj) { |
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1:f90318e0923b | 46 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
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1:f90318e0923b | 47 | |
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1:f90318e0923b | 48 | __HAL_I2S_DISABLE(handle); |
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1:f90318e0923b | 49 | HAL_I2S_Init(handle); |
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1:f90318e0923b | 50 | __HAL_I2S_ENABLE(handle); |
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1:f90318e0923b | 51 | } |
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1:f90318e0923b | 52 | |
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5:74da3773bf43 | 53 | static void init_dmas(i2s_t *obj) { |
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1:f90318e0923b | 54 | DMA_HandleTypeDef *primary_handle = NULL; |
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1:f90318e0923b | 55 | DMA_HandleTypeDef *secondary_handle = NULL; |
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1:f90318e0923b | 56 | DMA_HandleTypeDef *hdmatx = NULL; |
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1:f90318e0923b | 57 | |
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1:f90318e0923b | 58 | switch(obj->dma.dma_direction) { |
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1:f90318e0923b | 59 | case DMA_TX: |
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1:f90318e0923b | 60 | if(obj->dma.dma[DMA_TX] != NULL) { |
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1:f90318e0923b | 61 | hdmatx = primary_handle = &DMaHandles[obj->i2s.module][DMA_TX]; |
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1:f90318e0923b | 62 | } |
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1:f90318e0923b | 63 | if(obj->dma.dma[DMA_RX] != NULL) { |
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1:f90318e0923b | 64 | secondary_handle = &DMaHandles[obj->i2s.module][DMA_RX]; |
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1:f90318e0923b | 65 | } |
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1:f90318e0923b | 66 | break; |
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1:f90318e0923b | 67 | case DMA_RX: |
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1:f90318e0923b | 68 | default: |
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1:f90318e0923b | 69 | if(obj->dma.dma[DMA_RX] != NULL) { |
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1:f90318e0923b | 70 | primary_handle = &DMaHandles[obj->i2s.module][DMA_RX]; |
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1:f90318e0923b | 71 | } |
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1:f90318e0923b | 72 | if(obj->dma.dma[DMA_TX] != NULL) { |
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1:f90318e0923b | 73 | hdmatx = secondary_handle = &DMaHandles[obj->i2s.module][DMA_TX]; |
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1:f90318e0923b | 74 | } |
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1:f90318e0923b | 75 | break; |
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1:f90318e0923b | 76 | } |
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1:f90318e0923b | 77 | |
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1:f90318e0923b | 78 | if(primary_handle != NULL) { |
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1:f90318e0923b | 79 | __HAL_DMA_DISABLE(primary_handle); |
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1:f90318e0923b | 80 | HAL_DMA_Init(primary_handle); |
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1:f90318e0923b | 81 | |
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1:f90318e0923b | 82 | if(hdmatx == primary_handle) { |
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1:f90318e0923b | 83 | __HAL_LINKDMA(&I2sHandle[obj->i2s.module], hdmatx, *primary_handle); |
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1:f90318e0923b | 84 | } else { |
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1:f90318e0923b | 85 | __HAL_LINKDMA(&I2sHandle[obj->i2s.module], hdmarx, *primary_handle); |
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1:f90318e0923b | 86 | } |
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1:f90318e0923b | 87 | } |
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1:f90318e0923b | 88 | |
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1:f90318e0923b | 89 | if(secondary_handle != NULL) { |
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1:f90318e0923b | 90 | __HAL_DMA_DISABLE(secondary_handle); |
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1:f90318e0923b | 91 | HAL_DMA_Init(secondary_handle); |
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1:f90318e0923b | 92 | |
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1:f90318e0923b | 93 | if(hdmatx == secondary_handle) { |
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1:f90318e0923b | 94 | __HAL_LINKDMA(&I2sHandle[obj->i2s.module], hdmatx, *secondary_handle); |
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1:f90318e0923b | 95 | } else { |
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1:f90318e0923b | 96 | __HAL_LINKDMA(&I2sHandle[obj->i2s.module], hdmarx, *secondary_handle); |
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1:f90318e0923b | 97 | } |
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1:f90318e0923b | 98 | } |
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1:f90318e0923b | 99 | } |
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1:f90318e0923b | 100 | |
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1:f90318e0923b | 101 | static inline uint32_t i2s_get_mode(i2s_mode_t mode, uint8_t *direction) { |
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1:f90318e0923b | 102 | switch(mode) { |
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1:f90318e0923b | 103 | case SLAVE_TX: |
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1:f90318e0923b | 104 | *direction = DMA_TX; |
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1:f90318e0923b | 105 | return I2S_MODE_SLAVE_TX; |
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1:f90318e0923b | 106 | case SLAVE_RX: |
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1:f90318e0923b | 107 | *direction = DMA_RX; |
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1:f90318e0923b | 108 | return I2S_MODE_SLAVE_RX; |
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1:f90318e0923b | 109 | case MASTER_TX: |
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1:f90318e0923b | 110 | *direction = DMA_TX; |
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1:f90318e0923b | 111 | return I2S_MODE_MASTER_TX; |
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1:f90318e0923b | 112 | case MASTER_RX: |
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1:f90318e0923b | 113 | default: |
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1:f90318e0923b | 114 | *direction = DMA_RX; |
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1:f90318e0923b | 115 | return I2S_MODE_MASTER_RX; |
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1:f90318e0923b | 116 | } |
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1:f90318e0923b | 117 | } |
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1:f90318e0923b | 118 | |
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1:f90318e0923b | 119 | static inline uint32_t i2s_get_priority(i2s_dma_prio_t priority) { |
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1:f90318e0923b | 120 | switch(priority) { |
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1:f90318e0923b | 121 | case LOW: |
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1:f90318e0923b | 122 | return DMA_PRIORITY_LOW; |
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1:f90318e0923b | 123 | case URGENT: |
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1:f90318e0923b | 124 | return DMA_PRIORITY_VERY_HIGH; |
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1:f90318e0923b | 125 | case HIGH: |
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1:f90318e0923b | 126 | return DMA_PRIORITY_HIGH; |
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1:f90318e0923b | 127 | default: |
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1:f90318e0923b | 128 | return DMA_PRIORITY_MEDIUM; |
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1:f90318e0923b | 129 | } |
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1:f90318e0923b | 130 | } |
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1:f90318e0923b | 131 | |
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1:f90318e0923b | 132 | static void dma_i2s_init(i2s_t *obj, bool *use_tx, bool *use_rx, bool circular, i2s_dma_prio_t prio) { |
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1:f90318e0923b | 133 | // DMA declarations |
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1:f90318e0923b | 134 | DMA_HandleTypeDef *primary_handle = &DMaHandles[obj->i2s.module][obj->dma.dma_direction]; |
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1:f90318e0923b | 135 | DMA_HandleTypeDef *secondary_handle = NULL; |
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1:f90318e0923b | 136 | |
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1:f90318e0923b | 137 | // DMA initialization & configuration |
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5:74da3773bf43 | 138 | stm_dma_init(); |
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1:f90318e0923b | 139 | obj->dma.dma[DMA_TX] = obj->dma.dma[DMA_RX] = NULL; |
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1:f90318e0923b | 140 | |
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1:f90318e0923b | 141 | switch(obj->dma.dma_direction) { |
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1:f90318e0923b | 142 | case DMA_TX: |
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1:f90318e0923b | 143 | if(*use_tx) { |
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5:74da3773bf43 | 144 | obj->dma.dma[DMA_TX] = stm_dma_channel_allocate(MAKE_CAP(obj->dma.dma_device, DMA_TX)); |
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7:e9105ae127ad | 145 | MBED_ASSERT(obj->dma.dma[DMA_TX] != STM_DMA_ERROR_OUT_OF_CHANNELS); |
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1:f90318e0923b | 146 | } |
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1:f90318e0923b | 147 | break; |
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1:f90318e0923b | 148 | case DMA_RX: |
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1:f90318e0923b | 149 | default: |
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1:f90318e0923b | 150 | if(*use_rx) { |
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5:74da3773bf43 | 151 | obj->dma.dma[DMA_RX] = stm_dma_channel_allocate(MAKE_CAP(obj->dma.dma_device, DMA_RX)); |
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7:e9105ae127ad | 152 | MBED_ASSERT(obj->dma.dma[DMA_RX] != STM_DMA_ERROR_OUT_OF_CHANNELS); |
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1:f90318e0923b | 153 | } |
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1:f90318e0923b | 154 | break; |
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1:f90318e0923b | 155 | } |
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1:f90318e0923b | 156 | |
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1:f90318e0923b | 157 | // Primary DMA configuration |
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1:f90318e0923b | 158 | if(obj->dma.dma[obj->dma.dma_direction] != NULL) { |
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1:f90318e0923b | 159 | primary_handle->Instance = obj->dma.dma[obj->dma.dma_direction]->dma_stream; |
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1:f90318e0923b | 160 | primary_handle->Init.Channel = obj->dma.dma[obj->dma.dma_direction]->channel_nr; |
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1:f90318e0923b | 161 | primary_handle->Init.Direction = (obj->dma.dma_direction == DMA_TX) ? |
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1:f90318e0923b | 162 | DMA_MEMORY_TO_PERIPH : DMA_PERIPH_TO_MEMORY; |
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1:f90318e0923b | 163 | primary_handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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1:f90318e0923b | 164 | primary_handle->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; |
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1:f90318e0923b | 165 | primary_handle->Init.MemBurst = DMA_MBURST_SINGLE; |
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1:f90318e0923b | 166 | primary_handle->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; |
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1:f90318e0923b | 167 | primary_handle->Init.MemInc = DMA_MINC_ENABLE; |
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1:f90318e0923b | 168 | primary_handle->Init.Mode = (circular ? DMA_CIRCULAR : DMA_NORMAL); |
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1:f90318e0923b | 169 | primary_handle->Init.PeriphBurst = DMA_PBURST_SINGLE; |
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1:f90318e0923b | 170 | primary_handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; |
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1:f90318e0923b | 171 | primary_handle->Init.PeriphInc = DMA_PINC_DISABLE; |
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1:f90318e0923b | 172 | primary_handle->Init.Priority = i2s_get_priority(prio); |
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1:f90318e0923b | 173 | } |
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1:f90318e0923b | 174 | |
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1:f90318e0923b | 175 | // Allocate secondary DMA channel (if full-duplex) |
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1:f90318e0923b | 176 | if(obj->i2s.pin_fdpx != NC) { |
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1:f90318e0923b | 177 | switch(obj->dma.dma_direction) { |
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1:f90318e0923b | 178 | case DMA_TX: |
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1:f90318e0923b | 179 | if(*use_rx) { |
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5:74da3773bf43 | 180 | obj->dma.dma[DMA_RX] = stm_dma_channel_allocate(MAKE_CAP(obj->dma.dma_device, DMA_RX)); |
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1:f90318e0923b | 181 | secondary_handle = &DMaHandles[obj->i2s.module][DMA_RX]; |
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7:e9105ae127ad | 182 | MBED_ASSERT(obj->dma.dma[DMA_RX] != STM_DMA_ERROR_OUT_OF_CHANNELS); |
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1:f90318e0923b | 183 | } |
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1:f90318e0923b | 184 | break; |
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1:f90318e0923b | 185 | case DMA_RX: |
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1:f90318e0923b | 186 | default: |
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1:f90318e0923b | 187 | if(*use_tx) { |
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5:74da3773bf43 | 188 | obj->dma.dma[DMA_TX] = stm_dma_channel_allocate(MAKE_CAP(obj->dma.dma_device, DMA_TX)); |
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1:f90318e0923b | 189 | secondary_handle = &DMaHandles[obj->i2s.module][DMA_TX]; |
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7:e9105ae127ad | 190 | MBED_ASSERT(obj->dma.dma[DMA_TX] != STM_DMA_ERROR_OUT_OF_CHANNELS); |
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1:f90318e0923b | 191 | } |
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1:f90318e0923b | 192 | break; |
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1:f90318e0923b | 193 | } |
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1:f90318e0923b | 194 | } |
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1:f90318e0923b | 195 | |
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1:f90318e0923b | 196 | // Secondary DMA configuration |
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1:f90318e0923b | 197 | if(secondary_handle != NULL) { |
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1:f90318e0923b | 198 | uint8_t secondary_dma_direction = (obj->dma.dma_direction == DMA_TX) ? DMA_RX : DMA_TX; |
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1:f90318e0923b | 199 | |
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1:f90318e0923b | 200 | secondary_handle->Instance = obj->dma.dma[secondary_dma_direction]->dma_stream; |
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1:f90318e0923b | 201 | secondary_handle->Init.Channel = obj->dma.dma[secondary_dma_direction]->channel_nr_fd; |
Wolfgang Betz |
1:f90318e0923b | 202 | secondary_handle->Init.Direction = (secondary_dma_direction == DMA_TX) ? |
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1:f90318e0923b | 203 | DMA_MEMORY_TO_PERIPH : DMA_PERIPH_TO_MEMORY; |
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1:f90318e0923b | 204 | secondary_handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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1:f90318e0923b | 205 | secondary_handle->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; |
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1:f90318e0923b | 206 | secondary_handle->Init.MemBurst = DMA_MBURST_SINGLE; |
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1:f90318e0923b | 207 | secondary_handle->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; |
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1:f90318e0923b | 208 | secondary_handle->Init.MemInc = DMA_MINC_ENABLE; |
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1:f90318e0923b | 209 | secondary_handle->Init.Mode = (circular ? DMA_CIRCULAR : DMA_NORMAL); |
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1:f90318e0923b | 210 | secondary_handle->Init.PeriphBurst = DMA_PBURST_SINGLE; |
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1:f90318e0923b | 211 | secondary_handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; |
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1:f90318e0923b | 212 | secondary_handle->Init.PeriphInc = DMA_PINC_DISABLE; |
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1:f90318e0923b | 213 | secondary_handle->Init.Priority = i2s_get_priority(prio); |
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1:f90318e0923b | 214 | } |
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1:f90318e0923b | 215 | |
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1:f90318e0923b | 216 | if(obj->dma.dma[DMA_TX] == NULL) *use_tx = false; |
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1:f90318e0923b | 217 | if(obj->dma.dma[DMA_RX] == NULL) *use_rx = false; |
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1:f90318e0923b | 218 | |
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1:f90318e0923b | 219 | // don't do anything, if the buffers aren't valid |
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1:f90318e0923b | 220 | if (!use_tx && !use_rx) { |
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1:f90318e0923b | 221 | DEBUG_PRINTF("I2S%u: No DMAs to init\n", obj->i2s.module+1); |
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1:f90318e0923b | 222 | return; |
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1:f90318e0923b | 223 | } |
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1:f90318e0923b | 224 | |
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1:f90318e0923b | 225 | DEBUG_PRINTF("I2S%u: DMA(s) Init\n", obj->i2s.module+1); |
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1:f90318e0923b | 226 | init_dmas(obj); |
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1:f90318e0923b | 227 | } |
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1:f90318e0923b | 228 | |
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1:f90318e0923b | 229 | static void dma_i2s_free(i2s_t *obj, uint8_t direction) { |
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1:f90318e0923b | 230 | const struct dma_stream_s *stream = obj->dma.dma[direction]; |
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1:f90318e0923b | 231 | |
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1:f90318e0923b | 232 | MBED_ASSERT(stream != NULL); |
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1:f90318e0923b | 233 | |
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1:f90318e0923b | 234 | // disable irq |
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1:f90318e0923b | 235 | NVIC_DisableIRQ(stream->dma_stream_irq); |
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1:f90318e0923b | 236 | |
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1:f90318e0923b | 237 | // free channel |
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5:74da3773bf43 | 238 | stm_dma_channel_free((void*)stream); |
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1:f90318e0923b | 239 | obj->dma.dma[direction] = NULL; |
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1:f90318e0923b | 240 | } |
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1:f90318e0923b | 241 | |
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5:74da3773bf43 | 242 | void i2s_init(i2s_t *obj, PinName data, PinName sclk, PinName wsel, PinName fdpx, PinName mclk, i2s_mode_t mode) { |
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1:f90318e0923b | 243 | uint8_t dma_dev = 0, dma_direction = 0; |
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1:f90318e0923b | 244 | |
Wolfgang Betz |
1:f90318e0923b | 245 | // Determine the I2S/SPI to use |
Wolfgang Betz |
1:f90318e0923b | 246 | SPIName i2s_data = (SPIName)pinmap_peripheral(data, PinMap_I2S_DATA); |
Wolfgang Betz |
1:f90318e0923b | 247 | SPIName i2s_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_I2S_SCLK); |
Wolfgang Betz |
1:f90318e0923b | 248 | |
Wolfgang Betz |
1:f90318e0923b | 249 | SPIName i2s_wsel = (SPIName)pinmap_peripheral(wsel, PinMap_I2S_WSEL); |
Wolfgang Betz |
1:f90318e0923b | 250 | SPIName i2s_fdpx = (SPIName)pinmap_peripheral(fdpx, PinMap_I2S_FDPX); |
Wolfgang Betz |
1:f90318e0923b | 251 | |
Wolfgang Betz |
1:f90318e0923b | 252 | SPIName i2s_mclk = (SPIName)pinmap_peripheral(mclk, PinMap_I2S_MCLK); |
Wolfgang Betz |
1:f90318e0923b | 253 | |
Wolfgang Betz |
1:f90318e0923b | 254 | SPIName i2s_merge1 = (SPIName)pinmap_merge(i2s_data, i2s_sclk); |
Wolfgang Betz |
1:f90318e0923b | 255 | SPIName i2s_merge2 = (SPIName)pinmap_merge(i2s_wsel, i2s_fdpx); |
Wolfgang Betz |
1:f90318e0923b | 256 | |
Wolfgang Betz |
1:f90318e0923b | 257 | SPIName i2s_merge3 = (SPIName)pinmap_merge(i2s_merge1, i2s_merge2); |
Wolfgang Betz |
1:f90318e0923b | 258 | SPIName instance = (SPIName)pinmap_merge(i2s_merge3, i2s_mclk); |
Wolfgang Betz |
1:f90318e0923b | 259 | MBED_ASSERT(instance != (SPIName)NC); |
Wolfgang Betz |
1:f90318e0923b | 260 | |
Wolfgang Betz |
1:f90318e0923b | 261 | // Enable I2S/SPI clock and set the right module number |
Wolfgang Betz |
1:f90318e0923b | 262 | switch(instance) { |
Wolfgang Betz |
1:f90318e0923b | 263 | #if defined(I2S1ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 264 | case SPI_1: |
Wolfgang Betz |
1:f90318e0923b | 265 | __SPI1_CLK_ENABLE(); |
Wolfgang Betz |
1:f90318e0923b | 266 | obj->i2s.module = 0; |
Wolfgang Betz |
1:f90318e0923b | 267 | dma_dev = DMA_SPI1; |
Wolfgang Betz |
1:f90318e0923b | 268 | break; |
Wolfgang Betz |
1:f90318e0923b | 269 | #endif |
Wolfgang Betz |
1:f90318e0923b | 270 | #if defined(I2S2ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 271 | case SPI_2: |
Wolfgang Betz |
1:f90318e0923b | 272 | __SPI2_CLK_ENABLE(); |
Wolfgang Betz |
1:f90318e0923b | 273 | obj->i2s.module = 1; |
Wolfgang Betz |
1:f90318e0923b | 274 | dma_dev = DMA_SPI2; |
Wolfgang Betz |
1:f90318e0923b | 275 | break; |
Wolfgang Betz |
1:f90318e0923b | 276 | #endif |
Wolfgang Betz |
1:f90318e0923b | 277 | #if defined(I2S3ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 278 | case SPI_3: |
Wolfgang Betz |
1:f90318e0923b | 279 | __SPI3_CLK_ENABLE(); |
Wolfgang Betz |
1:f90318e0923b | 280 | obj->i2s.module = 2; |
Wolfgang Betz |
1:f90318e0923b | 281 | dma_dev = DMA_SPI3; |
Wolfgang Betz |
1:f90318e0923b | 282 | break; |
Wolfgang Betz |
1:f90318e0923b | 283 | #endif |
Wolfgang Betz |
1:f90318e0923b | 284 | #if defined(I2S4ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 285 | case SPI_4: |
Wolfgang Betz |
1:f90318e0923b | 286 | __SPI4_CLK_ENABLE(); |
Wolfgang Betz |
1:f90318e0923b | 287 | obj->i2s.module = 3; |
Wolfgang Betz |
1:f90318e0923b | 288 | dma_dev = DMA_SPI4; |
Wolfgang Betz |
1:f90318e0923b | 289 | break; |
Wolfgang Betz |
1:f90318e0923b | 290 | #endif |
Wolfgang Betz |
1:f90318e0923b | 291 | #if defined(I2S5ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 292 | case SPI_5: |
Wolfgang Betz |
1:f90318e0923b | 293 | __SPI5_CLK_ENABLE(); |
Wolfgang Betz |
1:f90318e0923b | 294 | obj->i2s.module = 4; |
Wolfgang Betz |
1:f90318e0923b | 295 | dma_dev = DMA_SPI5; |
Wolfgang Betz |
1:f90318e0923b | 296 | break; |
Wolfgang Betz |
1:f90318e0923b | 297 | #endif |
Wolfgang Betz |
1:f90318e0923b | 298 | default: |
Wolfgang Betz |
1:f90318e0923b | 299 | MBED_ASSERT(0); |
Wolfgang Betz |
1:f90318e0923b | 300 | break; |
Wolfgang Betz |
1:f90318e0923b | 301 | } |
Wolfgang Betz |
1:f90318e0923b | 302 | |
Wolfgang Betz |
1:f90318e0923b | 303 | // Save DMA device |
Wolfgang Betz |
1:f90318e0923b | 304 | obj->dma.dma_device = dma_dev; |
Wolfgang Betz |
1:f90318e0923b | 305 | |
Wolfgang Betz |
1:f90318e0923b | 306 | // Configure the I2S pins |
Wolfgang Betz |
1:f90318e0923b | 307 | pinmap_pinout(data, PinMap_I2S_DATA); |
Wolfgang Betz |
1:f90318e0923b | 308 | pinmap_pinout(wsel, PinMap_I2S_WSEL); |
Wolfgang Betz |
1:f90318e0923b | 309 | pinmap_pinout(sclk, PinMap_I2S_SCLK); |
Wolfgang Betz |
1:f90318e0923b | 310 | pinmap_pinout(fdpx, PinMap_I2S_FDPX); |
Wolfgang Betz |
1:f90318e0923b | 311 | pinmap_pinout(mclk, PinMap_I2S_MCLK); |
Wolfgang Betz |
1:f90318e0923b | 312 | |
Wolfgang Betz |
1:f90318e0923b | 313 | obj->i2s.pin_wsel = wsel; |
Wolfgang Betz |
1:f90318e0923b | 314 | obj->i2s.pin_data = data; |
Wolfgang Betz |
1:f90318e0923b | 315 | obj->i2s.pin_sclk = sclk; |
Wolfgang Betz |
1:f90318e0923b | 316 | obj->i2s.pin_fdpx = fdpx; |
Wolfgang Betz |
1:f90318e0923b | 317 | obj->i2s.pin_mclk = mclk; |
Wolfgang Betz |
1:f90318e0923b | 318 | |
Wolfgang Betz |
1:f90318e0923b | 319 | /* Configure PLLI2S */ |
Wolfgang Betz |
1:f90318e0923b | 320 | static bool first_time = true; |
Wolfgang Betz |
1:f90318e0923b | 321 | if(first_time) { |
Wolfgang Betz |
1:f90318e0923b | 322 | RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; |
Wolfgang Betz |
1:f90318e0923b | 323 | |
Wolfgang Betz |
1:f90318e0923b | 324 | /* Get RTCClockSelection */ |
Wolfgang Betz |
1:f90318e0923b | 325 | HAL_RCCEx_GetPeriphCLKConfig(&PeriphClkInitStruct); |
Wolfgang Betz |
1:f90318e0923b | 326 | |
Wolfgang Betz |
8:561d7ee70ef6 | 327 | /* Set default configuration. Default frequency is 44100Hz. */ |
Wolfgang Betz |
1:f90318e0923b | 328 | PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S; |
Wolfgang Betz |
19:ef6ef1795e30 | 329 | PeriphClkInitStruct.PLLI2S.PLLI2SN = 271; // NOTE: using values which are suggested in Table 91 of the |
Wolfgang Betz |
19:ef6ef1795e30 | 330 | PeriphClkInitStruct.PLLI2S.PLLI2SR = 2; // reference manual for master clock enabled & 44100Hz. |
Davide Aliprandi |
2:0c9ce59aee25 | 331 | |
Wolfgang Betz |
1:f90318e0923b | 332 | #ifdef NDEBUG |
Wolfgang Betz |
1:f90318e0923b | 333 | HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); |
Wolfgang Betz |
1:f90318e0923b | 334 | #else |
Wolfgang Betz |
1:f90318e0923b | 335 | HAL_StatusTypeDef ret = HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); |
Wolfgang Betz |
1:f90318e0923b | 336 | #endif |
Wolfgang Betz |
1:f90318e0923b | 337 | MBED_ASSERT(ret == HAL_OK); |
Wolfgang Betz |
1:f90318e0923b | 338 | first_time = false; |
Wolfgang Betz |
1:f90318e0923b | 339 | } |
Wolfgang Betz |
1:f90318e0923b | 340 | |
Wolfgang Betz |
1:f90318e0923b | 341 | // initialize the handle for this master! |
Wolfgang Betz |
1:f90318e0923b | 342 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 343 | |
Wolfgang Betz |
1:f90318e0923b | 344 | handle->Instance = (SPI_TypeDef *)(instance); |
Wolfgang Betz |
1:f90318e0923b | 345 | handle->Init.Mode = i2s_get_mode(mode, &dma_direction); |
Wolfgang Betz |
1:f90318e0923b | 346 | handle->Init.Standard = I2S_STANDARD_PCM_SHORT; |
Wolfgang Betz |
1:f90318e0923b | 347 | handle->Init.DataFormat = I2S_DATAFORMAT_16B; |
Wolfgang Betz |
21:7cf6b1538d29 | 348 | handle->Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE; // WAS: (mclk == NC ? I2S_MCLKOUTPUT_DISABLE : I2S_MCLKOUTPUT_ENABLE); |
Wolfgang Betz |
21:7cf6b1538d29 | 349 | // Simplifies harmonization (TO BE IMPROVED)! |
Wolfgang Betz |
1:f90318e0923b | 350 | handle->Init.AudioFreq = I2S_AUDIOFREQ_44K; |
Wolfgang Betz |
1:f90318e0923b | 351 | handle->Init.CPOL = I2S_CPOL_LOW; |
Wolfgang Betz |
1:f90318e0923b | 352 | handle->Init.ClockSource = I2S_CLOCK_PLL; |
Wolfgang Betz |
1:f90318e0923b | 353 | handle->Init.FullDuplexMode = (fdpx == NC) ? I2S_FULLDUPLEXMODE_DISABLE : I2S_FULLDUPLEXMODE_ENABLE; |
Wolfgang Betz |
1:f90318e0923b | 354 | |
Wolfgang Betz |
1:f90318e0923b | 355 | // Save primary DMA direction |
Wolfgang Betz |
1:f90318e0923b | 356 | obj->dma.dma_direction = dma_direction; |
Wolfgang Betz |
1:f90318e0923b | 357 | |
Wolfgang Betz |
1:f90318e0923b | 358 | DEBUG_PRINTF("I2S%u: Init\n", obj->i2s.module+1); |
Wolfgang Betz |
1:f90318e0923b | 359 | |
Wolfgang Betz |
1:f90318e0923b | 360 | init_i2s(obj); |
Wolfgang Betz |
1:f90318e0923b | 361 | } |
Wolfgang Betz |
1:f90318e0923b | 362 | |
Wolfgang Betz |
5:74da3773bf43 | 363 | void i2s_free(i2s_t *obj) { |
Wolfgang Betz |
1:f90318e0923b | 364 | // Reset I2S and disable clock |
Wolfgang Betz |
1:f90318e0923b | 365 | switch(obj->i2s.module) { |
Wolfgang Betz |
1:f90318e0923b | 366 | #if defined(I2S1ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 367 | case 0: |
Wolfgang Betz |
1:f90318e0923b | 368 | __SPI1_FORCE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 369 | __SPI1_RELEASE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 370 | __SPI1_CLK_DISABLE(); |
Wolfgang Betz |
1:f90318e0923b | 371 | break; |
Wolfgang Betz |
1:f90318e0923b | 372 | #endif |
Wolfgang Betz |
1:f90318e0923b | 373 | #if defined(I2S2ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 374 | case 1: |
Wolfgang Betz |
1:f90318e0923b | 375 | __SPI2_FORCE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 376 | __SPI2_RELEASE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 377 | __SPI2_CLK_DISABLE(); |
Wolfgang Betz |
1:f90318e0923b | 378 | break; |
Wolfgang Betz |
1:f90318e0923b | 379 | #endif |
Wolfgang Betz |
1:f90318e0923b | 380 | #if defined(I2S3ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 381 | case 2: |
Wolfgang Betz |
1:f90318e0923b | 382 | __SPI3_FORCE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 383 | __SPI3_RELEASE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 384 | __SPI3_CLK_DISABLE(); |
Wolfgang Betz |
1:f90318e0923b | 385 | break; |
Wolfgang Betz |
1:f90318e0923b | 386 | #endif |
Wolfgang Betz |
1:f90318e0923b | 387 | #if defined(I2S4ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 388 | case 3: |
Wolfgang Betz |
1:f90318e0923b | 389 | __SPI4_FORCE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 390 | __SPI4_RELEASE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 391 | __SPI4_CLK_DISABLE(); |
Wolfgang Betz |
1:f90318e0923b | 392 | break; |
Wolfgang Betz |
1:f90318e0923b | 393 | #endif |
Wolfgang Betz |
1:f90318e0923b | 394 | #if defined(I2S5ext_BASE) |
Wolfgang Betz |
1:f90318e0923b | 395 | case 4: |
Wolfgang Betz |
1:f90318e0923b | 396 | __SPI5_FORCE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 397 | __SPI5_RELEASE_RESET(); |
Wolfgang Betz |
1:f90318e0923b | 398 | __SPI5_CLK_DISABLE(); |
Wolfgang Betz |
1:f90318e0923b | 399 | break; |
Wolfgang Betz |
1:f90318e0923b | 400 | #endif |
Wolfgang Betz |
1:f90318e0923b | 401 | default: |
Wolfgang Betz |
1:f90318e0923b | 402 | MBED_ASSERT(0); |
Wolfgang Betz |
1:f90318e0923b | 403 | break; |
Wolfgang Betz |
1:f90318e0923b | 404 | } |
Wolfgang Betz |
1:f90318e0923b | 405 | |
Wolfgang Betz |
19:ef6ef1795e30 | 406 | // TODO: what about 'PLLI2S'?!? |
Wolfgang Betz |
19:ef6ef1795e30 | 407 | // for the moment we leave it enabled! |
Wolfgang Betz |
1:f90318e0923b | 408 | |
Wolfgang Betz |
1:f90318e0923b | 409 | // Configure GPIOs |
Wolfgang Betz |
1:f90318e0923b | 410 | pin_function(obj->i2s.pin_wsel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
Wolfgang Betz |
1:f90318e0923b | 411 | pin_function(obj->i2s.pin_data, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
Wolfgang Betz |
1:f90318e0923b | 412 | pin_function(obj->i2s.pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
Wolfgang Betz |
1:f90318e0923b | 413 | pin_function(obj->i2s.pin_fdpx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
Wolfgang Betz |
1:f90318e0923b | 414 | pin_function(obj->i2s.pin_mclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
Wolfgang Betz |
1:f90318e0923b | 415 | |
Wolfgang Betz |
1:f90318e0923b | 416 | DEBUG_PRINTF("I2S%u: Free\n", obj->i2s.module+1); |
Wolfgang Betz |
1:f90318e0923b | 417 | } |
Wolfgang Betz |
1:f90318e0923b | 418 | |
Wolfgang Betz |
5:74da3773bf43 | 419 | void i2s_format(i2s_t *obj, int dbits, int fbits, int polarity) { |
Wolfgang Betz |
1:f90318e0923b | 420 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 421 | |
Wolfgang Betz |
1:f90318e0923b | 422 | // Save new values |
Wolfgang Betz |
1:f90318e0923b | 423 | if (fbits == 16) { // format MUST be 16B |
Wolfgang Betz |
1:f90318e0923b | 424 | handle->Init.DataFormat = I2S_DATAFORMAT_16B; |
Wolfgang Betz |
1:f90318e0923b | 425 | } else { // format may NOT be 16B |
Wolfgang Betz |
1:f90318e0923b | 426 | switch (dbits) { |
Wolfgang Betz |
1:f90318e0923b | 427 | case 16: |
Wolfgang Betz |
1:f90318e0923b | 428 | handle->Init.DataFormat = I2S_DATAFORMAT_16B_EXTENDED; |
Wolfgang Betz |
1:f90318e0923b | 429 | break; |
Wolfgang Betz |
1:f90318e0923b | 430 | case 24: |
Wolfgang Betz |
1:f90318e0923b | 431 | handle->Init.DataFormat = I2S_DATAFORMAT_24B; |
Wolfgang Betz |
1:f90318e0923b | 432 | break; |
Wolfgang Betz |
1:f90318e0923b | 433 | case 32: |
Wolfgang Betz |
1:f90318e0923b | 434 | default: |
Wolfgang Betz |
1:f90318e0923b | 435 | handle->Init.DataFormat = I2S_DATAFORMAT_32B; |
Wolfgang Betz |
1:f90318e0923b | 436 | break; |
Wolfgang Betz |
1:f90318e0923b | 437 | } |
Wolfgang Betz |
1:f90318e0923b | 438 | } |
Wolfgang Betz |
1:f90318e0923b | 439 | |
Wolfgang Betz |
1:f90318e0923b | 440 | handle->Init.CPOL = (polarity == 0) ? I2S_CPOL_LOW : I2S_CPOL_HIGH; |
Wolfgang Betz |
1:f90318e0923b | 441 | |
Wolfgang Betz |
1:f90318e0923b | 442 | DEBUG_PRINTF("I2S%u: Format: %u (%u, %u), %u (%u)\n", obj->i2s.module+1, |
Wolfgang Betz |
1:f90318e0923b | 443 | (unsigned int)handle->Init.DataFormat, (unsigned int)dbits, (unsigned int)fbits, |
Wolfgang Betz |
1:f90318e0923b | 444 | (unsigned int)handle->Init.CPOL, (unsigned int)polarity); |
Wolfgang Betz |
1:f90318e0923b | 445 | |
Wolfgang Betz |
1:f90318e0923b | 446 | init_i2s(obj); |
Wolfgang Betz |
1:f90318e0923b | 447 | } |
Wolfgang Betz |
1:f90318e0923b | 448 | |
Wolfgang Betz |
5:74da3773bf43 | 449 | void i2s_set_mode(i2s_t *obj, i2s_mode_t mode) { |
Wolfgang Betz |
1:f90318e0923b | 450 | uint8_t dma_direction; |
Wolfgang Betz |
1:f90318e0923b | 451 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 452 | |
Wolfgang Betz |
1:f90318e0923b | 453 | handle->Init.Mode = i2s_get_mode(mode, &dma_direction); |
Wolfgang Betz |
1:f90318e0923b | 454 | |
Wolfgang Betz |
1:f90318e0923b | 455 | // Save primary DMA direction |
Wolfgang Betz |
1:f90318e0923b | 456 | obj->dma.dma_direction = dma_direction; |
Wolfgang Betz |
1:f90318e0923b | 457 | |
Wolfgang Betz |
1:f90318e0923b | 458 | DEBUG_PRINTF("I2S%u: Mode: %u (%u)\n", obj->i2s.module+1, |
Wolfgang Betz |
1:f90318e0923b | 459 | (unsigned int)handle->Init.Mode, (unsigned int)mode); |
Wolfgang Betz |
1:f90318e0923b | 460 | |
Wolfgang Betz |
1:f90318e0923b | 461 | init_i2s(obj); |
Wolfgang Betz |
1:f90318e0923b | 462 | } |
Wolfgang Betz |
1:f90318e0923b | 463 | |
Wolfgang Betz |
5:74da3773bf43 | 464 | void i2s_set_protocol(i2s_t *obj, i2s_bitorder_t protocol) { |
Wolfgang Betz |
1:f90318e0923b | 465 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 466 | |
Wolfgang Betz |
1:f90318e0923b | 467 | switch (protocol) { |
Wolfgang Betz |
1:f90318e0923b | 468 | case PHILIPS: |
Wolfgang Betz |
1:f90318e0923b | 469 | handle->Init.Standard = I2S_STANDARD_PHILIPS; |
Wolfgang Betz |
1:f90318e0923b | 470 | break; |
Wolfgang Betz |
1:f90318e0923b | 471 | case MSB: |
Wolfgang Betz |
1:f90318e0923b | 472 | handle->Init.Standard = I2S_STANDARD_MSB; |
Wolfgang Betz |
1:f90318e0923b | 473 | break; |
Wolfgang Betz |
1:f90318e0923b | 474 | case LSB: |
Wolfgang Betz |
1:f90318e0923b | 475 | handle->Init.Standard = I2S_STANDARD_LSB; |
Wolfgang Betz |
1:f90318e0923b | 476 | break; |
Wolfgang Betz |
1:f90318e0923b | 477 | case PCM_SHORT: |
Wolfgang Betz |
1:f90318e0923b | 478 | handle->Init.Standard = I2S_STANDARD_PCM_SHORT; |
Wolfgang Betz |
1:f90318e0923b | 479 | break; |
Wolfgang Betz |
1:f90318e0923b | 480 | case PCM_LONG: |
Wolfgang Betz |
1:f90318e0923b | 481 | default: |
Wolfgang Betz |
1:f90318e0923b | 482 | handle->Init.Standard = I2S_STANDARD_PCM_LONG; |
Wolfgang Betz |
1:f90318e0923b | 483 | break; |
Wolfgang Betz |
1:f90318e0923b | 484 | } |
Wolfgang Betz |
1:f90318e0923b | 485 | |
Wolfgang Betz |
1:f90318e0923b | 486 | DEBUG_PRINTF("I2S%u: Protocol: %u (%u)\n", obj->i2s.module+1, |
Wolfgang Betz |
1:f90318e0923b | 487 | (unsigned int)handle->Init.Standard, (unsigned int)protocol); |
Wolfgang Betz |
1:f90318e0923b | 488 | |
Wolfgang Betz |
1:f90318e0923b | 489 | init_i2s(obj); |
Wolfgang Betz |
1:f90318e0923b | 490 | } |
Wolfgang Betz |
1:f90318e0923b | 491 | |
Wolfgang Betz |
5:74da3773bf43 | 492 | void i2s_audio_frequency(i2s_t *obj, uint32_t hz) { |
Wolfgang Betz |
1:f90318e0923b | 493 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 494 | |
Wolfgang Betz |
1:f90318e0923b | 495 | if (IS_I2S_AUDIO_FREQ(hz) && (hz != I2S_AUDIOFREQ_DEFAULT)) { |
Wolfgang Betz |
1:f90318e0923b | 496 | handle->Init.AudioFreq = hz; |
Wolfgang Betz |
1:f90318e0923b | 497 | } else if (hz < I2S_AUDIOFREQ_8K) { |
Wolfgang Betz |
1:f90318e0923b | 498 | handle->Init.AudioFreq = I2S_AUDIOFREQ_8K; |
Wolfgang Betz |
1:f90318e0923b | 499 | } else { |
Wolfgang Betz |
1:f90318e0923b | 500 | handle->Init.AudioFreq = I2S_AUDIOFREQ_192K; |
Wolfgang Betz |
1:f90318e0923b | 501 | } |
Wolfgang Betz |
1:f90318e0923b | 502 | |
Wolfgang Betz |
1:f90318e0923b | 503 | DEBUG_PRINTF("I2S%u: Audio frequency: %u (%u)\n", obj->i2s.module+1, |
Wolfgang Betz |
1:f90318e0923b | 504 | (unsigned int)handle->Init.AudioFreq, (unsigned int)hz); |
Wolfgang Betz |
1:f90318e0923b | 505 | |
Wolfgang Betz |
1:f90318e0923b | 506 | init_i2s(obj); |
Wolfgang Betz |
1:f90318e0923b | 507 | } |
Wolfgang Betz |
1:f90318e0923b | 508 | |
Wolfgang Betz |
5:74da3773bf43 | 509 | uint8_t i2s_get_module(i2s_t *obj) { |
Wolfgang Betz |
1:f90318e0923b | 510 | return obj->i2s.module; |
Wolfgang Betz |
1:f90318e0923b | 511 | } |
Wolfgang Betz |
1:f90318e0923b | 512 | |
Wolfgang Betz |
1:f90318e0923b | 513 | static void i2s_start_asynch_transfer(i2s_t *obj, transfer_type_t transfer_type, |
Wolfgang Betz |
1:f90318e0923b | 514 | void *tx, void *rx, int length) |
Wolfgang Betz |
1:f90318e0923b | 515 | { |
Wolfgang Betz |
1:f90318e0923b | 516 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 517 | obj->i2s.transfer_type = transfer_type; |
Wolfgang Betz |
1:f90318e0923b | 518 | |
Wolfgang Betz |
1:f90318e0923b | 519 | // the HAL expects number of transfers instead of number of bytes |
Wolfgang Betz |
1:f90318e0923b | 520 | int words; |
Wolfgang Betz |
1:f90318e0923b | 521 | switch(handle->Init.DataFormat) { |
Wolfgang Betz |
1:f90318e0923b | 522 | case I2S_DATAFORMAT_16B: |
Wolfgang Betz |
1:f90318e0923b | 523 | case I2S_DATAFORMAT_16B_EXTENDED: |
Wolfgang Betz |
1:f90318e0923b | 524 | words = length / 2; |
Wolfgang Betz |
1:f90318e0923b | 525 | if(words > 0xFFFC) words = 0xFFFC; // truncate in order to respect max DMA length |
Wolfgang Betz |
1:f90318e0923b | 526 | break; |
Wolfgang Betz |
1:f90318e0923b | 527 | case I2S_DATAFORMAT_24B: |
Wolfgang Betz |
1:f90318e0923b | 528 | case I2S_DATAFORMAT_32B: |
Wolfgang Betz |
1:f90318e0923b | 529 | default: |
Wolfgang Betz |
1:f90318e0923b | 530 | words = length / 4; |
Wolfgang Betz |
1:f90318e0923b | 531 | if(words > 0x7FFC) words = 0x7FFC; // truncate in order to respect max DMA length |
Wolfgang Betz |
1:f90318e0923b | 532 | break; |
Wolfgang Betz |
1:f90318e0923b | 533 | } |
Wolfgang Betz |
1:f90318e0923b | 534 | |
Wolfgang Betz |
1:f90318e0923b | 535 | // enable the right hal transfer |
Wolfgang Betz |
1:f90318e0923b | 536 | int rc = 0; |
Wolfgang Betz |
1:f90318e0923b | 537 | switch(transfer_type) { |
Wolfgang Betz |
1:f90318e0923b | 538 | case I2S_TRANSFER_TYPE_TXRX: |
Wolfgang Betz |
1:f90318e0923b | 539 | // enable the interrupts |
Wolfgang Betz |
1:f90318e0923b | 540 | NVIC_EnableIRQ(obj->dma.dma[DMA_TX]->dma_stream_irq); |
Wolfgang Betz |
1:f90318e0923b | 541 | NVIC_EnableIRQ(obj->dma.dma[DMA_RX]->dma_stream_irq); |
Wolfgang Betz |
1:f90318e0923b | 542 | // trigger DMA transfers |
Wolfgang Betz |
1:f90318e0923b | 543 | rc = HAL_I2SEx_TransmitReceive_DMA(handle, (uint16_t*)tx, (uint16_t*)rx, (uint16_t)words); |
Wolfgang Betz |
1:f90318e0923b | 544 | break; |
Wolfgang Betz |
1:f90318e0923b | 545 | case I2S_TRANSFER_TYPE_TX: |
Wolfgang Betz |
1:f90318e0923b | 546 | // enable the interrupt |
Wolfgang Betz |
1:f90318e0923b | 547 | NVIC_EnableIRQ(obj->dma.dma[DMA_TX]->dma_stream_irq); |
Wolfgang Betz |
1:f90318e0923b | 548 | // trigger DMA transfer |
Wolfgang Betz |
1:f90318e0923b | 549 | rc = HAL_I2S_Transmit_DMA(handle, (uint16_t*)tx, (uint16_t)words); |
Wolfgang Betz |
1:f90318e0923b | 550 | break; |
Wolfgang Betz |
1:f90318e0923b | 551 | case I2S_TRANSFER_TYPE_RX: |
Wolfgang Betz |
1:f90318e0923b | 552 | // enable the interrupt |
Wolfgang Betz |
1:f90318e0923b | 553 | NVIC_EnableIRQ(obj->dma.dma[DMA_RX]->dma_stream_irq); |
Wolfgang Betz |
1:f90318e0923b | 554 | // trigger DMA transfer |
Wolfgang Betz |
1:f90318e0923b | 555 | rc = HAL_I2S_Receive_DMA(handle, (uint16_t*)rx, (uint16_t)words); |
Wolfgang Betz |
1:f90318e0923b | 556 | break; |
Wolfgang Betz |
1:f90318e0923b | 557 | } |
Wolfgang Betz |
1:f90318e0923b | 558 | |
Wolfgang Betz |
1:f90318e0923b | 559 | if (rc) { |
Wolfgang Betz |
1:f90318e0923b | 560 | DEBUG_PRINTF("I2S%u: RC=%d\n", obj->i2s.module+1, rc); |
Wolfgang Betz |
1:f90318e0923b | 561 | } |
Wolfgang Betz |
1:f90318e0923b | 562 | |
Wolfgang Betz |
1:f90318e0923b | 563 | return; |
Wolfgang Betz |
1:f90318e0923b | 564 | } |
Wolfgang Betz |
1:f90318e0923b | 565 | |
Wolfgang Betz |
1:f90318e0923b | 566 | // asynchronous API |
Wolfgang Betz |
1:f90318e0923b | 567 | void i2s_transfer(i2s_t *obj, |
Wolfgang Betz |
1:f90318e0923b | 568 | void *tx, int tx_length, |
Wolfgang Betz |
1:f90318e0923b | 569 | void *rx, int rx_length, |
Wolfgang Betz |
1:f90318e0923b | 570 | bool circular, i2s_dma_prio_t prio, |
Wolfgang Betz |
1:f90318e0923b | 571 | uint32_t handler_tx, uint32_t handler_rx, uint32_t event) |
Wolfgang Betz |
1:f90318e0923b | 572 | { |
Wolfgang Betz |
1:f90318e0923b | 573 | // check which use-case we have |
Wolfgang Betz |
1:f90318e0923b | 574 | bool use_tx = (tx != NULL && tx_length > 0); |
Wolfgang Betz |
1:f90318e0923b | 575 | bool use_rx = (rx != NULL && rx_length > 0); |
Wolfgang Betz |
1:f90318e0923b | 576 | |
Wolfgang Betz |
1:f90318e0923b | 577 | // Init DMAs |
Wolfgang Betz |
1:f90318e0923b | 578 | dma_i2s_init(obj, &use_tx, &use_rx, circular, prio); |
Wolfgang Betz |
1:f90318e0923b | 579 | |
Wolfgang Betz |
1:f90318e0923b | 580 | // don't do anything, if the buffers aren't valid |
Wolfgang Betz |
1:f90318e0923b | 581 | if (!use_tx && !use_rx) |
Wolfgang Betz |
1:f90318e0923b | 582 | return; |
Wolfgang Betz |
1:f90318e0923b | 583 | |
Wolfgang Betz |
1:f90318e0923b | 584 | // copy the buffers to the I2S object |
Wolfgang Betz |
1:f90318e0923b | 585 | obj->tx_buff.buffer = tx; |
Wolfgang Betz |
1:f90318e0923b | 586 | obj->tx_buff.length = tx_length; |
Wolfgang Betz |
1:f90318e0923b | 587 | obj->tx_buff.pos = 0; |
Wolfgang Betz |
1:f90318e0923b | 588 | obj->tx_buff.width = 16; |
Wolfgang Betz |
1:f90318e0923b | 589 | |
Wolfgang Betz |
1:f90318e0923b | 590 | obj->rx_buff.buffer = rx; |
Wolfgang Betz |
1:f90318e0923b | 591 | obj->rx_buff.length = rx_length; |
Wolfgang Betz |
1:f90318e0923b | 592 | obj->rx_buff.pos = 0; |
Wolfgang Betz |
1:f90318e0923b | 593 | obj->rx_buff.width = obj->tx_buff.width; |
Wolfgang Betz |
1:f90318e0923b | 594 | |
Wolfgang Betz |
1:f90318e0923b | 595 | obj->i2s.event = event; |
Wolfgang Betz |
1:f90318e0923b | 596 | |
Wolfgang Betz |
1:f90318e0923b | 597 | DEBUG_PRINTF("I2S%u: Transfer: %u, %u\n", obj->i2s.module+1, tx_length, rx_length); |
Wolfgang Betz |
1:f90318e0923b | 598 | |
Wolfgang Betz |
1:f90318e0923b | 599 | // register the thunking handler |
Wolfgang Betz |
1:f90318e0923b | 600 | if(use_tx) { |
Wolfgang Betz |
1:f90318e0923b | 601 | NVIC_SetVector(obj->dma.dma[DMA_TX]->dma_stream_irq, handler_tx); |
Wolfgang Betz |
1:f90318e0923b | 602 | } |
Wolfgang Betz |
1:f90318e0923b | 603 | if(use_rx) { |
Wolfgang Betz |
1:f90318e0923b | 604 | NVIC_SetVector(obj->dma.dma[DMA_RX]->dma_stream_irq, handler_rx); |
Wolfgang Betz |
1:f90318e0923b | 605 | } |
Wolfgang Betz |
1:f90318e0923b | 606 | |
Wolfgang Betz |
1:f90318e0923b | 607 | // enable the right hal transfer |
Wolfgang Betz |
1:f90318e0923b | 608 | if (use_tx && use_rx) { |
Wolfgang Betz |
1:f90318e0923b | 609 | int size = (tx_length < rx_length)? tx_length : rx_length; |
Wolfgang Betz |
1:f90318e0923b | 610 | i2s_start_asynch_transfer(obj, I2S_TRANSFER_TYPE_TXRX, tx, rx, size); |
Wolfgang Betz |
1:f90318e0923b | 611 | } else if (use_tx) { |
Wolfgang Betz |
1:f90318e0923b | 612 | i2s_start_asynch_transfer(obj, I2S_TRANSFER_TYPE_TX, tx, NULL, tx_length); |
Wolfgang Betz |
1:f90318e0923b | 613 | } else if (use_rx) { |
Wolfgang Betz |
1:f90318e0923b | 614 | i2s_start_asynch_transfer(obj, I2S_TRANSFER_TYPE_RX, NULL, rx, rx_length); |
Wolfgang Betz |
1:f90318e0923b | 615 | } |
Wolfgang Betz |
1:f90318e0923b | 616 | } |
Wolfgang Betz |
1:f90318e0923b | 617 | |
Wolfgang Betz |
5:74da3773bf43 | 618 | uint32_t i2s_irq_handler_asynch(i2s_t *obj, uint8_t direction) { |
Wolfgang Betz |
1:f90318e0923b | 619 | direction = (direction == I2S_TX_EVENT) ? DMA_TX : DMA_RX; |
Wolfgang Betz |
1:f90318e0923b | 620 | |
Wolfgang Betz |
1:f90318e0923b | 621 | // use the right instance |
Wolfgang Betz |
1:f90318e0923b | 622 | I2S_HandleTypeDef *i2s_handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 623 | DMA_HandleTypeDef *dma_handle = (direction == DMA_TX) ? i2s_handle->hdmatx : i2s_handle->hdmarx; |
Wolfgang Betz |
1:f90318e0923b | 624 | |
Wolfgang Betz |
1:f90318e0923b | 625 | MBED_ASSERT(dma_handle != NULL); |
Wolfgang Betz |
1:f90318e0923b | 626 | |
Wolfgang Betz |
1:f90318e0923b | 627 | int event = 0; |
Wolfgang Betz |
1:f90318e0923b | 628 | |
Wolfgang Betz |
1:f90318e0923b | 629 | // call the Cube handler, this will update the handle |
Wolfgang Betz |
1:f90318e0923b | 630 | HAL_DMA_IRQHandler(dma_handle); |
Wolfgang Betz |
1:f90318e0923b | 631 | |
Wolfgang Betz |
1:f90318e0923b | 632 | switch(HAL_I2S_GetState(i2s_handle)) { |
Wolfgang Betz |
1:f90318e0923b | 633 | case HAL_I2S_STATE_READY: { |
Wolfgang Betz |
16:04e1abb4cca3 | 634 | // adjust buffer positions |
Wolfgang Betz |
1:f90318e0923b | 635 | int tx_size = (i2s_handle->TxXferSize - i2s_handle->TxXferCount); |
Wolfgang Betz |
1:f90318e0923b | 636 | int rx_size = (i2s_handle->RxXferSize - i2s_handle->RxXferCount); |
Wolfgang Betz |
1:f90318e0923b | 637 | |
Wolfgang Betz |
1:f90318e0923b | 638 | // take data format into consideration |
Wolfgang Betz |
1:f90318e0923b | 639 | switch(i2s_handle->Init.DataFormat) { |
Wolfgang Betz |
1:f90318e0923b | 640 | case I2S_DATAFORMAT_16B: |
Wolfgang Betz |
1:f90318e0923b | 641 | case I2S_DATAFORMAT_16B_EXTENDED: |
Wolfgang Betz |
1:f90318e0923b | 642 | tx_size *= 2; |
Wolfgang Betz |
1:f90318e0923b | 643 | rx_size *= 2; |
Wolfgang Betz |
1:f90318e0923b | 644 | break; |
Wolfgang Betz |
1:f90318e0923b | 645 | case I2S_DATAFORMAT_24B: |
Wolfgang Betz |
1:f90318e0923b | 646 | case I2S_DATAFORMAT_32B: |
Wolfgang Betz |
1:f90318e0923b | 647 | default: |
Wolfgang Betz |
1:f90318e0923b | 648 | tx_size *= 4; |
Wolfgang Betz |
1:f90318e0923b | 649 | rx_size *= 4; |
Wolfgang Betz |
1:f90318e0923b | 650 | break; |
Wolfgang Betz |
1:f90318e0923b | 651 | } |
Wolfgang Betz |
1:f90318e0923b | 652 | |
Wolfgang Betz |
1:f90318e0923b | 653 | // adjust buffer positions |
Wolfgang Betz |
1:f90318e0923b | 654 | if (obj->i2s.transfer_type != I2S_TRANSFER_TYPE_RX) { |
Wolfgang Betz |
1:f90318e0923b | 655 | obj->tx_buff.pos += tx_size; |
Wolfgang Betz |
1:f90318e0923b | 656 | } |
Wolfgang Betz |
1:f90318e0923b | 657 | if (obj->i2s.transfer_type != I2S_TRANSFER_TYPE_TX) { |
Wolfgang Betz |
1:f90318e0923b | 658 | obj->rx_buff.pos += rx_size; |
Wolfgang Betz |
1:f90318e0923b | 659 | } |
Wolfgang Betz |
1:f90318e0923b | 660 | |
Wolfgang Betz |
1:f90318e0923b | 661 | if (i2s_handle->TxXferCount > 0) { |
Wolfgang Betz |
1:f90318e0923b | 662 | DEBUG_PRINTF("I2S%u: TxXferCount: %u\n", obj->i2s.module+1, i2s_handle->TxXferCount); |
Wolfgang Betz |
1:f90318e0923b | 663 | } |
Wolfgang Betz |
1:f90318e0923b | 664 | if (i2s_handle->RxXferCount > 0) { |
Wolfgang Betz |
1:f90318e0923b | 665 | DEBUG_PRINTF("I2S%u: RxXferCount: %u\n", obj->i2s.module+1, i2s_handle->RxXferCount); |
Wolfgang Betz |
1:f90318e0923b | 666 | } |
Wolfgang Betz |
1:f90318e0923b | 667 | } |
Wolfgang Betz |
5:74da3773bf43 | 668 | /* no break */ |
Wolfgang Betz |
1:f90318e0923b | 669 | |
Wolfgang Betz |
1:f90318e0923b | 670 | case HAL_I2S_STATE_BUSY_TX: |
Wolfgang Betz |
1:f90318e0923b | 671 | case HAL_I2S_STATE_BUSY_RX: |
Wolfgang Betz |
1:f90318e0923b | 672 | case HAL_I2S_STATE_BUSY_TX_RX: { |
Wolfgang Betz |
1:f90318e0923b | 673 | int error = HAL_I2S_GetError(i2s_handle); |
Wolfgang Betz |
1:f90318e0923b | 674 | |
Wolfgang Betz |
1:f90318e0923b | 675 | if(error != HAL_I2S_ERROR_NONE) { |
Wolfgang Betz |
1:f90318e0923b | 676 | // something went wrong and the transfer has definitely completed |
Wolfgang Betz |
1:f90318e0923b | 677 | event = ((direction == DMA_TX) ? I2S_EVENT_TX_ERROR : I2S_EVENT_RX_ERROR) | I2S_EVENT_INTERNAL_TRANSFER_COMPLETE; |
Wolfgang Betz |
1:f90318e0923b | 678 | |
Wolfgang Betz |
1:f90318e0923b | 679 | if (error & HAL_I2S_ERROR_OVR) { |
Wolfgang Betz |
1:f90318e0923b | 680 | // buffer overrun |
Wolfgang Betz |
1:f90318e0923b | 681 | event |= I2S_EVENT_RX_OVERFLOW; |
Wolfgang Betz |
1:f90318e0923b | 682 | } |
Wolfgang Betz |
1:f90318e0923b | 683 | |
Wolfgang Betz |
1:f90318e0923b | 684 | if (error & HAL_I2S_ERROR_UDR) { |
Wolfgang Betz |
1:f90318e0923b | 685 | // buffer underrun |
Wolfgang Betz |
1:f90318e0923b | 686 | event |= I2S_EVENT_TX_UNDERRUN; |
Wolfgang Betz |
1:f90318e0923b | 687 | } |
Wolfgang Betz |
1:f90318e0923b | 688 | |
Wolfgang Betz |
1:f90318e0923b | 689 | // cleanup DMA (after error) |
Wolfgang Betz |
1:f90318e0923b | 690 | dma_i2s_free(obj, direction); |
Wolfgang Betz |
1:f90318e0923b | 691 | } else { // no error detected |
Wolfgang Betz |
1:f90318e0923b | 692 | HAL_DMA_StateTypeDef dma_state = HAL_DMA_GetState(dma_handle); |
Wolfgang Betz |
1:f90318e0923b | 693 | |
Wolfgang Betz |
1:f90318e0923b | 694 | switch(dma_state) { |
Wolfgang Betz |
1:f90318e0923b | 695 | case HAL_DMA_STATE_READY_HALF_MEM0: |
Wolfgang Betz |
1:f90318e0923b | 696 | case HAL_DMA_STATE_READY_HALF_MEM1: |
Wolfgang Betz |
1:f90318e0923b | 697 | event = ((direction == DMA_TX) ? I2S_EVENT_TX_HALF_COMPLETE : I2S_EVENT_RX_HALF_COMPLETE); |
Wolfgang Betz |
1:f90318e0923b | 698 | break; |
Wolfgang Betz |
1:f90318e0923b | 699 | case HAL_DMA_STATE_READY_MEM0: |
Wolfgang Betz |
1:f90318e0923b | 700 | case HAL_DMA_STATE_READY_MEM1: |
Wolfgang Betz |
1:f90318e0923b | 701 | event = ((direction == DMA_TX) ? I2S_EVENT_TX_COMPLETE : I2S_EVENT_RX_COMPLETE); |
Wolfgang Betz |
1:f90318e0923b | 702 | |
Wolfgang Betz |
1:f90318e0923b | 703 | if(dma_handle->Init.Mode != DMA_CIRCULAR) { |
Wolfgang Betz |
1:f90318e0923b | 704 | if (!i2s_active(obj)) { // Check for full-duplex transfer complete! |
Wolfgang Betz |
1:f90318e0923b | 705 | event |= I2S_EVENT_INTERNAL_TRANSFER_COMPLETE; |
Wolfgang Betz |
1:f90318e0923b | 706 | } |
Wolfgang Betz |
1:f90318e0923b | 707 | |
Wolfgang Betz |
1:f90318e0923b | 708 | // cleanup DMA (because we are done) |
Wolfgang Betz |
1:f90318e0923b | 709 | dma_i2s_free(obj, direction); |
Wolfgang Betz |
1:f90318e0923b | 710 | } |
Wolfgang Betz |
1:f90318e0923b | 711 | break; |
Wolfgang Betz |
1:f90318e0923b | 712 | default: |
Wolfgang Betz |
19:ef6ef1795e30 | 713 | printf("(%s, %d): dma_state=0x%x\r\n", __func__, __LINE__, (int)dma_state); |
Wolfgang Betz |
1:f90318e0923b | 714 | MBED_ASSERT(0); |
Wolfgang Betz |
1:f90318e0923b | 715 | break; |
Wolfgang Betz |
1:f90318e0923b | 716 | } |
Wolfgang Betz |
1:f90318e0923b | 717 | } |
Wolfgang Betz |
1:f90318e0923b | 718 | } |
Wolfgang Betz |
1:f90318e0923b | 719 | break; |
Wolfgang Betz |
1:f90318e0923b | 720 | |
Wolfgang Betz |
1:f90318e0923b | 721 | default: |
Wolfgang Betz |
1:f90318e0923b | 722 | // nothing to do?!? |
Wolfgang Betz |
1:f90318e0923b | 723 | break; |
Wolfgang Betz |
1:f90318e0923b | 724 | } |
Wolfgang Betz |
1:f90318e0923b | 725 | |
Wolfgang Betz |
1:f90318e0923b | 726 | if (event) DEBUG_PRINTF("I2S%u: Event: 0x%x\n", obj->i2s.module+1, event); |
Wolfgang Betz |
1:f90318e0923b | 727 | |
Wolfgang Betz |
1:f90318e0923b | 728 | return (event & (obj->i2s.event | I2S_EVENT_INTERNAL_TRANSFER_COMPLETE)); |
Wolfgang Betz |
1:f90318e0923b | 729 | } |
Wolfgang Betz |
1:f90318e0923b | 730 | |
Wolfgang Betz |
5:74da3773bf43 | 731 | uint8_t i2s_active(i2s_t *obj) { |
Wolfgang Betz |
1:f90318e0923b | 732 | I2S_HandleTypeDef *handle = &I2sHandle[obj->i2s.module]; |
Wolfgang Betz |
1:f90318e0923b | 733 | HAL_I2S_StateTypeDef state = HAL_I2S_GetState(handle); |
Wolfgang Betz |
1:f90318e0923b | 734 | |
Wolfgang Betz |
1:f90318e0923b | 735 | switch(state) { |
Wolfgang Betz |
1:f90318e0923b | 736 | case HAL_I2S_STATE_RESET: |
Wolfgang Betz |
1:f90318e0923b | 737 | case HAL_I2S_STATE_READY: |
Wolfgang Betz |
1:f90318e0923b | 738 | case HAL_I2S_STATE_ERROR: |
Wolfgang Betz |
1:f90318e0923b | 739 | return 0; |
Wolfgang Betz |
1:f90318e0923b | 740 | default: |
Wolfgang Betz |
1:f90318e0923b | 741 | return -1; |
Wolfgang Betz |
1:f90318e0923b | 742 | } |
Wolfgang Betz |
1:f90318e0923b | 743 | } |
Wolfgang Betz |
1:f90318e0923b | 744 | |
Wolfgang Betz |
5:74da3773bf43 | 745 | void i2s_abort_asynch(i2s_t *obj) { |
Wolfgang Betz |
1:f90318e0923b | 746 | I2S_HandleTypeDef *i2s_handle = &I2sHandle[obj->i2s.module]; |
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1:f90318e0923b | 747 | |
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1:f90318e0923b | 748 | // Stop transfer |
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1:f90318e0923b | 749 | HAL_I2S_DMAStop(i2s_handle); |
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1:f90318e0923b | 750 | |
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1:f90318e0923b | 751 | if(obj->dma.dma[DMA_TX] != NULL) { |
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1:f90318e0923b | 752 | DMA_HandleTypeDef *dma_handle_tx = &DMaHandles[obj->i2s.module][DMA_TX]; |
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1:f90318e0923b | 753 | |
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1:f90318e0923b | 754 | // disable interrupt & free resource |
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1:f90318e0923b | 755 | dma_i2s_free(obj, DMA_TX); |
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1:f90318e0923b | 756 | |
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1:f90318e0923b | 757 | //clean up |
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1:f90318e0923b | 758 | __HAL_DMA_DISABLE(dma_handle_tx); |
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1:f90318e0923b | 759 | HAL_DMA_DeInit(dma_handle_tx); |
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1:f90318e0923b | 760 | HAL_DMA_Init(dma_handle_tx); |
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1:f90318e0923b | 761 | __HAL_DMA_ENABLE(dma_handle_tx); |
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1:f90318e0923b | 762 | } |
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1:f90318e0923b | 763 | if(obj->dma.dma[DMA_RX] != NULL) { |
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1:f90318e0923b | 764 | DMA_HandleTypeDef *dma_handle_rx = &DMaHandles[obj->i2s.module][DMA_RX]; |
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1:f90318e0923b | 765 | |
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1:f90318e0923b | 766 | // disable interrupt & free resource |
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1:f90318e0923b | 767 | dma_i2s_free(obj, DMA_RX); |
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1:f90318e0923b | 768 | |
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1:f90318e0923b | 769 | //clean up |
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1:f90318e0923b | 770 | __HAL_DMA_DISABLE(dma_handle_rx); |
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1:f90318e0923b | 771 | HAL_DMA_DeInit(dma_handle_rx); |
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1:f90318e0923b | 772 | HAL_DMA_Init(dma_handle_rx); |
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1:f90318e0923b | 773 | __HAL_DMA_ENABLE(dma_handle_rx); |
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1:f90318e0923b | 774 | } |
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1:f90318e0923b | 775 | |
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1:f90318e0923b | 776 | // clean-up I2S |
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1:f90318e0923b | 777 | __HAL_I2S_DISABLE(i2s_handle); |
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1:f90318e0923b | 778 | HAL_I2S_DeInit(i2s_handle); |
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1:f90318e0923b | 779 | HAL_I2S_Init(i2s_handle); |
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1:f90318e0923b | 780 | __HAL_I2S_ENABLE(i2s_handle); |
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1:f90318e0923b | 781 | } |
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1:f90318e0923b | 782 | |
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9:c4c2240e06d6 | 783 | /*** Code for harmonizing frequencies ***/ |
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9:c4c2240e06d6 | 784 | static inline I2S_HandleTypeDef *i2s_get_handle(i2s_t *obj) |
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9:c4c2240e06d6 | 785 | { |
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9:c4c2240e06d6 | 786 | return (I2S_HandleTypeDef *) &I2sHandle[obj->i2s.module]; |
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9:c4c2240e06d6 | 787 | } |
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9:c4c2240e06d6 | 788 | |
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20:54b1a9b620c5 | 789 | static float i2s_compute_closest_frequency(i2s_t *dev_i2s, uint32_t target_freq) { |
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9:c4c2240e06d6 | 790 | uint32_t i2sclk = 0U, i2sdiv = 2U, i2sodd = 0U, packetlength = 1U, tmp = 0U; |
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9:c4c2240e06d6 | 791 | I2S_HandleTypeDef *hi2s; |
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9:c4c2240e06d6 | 792 | |
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9:c4c2240e06d6 | 793 | /* Get the I2S handle. */ |
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9:c4c2240e06d6 | 794 | hi2s = i2s_get_handle(dev_i2s); |
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9:c4c2240e06d6 | 795 | |
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9:c4c2240e06d6 | 796 | /* Check the frame length (For the Prescaler computing). */ |
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9:c4c2240e06d6 | 797 | if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B) |
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9:c4c2240e06d6 | 798 | { |
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9:c4c2240e06d6 | 799 | /* Packet length is 32 bits */ |
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9:c4c2240e06d6 | 800 | packetlength = 2U; |
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9:c4c2240e06d6 | 801 | } |
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9:c4c2240e06d6 | 802 | |
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9:c4c2240e06d6 | 803 | /* Get I2S source Clock frequency. */ |
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9:c4c2240e06d6 | 804 | i2sclk = I2S_GetInputClock(hi2s); |
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9:c4c2240e06d6 | 805 | |
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9:c4c2240e06d6 | 806 | /* Compute the Real divider depending on the MCLK output state, with a floating point. */ |
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9:c4c2240e06d6 | 807 | if (hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
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9:c4c2240e06d6 | 808 | { |
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9:c4c2240e06d6 | 809 | /* MCLK output is enabled. */ |
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14:0060a9850c5f | 810 | tmp = (uint32_t)(((((i2sclk / 256U) * 10U) / target_freq)) + 5U); |
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9:c4c2240e06d6 | 811 | } |
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9:c4c2240e06d6 | 812 | else |
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9:c4c2240e06d6 | 813 | { |
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9:c4c2240e06d6 | 814 | /* MCLK output is disabled. */ |
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14:0060a9850c5f | 815 | tmp = (uint32_t)(((((i2sclk / (32U * packetlength)) * 10U) / target_freq)) + 5U); |
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9:c4c2240e06d6 | 816 | } |
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9:c4c2240e06d6 | 817 | |
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9:c4c2240e06d6 | 818 | /* Remove the flatting point. */ |
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9:c4c2240e06d6 | 819 | tmp = tmp / 10U; |
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9:c4c2240e06d6 | 820 | |
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9:c4c2240e06d6 | 821 | /* Check the parity of the divider. */ |
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9:c4c2240e06d6 | 822 | i2sodd = (uint32_t)(tmp & (uint32_t)1U); |
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9:c4c2240e06d6 | 823 | |
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9:c4c2240e06d6 | 824 | /* Compute the i2sdiv prescaler. */ |
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9:c4c2240e06d6 | 825 | i2sdiv = (uint32_t)((tmp - i2sodd) / 2U); |
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9:c4c2240e06d6 | 826 | |
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9:c4c2240e06d6 | 827 | /* Test if the divider is 1 or 0 or greater than 0xFF. */ |
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9:c4c2240e06d6 | 828 | if ((i2sdiv < 2U) || (i2sdiv > 0xFFU)) |
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9:c4c2240e06d6 | 829 | { |
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9:c4c2240e06d6 | 830 | /* Set the default values. */ |
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9:c4c2240e06d6 | 831 | i2sdiv = 2U; |
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9:c4c2240e06d6 | 832 | i2sodd = 0U; |
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9:c4c2240e06d6 | 833 | } |
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9:c4c2240e06d6 | 834 | |
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9:c4c2240e06d6 | 835 | /* Compute the I2S frequencies. */ |
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9:c4c2240e06d6 | 836 | uint32_t format_factor = (hi2s->Init.DataFormat == I2S_DATAFORMAT_16B ? 16 : 32); |
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9:c4c2240e06d6 | 837 | uint32_t mclk_factor = (hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE ? (format_factor == 16 ? 8 : 4) : 1); |
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18:1ccbfe84f550 | 838 | float f = ((float)i2sclk / (float)(2 * format_factor * ((2 * i2sdiv) + i2sodd) * mclk_factor)); |
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9:c4c2240e06d6 | 839 | |
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20:54b1a9b620c5 | 840 | return f; |
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9:c4c2240e06d6 | 841 | } |
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9:c4c2240e06d6 | 842 | |
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14:0060a9850c5f | 843 | /** Compute the real frequency of a given I2S objects. |
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9:c4c2240e06d6 | 844 | * |
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9:c4c2240e06d6 | 845 | * @param dev_i2s reference to the I2S object. |
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14:0060a9850c5f | 846 | * @return the computed real frequency. |
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9:c4c2240e06d6 | 847 | */ |
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20:54b1a9b620c5 | 848 | static inline float i2s_compute_real_frequency(i2s_t *dev_i2s) |
Davide Aliprandi |
4:21603d68bcf7 | 849 | { |
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9:c4c2240e06d6 | 850 | I2S_HandleTypeDef *hi2s; |
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9:c4c2240e06d6 | 851 | |
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9:c4c2240e06d6 | 852 | /* Get the I2S handle. */ |
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9:c4c2240e06d6 | 853 | hi2s = i2s_get_handle(dev_i2s); |
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9:c4c2240e06d6 | 854 | |
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14:0060a9850c5f | 855 | return i2s_compute_closest_frequency(dev_i2s, hi2s->Init.AudioFreq); |
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9:c4c2240e06d6 | 856 | } |
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9:c4c2240e06d6 | 857 | |
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14:0060a9850c5f | 858 | /** Computing the harmonized frequencies of two I2S peripherals. |
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14:0060a9850c5f | 859 | * |
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14:0060a9850c5f | 860 | * @param[in] i2s_t_l reference to the i2s_t structure with the lower frequency. |
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14:0060a9850c5f | 861 | * @param[in] i2s_t_h reference to the i2s_t structure with the higher frequency. |
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14:0060a9850c5f | 862 | * @param[in|out] ptr_low_freq pointer to lower frequency. |
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14:0060a9850c5f | 863 | * @param[in|out] ptr_high_freq pointer to higher frequency. |
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14:0060a9850c5f | 864 | * @param[in] real_low_freq real higher frequency. |
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14:0060a9850c5f | 865 | * @param[in] real_high_freq real lower frequency. |
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14:0060a9850c5f | 866 | * @return "0" if the frequencies have been harmonized, "-1" otherwise. |
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14:0060a9850c5f | 867 | */ |
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20:54b1a9b620c5 | 868 | static int8_t i2s_compute_harmonized_frequencies(i2s_t *i2s_t_l, i2s_t *i2s_t_h, uint32_t *ptr_low_freq, uint32_t *ptr_high_freq, |
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20:54b1a9b620c5 | 869 | float real_low_freq, float real_high_freq) |
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14:0060a9850c5f | 870 | { |
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21:7cf6b1538d29 | 871 | /* currently unused parameters */ |
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21:7cf6b1538d29 | 872 | (void)i2s_t_h; |
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21:7cf6b1538d29 | 873 | (void)ptr_high_freq; |
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21:7cf6b1538d29 | 874 | |
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14:0060a9850c5f | 875 | /* Returning if the two real frequencies are already multiple one of the other. */ |
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20:54b1a9b620c5 | 876 | float division = real_high_freq / real_low_freq; |
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18:1ccbfe84f550 | 877 | float rest = (division - (uint32_t)division); |
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14:0060a9850c5f | 878 | MBED_ASSERT(rest >= 0); |
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14:0060a9850c5f | 879 | if (rest == 0) { |
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14:0060a9850c5f | 880 | return 0; |
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14:0060a9850c5f | 881 | } |
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14:0060a9850c5f | 882 | |
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14:0060a9850c5f | 883 | /* Computing the harmonized frequencies so that they are multiple one of the |
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14:0060a9850c5f | 884 | other by a certain factor. */ |
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14:0060a9850c5f | 885 | uint32_t multiplier = ((rest >= 0.5) ? ((uint32_t)division + 1) : (uint32_t)division); |
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21:7cf6b1538d29 | 886 | |
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21:7cf6b1538d29 | 887 | float new_low_freq = real_high_freq / multiplier; // NOTE/TODO: assuming MCLK always enabled (see `i2s_init()`)!!! |
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20:54b1a9b620c5 | 888 | uint32_t new_low_freq_int_ceil = (uint32_t)ceilf(new_low_freq); |
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20:54b1a9b620c5 | 889 | uint32_t new_low_freq_int_floor = (uint32_t)new_low_freq; |
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14:0060a9850c5f | 890 | |
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20:54b1a9b620c5 | 891 | uint32_t new_low_freq_int; |
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20:54b1a9b620c5 | 892 | float real_new_low_freq = i2s_compute_closest_frequency(i2s_t_l, new_low_freq_int_floor); |
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20:54b1a9b620c5 | 893 | if(real_new_low_freq == new_low_freq) { |
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20:54b1a9b620c5 | 894 | new_low_freq_int = new_low_freq_int_floor; |
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20:54b1a9b620c5 | 895 | } else { |
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20:54b1a9b620c5 | 896 | real_new_low_freq = i2s_compute_closest_frequency(i2s_t_l, new_low_freq_int_ceil); |
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20:54b1a9b620c5 | 897 | if(real_new_low_freq == new_low_freq) { |
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20:54b1a9b620c5 | 898 | new_low_freq_int = new_low_freq_int_ceil; |
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20:54b1a9b620c5 | 899 | } else { |
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21:7cf6b1538d29 | 900 | return -1; // should never happen (assuming MCLK always enabled)! |
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20:54b1a9b620c5 | 901 | } |
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14:0060a9850c5f | 902 | } |
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14:0060a9850c5f | 903 | |
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20:54b1a9b620c5 | 904 | *ptr_low_freq = new_low_freq_int; |
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14:0060a9850c5f | 905 | |
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14:0060a9850c5f | 906 | return 0; |
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14:0060a9850c5f | 907 | } |
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14:0060a9850c5f | 908 | |
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9:c4c2240e06d6 | 909 | int8_t i2s_harmonize(i2s_t *dev_i2s_1, uint32_t *freq_i2s_1, i2s_t *dev_i2s_2, uint32_t *freq_i2s_2) |
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9:c4c2240e06d6 | 910 | { |
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14:0060a9850c5f | 911 | /* Returning if the two set frequencies are not multiple one of the other. */ |
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14:0060a9850c5f | 912 | if((*freq_i2s_1 < *freq_i2s_2) ? ((*freq_i2s_2 % *freq_i2s_1) != 0) : ((*freq_i2s_1 % *freq_i2s_2) != 0)) { |
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14:0060a9850c5f | 913 | return -1; |
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14:0060a9850c5f | 914 | } |
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9:c4c2240e06d6 | 915 | |
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14:0060a9850c5f | 916 | /* Compute the real frequencies. */ |
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20:54b1a9b620c5 | 917 | float real_f1 = i2s_compute_real_frequency(dev_i2s_1); |
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20:54b1a9b620c5 | 918 | float real_f2 = i2s_compute_real_frequency(dev_i2s_2); |
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14:0060a9850c5f | 919 | |
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14:0060a9850c5f | 920 | /* Computing the harmonized frequencies. */ |
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14:0060a9850c5f | 921 | if(real_f1 < real_f2) { |
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14:0060a9850c5f | 922 | return i2s_compute_harmonized_frequencies(dev_i2s_1, dev_i2s_2, freq_i2s_1, freq_i2s_2, real_f1, real_f2); |
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14:0060a9850c5f | 923 | } else { |
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14:0060a9850c5f | 924 | return i2s_compute_harmonized_frequencies(dev_i2s_2, dev_i2s_1, freq_i2s_2, freq_i2s_1, real_f2, real_f1); |
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14:0060a9850c5f | 925 | } |
Davide Aliprandi |
4:21603d68bcf7 | 926 | } |
Davide Aliprandi |
4:21603d68bcf7 | 927 | |
Wolfgang Betz |
1:f90318e0923b | 928 | #endif |