pl ack in tmtc

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of COM_MNG_TMTC_SIMPLE_pl123 by shubham c

Committer:
ee12b079
Date:
Fri Feb 05 09:50:28 2016 +0000
Revision:
112:b41bf1ce4bbe
Parent:
110:e5091ab345de
Changed pin-names, to verify the aardvark working on mbed before going on cdms hardware

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 0:f016e9e8d48b 1 // **************DEFINITIONS*********************
aniruddhv 69:20f09a0c3fd2 2
ee12b079 88:b9beee1a7a3e 3 #define bypass_adf 0
aniruddhv 69:20f09a0c3fd2 4
ee12b079 109:78f2912e3473 5 // DEBUG
ee12b079 109:78f2912e3473 6 #define DEBUG 1
ee12b079 110:e5091ab345de 7 #define USE_SD 1
ee12b079 109:78f2912e3473 8
shreeshas95 0:f016e9e8d48b 9 // COM_RX
shreeshas95 5:ab276a17ca07 10 #define RX_TIMEOUT_LIMIT 0.5
ee12b079 81:1a39e9e14771 11 //#define COM_RX_UART_TX PTE20 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_TX USBTX
ee12b079 81:1a39e9e14771 12 //#define COM_RX_UART_RX PTE21 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_RX USBRX
ee12b079 81:1a39e9e14771 13
ee12b079 81:1a39e9e14771 14 #define COM_RX_UART_TX USBTX
ee12b079 81:1a39e9e14771 15 #define COM_RX_UART_RX USBRX
aniruddhv 56:a88e16f6c18e 16
shreeshas95 0:f016e9e8d48b 17 // COMMON SPI
shreeshas95 0:f016e9e8d48b 18 #define SPI_MOSI PTE1
shreeshas95 0:f016e9e8d48b 19 #define SPI_MISO PTE3
shreeshas95 0:f016e9e8d48b 20 #define SPI_CLK PTE2
ee12b079 112:b41bf1ce4bbe 21 #define SPI_CS_ADF PTA15
shreeshas95 2:2caf2a9a13aa 22 #define SPI_CS_SDC PTE22
shreeshas95 2:2caf2a9a13aa 23 #define SPI_CS_RTC PTE29
shreeshas95 2:2caf2a9a13aa 24
shreeshas95 4:104dd82c99b8 25 // COM_TX
shreeshas95 4:104dd82c99b8 26 #define COM_TX_CONFIG_LIMIT 3
aniruddhv 52:0bd68655c651 27 #define COM_TX_TICKER_LIMIT 32
shreeshas95 4:104dd82c99b8 28
shreeshas95 2:2caf2a9a13aa 29 // ADF INTERRUPUT
ee12b079 112:b41bf1ce4bbe 30 #define ADF_IRQ PTA14
shreeshas95 0:f016e9e8d48b 31
shreeshas95 0:f016e9e8d48b 32 // TC LIST
shreeshas95 2:2caf2a9a13aa 33 #define TCL_STATE_INCOMPLETE 0x00
shreeshas95 5:ab276a17ca07 34 #define TCL_STATE_ABORTED 0x03
shreeshas95 5:ab276a17ca07 35 #define TCL_STATE_EXECUTING 0x04
shreeshas95 5:ab276a17ca07 36 #define TCL_STATE_COMPLETED 0x05
shreeshas95 5:ab276a17ca07 37 #define TCL_STATE_EXCEEDED_LIMIT 0x06
shreeshas95 0:f016e9e8d48b 38
shreeshas95 0:f016e9e8d48b 39 // LIST OF FLAGS
shreeshas95 2:2caf2a9a13aa 40 #define UART_INT_FLAG 0x0001
shreeshas95 2:2caf2a9a13aa 41 #define NEW_TC_RECEIVED 0x0002
shreeshas95 2:2caf2a9a13aa 42 #define COM_SESSION_FLAG 0x0004
shreeshas95 2:2caf2a9a13aa 43 #define COM_RX_FLAG 0x0008
shreeshas95 2:2caf2a9a13aa 44 #define COM_MNG_TMTC_RUNNING_FLAG 0x0010
shreeshas95 2:2caf2a9a13aa 45 #define COM_SESSION_VALIDITY 0x0020
shreeshas95 2:2caf2a9a13aa 46 #define ALL_CRC_PASS_FLAG 0x0040
shreeshas95 2:2caf2a9a13aa 47 #define COM_PA_HOT_FLAG 0x0080
shreeshas95 2:2caf2a9a13aa 48 #define COM_TX_FLAG 0x0100
shreeshas95 6:79d422d1ed42 49 #define COM_SESSION_TIMEOUT_FLAG 0x0200
shreeshas95 0:f016e9e8d48b 50
shreeshas95 0:f016e9e8d48b 51 // COM_MNG_TMTC THREAD
shreeshas95 6:79d422d1ed42 52 #define SESSION_TIME_LIMIT 1500
shreeshas95 0:f016e9e8d48b 53 #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01
shreeshas95 0:f016e9e8d48b 54 #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02
shreeshas95 0:f016e9e8d48b 55 #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03
ee12b079 93:4d76de54a699 56 #define SCIENCE_SIGNAL 0x04
shreeshas95 0:f016e9e8d48b 57 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 58 #define COM_PA_COOLING_TIME_LIMIT 20
shreeshas95 4:104dd82c99b8 59 #define COM_MAX_TC_LIMIT 200
shreeshas95 4:104dd82c99b8 60 #define TM_ACK_CODE_INDEX 2
shreeshas95 5:ab276a17ca07 61 #define CRC_FAIL_NACK_CODE 0x01
shreeshas95 2:2caf2a9a13aa 62
shreeshas95 2:2caf2a9a13aa 63 // call sign
shreeshas95 2:2caf2a9a13aa 64 #define PSC_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 65 #define APID_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 66
shreeshas95 2:2caf2a9a13aa 67 // max value of telecommands in a tcl
shreeshas95 2:2caf2a9a13aa 68 #define TCL_OVERFLOW_CONSTANT 256
shreeshas95 4:104dd82c99b8 69 #define TM_OVERFLOW_CONSTANT 256
shreeshas95 2:2caf2a9a13aa 70
shreeshas95 0:f016e9e8d48b 71 // starting value of packet sequence count at each pass
shreeshas95 0:f016e9e8d48b 72 #define PSC_START_VALUE 1
shreeshas95 0:f016e9e8d48b 73
shreeshas95 0:f016e9e8d48b 74 // APID list
aniruddhv 52:0bd68655c651 75 #define APID_COM 0
shreeshas95 0:f016e9e8d48b 76 #define APID_BAE 1
shreeshas95 0:f016e9e8d48b 77 #define APID_CDMS 2
shreeshas95 0:f016e9e8d48b 78 #define APID_SPEED 3
shreeshas95 0:f016e9e8d48b 79
aniruddhv 52:0bd68655c651 80 //SERVICE
aniruddhv 52:0bd68655c651 81 #define SERVICE_OBOSC 0xB
aniruddhv 52:0bd68655c651 82 #define SERVICE_OBSRS 0xF
aniruddhv 52:0bd68655c651 83
shreeshas95 0:f016e9e8d48b 84 // HIGH PRIORITY TC - priority list
shreeshas95 0:f016e9e8d48b 85 // not correct values here
shreeshas95 0:f016e9e8d48b 86 #define HPTC1 5
shreeshas95 0:f016e9e8d48b 87 #define HPTC2 6
shreeshas95 0:f016e9e8d48b 88 // Add more entries above
shreeshas95 0:f016e9e8d48b 89
shreeshas95 0:f016e9e8d48b 90 // SIZE of tc in bytes
shreeshas95 0:f016e9e8d48b 91 #define TC_SHORT_SIZE 11
shreeshas95 0:f016e9e8d48b 92 #define TC_LONG_SIZE 135
shreeshas95 0:f016e9e8d48b 93
shreeshas95 0:f016e9e8d48b 94 // TMID list
shreeshas95 0:f016e9e8d48b 95 #define TMID_ACK_L1 0xA
shreeshas95 4:104dd82c99b8 96 #define TMID_ACK_L234 0xB
shreeshas95 4:104dd82c99b8 97 #define TMID_TCL 0x7
shreeshas95 4:104dd82c99b8 98 #define TMID_CALL_SIGN 0xE
shreeshas95 0:f016e9e8d48b 99
shreeshas95 0:f016e9e8d48b 100 // OBOSC SERVICE SUBTYPE
shreeshas95 4:104dd82c99b8 101 #define OBOSC_TCL_MAX_SHORT_SIZE 11
shreeshas95 4:104dd82c99b8 102 #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67
shreeshas95 4:104dd82c99b8 103 #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68
shreeshas95 4:104dd82c99b8 104 #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10
shreeshas95 4:104dd82c99b8 105 #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11
shreeshas95 4:104dd82c99b8 106
shreeshas95 0:f016e9e8d48b 107 #define OBOSC_SUB_DISABLE 0x01
shreeshas95 0:f016e9e8d48b 108 #define OBOSC_SUB_RETRY 0x05
shreeshas95 4:104dd82c99b8 109 #define OBOSC_SUB_REP_TCLD 0x06
shreeshas95 0:f016e9e8d48b 110 #define OBOSC_SUB_REP_LE 0x0F
shreeshas95 0:f016e9e8d48b 111 #define OBOSC_SUB_RESET 0x07
shreeshas95 0:f016e9e8d48b 112
shreeshas95 101:bece931236a2 113 // PAYLOAD or SCIENCE
shreeshas95 101:bece931236a2 114 #define PAYLOAD_BUFFER_LENGTH 6723
ee12b079 112:b41bf1ce4bbe 115 #define PAY_SPI_MOSI PTE18
ee12b079 112:b41bf1ce4bbe 116 #define PAY_SPI_MISO PTE19
ee12b079 112:b41bf1ce4bbe 117 #define PAY_SPI_CLK PTE17
ee12b079 112:b41bf1ce4bbe 118 #define PAY_SPI_CS PTE16
shreeshas95 101:bece931236a2 119
shreeshas95 3:6c81fc8834e2 120
shreeshas95 0:f016e9e8d48b 121 // ****************GLOBAL VARIABLES******************
shreeshas95 0:f016e9e8d48b 122 // DEBUG
shreeshas95 0:f016e9e8d48b 123 Serial gPC( USBTX, USBRX );
shreeshas95 4:104dd82c99b8 124 DigitalOut gLEDR(LED_RED);
shreeshas95 4:104dd82c99b8 125 DigitalOut gLEDG(LED_GREEN);
shreeshas95 0:f016e9e8d48b 126
shreeshas95 0:f016e9e8d48b 127 // COM_RX
shreeshas95 0:f016e9e8d48b 128 RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX );
shreeshas95 0:f016e9e8d48b 129 COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 130 COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL;
shreeshas95 2:2caf2a9a13aa 131 // uint8_t *gRX_CURRENT_PTR = NULL;
shreeshas95 0:f016e9e8d48b 132 uint32_t gRX_COUNT = 0;
shreeshas95 0:f016e9e8d48b 133 uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00;
shreeshas95 0:f016e9e8d48b 134 uint16_t gTOTAL_CRC_FAIL_TC = 0x00;
shreeshas95 2:2caf2a9a13aa 135 uint16_t gTOTAL_REPEATED_TC = 0x00;
shreeshas95 0:f016e9e8d48b 136
shreeshas95 0:f016e9e8d48b 137 // COMMON SPI
shreeshas95 0:f016e9e8d48b 138 SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK );
shreeshas95 1:a0055b3280c8 139 DigitalOut gCS_ADF(SPI_CS_ADF);
ee12b079 86:a26f5f22631d 140 DigitalOut cs_sd(SPI_CS_SDC);
shreeshas95 2:2caf2a9a13aa 141 DigitalOut gCS_RTC(SPI_CS_RTC);
shreeshas95 0:f016e9e8d48b 142 Mutex SPI_mutex;
shreeshas95 0:f016e9e8d48b 143
shreeshas95 0:f016e9e8d48b 144 // TC LIST
shreeshas95 0:f016e9e8d48b 145 Base_tc* gHEAD_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 146 Base_tc* gLAST_NODE_TCL = NULL;
shreeshas95 2:2caf2a9a13aa 147 uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE;
shreeshas95 2:2caf2a9a13aa 148 uint16_t gFLAGS = 0x0000;
shreeshas95 0:f016e9e8d48b 149
shreeshas95 0:f016e9e8d48b 150 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 151 Thread* gCOM_MNG_TMTC_THREAD = NULL;
shreeshas95 0:f016e9e8d48b 152 Timeout gRX_TIMEOUT;
shreeshas95 0:f016e9e8d48b 153 Timeout gSESSION_TIMEOUT;
shreeshas95 0:f016e9e8d48b 154
shreeshas95 0:f016e9e8d48b 155 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 156
shreeshas95 2:2caf2a9a13aa 157 // PA cooling timeout
shreeshas95 4:104dd82c99b8 158 Timeout gCOM_PA_COOLING_TIMEOUT;
shreeshas95 2:2caf2a9a13aa 159
shreeshas95 2:2caf2a9a13aa 160 // GS code for verification
aniruddhv 37:c9a739750806 161 const uint8_t gGSCODE[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
shreeshas95 2:2caf2a9a13aa 162
shreeshas95 0:f016e9e8d48b 163 uint8_t gTOTAL_VALID_TC = 0x00;
shreeshas95 0:f016e9e8d48b 164 // USE LAST_L1_ACK FOR GENERATING REPORT
shreeshas95 4:104dd82c99b8 165 uint8_t gLAST_TM[TM_LONG_SIZE];
shreeshas95 4:104dd82c99b8 166 uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE;
shreeshas95 3:6c81fc8834e2 167
shreeshas95 101:bece931236a2 168 // PAYLOAD OR SCIENCE_THREAD
shreeshas95 3:6c81fc8834e2 169 Thread* gSCIENCE_THREAD = NULL;
shreeshas95 101:bece931236a2 170 dmaSPISlave gPAY_SPI(PAY_SPI_MOSI, PAY_SPI_MISO, PAY_SPI_CLK, PAY_SPI_CS);
shreeshas95 4:104dd82c99b8 171 uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH];
shreeshas95 4:104dd82c99b8 172
shreeshas95 4:104dd82c99b8 173 // CALL SIGN TM
shreeshas95 4:104dd82c99b8 174 const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11};