Pradeep Kotipalli / Mbed 2 deprecated cdms_april2_2016

pl ack in tmtc

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of COM_MNG_TMTC_SIMPLE_pl123 by shubham c

DefinitionsAndGlobals.h@1:a0055b3280c8, 2015-12-14 (annotated)

Committer:
shreeshas95
Date:
Mon Dec 14 12:04:01 2015 +0000
Revision:
1:a0055b3280c8
Parent:
0:f016e9e8d48b
Child:
2:2caf2a9a13aa
Simple working version code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 0:f016e9e8d48b 1 // **************DEFINITIONS*********************
shreeshas95 0:f016e9e8d48b 2 // COM_RX
shreeshas95 1:a0055b3280c8 3 #define RX_TIMEOUT_LIMIT 1.0
shreeshas95 0:f016e9e8d48b 4 #define COM_RX_UART_TX PTE22
shreeshas95 0:f016e9e8d48b 5 #define COM_RX_UART_RX PTE23
shreeshas95 0:f016e9e8d48b 6
shreeshas95 0:f016e9e8d48b 7 // COMMON SPI
shreeshas95 0:f016e9e8d48b 8 #define SPI_MOSI PTE1
shreeshas95 0:f016e9e8d48b 9 #define SPI_MISO PTE3
shreeshas95 0:f016e9e8d48b 10 #define SPI_CLK PTE2
shreeshas95 1:a0055b3280c8 11 #define SPI_CS_ADF PTA15
shreeshas95 1:a0055b3280c8 12 #define SPI_CS_SDC PTB1
shreeshas95 0:f016e9e8d48b 13
shreeshas95 0:f016e9e8d48b 14 // TC LIST
shreeshas95 0:f016e9e8d48b 15 #define TCL_STATE_IDLE 0x00
shreeshas95 0:f016e9e8d48b 16 #define TCL_STATE_EXECUTING 0x01
shreeshas95 0:f016e9e8d48b 17 #define TCL_STATE_COMPLETED 0x03
shreeshas95 0:f016e9e8d48b 18 #define TCL_STATE_ABORTED 0x02
shreeshas95 0:f016e9e8d48b 19 /*
shreeshas95 0:f016e9e8d48b 20 0: IDLE OR WAITING FOR TCL COMPLETION
shreeshas95 0:f016e9e8d48b 21 1: EXECUTING AFTER COMPLETION OF TCL
shreeshas95 0:f016e9e8d48b 22 2: COMPLETED EXECUTION OF TCL
shreeshas95 0:f016e9e8d48b 23 3: IDLE DUE TO ABORT ON NACK
shreeshas95 0:f016e9e8d48b 24 */
shreeshas95 0:f016e9e8d48b 25
shreeshas95 0:f016e9e8d48b 26 // LIST OF FLAGS
shreeshas95 0:f016e9e8d48b 27 #define UART_INT_FLAG 0x01
shreeshas95 0:f016e9e8d48b 28 #define NEW_TC_RECEIVED 0x02
shreeshas95 0:f016e9e8d48b 29 #define START_SESSION 0x03
shreeshas95 0:f016e9e8d48b 30 #define END_SESSION 0x04
shreeshas95 0:f016e9e8d48b 31 #define ALL_CRC_PASS_FLAG 0x05
shreeshas95 0:f016e9e8d48b 32 #define EXECUTE_OBOSC_FLAG 0x06
shreeshas95 0:f016e9e8d48b 33
shreeshas95 0:f016e9e8d48b 34 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 35 #define SESSION_TIME_LIMIT 1200
shreeshas95 0:f016e9e8d48b 36 #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01
shreeshas95 0:f016e9e8d48b 37 #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02
shreeshas95 0:f016e9e8d48b 38 #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03
shreeshas95 0:f016e9e8d48b 39
shreeshas95 0:f016e9e8d48b 40 // COM_MNG_TMTC
shreeshas95 0:f016e9e8d48b 41 // starting value of packet sequence count at each pass
shreeshas95 0:f016e9e8d48b 42 #define PSC_START_VALUE 1
shreeshas95 0:f016e9e8d48b 43
shreeshas95 0:f016e9e8d48b 44 // APID list
shreeshas95 0:f016e9e8d48b 45 #define APID_CALLSIGN 0
shreeshas95 0:f016e9e8d48b 46 #define APID_BAE 1
shreeshas95 0:f016e9e8d48b 47 #define APID_CDMS 2
shreeshas95 0:f016e9e8d48b 48 #define APID_SPEED 3
shreeshas95 0:f016e9e8d48b 49
shreeshas95 0:f016e9e8d48b 50 // HIGH PRIORITY TC - priority list
shreeshas95 0:f016e9e8d48b 51 // not correct values here
shreeshas95 0:f016e9e8d48b 52 #define HPTC1 5
shreeshas95 0:f016e9e8d48b 53 #define HPTC2 6
shreeshas95 0:f016e9e8d48b 54 // Add more entries above
shreeshas95 0:f016e9e8d48b 55
shreeshas95 0:f016e9e8d48b 56 // SIZE of tc in bytes
shreeshas95 0:f016e9e8d48b 57 #define TC_SHORT_SIZE 11
shreeshas95 0:f016e9e8d48b 58 #define TC_LONG_SIZE 135
shreeshas95 0:f016e9e8d48b 59
shreeshas95 0:f016e9e8d48b 60 // TMID list
shreeshas95 0:f016e9e8d48b 61 #define TMID_ACK_L1 0xA
shreeshas95 0:f016e9e8d48b 62
shreeshas95 0:f016e9e8d48b 63 // OBOSC SERVICE SUBTYPE
shreeshas95 0:f016e9e8d48b 64 #define OBOSC_SUB_DISABLE 0x01
shreeshas95 0:f016e9e8d48b 65 #define OBOSC_SUB_RETRY 0x05
shreeshas95 0:f016e9e8d48b 66 #define OBOSC_SUB_REP_TCL_D 0x06
shreeshas95 0:f016e9e8d48b 67 #define OBOSC_SUB_REP_TCL 0x08
shreeshas95 0:f016e9e8d48b 68 #define OBOSC_SUB_REP_LE 0x0F
shreeshas95 0:f016e9e8d48b 69 #define OBOSC_SUB_RESET 0x07
shreeshas95 0:f016e9e8d48b 70
shreeshas95 0:f016e9e8d48b 71
shreeshas95 0:f016e9e8d48b 72
shreeshas95 0:f016e9e8d48b 73 // ****************GLOBAL VARIABLES******************
shreeshas95 0:f016e9e8d48b 74 // DEBUG
shreeshas95 0:f016e9e8d48b 75 Serial gPC( USBTX, USBRX );
shreeshas95 0:f016e9e8d48b 76 DigitalOut gLEDR(LED_RED);
shreeshas95 0:f016e9e8d48b 77 DigitalOut gLEDG(LED_GREEN);
shreeshas95 0:f016e9e8d48b 78
shreeshas95 0:f016e9e8d48b 79 // COM_RX
shreeshas95 0:f016e9e8d48b 80 RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX );
shreeshas95 0:f016e9e8d48b 81 COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 82 COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 83 uint8_t *gRX_CURRENT_PTR = NULL;
shreeshas95 0:f016e9e8d48b 84 uint32_t gRX_COUNT = 0;
shreeshas95 0:f016e9e8d48b 85 uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00;
shreeshas95 0:f016e9e8d48b 86 uint16_t gTOTAL_CRC_FAIL_TC = 0x00;
shreeshas95 0:f016e9e8d48b 87
shreeshas95 0:f016e9e8d48b 88
shreeshas95 0:f016e9e8d48b 89 // COMMON SPI
shreeshas95 0:f016e9e8d48b 90 SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK );
shreeshas95 1:a0055b3280c8 91 DigitalOut gCS_ADF(SPI_CS_ADF);
shreeshas95 1:a0055b3280c8 92 DigitalOut gCS_SDC(SPI_CS_SDC);
shreeshas95 0:f016e9e8d48b 93 Mutex SPI_mutex;
shreeshas95 0:f016e9e8d48b 94
shreeshas95 0:f016e9e8d48b 95 // TC LIST
shreeshas95 0:f016e9e8d48b 96 Base_tc* gHEAD_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 97 Base_tc* gLAST_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 98 uint8_t gMASTER_STATE = TCL_STATE_IDLE;
shreeshas95 0:f016e9e8d48b 99 uint8_t gFLAGS = 0x00;
shreeshas95 0:f016e9e8d48b 100
shreeshas95 0:f016e9e8d48b 101 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 102 Thread* gCOM_MNG_TMTC_THREAD = NULL;
shreeshas95 0:f016e9e8d48b 103 Timeout gRX_TIMEOUT;
shreeshas95 0:f016e9e8d48b 104 Timeout gSESSION_TIMEOUT;
shreeshas95 0:f016e9e8d48b 105
shreeshas95 0:f016e9e8d48b 106 // COM_MNG_TMTC
shreeshas95 0:f016e9e8d48b 107 uint8_t gTOTAL_VALID_TC = 0x00;
shreeshas95 0:f016e9e8d48b 108 // USE LAST_L1_ACK FOR GENERATING REPORT
shreeshas95 0:f016e9e8d48b 109 uint8_t gLAST_L1_ACK[TM_SHORT_SIZE];
shreeshas95 0:f016e9e8d48b 110 uint8_t gLAST_L1_ACK_BUFFER[TM_SHORT_SIZE];
shreeshas95 0:f016e9e8d48b 111 uint8_t gOBOSC_PSC = PSC_START_VALUE;
shreeshas95 0:f016e9e8d48b 112 Base_tc* gOBOSC_HEAD = NULL;