Pradeep Kotipalli / Mbed 2 deprecated cdms_april2_2016

pl ack in tmtc

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of COM_MNG_TMTC_SIMPLE_pl123 by shubham c

DefinitionsAndGlobals.h@129:47ed605a459d, 2016-02-26 (annotated)

Committer:
ee12b079
Date:
Fri Feb 26 14:10:26 2016 +0000
Revision:
129:47ed605a459d
Parent:
126:b7c024b5632d 
Works with 'USE_RX1M_GET_FROM_MBED' , to be tested for baudrate 115200

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 0:f016e9e8d48b 1 // **************DEFINITIONS*********************
aniruddhv 69:20f09a0c3fd2 2
ee12b079 126:b7c024b5632d 3 #define bypass_adf 1
aniruddhv 69:20f09a0c3fd2 4
shreeshas95 0:f016e9e8d48b 5 // COM_RX
shreeshas95 5:ab276a17ca07 6 #define RX_TIMEOUT_LIMIT 0.5
ee12b079 129:47ed605a459d 7 #define COM_RX_UART_TX PTE20 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_TX USBTX
ee12b079 129:47ed605a459d 8 #define COM_RX_UART_RX PTE21 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_RX USBRX
ee12b079 81:1a39e9e14771 9
ee12b079 129:47ed605a459d 10
ee12b079 129:47ed605a459d 11 //#define COM_RX_UART_TX USBTX
ee12b079 129:47ed605a459d 12 //#define COM_RX_UART_RX USBRX
aniruddhv 56:a88e16f6c18e 13
shreeshas95 0:f016e9e8d48b 14 // COMMON SPI
shreeshas95 0:f016e9e8d48b 15 #define SPI_MOSI PTE1
shreeshas95 0:f016e9e8d48b 16 #define SPI_MISO PTE3
shreeshas95 0:f016e9e8d48b 17 #define SPI_CLK PTE2
shreeshas95 1:a0055b3280c8 18 #define SPI_CS_ADF PTA15
ee12b079 114:9fb55057b13f 19 #define SPI_CS_SDC PIN20
ee12b079 114:9fb55057b13f 20 #define SPI_CS_RTC PIN26
shreeshas95 2:2caf2a9a13aa 21
shreeshas95 4:104dd82c99b8 22 // COM_TX
shreeshas95 4:104dd82c99b8 23 #define COM_TX_CONFIG_LIMIT 3
aniruddhv 52:0bd68655c651 24 #define COM_TX_TICKER_LIMIT 32
shreeshas95 4:104dd82c99b8 25
shreeshas95 2:2caf2a9a13aa 26 // ADF INTERRUPUT
shreeshas95 2:2caf2a9a13aa 27 #define ADF_IRQ PTA14
ee12b079 126:b7c024b5632d 28
ee12b079 126:b7c024b5632d 29 //I2C - Payload to CDMS (need to change while using CDMS hardware)
ee12b079 126:b7c024b5632d 30 I2C master (D7,D6);
ee12b079 126:b7c024b5632d 31 InterruptIn PYLD_I2C_Int(PTA13);
shreeshas95 0:f016e9e8d48b 32
shreeshas95 0:f016e9e8d48b 33 // TC LIST
shreeshas95 2:2caf2a9a13aa 34 #define TCL_STATE_INCOMPLETE 0x00
shreeshas95 5:ab276a17ca07 35 #define TCL_STATE_ABORTED 0x03
shreeshas95 5:ab276a17ca07 36 #define TCL_STATE_EXECUTING 0x04
shreeshas95 5:ab276a17ca07 37 #define TCL_STATE_COMPLETED 0x05
shreeshas95 5:ab276a17ca07 38 #define TCL_STATE_EXCEEDED_LIMIT 0x06
shreeshas95 0:f016e9e8d48b 39
shreeshas95 0:f016e9e8d48b 40 // LIST OF FLAGS
shreeshas95 2:2caf2a9a13aa 41 #define UART_INT_FLAG 0x0001
shreeshas95 2:2caf2a9a13aa 42 #define NEW_TC_RECEIVED 0x0002
shreeshas95 2:2caf2a9a13aa 43 #define COM_SESSION_FLAG 0x0004
shreeshas95 2:2caf2a9a13aa 44 #define COM_RX_FLAG 0x0008
shreeshas95 2:2caf2a9a13aa 45 #define COM_MNG_TMTC_RUNNING_FLAG 0x0010
shreeshas95 2:2caf2a9a13aa 46 #define COM_SESSION_VALIDITY 0x0020
shreeshas95 2:2caf2a9a13aa 47 #define ALL_CRC_PASS_FLAG 0x0040
shreeshas95 2:2caf2a9a13aa 48 #define COM_PA_HOT_FLAG 0x0080
shreeshas95 2:2caf2a9a13aa 49 #define COM_TX_FLAG 0x0100
shreeshas95 6:79d422d1ed42 50 #define COM_SESSION_TIMEOUT_FLAG 0x0200
shreeshas95 0:f016e9e8d48b 51
shreeshas95 0:f016e9e8d48b 52 // COM_MNG_TMTC THREAD
shreeshas95 6:79d422d1ed42 53 #define SESSION_TIME_LIMIT 1500
shreeshas95 0:f016e9e8d48b 54 #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01
shreeshas95 0:f016e9e8d48b 55 #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02
shreeshas95 0:f016e9e8d48b 56 #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03
ee12b079 93:4d76de54a699 57 #define SCIENCE_SIGNAL 0x04
shreeshas95 0:f016e9e8d48b 58 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 59 #define COM_PA_COOLING_TIME_LIMIT 20
shreeshas95 4:104dd82c99b8 60 #define COM_MAX_TC_LIMIT 200
shreeshas95 4:104dd82c99b8 61 #define TM_ACK_CODE_INDEX 2
shreeshas95 5:ab276a17ca07 62 #define CRC_FAIL_NACK_CODE 0x01
shreeshas95 2:2caf2a9a13aa 63
shreeshas95 2:2caf2a9a13aa 64 // call sign
shreeshas95 2:2caf2a9a13aa 65 #define PSC_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 66 #define APID_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 67
shreeshas95 2:2caf2a9a13aa 68 // max value of telecommands in a tcl
shreeshas95 2:2caf2a9a13aa 69 #define TCL_OVERFLOW_CONSTANT 256
shreeshas95 4:104dd82c99b8 70 #define TM_OVERFLOW_CONSTANT 256
shreeshas95 2:2caf2a9a13aa 71
shreeshas95 0:f016e9e8d48b 72 // starting value of packet sequence count at each pass
shreeshas95 0:f016e9e8d48b 73 #define PSC_START_VALUE 1
shreeshas95 0:f016e9e8d48b 74
shreeshas95 0:f016e9e8d48b 75 // APID list
aniruddhv 52:0bd68655c651 76 #define APID_COM 0
shreeshas95 0:f016e9e8d48b 77 #define APID_BAE 1
shreeshas95 0:f016e9e8d48b 78 #define APID_CDMS 2
shreeshas95 0:f016e9e8d48b 79 #define APID_SPEED 3
shreeshas95 0:f016e9e8d48b 80
aniruddhv 52:0bd68655c651 81 //SERVICE
aniruddhv 52:0bd68655c651 82 #define SERVICE_OBOSC 0xB
aniruddhv 52:0bd68655c651 83 #define SERVICE_OBSRS 0xF
aniruddhv 52:0bd68655c651 84
shreeshas95 0:f016e9e8d48b 85 // HIGH PRIORITY TC - priority list
shreeshas95 0:f016e9e8d48b 86 // not correct values here
shreeshas95 0:f016e9e8d48b 87 #define HPTC1 5
shreeshas95 0:f016e9e8d48b 88 #define HPTC2 6
shreeshas95 0:f016e9e8d48b 89 // Add more entries above
shreeshas95 0:f016e9e8d48b 90
shreeshas95 0:f016e9e8d48b 91 // SIZE of tc in bytes
shreeshas95 0:f016e9e8d48b 92 #define TC_SHORT_SIZE 11
shreeshas95 0:f016e9e8d48b 93 #define TC_LONG_SIZE 135
shreeshas95 0:f016e9e8d48b 94
shreeshas95 0:f016e9e8d48b 95 // TMID list
shreeshas95 0:f016e9e8d48b 96 #define TMID_ACK_L1 0xA
shreeshas95 4:104dd82c99b8 97 #define TMID_ACK_L234 0xB
shreeshas95 4:104dd82c99b8 98 #define TMID_TCL 0x7
shreeshas95 4:104dd82c99b8 99 #define TMID_CALL_SIGN 0xE
shreeshas95 0:f016e9e8d48b 100
shreeshas95 0:f016e9e8d48b 101 // OBOSC SERVICE SUBTYPE
shreeshas95 4:104dd82c99b8 102 #define OBOSC_TCL_MAX_SHORT_SIZE 11
shreeshas95 4:104dd82c99b8 103 #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67
shreeshas95 4:104dd82c99b8 104 #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68
shreeshas95 4:104dd82c99b8 105 #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10
shreeshas95 4:104dd82c99b8 106 #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11
shreeshas95 4:104dd82c99b8 107
shreeshas95 0:f016e9e8d48b 108 #define OBOSC_SUB_DISABLE 0x01
shreeshas95 0:f016e9e8d48b 109 #define OBOSC_SUB_RETRY 0x05
shreeshas95 4:104dd82c99b8 110 #define OBOSC_SUB_REP_TCLD 0x06
shreeshas95 0:f016e9e8d48b 111 #define OBOSC_SUB_REP_LE 0x0F
shreeshas95 0:f016e9e8d48b 112 #define OBOSC_SUB_RESET 0x07
shreeshas95 0:f016e9e8d48b 113
shreeshas95 101:bece931236a2 114 // PAYLOAD or SCIENCE
shreeshas95 101:bece931236a2 115 #define PAYLOAD_BUFFER_LENGTH 6723
ee12b079 113:b8991d9e3b6c 116 #define PAY_SPI_MOSI PTE18
ee12b079 113:b8991d9e3b6c 117 #define PAY_SPI_MISO PTE19
ee12b079 113:b8991d9e3b6c 118 #define PAY_SPI_CLK PTE17
ee12b079 113:b8991d9e3b6c 119 #define PAY_SPI_CS PTE16
shreeshas95 101:bece931236a2 120
shreeshas95 3:6c81fc8834e2 121
shreeshas95 0:f016e9e8d48b 122 // ****************GLOBAL VARIABLES******************
shreeshas95 0:f016e9e8d48b 123 // DEBUG
shreeshas95 0:f016e9e8d48b 124 Serial gPC( USBTX, USBRX );
shreeshas95 4:104dd82c99b8 125 DigitalOut gLEDR(LED_RED);
shreeshas95 4:104dd82c99b8 126 DigitalOut gLEDG(LED_GREEN);
shreeshas95 0:f016e9e8d48b 127
shreeshas95 0:f016e9e8d48b 128 // COM_RX
shreeshas95 0:f016e9e8d48b 129 RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX );
shreeshas95 0:f016e9e8d48b 130 COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 131 COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL;
shreeshas95 2:2caf2a9a13aa 132 // uint8_t *gRX_CURRENT_PTR = NULL;
shreeshas95 0:f016e9e8d48b 133 uint32_t gRX_COUNT = 0;
shreeshas95 0:f016e9e8d48b 134 uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00;
shreeshas95 0:f016e9e8d48b 135 uint16_t gTOTAL_CRC_FAIL_TC = 0x00;
shreeshas95 2:2caf2a9a13aa 136 uint16_t gTOTAL_REPEATED_TC = 0x00;
shreeshas95 0:f016e9e8d48b 137
shreeshas95 0:f016e9e8d48b 138 // COMMON SPI
shreeshas95 0:f016e9e8d48b 139 SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK );
shreeshas95 1:a0055b3280c8 140 DigitalOut gCS_ADF(SPI_CS_ADF);
ee12b079 86:a26f5f22631d 141 DigitalOut cs_sd(SPI_CS_SDC);
shreeshas95 2:2caf2a9a13aa 142 DigitalOut gCS_RTC(SPI_CS_RTC);
shreeshas95 0:f016e9e8d48b 143 Mutex SPI_mutex;
shreeshas95 0:f016e9e8d48b 144
shreeshas95 0:f016e9e8d48b 145 // TC LIST
shreeshas95 0:f016e9e8d48b 146 Base_tc* gHEAD_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 147 Base_tc* gLAST_NODE_TCL = NULL;
shreeshas95 2:2caf2a9a13aa 148 uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE;
shreeshas95 2:2caf2a9a13aa 149 uint16_t gFLAGS = 0x0000;
shreeshas95 0:f016e9e8d48b 150
shreeshas95 0:f016e9e8d48b 151 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 152 Thread* gCOM_MNG_TMTC_THREAD = NULL;
shreeshas95 0:f016e9e8d48b 153 Timeout gRX_TIMEOUT;
shreeshas95 0:f016e9e8d48b 154 Timeout gSESSION_TIMEOUT;
shreeshas95 0:f016e9e8d48b 155
shreeshas95 0:f016e9e8d48b 156 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 157
shreeshas95 2:2caf2a9a13aa 158 // PA cooling timeout
shreeshas95 4:104dd82c99b8 159 Timeout gCOM_PA_COOLING_TIMEOUT;
shreeshas95 2:2caf2a9a13aa 160
shreeshas95 2:2caf2a9a13aa 161 // GS code for verification
aniruddhv 37:c9a739750806 162 const uint8_t gGSCODE[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
shreeshas95 2:2caf2a9a13aa 163
shreeshas95 0:f016e9e8d48b 164 uint8_t gTOTAL_VALID_TC = 0x00;
shreeshas95 0:f016e9e8d48b 165 // USE LAST_L1_ACK FOR GENERATING REPORT
shreeshas95 4:104dd82c99b8 166 uint8_t gLAST_TM[TM_LONG_SIZE];
shreeshas95 4:104dd82c99b8 167 uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE;
shreeshas95 3:6c81fc8834e2 168
shreeshas95 101:bece931236a2 169 // PAYLOAD OR SCIENCE_THREAD
shreeshas95 3:6c81fc8834e2 170 Thread* gSCIENCE_THREAD = NULL;
shreeshas95 101:bece931236a2 171 dmaSPISlave gPAY_SPI(PAY_SPI_MOSI, PAY_SPI_MISO, PAY_SPI_CLK, PAY_SPI_CS);
shreeshas95 4:104dd82c99b8 172 uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH];
shreeshas95 4:104dd82c99b8 173
shreeshas95 4:104dd82c99b8 174 // CALL SIGN TM
shreeshas95 103:b55559925dc1 175 const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11};
shreeshas95 103:b55559925dc1 176
shreeshas95 103:b55559925dc1 177 // CDMS HK
shreeshas95 103:b55559925dc1 178 CDMS_HK_actual actual_data;
shreeshas95 103:b55559925dc1 179 CDMS_HK_quant quant_data;
shreeshas95 103:b55559925dc1 180 CDMS_HK_min_max min_max_data;
ee12b079 126:b7c024b5632d 181 bool firstCount=true;
ee12b079 126:b7c024b5632d 182
ee12b079 126:b7c024b5632d 183 //I2C thread
ee12b079 126:b7c024b5632d 184 Thread* ptr_t_pyldtm = NULL;
ee12b079 126:b7c024b5632d 185