Pratyush Mallick / Mbed OS testing

this is testing

app/src/ad7606_user_config.c@0:3afcd581558d, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 18:54:16 2021 +0530
Revision:
0:3afcd581558d
this is testing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 0:3afcd581558d 1 /*************************************************************************//**
pmallick 0:3afcd581558d 2 * @file ad7606_user_config.c
pmallick 0:3afcd581558d 3 * @brief User configuration file for AD7606 device
pmallick 0:3afcd581558d 4 ******************************************************************************
pmallick 0:3afcd581558d 5 * Copyright (c) 2020 Analog Devices, Inc.
pmallick 0:3afcd581558d 6 *
pmallick 0:3afcd581558d 7 * All rights reserved.
pmallick 0:3afcd581558d 8 *
pmallick 0:3afcd581558d 9 * This software is proprietary to Analog Devices, Inc. and its licensors.
pmallick 0:3afcd581558d 10 * By using this software you agree to the terms of the associated
pmallick 0:3afcd581558d 11 * Analog Devices Software License Agreement.
pmallick 0:3afcd581558d 12 *****************************************************************************/
pmallick 0:3afcd581558d 13
pmallick 0:3afcd581558d 14 /******************************************************************************/
pmallick 0:3afcd581558d 15 /***************************** Include Files **********************************/
pmallick 0:3afcd581558d 16 /******************************************************************************/
pmallick 0:3afcd581558d 17
pmallick 0:3afcd581558d 18 #include <stdint.h>
pmallick 0:3afcd581558d 19
pmallick 0:3afcd581558d 20 #include "app_config.h"
pmallick 0:3afcd581558d 21 #include "ad7606_user_config.h"
pmallick 0:3afcd581558d 22 #include "ad7606_support.h"
pmallick 0:3afcd581558d 23 #include "spi_extra.h"
pmallick 0:3afcd581558d 24 #include "gpio_extra.h"
pmallick 0:3afcd581558d 25
pmallick 0:3afcd581558d 26 /******************************************************************************/
pmallick 0:3afcd581558d 27 /********************** Macros and Constants Definition ***********************/
pmallick 0:3afcd581558d 28 /******************************************************************************/
pmallick 0:3afcd581558d 29
pmallick 0:3afcd581558d 30 #define USER_CONFIG_RANGE (DEFAULT_CHN_RANGE * 1000)
pmallick 0:3afcd581558d 31
pmallick 0:3afcd581558d 32 /******************************************************************************/
pmallick 0:3afcd581558d 33 /********************** Variables and User Defined Data Types *****************/
pmallick 0:3afcd581558d 34 /******************************************************************************/
pmallick 0:3afcd581558d 35
pmallick 0:3afcd581558d 36 struct gpio_init_param gpio_init_reset = {
pmallick 0:3afcd581558d 37 .number = RESET_PIN,
pmallick 0:3afcd581558d 38 .extra = NULL
pmallick 0:3afcd581558d 39 };
pmallick 0:3afcd581558d 40
pmallick 0:3afcd581558d 41 struct gpio_init_param gpio_init_convst = {
pmallick 0:3afcd581558d 42 .number = CONVST_PIN,
pmallick 0:3afcd581558d 43 .extra = NULL
pmallick 0:3afcd581558d 44 };
pmallick 0:3afcd581558d 45
pmallick 0:3afcd581558d 46 struct gpio_init_param gpio_init_busy = {
pmallick 0:3afcd581558d 47 .number = BUSY_PIN,
pmallick 0:3afcd581558d 48 .extra = NULL
pmallick 0:3afcd581558d 49 };
pmallick 0:3afcd581558d 50
pmallick 0:3afcd581558d 51 struct gpio_init_param gpio_init_osr0 = {
pmallick 0:3afcd581558d 52 .number = OSR0_PIN,
pmallick 0:3afcd581558d 53 .extra = NULL
pmallick 0:3afcd581558d 54 };
pmallick 0:3afcd581558d 55
pmallick 0:3afcd581558d 56 struct gpio_init_param gpio_init_osr1 = {
pmallick 0:3afcd581558d 57 .number = OSR1_PIN,
pmallick 0:3afcd581558d 58 .extra = NULL
pmallick 0:3afcd581558d 59 };
pmallick 0:3afcd581558d 60
pmallick 0:3afcd581558d 61 struct gpio_init_param gpio_init_osr2 = {
pmallick 0:3afcd581558d 62 .number = OSR2_PIN,
pmallick 0:3afcd581558d 63 .extra = NULL
pmallick 0:3afcd581558d 64 };
pmallick 0:3afcd581558d 65
pmallick 0:3afcd581558d 66 struct gpio_init_param gpio_init_range= {
pmallick 0:3afcd581558d 67 .number = RANGE_PIN,
pmallick 0:3afcd581558d 68 .extra = NULL
pmallick 0:3afcd581558d 69 };
pmallick 0:3afcd581558d 70
pmallick 0:3afcd581558d 71 struct gpio_init_param gpio_init_stdby = {
pmallick 0:3afcd581558d 72 .number = STDBY_PIN,
pmallick 0:3afcd581558d 73 .extra = NULL
pmallick 0:3afcd581558d 74 };
pmallick 0:3afcd581558d 75
pmallick 0:3afcd581558d 76
pmallick 0:3afcd581558d 77 /* Define SPI extra init parameters structure */
pmallick 0:3afcd581558d 78 mbed_spi_init_param spi_init_extra_params = {
pmallick 0:3afcd581558d 79 .spi_clk_pin = SPI_SCK,
pmallick 0:3afcd581558d 80 .spi_miso_pin = SPI_MISO,
pmallick 0:3afcd581558d 81 .spi_mosi_pin = SPI_MOSI
pmallick 0:3afcd581558d 82 };
pmallick 0:3afcd581558d 83
pmallick 0:3afcd581558d 84 /* Initialize the AD7606 device structure */
pmallick 0:3afcd581558d 85 struct ad7606_init_param ad7606_init_str = {
pmallick 0:3afcd581558d 86 // Define SPI init parameters structure
pmallick 0:3afcd581558d 87 {
pmallick 0:3afcd581558d 88 .max_speed_hz = 22500000, // Max SPI Speed
pmallick 0:3afcd581558d 89 .chip_select = SPI_SS, // Chip Select
pmallick 0:3afcd581558d 90 .mode = SPI_MODE_2, // CPOL = 1, CPHA = 1
pmallick 0:3afcd581558d 91 .extra = &spi_init_extra_params // SPI extra configurations
pmallick 0:3afcd581558d 92 },
pmallick 0:3afcd581558d 93
pmallick 0:3afcd581558d 94 .gpio_reset = &gpio_init_reset,
pmallick 0:3afcd581558d 95 .gpio_convst = &gpio_init_convst,
pmallick 0:3afcd581558d 96 .gpio_busy = &gpio_init_busy,
pmallick 0:3afcd581558d 97 .gpio_stby_n = &gpio_init_stdby,
pmallick 0:3afcd581558d 98 .gpio_range = &gpio_init_range,
pmallick 0:3afcd581558d 99 .gpio_os0 = &gpio_init_osr0,
pmallick 0:3afcd581558d 100 .gpio_os1 = &gpio_init_osr1,
pmallick 0:3afcd581558d 101 .gpio_os2 = &gpio_init_osr2,
pmallick 0:3afcd581558d 102 .gpio_par_ser = NULL,
pmallick 0:3afcd581558d 103
pmallick 0:3afcd581558d 104 .device_id = ACTIVE_DEVICE,
pmallick 0:3afcd581558d 105 .oversampling = { 0, AD7606_OSR_1 },
pmallick 0:3afcd581558d 106 .sw_mode = true,
pmallick 0:3afcd581558d 107
pmallick 0:3afcd581558d 108 // Below settings (except range) applies only to AD7606B and AD7606C devices
pmallick 0:3afcd581558d 109
pmallick 0:3afcd581558d 110 /* Device Configs */
pmallick 0:3afcd581558d 111 {
pmallick 0:3afcd581558d 112 .op_mode = AD7606_NORMAL,
pmallick 0:3afcd581558d 113 .dout_format = AD7606_1_DOUT,
pmallick 0:3afcd581558d 114 .ext_os_clock = false,
pmallick 0:3afcd581558d 115 .status_header = false
pmallick 0:3afcd581558d 116 },
pmallick 0:3afcd581558d 117
pmallick 0:3afcd581558d 118 /* Diagnostic flags setting */
pmallick 0:3afcd581558d 119 {
pmallick 0:3afcd581558d 120 .rom_crc_err_en = false,
pmallick 0:3afcd581558d 121 .mm_crc_err_en = false,
pmallick 0:3afcd581558d 122 .int_crc_err_en = false,
pmallick 0:3afcd581558d 123 .spi_write_err_en = false,
pmallick 0:3afcd581558d 124 .spi_read_err_en = false,
pmallick 0:3afcd581558d 125 .busy_stuck_high_err_en = false,
pmallick 0:3afcd581558d 126 .clk_fs_os_counter_en = false,
pmallick 0:3afcd581558d 127 .interface_check_en = false
pmallick 0:3afcd581558d 128 },
pmallick 0:3afcd581558d 129
pmallick 0:3afcd581558d 130 /* Default offset for all channels */
pmallick 0:3afcd581558d 131 .offset_ch = { 0, 0, 0, 0, 0, 0, 0, 0 },
pmallick 0:3afcd581558d 132
pmallick 0:3afcd581558d 133 /* Default phase (0x00) for all channels */
pmallick 0:3afcd581558d 134 .phase_ch = { 0, 0, 0, 0, 0, 0, 0, 0 },
pmallick 0:3afcd581558d 135
pmallick 0:3afcd581558d 136 /* Default gain (0x00) for all channels */
pmallick 0:3afcd581558d 137 .gain_ch = { 0, 0, 0, 0, 0, 0, 0, 0 },
pmallick 0:3afcd581558d 138
pmallick 0:3afcd581558d 139 /* Default range for all channels */
pmallick 0:3afcd581558d 140 .range_ch = {
pmallick 0:3afcd581558d 141 #if defined(DEV_AD7609)
pmallick 0:3afcd581558d 142 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 143 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 144 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 145 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 146 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 147 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 148 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 149 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, true},
pmallick 0:3afcd581558d 150 #else
pmallick 0:3afcd581558d 151 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false},
pmallick 0:3afcd581558d 152 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false},
pmallick 0:3afcd581558d 153 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false},
pmallick 0:3afcd581558d 154 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false},
pmallick 0:3afcd581558d 155 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false},
pmallick 0:3afcd581558d 156 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false},
pmallick 0:3afcd581558d 157 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false},
pmallick 0:3afcd581558d 158 {-USER_CONFIG_RANGE, USER_CONFIG_RANGE, false}
pmallick 0:3afcd581558d 159 #endif
pmallick 0:3afcd581558d 160 }
pmallick 0:3afcd581558d 161 };