Pratyush Mallick / Mbed OS testing

this is testing

app/noos_mbed/drivers/impedance-analyzer/ad5933/ad5933.h@0:3afcd581558d, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 18:54:16 2021 +0530
Revision:
0:3afcd581558d
this is testing

Who changed what in which revision?

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pmallick 0:3afcd581558d 1 /***************************************************************************//**
pmallick 0:3afcd581558d 2 * @file AD5933.h
pmallick 0:3afcd581558d 3 * @brief Header file of AD5933 Driver.
pmallick 0:3afcd581558d 4 * @author DBogdan (dragos.bogdan@analog.com)
pmallick 0:3afcd581558d 5 ********************************************************************************
pmallick 0:3afcd581558d 6 * Copyright 2012(c) Analog Devices, Inc.
pmallick 0:3afcd581558d 7 *
pmallick 0:3afcd581558d 8 * All rights reserved.
pmallick 0:3afcd581558d 9 *
pmallick 0:3afcd581558d 10 * Redistribution and use in source and binary forms, with or without
pmallick 0:3afcd581558d 11 * modification, are permitted provided that the following conditions are met:
pmallick 0:3afcd581558d 12 * - Redistributions of source code must retain the above copyright
pmallick 0:3afcd581558d 13 * notice, this list of conditions and the following disclaimer.
pmallick 0:3afcd581558d 14 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:3afcd581558d 15 * notice, this list of conditions and the following disclaimer in
pmallick 0:3afcd581558d 16 * the documentation and/or other materials provided with the
pmallick 0:3afcd581558d 17 * distribution.
pmallick 0:3afcd581558d 18 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:3afcd581558d 19 * contributors may be used to endorse or promote products derived
pmallick 0:3afcd581558d 20 * from this software without specific prior written permission.
pmallick 0:3afcd581558d 21 * - The use of this software may or may not infringe the patent rights
pmallick 0:3afcd581558d 22 * of one or more patent holders. This license does not release you
pmallick 0:3afcd581558d 23 * from the requirement that you obtain separate licenses from these
pmallick 0:3afcd581558d 24 * patent holders to use this software.
pmallick 0:3afcd581558d 25 * - Use of the software either in source or binary form, must be run
pmallick 0:3afcd581558d 26 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:3afcd581558d 27 *
pmallick 0:3afcd581558d 28 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
pmallick 0:3afcd581558d 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
pmallick 0:3afcd581558d 30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:3afcd581558d 31 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
pmallick 0:3afcd581558d 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
pmallick 0:3afcd581558d 33 * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
pmallick 0:3afcd581558d 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
pmallick 0:3afcd581558d 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
pmallick 0:3afcd581558d 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
pmallick 0:3afcd581558d 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
pmallick 0:3afcd581558d 38 *******************************************************************************/
pmallick 0:3afcd581558d 39 #ifndef __AD5933_H__
pmallick 0:3afcd581558d 40 #define __AD5933_H__
pmallick 0:3afcd581558d 41
pmallick 0:3afcd581558d 42 #include <math.h>
pmallick 0:3afcd581558d 43
pmallick 0:3afcd581558d 44 #ifndef M_PI
pmallick 0:3afcd581558d 45 #define M_PI 3.14159265359
pmallick 0:3afcd581558d 46 #endif
pmallick 0:3afcd581558d 47 const double radToDeg180ovPi = 180 / M_PI;
pmallick 0:3afcd581558d 48
pmallick 0:3afcd581558d 49 /******************************************************************************/
pmallick 0:3afcd581558d 50 /************************** AD5933 Definitions ********************************/
pmallick 0:3afcd581558d 51 /******************************************************************************/
pmallick 0:3afcd581558d 52
pmallick 0:3afcd581558d 53 /* AD5933 Registers */
pmallick 0:3afcd581558d 54 #define AD5933_REG_CONTROL_HB 0x80 // HB of the Control register
pmallick 0:3afcd581558d 55 #define AD5933_REG_CONTROL_LB 0x81 // LB of the Control register
pmallick 0:3afcd581558d 56 #define AD5933_REG_FREQ_START 0x82 // Start frequency
pmallick 0:3afcd581558d 57 #define AD5933_REG_FREQ_INC 0x85 // Frequency increment
pmallick 0:3afcd581558d 58 #define AD5933_REG_INC_NUM 0x88 // Number of increments
pmallick 0:3afcd581558d 59 #define AD5933_REG_SETTLING_CYCLES 0x8A // Number of settling time cycles
pmallick 0:3afcd581558d 60 #define AD5933_REG_STATUS 0x8F // Status
pmallick 0:3afcd581558d 61 #define AD5933_REG_TEMP_DATA 0x92 // Temperature data
pmallick 0:3afcd581558d 62 #define AD5933_REG_REAL_DATA 0x94 // Real data
pmallick 0:3afcd581558d 63 #define AD5933_REG_IMAG_DATA 0x96 // Imaginary data
pmallick 0:3afcd581558d 64
pmallick 0:3afcd581558d 65 /* AD5933_REG_CONTROL_HB Bits */
pmallick 0:3afcd581558d 66 #define AD5933_CONTROL_FUNCTION(x) ((x) << 4)
pmallick 0:3afcd581558d 67 #define AD5933_CONTROL_RANGE(x) ((x) << 1)
pmallick 0:3afcd581558d 68 #define AD5933_CONTROL_PGA_GAIN(x) ((x) << 0)
pmallick 0:3afcd581558d 69
pmallick 0:3afcd581558d 70 /* AD5933_REG_CONTROL_LB Bits */
pmallick 0:3afcd581558d 71 #define AD5933_CONTROL_RESET (0x1 << 4)
pmallick 0:3afcd581558d 72 #define AD5933_CONTROL_INT_SYSCLK (0x0 << 3)
pmallick 0:3afcd581558d 73 #define AD5933_CONTROL_EXT_SYSCLK (0x1 << 3)
pmallick 0:3afcd581558d 74
pmallick 0:3afcd581558d 75 /* AD5933_CONTROL_FUNCTION(x) options */
pmallick 0:3afcd581558d 76 #define AD5933_FUNCTION_NOP 0x0
pmallick 0:3afcd581558d 77 #define AD5933_FUNCTION_INIT_START_FREQ 0x1
pmallick 0:3afcd581558d 78 #define AD5933_FUNCTION_START_SWEEP 0x2
pmallick 0:3afcd581558d 79 #define AD5933_FUNCTION_INC_FREQ 0x3
pmallick 0:3afcd581558d 80 #define AD5933_FUNCTION_REPEAT_FREQ 0x4
pmallick 0:3afcd581558d 81 #define AD5933_FUNCTION_MEASURE_TEMP 0x9
pmallick 0:3afcd581558d 82 #define AD5933_FUNCTION_POWER_DOWN 0xA
pmallick 0:3afcd581558d 83 #define AD5933_FUNCTION_STANDBY 0xB
pmallick 0:3afcd581558d 84
pmallick 0:3afcd581558d 85 /* AD5933_CONTROL_RANGE(x) options */
pmallick 0:3afcd581558d 86 #define AD5933_RANGE_2000mVpp 0x0
pmallick 0:3afcd581558d 87 #define AD5933_RANGE_200mVpp 0x1
pmallick 0:3afcd581558d 88 #define AD5933_RANGE_400mVpp 0x2
pmallick 0:3afcd581558d 89 #define AD5933_RANGE_1000mVpp 0x3
pmallick 0:3afcd581558d 90
pmallick 0:3afcd581558d 91 /* AD5933_CONTROL_PGA_GAIN(x) options */
pmallick 0:3afcd581558d 92 #define AD5933_GAIN_X5 0
pmallick 0:3afcd581558d 93 #define AD5933_GAIN_X1 1
pmallick 0:3afcd581558d 94
pmallick 0:3afcd581558d 95 /* AD5933 Default number of settling cycles */
pmallick 0:3afcd581558d 96 #define AD5933_15_CYCLES 15
pmallick 0:3afcd581558d 97
pmallick 0:3afcd581558d 98 /* AD5933 settling cycles mulitiplier */
pmallick 0:3afcd581558d 99 #define AD5933_SETTLING_X1 0
pmallick 0:3afcd581558d 100 #define AD5933_SETTLING_X2 1
pmallick 0:3afcd581558d 101 #define AD5933_SETTLING_X4 3
pmallick 0:3afcd581558d 102
pmallick 0:3afcd581558d 103 /* AD5933_REG_STATUS Bits */
pmallick 0:3afcd581558d 104 #define AD5933_STAT_TEMP_VALID (0x1 << 0)
pmallick 0:3afcd581558d 105 #define AD5933_STAT_DATA_VALID (0x1 << 1)
pmallick 0:3afcd581558d 106 #define AD5933_STAT_SWEEP_DONE (0x1 << 2)
pmallick 0:3afcd581558d 107
pmallick 0:3afcd581558d 108 /* AD5933 Address */
pmallick 0:3afcd581558d 109 #define AD5933_ADDRESS 0x0D
pmallick 0:3afcd581558d 110
pmallick 0:3afcd581558d 111 /* AD5933 Block Commands */
pmallick 0:3afcd581558d 112 #define AD5933_BLOCK_WRITE 0xA0
pmallick 0:3afcd581558d 113 #define AD5933_BLOCK_READ 0xA1
pmallick 0:3afcd581558d 114 #define AD5933_ADDR_POINTER 0xB0
pmallick 0:3afcd581558d 115
pmallick 0:3afcd581558d 116 /* AD5933 Specifications */
pmallick 0:3afcd581558d 117 #define AD5933_INTERNAL_SYS_CLK 16000000ul // 16MHz
pmallick 0:3afcd581558d 118 #define AD5933_MAX_INC_NUM 511 // Maximum increment number
pmallick 0:3afcd581558d 119 #define AD5933_MAX_SETTLING_CYCLES 511
pmallick 0:3afcd581558d 120
pmallick 0:3afcd581558d 121 /******************************************************************************/
pmallick 0:3afcd581558d 122 /*************************** Types Declarations *******************************/
pmallick 0:3afcd581558d 123 /******************************************************************************/
pmallick 0:3afcd581558d 124
pmallick 0:3afcd581558d 125 struct ad5933_dev {
pmallick 0:3afcd581558d 126 /* I2C */
pmallick 0:3afcd581558d 127 i2c_desc *i2c_desc;
pmallick 0:3afcd581558d 128 /* Device Settings */
pmallick 0:3afcd581558d 129 uint32_t current_sys_clk;
pmallick 0:3afcd581558d 130 uint8_t current_clock_source;
pmallick 0:3afcd581558d 131 uint8_t current_gain;
pmallick 0:3afcd581558d 132 uint8_t current_range;
pmallick 0:3afcd581558d 133 uint16_t current_settling;
pmallick 0:3afcd581558d 134 };
pmallick 0:3afcd581558d 135
pmallick 0:3afcd581558d 136 struct ad5933_init_param {
pmallick 0:3afcd581558d 137 /* I2C */
pmallick 0:3afcd581558d 138 i2c_init_param i2c_init;
pmallick 0:3afcd581558d 139 /* Device Settings */
pmallick 0:3afcd581558d 140 uint32_t current_sys_clk;
pmallick 0:3afcd581558d 141 uint8_t current_clock_source;
pmallick 0:3afcd581558d 142 uint8_t current_gain;
pmallick 0:3afcd581558d 143 uint8_t current_range;
pmallick 0:3afcd581558d 144 uint16_t current_settling;
pmallick 0:3afcd581558d 145 };
pmallick 0:3afcd581558d 146
pmallick 0:3afcd581558d 147 typedef struct ad5933_result {
pmallick 0:3afcd581558d 148 double magnitude;
pmallick 0:3afcd581558d 149 double phase;
pmallick 0:3afcd581558d 150 }ad5933_result;
pmallick 0:3afcd581558d 151
pmallick 0:3afcd581558d 152 /******************************************************************************/
pmallick 0:3afcd581558d 153 /************************ Functions Declarations ******************************/
pmallick 0:3afcd581558d 154 /******************************************************************************/
pmallick 0:3afcd581558d 155
pmallick 0:3afcd581558d 156 /*! Initializes the communication peripheral. */
pmallick 0:3afcd581558d 157 int32_t ad5933_init(struct ad5933_dev **device,
pmallick 0:3afcd581558d 158 struct ad5933_init_param init_param);
pmallick 0:3afcd581558d 159
pmallick 0:3afcd581558d 160 /*! Free the resources allocated by ad5686_init(). */
pmallick 0:3afcd581558d 161 int32_t ad5933_remove(struct ad5933_dev *dev);
pmallick 0:3afcd581558d 162
pmallick 0:3afcd581558d 163 /*! Writes data into a register. */
pmallick 0:3afcd581558d 164 void ad5933_set_register_value(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 165 uint8_t register_address,
pmallick 0:3afcd581558d 166 uint32_t register_value,
pmallick 0:3afcd581558d 167 uint8_t bytes_number);
pmallick 0:3afcd581558d 168
pmallick 0:3afcd581558d 169 /*! Reads the value of a register. */
pmallick 0:3afcd581558d 170 uint32_t ad5933_get_register_value(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 171 uint8_t register_address,
pmallick 0:3afcd581558d 172 uint8_t bytes_number);
pmallick 0:3afcd581558d 173
pmallick 0:3afcd581558d 174 /*! Resets the device. */
pmallick 0:3afcd581558d 175 void ad5933_reset(struct ad5933_dev *dev);
pmallick 0:3afcd581558d 176
pmallick 0:3afcd581558d 177 /*! Selects the source of the system clock. */
pmallick 0:3afcd581558d 178 void ad5933_set_system_clk(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 179 int8_t clk_source,
pmallick 0:3afcd581558d 180 uint32_t ext_clk_freq);
pmallick 0:3afcd581558d 181
pmallick 0:3afcd581558d 182 /*! Selects the range and gain of the device. */
pmallick 0:3afcd581558d 183 void ad5933_set_range_and_gain(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 184 int8_t range,
pmallick 0:3afcd581558d 185 int8_t gain);
pmallick 0:3afcd581558d 186
pmallick 0:3afcd581558d 187 /*! Reads the temp. from the part and returns the data in degrees Celsius. */
pmallick 0:3afcd581558d 188 float ad5933_get_temperature(struct ad5933_dev *dev);
pmallick 0:3afcd581558d 189
pmallick 0:3afcd581558d 190 /*! Configures the sweep parameters. */
pmallick 0:3afcd581558d 191 void ad5933_config_sweep(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 192 uint32_t start_freq,
pmallick 0:3afcd581558d 193 uint32_t inc_freq,
pmallick 0:3afcd581558d 194 uint16_t inc_num);
pmallick 0:3afcd581558d 195
pmallick 0:3afcd581558d 196 /*! Starts the sweep operation. */
pmallick 0:3afcd581558d 197 void ad5933_start_sweep(struct ad5933_dev *dev);
pmallick 0:3afcd581558d 198
pmallick 0:3afcd581558d 199 /*! Reads the real and the imaginary data and calculates the Gain Factor. */
pmallick 0:3afcd581558d 200 double ad5933_calculate_gain_factor(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 201 uint32_t calibration_impedance,
pmallick 0:3afcd581558d 202 uint8_t freq_function);
pmallick 0:3afcd581558d 203
pmallick 0:3afcd581558d 204 /*! Reads the real and the imaginary data and calculates the Impedance. */
pmallick 0:3afcd581558d 205 ad5933_result ad5933_calculate_impedance(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 206 double gain_factor,
pmallick 0:3afcd581558d 207 uint8_t freq_function);
pmallick 0:3afcd581558d 208
pmallick 0:3afcd581558d 209 void ad5933_set_settling_time(struct ad5933_dev *dev,
pmallick 0:3afcd581558d 210 uint8_t mulitplier,
pmallick 0:3afcd581558d 211 uint16_t number_cycles);
pmallick 0:3afcd581558d 212
pmallick 0:3afcd581558d 213 #endif /* __AD5933_H__ */