Pratyush Mallick / Mbed OS testing

this is testing

app/noos_mbed/drivers/dac/ad5686/ad5686.c@0:3afcd581558d, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 18:54:16 2021 +0530
Revision:
0:3afcd581558d
this is testing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 0:3afcd581558d 1 /***************************************************************************//**
pmallick 0:3afcd581558d 2 * @file ad5686.c
pmallick 0:3afcd581558d 3 * @brief Implementation of AD5686 Driver.
pmallick 0:3afcd581558d 4 * @author Istvan Csomortani (istvan.csomortani@analog.com)
pmallick 0:3afcd581558d 5 *******************************************************************************
pmallick 0:3afcd581558d 6 * Copyright 2013, 2020(c) Analog Devices, Inc.
pmallick 0:3afcd581558d 7 *
pmallick 0:3afcd581558d 8 * All rights reserved.
pmallick 0:3afcd581558d 9 *
pmallick 0:3afcd581558d 10 * Redistribution and use in source and binary forms, with or without
pmallick 0:3afcd581558d 11 * modification,
pmallick 0:3afcd581558d 12 * are permitted provided that the following conditions are met:
pmallick 0:3afcd581558d 13 * - Redistributions of source code must retain the above copyright
pmallick 0:3afcd581558d 14 * notice, this list of conditions and the following disclaimer.
pmallick 0:3afcd581558d 15 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:3afcd581558d 16 * notice, this list of conditions and the following disclaimer in
pmallick 0:3afcd581558d 17 * the documentation and/or other materials provided with the
pmallick 0:3afcd581558d 18 * distribution.
pmallick 0:3afcd581558d 19 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:3afcd581558d 20 * contributors may be used to endorse or promote products derived
pmallick 0:3afcd581558d 21 * from this software without specific prior written permission.
pmallick 0:3afcd581558d 22 * - The use of this software may or may not infringe the patent rights
pmallick 0:3afcd581558d 23 * of one or more patent holders. This license does not release you
pmallick 0:3afcd581558d 24 * from the requirement that you obtain separate licenses from these
pmallick 0:3afcd581558d 25 * patent holders to use this software.
pmallick 0:3afcd581558d 26 * - Use of the software either in source or binary form, must be run
pmallick 0:3afcd581558d 27 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:3afcd581558d 28 *
pmallick 0:3afcd581558d 29 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
pmallick 0:3afcd581558d 30 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
pmallick 0:3afcd581558d 31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:3afcd581558d 32 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
pmallick 0:3afcd581558d 33 * INCIDENTAL,SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
pmallick 0:3afcd581558d 34 * * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS
pmallick 0:3afcd581558d 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
pmallick 0:3afcd581558d 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
pmallick 0:3afcd581558d 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
pmallick 0:3afcd581558d 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
pmallick 0:3afcd581558d 39 * DAMAGE.
pmallick 0:3afcd581558d 40 *
pmallick 0:3afcd581558d 41 ******************************************************************************/
pmallick 0:3afcd581558d 42
pmallick 0:3afcd581558d 43 /*****************************************************************************/
pmallick 0:3afcd581558d 44 /***************************** Include Files *********************************/
pmallick 0:3afcd581558d 45 /*****************************************************************************/
pmallick 0:3afcd581558d 46 #include <stdlib.h>
pmallick 0:3afcd581558d 47 #include "ad5686.h"
pmallick 0:3afcd581558d 48
pmallick 0:3afcd581558d 49 /*****************************************************************************/
pmallick 0:3afcd581558d 50 /***************************** Constant definition ***************************/
pmallick 0:3afcd581558d 51 /*****************************************************************************/
pmallick 0:3afcd581558d 52 static const uint32_t ad5683_channel_addr [] = {
pmallick 0:3afcd581558d 53 [AD5686_CH_0] = 0,
pmallick 0:3afcd581558d 54 };
pmallick 0:3afcd581558d 55
pmallick 0:3afcd581558d 56 static const uint32_t ad5689_channel_addr[] = {
pmallick 0:3afcd581558d 57 [AD5686_CH_0] = 1,
pmallick 0:3afcd581558d 58 [AD5686_CH_1] = 8,
pmallick 0:3afcd581558d 59 };
pmallick 0:3afcd581558d 60
pmallick 0:3afcd581558d 61 static const uint32_t ad5686_channel_addr[] = {
pmallick 0:3afcd581558d 62 [AD5686_CH_0] = 1,
pmallick 0:3afcd581558d 63 [AD5686_CH_1] = 2,
pmallick 0:3afcd581558d 64 [AD5686_CH_2] = 4,
pmallick 0:3afcd581558d 65 [AD5686_CH_3] = 8,
pmallick 0:3afcd581558d 66 };
pmallick 0:3afcd581558d 67
pmallick 0:3afcd581558d 68 static const uint32_t ad5676_channel_addr[] = {
pmallick 0:3afcd581558d 69 [AD5686_CH_0] = 0,
pmallick 0:3afcd581558d 70 [AD5686_CH_1] = 1,
pmallick 0:3afcd581558d 71 [AD5686_CH_2] = 2,
pmallick 0:3afcd581558d 72 [AD5686_CH_3] = 3,
pmallick 0:3afcd581558d 73 [AD5686_CH_4] = 4,
pmallick 0:3afcd581558d 74 [AD5686_CH_5] = 5,
pmallick 0:3afcd581558d 75 [AD5686_CH_6] = 6,
pmallick 0:3afcd581558d 76 [AD5686_CH_7] = 7,
pmallick 0:3afcd581558d 77 };
pmallick 0:3afcd581558d 78
pmallick 0:3afcd581558d 79 static const uint32_t ad5679_channel_addr[] = {
pmallick 0:3afcd581558d 80 [AD5686_CH_0] = 0,
pmallick 0:3afcd581558d 81 [AD5686_CH_1] = 1,
pmallick 0:3afcd581558d 82 [AD5686_CH_2] = 2,
pmallick 0:3afcd581558d 83 [AD5686_CH_3] = 3,
pmallick 0:3afcd581558d 84 [AD5686_CH_4] = 4,
pmallick 0:3afcd581558d 85 [AD5686_CH_5] = 5,
pmallick 0:3afcd581558d 86 [AD5686_CH_6] = 6,
pmallick 0:3afcd581558d 87 [AD5686_CH_7] = 7,
pmallick 0:3afcd581558d 88 [AD5686_CH_8] = 8,
pmallick 0:3afcd581558d 89 [AD5686_CH_9] = 9,
pmallick 0:3afcd581558d 90 [AD5686_CH_10] = 10,
pmallick 0:3afcd581558d 91 [AD5686_CH_11] = 11,
pmallick 0:3afcd581558d 92 [AD5686_CH_12] = 12,
pmallick 0:3afcd581558d 93 [AD5686_CH_13] = 13,
pmallick 0:3afcd581558d 94 [AD5686_CH_14] = 14,
pmallick 0:3afcd581558d 95 [AD5686_CH_15] = 15,
pmallick 0:3afcd581558d 96 };
pmallick 0:3afcd581558d 97
pmallick 0:3afcd581558d 98 static const struct ad5686_chip_info chip_info[] = {
pmallick 0:3afcd581558d 99 [ID_AD5671R] = {
pmallick 0:3afcd581558d 100 .resolution = 12,
pmallick 0:3afcd581558d 101 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 102 .communication = I2C,
pmallick 0:3afcd581558d 103 .channel_addr = ad5676_channel_addr,
pmallick 0:3afcd581558d 104 },
pmallick 0:3afcd581558d 105 [ID_AD5672R] = {
pmallick 0:3afcd581558d 106 .resolution = 12,
pmallick 0:3afcd581558d 107 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 108 .communication = SPI,
pmallick 0:3afcd581558d 109 .channel_addr = ad5676_channel_addr,
pmallick 0:3afcd581558d 110 },
pmallick 0:3afcd581558d 111 [ID_AD5673R] = {
pmallick 0:3afcd581558d 112 .resolution = 12,
pmallick 0:3afcd581558d 113 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 114 .communication = I2C,
pmallick 0:3afcd581558d 115 .channel_addr = ad5679_channel_addr,
pmallick 0:3afcd581558d 116 },
pmallick 0:3afcd581558d 117 [ID_AD5674] = {
pmallick 0:3afcd581558d 118 .resolution = 12,
pmallick 0:3afcd581558d 119 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 120 .communication = SPI,
pmallick 0:3afcd581558d 121 .channel_addr = ad5679_channel_addr,
pmallick 0:3afcd581558d 122 },
pmallick 0:3afcd581558d 123 [ID_AD5674R] = {
pmallick 0:3afcd581558d 124 .resolution = 12,
pmallick 0:3afcd581558d 125 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 126 .communication = SPI,
pmallick 0:3afcd581558d 127 .channel_addr = ad5679_channel_addr,
pmallick 0:3afcd581558d 128 },
pmallick 0:3afcd581558d 129 [ID_AD5675R] = {
pmallick 0:3afcd581558d 130 .resolution = 16,
pmallick 0:3afcd581558d 131 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 132 .communication = I2C,
pmallick 0:3afcd581558d 133 .channel_addr = ad5676_channel_addr,
pmallick 0:3afcd581558d 134 },
pmallick 0:3afcd581558d 135 [ID_AD5676] = {
pmallick 0:3afcd581558d 136 .resolution = 16,
pmallick 0:3afcd581558d 137 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 138 .communication = SPI,
pmallick 0:3afcd581558d 139 .channel_addr = ad5676_channel_addr,
pmallick 0:3afcd581558d 140 },
pmallick 0:3afcd581558d 141 [ID_AD5676R] = {
pmallick 0:3afcd581558d 142 .resolution = 16,
pmallick 0:3afcd581558d 143 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 144 .communication = SPI,
pmallick 0:3afcd581558d 145 .channel_addr = ad5676_channel_addr,
pmallick 0:3afcd581558d 146 },
pmallick 0:3afcd581558d 147 [ID_AD5677R] = {
pmallick 0:3afcd581558d 148 .resolution = 16,
pmallick 0:3afcd581558d 149 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 150 .communication = I2C,
pmallick 0:3afcd581558d 151 .channel_addr = ad5679_channel_addr,
pmallick 0:3afcd581558d 152 },
pmallick 0:3afcd581558d 153 [ID_AD5679] = {
pmallick 0:3afcd581558d 154 .resolution = 16,
pmallick 0:3afcd581558d 155 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 156 .communication = SPI,
pmallick 0:3afcd581558d 157 .channel_addr = ad5679_channel_addr,
pmallick 0:3afcd581558d 158 },
pmallick 0:3afcd581558d 159 [ID_AD5679R] = {
pmallick 0:3afcd581558d 160 .resolution = 16,
pmallick 0:3afcd581558d 161 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 162 .communication = SPI,
pmallick 0:3afcd581558d 163 .channel_addr = ad5679_channel_addr,
pmallick 0:3afcd581558d 164 },
pmallick 0:3afcd581558d 165 [ID_AD5684R] = {
pmallick 0:3afcd581558d 166 .resolution = 12,
pmallick 0:3afcd581558d 167 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 168 .communication = SPI,
pmallick 0:3afcd581558d 169 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 170 },
pmallick 0:3afcd581558d 171 [ID_AD5685R] = {
pmallick 0:3afcd581558d 172 .resolution = 14,
pmallick 0:3afcd581558d 173 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 174 .communication = SPI,
pmallick 0:3afcd581558d 175 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 176 },
pmallick 0:3afcd581558d 177 [ID_AD5686] = {
pmallick 0:3afcd581558d 178 .resolution = 16,
pmallick 0:3afcd581558d 179 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 180 .communication = SPI,
pmallick 0:3afcd581558d 181 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 182 },
pmallick 0:3afcd581558d 183 [ID_AD5686R] = {
pmallick 0:3afcd581558d 184 .resolution = 16,
pmallick 0:3afcd581558d 185 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 186 .communication = SPI,
pmallick 0:3afcd581558d 187 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 188 },
pmallick 0:3afcd581558d 189 [ID_AD5687] = {
pmallick 0:3afcd581558d 190 .resolution = 12,
pmallick 0:3afcd581558d 191 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 192 .communication = SPI,
pmallick 0:3afcd581558d 193 .channel_addr = ad5689_channel_addr,
pmallick 0:3afcd581558d 194 },
pmallick 0:3afcd581558d 195 [ID_AD5687R] = {
pmallick 0:3afcd581558d 196 .resolution = 12,
pmallick 0:3afcd581558d 197 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 198 .communication = SPI,
pmallick 0:3afcd581558d 199 .channel_addr = ad5689_channel_addr,
pmallick 0:3afcd581558d 200 },
pmallick 0:3afcd581558d 201 [ID_AD5689] = {
pmallick 0:3afcd581558d 202 .resolution = 16,
pmallick 0:3afcd581558d 203 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 204 .communication = SPI,
pmallick 0:3afcd581558d 205 .channel_addr = ad5689_channel_addr,
pmallick 0:3afcd581558d 206 },
pmallick 0:3afcd581558d 207 [ID_AD5689R] = {
pmallick 0:3afcd581558d 208 .resolution = 16,
pmallick 0:3afcd581558d 209 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 210 .communication = SPI,
pmallick 0:3afcd581558d 211 .channel_addr = ad5689_channel_addr,
pmallick 0:3afcd581558d 212 },
pmallick 0:3afcd581558d 213 [ID_AD5697R] = {
pmallick 0:3afcd581558d 214 .resolution = 12,
pmallick 0:3afcd581558d 215 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 216 .communication = I2C,
pmallick 0:3afcd581558d 217 .channel_addr = ad5689_channel_addr,
pmallick 0:3afcd581558d 218 },
pmallick 0:3afcd581558d 219 [ID_AD5694] = {
pmallick 0:3afcd581558d 220 .resolution = 12,
pmallick 0:3afcd581558d 221 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 222 .communication = I2C,
pmallick 0:3afcd581558d 223 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 224 },
pmallick 0:3afcd581558d 225 [ID_AD5694R] = {
pmallick 0:3afcd581558d 226 .resolution = 12,
pmallick 0:3afcd581558d 227 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 228 .communication = I2C,
pmallick 0:3afcd581558d 229 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 230 },
pmallick 0:3afcd581558d 231 [ID_AD5695R] = {
pmallick 0:3afcd581558d 232 .resolution = 14,
pmallick 0:3afcd581558d 233 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 234 .communication = I2C,
pmallick 0:3afcd581558d 235 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 236 },
pmallick 0:3afcd581558d 237 [ID_AD5696] = {
pmallick 0:3afcd581558d 238 .resolution = 16,
pmallick 0:3afcd581558d 239 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 240 .communication = I2C,
pmallick 0:3afcd581558d 241 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 242 },
pmallick 0:3afcd581558d 243 [ID_AD5696R] = {
pmallick 0:3afcd581558d 244 .resolution = 16,
pmallick 0:3afcd581558d 245 .register_map = AD5686_REG_MAP,
pmallick 0:3afcd581558d 246 .communication = I2C,
pmallick 0:3afcd581558d 247 .channel_addr = ad5686_channel_addr,
pmallick 0:3afcd581558d 248 },
pmallick 0:3afcd581558d 249 [ID_AD5681R] = {
pmallick 0:3afcd581558d 250 .resolution = 12,
pmallick 0:3afcd581558d 251 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 252 .communication = SPI,
pmallick 0:3afcd581558d 253 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 254 },
pmallick 0:3afcd581558d 255 [ID_AD5682R] = {
pmallick 0:3afcd581558d 256 .resolution = 14,
pmallick 0:3afcd581558d 257 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 258 .communication = SPI,
pmallick 0:3afcd581558d 259 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 260 },
pmallick 0:3afcd581558d 261 [ID_AD5683R] = {
pmallick 0:3afcd581558d 262 .resolution = 16,
pmallick 0:3afcd581558d 263 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 264 .communication = SPI,
pmallick 0:3afcd581558d 265 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 266 },
pmallick 0:3afcd581558d 267 [ID_AD5683] = {
pmallick 0:3afcd581558d 268 .resolution = 16,
pmallick 0:3afcd581558d 269 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 270 .communication = SPI,
pmallick 0:3afcd581558d 271 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 272 },
pmallick 0:3afcd581558d 273 [ID_AD5691R] = {
pmallick 0:3afcd581558d 274 .resolution = 12,
pmallick 0:3afcd581558d 275 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 276 .communication = I2C,
pmallick 0:3afcd581558d 277 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 278 },
pmallick 0:3afcd581558d 279 [ID_AD5692R] = {
pmallick 0:3afcd581558d 280 .resolution = 14,
pmallick 0:3afcd581558d 281 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 282 .communication = I2C,
pmallick 0:3afcd581558d 283 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 284 },
pmallick 0:3afcd581558d 285 [ID_AD5693R] = {
pmallick 0:3afcd581558d 286 .resolution = 16,
pmallick 0:3afcd581558d 287 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 288 .communication = I2C,
pmallick 0:3afcd581558d 289 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 290 },
pmallick 0:3afcd581558d 291 [ID_AD5693] = {
pmallick 0:3afcd581558d 292 .resolution = 16,
pmallick 0:3afcd581558d 293 .register_map = AD5683_REG_MAP,
pmallick 0:3afcd581558d 294 .communication = I2C,
pmallick 0:3afcd581558d 295 .channel_addr = ad5683_channel_addr,
pmallick 0:3afcd581558d 296 }
pmallick 0:3afcd581558d 297 };
pmallick 0:3afcd581558d 298
pmallick 0:3afcd581558d 299 /***************************************************************************//**
pmallick 0:3afcd581558d 300 * @brief Initializes the communication peripheral and the initial Values for
pmallick 0:3afcd581558d 301 * AD5686 Board.
pmallick 0:3afcd581558d 302 *
pmallick 0:3afcd581558d 303 * @param device - The device structure.
pmallick 0:3afcd581558d 304 * @param init_param - The structure that contains the device initial
pmallick 0:3afcd581558d 305 * parameters.
pmallick 0:3afcd581558d 306 *
pmallick 0:3afcd581558d 307 * @return ret - The result of the initialization procedure.
pmallick 0:3afcd581558d 308 * Example: -1 - I2C peripheral was not initialized or the
pmallick 0:3afcd581558d 309 * device is not present.
pmallick 0:3afcd581558d 310 * 0 - I2C peripheral was initialized and the
pmallick 0:3afcd581558d 311 * device is present.
pmallick 0:3afcd581558d 312 *******************************************************************************/
pmallick 0:3afcd581558d 313 int32_t ad5686_init(struct ad5686_dev **device,
pmallick 0:3afcd581558d 314 struct ad5686_init_param init_param)
pmallick 0:3afcd581558d 315 {
pmallick 0:3afcd581558d 316 struct ad5686_dev *dev;
pmallick 0:3afcd581558d 317 int32_t ret;
pmallick 0:3afcd581558d 318
pmallick 0:3afcd581558d 319 dev = (struct ad5686_dev *)malloc(sizeof(*dev));
pmallick 0:3afcd581558d 320 if (!dev)
pmallick 0:3afcd581558d 321 return -1;
pmallick 0:3afcd581558d 322
pmallick 0:3afcd581558d 323 dev->act_device = init_param.act_device;
pmallick 0:3afcd581558d 324 dev->power_down_mask = 0;
pmallick 0:3afcd581558d 325 dev->ldac_mask = 0;
pmallick 0:3afcd581558d 326
pmallick 0:3afcd581558d 327 if (chip_info[dev->act_device].communication == SPI)
pmallick 0:3afcd581558d 328 ret = spi_init(&dev->spi_desc, &init_param.spi_init);
pmallick 0:3afcd581558d 329 else
pmallick 0:3afcd581558d 330 ret = i2c_init(&dev->i2c_desc, &init_param.i2c_init);
pmallick 0:3afcd581558d 331
pmallick 0:3afcd581558d 332
pmallick 0:3afcd581558d 333 /* GPIO */
pmallick 0:3afcd581558d 334 ret |= gpio_get(&dev->gpio_reset, &init_param.gpio_reset);
pmallick 0:3afcd581558d 335 ret |= gpio_get(&dev->gpio_ldac, &init_param.gpio_ldac);
pmallick 0:3afcd581558d 336 ret |= gpio_get(&dev->gpio_gain, &init_param.gpio_gain);
pmallick 0:3afcd581558d 337
pmallick 0:3afcd581558d 338 if (dev->gpio_ldac)
pmallick 0:3afcd581558d 339 ret |= gpio_direction_output(dev->gpio_ldac, GPIO_LOW);
pmallick 0:3afcd581558d 340
pmallick 0:3afcd581558d 341 if (dev->gpio_reset)
pmallick 0:3afcd581558d 342 ret |= gpio_direction_output(dev->gpio_reset, GPIO_HIGH);
pmallick 0:3afcd581558d 343
pmallick 0:3afcd581558d 344 if (dev->gpio_gain)
pmallick 0:3afcd581558d 345 ret |= gpio_direction_output(dev->gpio_gain, GPIO_LOW);
pmallick 0:3afcd581558d 346 *device = dev;
pmallick 0:3afcd581558d 347
pmallick 0:3afcd581558d 348 return ret;
pmallick 0:3afcd581558d 349 }
pmallick 0:3afcd581558d 350
pmallick 0:3afcd581558d 351 /***************************************************************************//**
pmallick 0:3afcd581558d 352 * @brief Free the resources allocated by ad5686_init().
pmallick 0:3afcd581558d 353 *
pmallick 0:3afcd581558d 354 * @param dev - The device structure.
pmallick 0:3afcd581558d 355 *
pmallick 0:3afcd581558d 356 * @return ret - The result of the remove procedure.
pmallick 0:3afcd581558d 357 *******************************************************************************/
pmallick 0:3afcd581558d 358 int32_t ad5686_remove(struct ad5686_dev *dev)
pmallick 0:3afcd581558d 359 {
pmallick 0:3afcd581558d 360 int32_t ret;
pmallick 0:3afcd581558d 361
pmallick 0:3afcd581558d 362 if (chip_info[dev->act_device].communication == SPI)
pmallick 0:3afcd581558d 363 ret = spi_remove(dev->spi_desc);
pmallick 0:3afcd581558d 364 else
pmallick 0:3afcd581558d 365 ret = i2c_remove(dev->i2c_desc);
pmallick 0:3afcd581558d 366
pmallick 0:3afcd581558d 367 if (dev->gpio_ldac)
pmallick 0:3afcd581558d 368 ret |= gpio_remove(dev->gpio_ldac);
pmallick 0:3afcd581558d 369
pmallick 0:3afcd581558d 370 if (dev->gpio_reset)
pmallick 0:3afcd581558d 371 ret |= gpio_remove(dev->gpio_reset);
pmallick 0:3afcd581558d 372
pmallick 0:3afcd581558d 373 if (dev->gpio_gain)
pmallick 0:3afcd581558d 374 ret |= gpio_remove(dev->gpio_gain);
pmallick 0:3afcd581558d 375
pmallick 0:3afcd581558d 376 free(dev);
pmallick 0:3afcd581558d 377
pmallick 0:3afcd581558d 378 return ret;
pmallick 0:3afcd581558d 379 }
pmallick 0:3afcd581558d 380
pmallick 0:3afcd581558d 381 /**************************************************************************//**
pmallick 0:3afcd581558d 382 * @brief Write to input shift register.
pmallick 0:3afcd581558d 383 *
pmallick 0:3afcd581558d 384 * @param dev - The device structure.
pmallick 0:3afcd581558d 385 * @param command - Command control bits.
pmallick 0:3afcd581558d 386 * @param address - The address bits.
pmallick 0:3afcd581558d 387 * @param data - Data to be written in input register.
pmallick 0:3afcd581558d 388 *
pmallick 0:3afcd581558d 389 * @return read_back_data - value read from register.
pmallick 0:3afcd581558d 390 ******************************************************************************/
pmallick 0:3afcd581558d 391 uint16_t ad5686_set_shift_reg(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 392 uint8_t command,
pmallick 0:3afcd581558d 393 uint8_t address,
pmallick 0:3afcd581558d 394 uint16_t data)
pmallick 0:3afcd581558d 395 {
pmallick 0:3afcd581558d 396 uint8_t data_buff [ PKT_LENGTH ] = {0, 0, 0};
pmallick 0:3afcd581558d 397 uint16_t read_back_data = 0;
pmallick 0:3afcd581558d 398
pmallick 0:3afcd581558d 399 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP) {
pmallick 0:3afcd581558d 400 data_buff[0] = ((command & AD5686_CMD_MASK) << CMD_OFFSET) | \
pmallick 0:3afcd581558d 401 (address & ADDR_MASK);
pmallick 0:3afcd581558d 402 data_buff[1] = (data & AD5686_MSB_MASK) >> AD5686_MSB_OFFSET;
pmallick 0:3afcd581558d 403 data_buff[2] = (data & AD5686_LSB_MASK);
pmallick 0:3afcd581558d 404 } else {
pmallick 0:3afcd581558d 405 data_buff[0] = ((command & AD5683_CMD_MASK) << CMD_OFFSET) |
pmallick 0:3afcd581558d 406 ((data >> AD5683_MSB_OFFSET) & AD5683_MSB_MASK);
pmallick 0:3afcd581558d 407 data_buff[1] = (data >> AD5683_MIDB_OFFSET) & AD5683_MIDB_MASK;
pmallick 0:3afcd581558d 408 data_buff[2] = (data & AD5683_LSB_MASK) << AD5683_LSB_OFFSET;
pmallick 0:3afcd581558d 409 }
pmallick 0:3afcd581558d 410
pmallick 0:3afcd581558d 411 if(chip_info[dev->act_device].communication == SPI) {
pmallick 0:3afcd581558d 412 spi_write_and_read(dev->spi_desc, data_buff, PKT_LENGTH);
pmallick 0:3afcd581558d 413 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP)
pmallick 0:3afcd581558d 414 read_back_data = (data_buff[1] << AD5686_MSB_OFFSET) | data_buff[2];
pmallick 0:3afcd581558d 415 else
pmallick 0:3afcd581558d 416 read_back_data = (data_buff[0] & AD5683_CMD_MASK) << AD5683_MSB_OFFSET |
pmallick 0:3afcd581558d 417 data_buff[1] << AD5683_MIDB_OFFSET |
pmallick 0:3afcd581558d 418 data_buff[2] >> AD5683_LSB_OFFSET;
pmallick 0:3afcd581558d 419 } else
pmallick 0:3afcd581558d 420 i2c_write(dev->i2c_desc, data_buff, PKT_LENGTH, 1);
pmallick 0:3afcd581558d 421
pmallick 0:3afcd581558d 422 return read_back_data;
pmallick 0:3afcd581558d 423 }
pmallick 0:3afcd581558d 424
pmallick 0:3afcd581558d 425 /**************************************************************************//**
pmallick 0:3afcd581558d 426 * @brief Write to Input Register n (dependent on LDAC)
pmallick 0:3afcd581558d 427 *
pmallick 0:3afcd581558d 428 * @param dev - The device structure.
pmallick 0:3afcd581558d 429 * @param channel - The chosen channel to write to.
pmallick 0:3afcd581558d 430 * Accepted values: AD5686_CH_0
pmallick 0:3afcd581558d 431 * AD5686_CH_1
pmallick 0:3afcd581558d 432 * AD5686_CH_2
pmallick 0:3afcd581558d 433 * AD5686_CH_3
pmallick 0:3afcd581558d 434 * AD5686_CH_4
pmallick 0:3afcd581558d 435 * AD5686_CH_5
pmallick 0:3afcd581558d 436 * AD5686_CH_6
pmallick 0:3afcd581558d 437 * AD5686_CH_7
pmallick 0:3afcd581558d 438 * AD5686_CH_8
pmallick 0:3afcd581558d 439 * AD5686_CH_9
pmallick 0:3afcd581558d 440 * AD5686_CH_10
pmallick 0:3afcd581558d 441 * AD5686_CH_11
pmallick 0:3afcd581558d 442 * AD5686_CH_12
pmallick 0:3afcd581558d 443 * AD5686_CH_13
pmallick 0:3afcd581558d 444 * AD5686_CH_14
pmallick 0:3afcd581558d 445 * AD5686_CH_15
pmallick 0:3afcd581558d 446 * @param data - desired value to be written in register.
pmallick 0:3afcd581558d 447 *
pmallick 0:3afcd581558d 448 * @return None.
pmallick 0:3afcd581558d 449 ******************************************************************************/
pmallick 0:3afcd581558d 450 void ad5686_write_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 451 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 452 uint16_t data)
pmallick 0:3afcd581558d 453 {
pmallick 0:3afcd581558d 454 uint8_t data_offset = MAX_RESOLUTION - \
pmallick 0:3afcd581558d 455 chip_info[dev->act_device].resolution;
pmallick 0:3afcd581558d 456 uint8_t address = chip_info[dev->act_device].channel_addr[channel];
pmallick 0:3afcd581558d 457
pmallick 0:3afcd581558d 458 ad5686_set_shift_reg(dev, AD5686_CTRL_WRITE, address,
pmallick 0:3afcd581558d 459 data << data_offset);
pmallick 0:3afcd581558d 460 }
pmallick 0:3afcd581558d 461
pmallick 0:3afcd581558d 462 /**************************************************************************//**
pmallick 0:3afcd581558d 463 * @brief Update DAC Register n with contents of Input Register n
pmallick 0:3afcd581558d 464 *
pmallick 0:3afcd581558d 465 * @param dev - The device structure.
pmallick 0:3afcd581558d 466 * @param channel - The chosen channel to write to.
pmallick 0:3afcd581558d 467 * Accepted values: AD5686_CH_0
pmallick 0:3afcd581558d 468 * AD5686_CH_1
pmallick 0:3afcd581558d 469 * AD5686_CH_2
pmallick 0:3afcd581558d 470 * AD5686_CH_3
pmallick 0:3afcd581558d 471 * AD5686_CH_4
pmallick 0:3afcd581558d 472 * AD5686_CH_5
pmallick 0:3afcd581558d 473 * AD5686_CH_6
pmallick 0:3afcd581558d 474 * AD5686_CH_7
pmallick 0:3afcd581558d 475 * AD5686_CH_8
pmallick 0:3afcd581558d 476 * AD5686_CH_9
pmallick 0:3afcd581558d 477 * AD5686_CH_10
pmallick 0:3afcd581558d 478 * AD5686_CH_11
pmallick 0:3afcd581558d 479 * AD5686_CH_12
pmallick 0:3afcd581558d 480 * AD5686_CH_13
pmallick 0:3afcd581558d 481 * AD5686_CH_14
pmallick 0:3afcd581558d 482 * AD5686_CH_15
pmallick 0:3afcd581558d 483 * @return None.
pmallick 0:3afcd581558d 484 ******************************************************************************/
pmallick 0:3afcd581558d 485 void ad5686_update_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 486 enum ad5686_dac_channels channel)
pmallick 0:3afcd581558d 487 {
pmallick 0:3afcd581558d 488 uint8_t address = chip_info[dev->act_device].channel_addr[channel];
pmallick 0:3afcd581558d 489
pmallick 0:3afcd581558d 490 ad5686_set_shift_reg(dev, AD5686_CTRL_UPDATE, address, 0);
pmallick 0:3afcd581558d 491 }
pmallick 0:3afcd581558d 492
pmallick 0:3afcd581558d 493 /**************************************************************************//**
pmallick 0:3afcd581558d 494 * @brief Write to and update DAC channel n
pmallick 0:3afcd581558d 495 *
pmallick 0:3afcd581558d 496 * @param dev - The device structure.
pmallick 0:3afcd581558d 497 * @param channel - The chosen channel to write to.
pmallick 0:3afcd581558d 498 * Accepted values: AD5686_CH_0
pmallick 0:3afcd581558d 499 * AD5686_CH_1
pmallick 0:3afcd581558d 500 * AD5686_CH_2
pmallick 0:3afcd581558d 501 * AD5686_CH_3
pmallick 0:3afcd581558d 502 * AD5686_CH_4
pmallick 0:3afcd581558d 503 * AD5686_CH_5
pmallick 0:3afcd581558d 504 * AD5686_CH_6
pmallick 0:3afcd581558d 505 * AD5686_CH_7
pmallick 0:3afcd581558d 506 * AD5686_CH_8
pmallick 0:3afcd581558d 507 * AD5686_CH_9
pmallick 0:3afcd581558d 508 * AD5686_CH_10
pmallick 0:3afcd581558d 509 * AD5686_CH_11
pmallick 0:3afcd581558d 510 * AD5686_CH_12
pmallick 0:3afcd581558d 511 * AD5686_CH_13
pmallick 0:3afcd581558d 512 * AD5686_CH_14
pmallick 0:3afcd581558d 513 * AD5686_CH_15
pmallick 0:3afcd581558d 514 * @param data - Desired value to be written in register.
pmallick 0:3afcd581558d 515 *
pmallick 0:3afcd581558d 516 * @return None.
pmallick 0:3afcd581558d 517 ******************************************************************************/
pmallick 0:3afcd581558d 518 void ad5686_write_update_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 519 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 520 uint16_t data)
pmallick 0:3afcd581558d 521 {
pmallick 0:3afcd581558d 522 uint8_t data_offset = MAX_RESOLUTION - \
pmallick 0:3afcd581558d 523 chip_info[dev->act_device].resolution;
pmallick 0:3afcd581558d 524 uint8_t address = chip_info[dev->act_device].channel_addr[channel];
pmallick 0:3afcd581558d 525
pmallick 0:3afcd581558d 526 ad5686_set_shift_reg(dev, AD5686_CTRL_WRITEUPDATE, address,
pmallick 0:3afcd581558d 527 data << data_offset);
pmallick 0:3afcd581558d 528 }
pmallick 0:3afcd581558d 529
pmallick 0:3afcd581558d 530 /**************************************************************************//**
pmallick 0:3afcd581558d 531 * @brief Read back Input Register n
pmallick 0:3afcd581558d 532 *
pmallick 0:3afcd581558d 533 * @param dev - The device structure.
pmallick 0:3afcd581558d 534 * @param channel - The channel which will be read back. Note: only one
pmallick 0:3afcd581558d 535 * channel should be selected, if there will be selected
pmallick 0:3afcd581558d 536 * more than one channel, the channel A will be read back
pmallick 0:3afcd581558d 537 * by default
pmallick 0:3afcd581558d 538 * Accepted values: AD5686_CH_0
pmallick 0:3afcd581558d 539 * AD5686_CH_1
pmallick 0:3afcd581558d 540 * AD5686_CH_2
pmallick 0:3afcd581558d 541 * AD5686_CH_3
pmallick 0:3afcd581558d 542 * AD5686_CH_4
pmallick 0:3afcd581558d 543 * AD5686_CH_5
pmallick 0:3afcd581558d 544 * AD5686_CH_6
pmallick 0:3afcd581558d 545 * AD5686_CH_7
pmallick 0:3afcd581558d 546 * AD5686_CH_8
pmallick 0:3afcd581558d 547 * AD5686_CH_9
pmallick 0:3afcd581558d 548 * AD5686_CH_10
pmallick 0:3afcd581558d 549 * AD5686_CH_11
pmallick 0:3afcd581558d 550 * AD5686_CH_12
pmallick 0:3afcd581558d 551 * AD5686_CH_13
pmallick 0:3afcd581558d 552 * AD5686_CH_14
pmallick 0:3afcd581558d 553 * AD5686_CH_15
pmallick 0:3afcd581558d 554 * @return read_back_data - value read from register.
pmallick 0:3afcd581558d 555 ******************************************************************************/
pmallick 0:3afcd581558d 556 uint16_t ad5686_read_back_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 557 enum ad5686_dac_channels channel)
pmallick 0:3afcd581558d 558 {
pmallick 0:3afcd581558d 559
pmallick 0:3afcd581558d 560 uint16_t read_back_data = 0;
pmallick 0:3afcd581558d 561 uint16_t offset = MAX_RESOLUTION - \
pmallick 0:3afcd581558d 562 chip_info[dev->act_device].resolution;
pmallick 0:3afcd581558d 563 uint8_t address = chip_info[dev->act_device].channel_addr[channel];
pmallick 0:3afcd581558d 564 uint8_t rb_data_i2c[3] = { 0 };
pmallick 0:3afcd581558d 565
pmallick 0:3afcd581558d 566 if(chip_info[dev->act_device].communication == SPI) {
pmallick 0:3afcd581558d 567 ad5686_set_shift_reg(dev, AD5686_CTRL_RB_REG, address, 0);
pmallick 0:3afcd581558d 568 read_back_data = ad5686_set_shift_reg(dev, AD5686_CTRL_NOP, 0,
pmallick 0:3afcd581558d 569 0);
pmallick 0:3afcd581558d 570 read_back_data >>= offset;
pmallick 0:3afcd581558d 571 } else {
pmallick 0:3afcd581558d 572 if (chip_info[dev->act_device].register_map == AD5683_REG_MAP)
pmallick 0:3afcd581558d 573 rb_data_i2c[0] = (AD5683_CTRL_RB_REG << CMD_OFFSET) |
pmallick 0:3afcd581558d 574 address;
pmallick 0:3afcd581558d 575 else
pmallick 0:3afcd581558d 576 rb_data_i2c[0] = (AD5686_CTRL_RB_REG << CMD_OFFSET) |
pmallick 0:3afcd581558d 577 address;
pmallick 0:3afcd581558d 578
pmallick 0:3afcd581558d 579 i2c_write(dev->i2c_desc, rb_data_i2c, 3, 0);
pmallick 0:3afcd581558d 580 i2c_read(dev->i2c_desc, rb_data_i2c, 2, 1);
pmallick 0:3afcd581558d 581 read_back_data = (rb_data_i2c[0] << 8) | rb_data_i2c[1];
pmallick 0:3afcd581558d 582 }
pmallick 0:3afcd581558d 583
pmallick 0:3afcd581558d 584 return read_back_data;
pmallick 0:3afcd581558d 585 }
pmallick 0:3afcd581558d 586
pmallick 0:3afcd581558d 587 /**************************************************************************//**
pmallick 0:3afcd581558d 588 * @brief Set Power-down mode for DAC channel n
pmallick 0:3afcd581558d 589 *
pmallick 0:3afcd581558d 590 * @param dev - The device structure.
pmallick 0:3afcd581558d 591 * @param channel - The chosen channel to change the power-down mode.
pmallick 0:3afcd581558d 592 * Accepted values: AD5686_CH_0
pmallick 0:3afcd581558d 593 * AD5686_CH_1
pmallick 0:3afcd581558d 594 * AD5686_CH_2
pmallick 0:3afcd581558d 595 * AD5686_CH_3
pmallick 0:3afcd581558d 596 * AD5686_CH_4
pmallick 0:3afcd581558d 597 * AD5686_CH_5
pmallick 0:3afcd581558d 598 * AD5686_CH_6
pmallick 0:3afcd581558d 599 * AD5686_CH_7
pmallick 0:3afcd581558d 600 * AD5686_CH_8
pmallick 0:3afcd581558d 601 * AD5686_CH_9
pmallick 0:3afcd581558d 602 * AD5686_CH_10
pmallick 0:3afcd581558d 603 * AD5686_CH_11
pmallick 0:3afcd581558d 604 * AD5686_CH_12
pmallick 0:3afcd581558d 605 * AD5686_CH_13
pmallick 0:3afcd581558d 606 * AD5686_CH_14
pmallick 0:3afcd581558d 607 * AD5686_CH_15
pmallick 0:3afcd581558d 608 * @param mode - Power-down operation modes.
pmallick 0:3afcd581558d 609 * Accepted values:
pmallick 0:3afcd581558d 610 * 'AD5686_PWRM_NORMAL' - Normal Mode
pmallick 0:3afcd581558d 611 * 'AD5686_PWRM_1K' - Power-down mode 1kOhm to GND
pmallick 0:3afcd581558d 612 * 'AD5686_PWRM_100K' - Power-down mode 100kOhm to GND
pmallick 0:3afcd581558d 613 * 'AD5686_PWRM_THREESTATE' - Three-State
pmallick 0:3afcd581558d 614 * 'AD5686_PWRM_100K' is not available for AD5674R/AD5679R.
pmallick 0:3afcd581558d 615 *
pmallick 0:3afcd581558d 616 * @return None.
pmallick 0:3afcd581558d 617 ******************************************************************************/
pmallick 0:3afcd581558d 618 void ad5686_power_mode(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 619 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 620 uint8_t mode)
pmallick 0:3afcd581558d 621 {
pmallick 0:3afcd581558d 622 uint8_t address = chip_info[dev->act_device].channel_addr[channel];
pmallick 0:3afcd581558d 623
pmallick 0:3afcd581558d 624 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP) {
pmallick 0:3afcd581558d 625 /* AD5674R/AD5679R have 16 channels and 2 powerdown registers */
pmallick 0:3afcd581558d 626 if (channel > AD5686_CH_7)
pmallick 0:3afcd581558d 627 channel -= AD5686_CH_7 + 1;
pmallick 0:3afcd581558d 628 dev->power_down_mask &= ~(0x3 << (channel *2));
pmallick 0:3afcd581558d 629 dev->power_down_mask |= (mode << (channel *2));
pmallick 0:3afcd581558d 630 ad5686_set_shift_reg(dev, AD5686_CTRL_PWR, address,
pmallick 0:3afcd581558d 631 dev->power_down_mask);
pmallick 0:3afcd581558d 632 } else {
pmallick 0:3afcd581558d 633 ad5686_set_shift_reg(dev, AD5683_CMD_WR_CTRL_REG, address,
pmallick 0:3afcd581558d 634 AD5683_CTRL_PWRM(mode));
pmallick 0:3afcd581558d 635 }
pmallick 0:3afcd581558d 636
pmallick 0:3afcd581558d 637 }
pmallick 0:3afcd581558d 638
pmallick 0:3afcd581558d 639 /**************************************************************************//**
pmallick 0:3afcd581558d 640 * @brief Set hardware LDAC mask register
pmallick 0:3afcd581558d 641 *
pmallick 0:3afcd581558d 642 * @param dev - The device structure.
pmallick 0:3afcd581558d 643 * @param channel - In case of which channel ignore transitions on the LDAC
pmallick 0:3afcd581558d 644 * pin.
pmallick 0:3afcd581558d 645 * Accepted values: AD5686_CH_0
pmallick 0:3afcd581558d 646 * AD5686_CH_1
pmallick 0:3afcd581558d 647 * AD5686_CH_2
pmallick 0:3afcd581558d 648 * AD5686_CH_3
pmallick 0:3afcd581558d 649 * AD5686_CH_4
pmallick 0:3afcd581558d 650 * AD5686_CH_5
pmallick 0:3afcd581558d 651 * AD5686_CH_6
pmallick 0:3afcd581558d 652 * AD5686_CH_7
pmallick 0:3afcd581558d 653 * AD5686_CH_8
pmallick 0:3afcd581558d 654 * AD5686_CH_9
pmallick 0:3afcd581558d 655 * AD5686_CH_10
pmallick 0:3afcd581558d 656 * AD5686_CH_11
pmallick 0:3afcd581558d 657 * AD5686_CH_12
pmallick 0:3afcd581558d 658 * AD5686_CH_13
pmallick 0:3afcd581558d 659 * AD5686_CH_14
pmallick 0:3afcd581558d 660 * AD5686_CH_15
pmallick 0:3afcd581558d 661 * @param enable - Enable/disable channel.
pmallick 0:3afcd581558d 662 * @return None.
pmallick 0:3afcd581558d 663 ******************************************************************************/
pmallick 0:3afcd581558d 664 void ad5686_ldac_mask(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 665 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 666 uint8_t enable)
pmallick 0:3afcd581558d 667 {
pmallick 0:3afcd581558d 668 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP) {
pmallick 0:3afcd581558d 669 dev->ldac_mask &= ~(0x1 << channel);
pmallick 0:3afcd581558d 670 dev->ldac_mask |= (enable << channel);
pmallick 0:3afcd581558d 671 ad5686_set_shift_reg(dev, AD5686_CTRL_LDAC_MASK, 0, dev->ldac_mask);
pmallick 0:3afcd581558d 672 }
pmallick 0:3afcd581558d 673 }
pmallick 0:3afcd581558d 674
pmallick 0:3afcd581558d 675 /**************************************************************************//**
pmallick 0:3afcd581558d 676 * @brief Software reset (power-on reset)
pmallick 0:3afcd581558d 677 *
pmallick 0:3afcd581558d 678 * @param dev - The device structure.
pmallick 0:3afcd581558d 679 *
pmallick 0:3afcd581558d 680 * @return None.
pmallick 0:3afcd581558d 681 ******************************************************************************/
pmallick 0:3afcd581558d 682 void ad5686_software_reset(struct ad5686_dev *dev)
pmallick 0:3afcd581558d 683 {
pmallick 0:3afcd581558d 684 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP)
pmallick 0:3afcd581558d 685 ad5686_set_shift_reg(dev, AD5686_CTRL_SWRESET, 0, 0);
pmallick 0:3afcd581558d 686 else
pmallick 0:3afcd581558d 687 ad5686_set_shift_reg(dev, AD5683_CMD_WR_CTRL_REG, 0, AD5683_SW_RESET);
pmallick 0:3afcd581558d 688 }
pmallick 0:3afcd581558d 689
pmallick 0:3afcd581558d 690
pmallick 0:3afcd581558d 691 /**************************************************************************//**
pmallick 0:3afcd581558d 692 * @brief Write to Internal reference setup register
pmallick 0:3afcd581558d 693 *
pmallick 0:3afcd581558d 694 * @param dev - The device structure.
pmallick 0:3afcd581558d 695 * @param value - The internal reference register value
pmallick 0:3afcd581558d 696 * Example : 'AD5686_INTREF_EN' - enable internal reference
pmallick 0:3afcd581558d 697 * 'AD5686_INTREF_DIS' - disable internal reference
pmallick 0:3afcd581558d 698 *
pmallick 0:3afcd581558d 699 * @return None.
pmallick 0:3afcd581558d 700 ******************************************************************************/
pmallick 0:3afcd581558d 701 void ad5686_internal_reference(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 702 uint8_t value)
pmallick 0:3afcd581558d 703 {
pmallick 0:3afcd581558d 704 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP)
pmallick 0:3afcd581558d 705 ad5686_set_shift_reg(dev, AD5686_CTRL_IREF_REG, 0, value);
pmallick 0:3afcd581558d 706 else
pmallick 0:3afcd581558d 707 ad5686_set_shift_reg(dev, AD5683_CMD_WR_CTRL_REG, 0,
pmallick 0:3afcd581558d 708 AD5683_CTRL_INT_REF(value));
pmallick 0:3afcd581558d 709 }
pmallick 0:3afcd581558d 710
pmallick 0:3afcd581558d 711 /**************************************************************************//**
pmallick 0:3afcd581558d 712 * @brief Set up DCEN register (daisy-chain enable)
pmallick 0:3afcd581558d 713 *
pmallick 0:3afcd581558d 714 * @param dev - The device structure.
pmallick 0:3afcd581558d 715 * @param value - Enable or disable daisy-chain mode
pmallick 0:3afcd581558d 716 * Example : 'AD5686_DC_EN' - daisy-chain enable
pmallick 0:3afcd581558d 717 * 'AD5686_DC_DIS' - daisy-chain disable
pmallick 0:3afcd581558d 718 *
pmallick 0:3afcd581558d 719 * @return None.
pmallick 0:3afcd581558d 720 ******************************************************************************/
pmallick 0:3afcd581558d 721 void ad5686_daisy_chain_en(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 722 uint8_t value)
pmallick 0:3afcd581558d 723 {
pmallick 0:3afcd581558d 724 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP)
pmallick 0:3afcd581558d 725 ad5686_set_shift_reg(dev, AD5686_CTRL_DCEN, 0, value);
pmallick 0:3afcd581558d 726 else
pmallick 0:3afcd581558d 727 ad5686_set_shift_reg(dev, AD5683_CMD_WR_CTRL_REG, 0, AD5683_CTRL_DCEN(value));
pmallick 0:3afcd581558d 728 }
pmallick 0:3afcd581558d 729
pmallick 0:3afcd581558d 730 /**************************************************************************//**
pmallick 0:3afcd581558d 731 * @brief Set up readback register (readback enable)
pmallick 0:3afcd581558d 732 *
pmallick 0:3afcd581558d 733 * @param dev - The device structure.
pmallick 0:3afcd581558d 734 * @param value - Enable or disable daisy-chain mode
pmallick 0:3afcd581558d 735 * Example : 'AD5686_RB_EN' - daisy-chain enable
pmallick 0:3afcd581558d 736 * 'AD5686_RB_DIS' - daisy-chain disable
pmallick 0:3afcd581558d 737 *
pmallick 0:3afcd581558d 738 * @return None.
pmallick 0:3afcd581558d 739 ******************************************************************************/
pmallick 0:3afcd581558d 740 void ad5686_read_back_en(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 741 uint8_t value)
pmallick 0:3afcd581558d 742 {
pmallick 0:3afcd581558d 743 if(chip_info[dev->act_device].register_map == AD5686_REG_MAP)
pmallick 0:3afcd581558d 744 ad5686_set_shift_reg(dev, AD5686_CTRL_RB_REG, 0, value);
pmallick 0:3afcd581558d 745 }
pmallick 0:3afcd581558d 746
pmallick 0:3afcd581558d 747 /**************************************************************************//**
pmallick 0:3afcd581558d 748 * @brief Set Gain mode
pmallick 0:3afcd581558d 749 *
pmallick 0:3afcd581558d 750 * @param dev - The device structure.
pmallick 0:3afcd581558d 751 * @param value - Gain modes.
pmallick 0:3afcd581558d 752 * Accepted values:
pmallick 0:3afcd581558d 753 * Example : 'AD5683_GB_VREF' - 0V to VREF
pmallick 0:3afcd581558d 754 * 'AD5683_GB_2VREF' - 0V to 2xVREF
pmallick 0:3afcd581558d 755 *
pmallick 0:3afcd581558d 756 * @return None.
pmallick 0:3afcd581558d 757 ******************************************************************************/
pmallick 0:3afcd581558d 758 int32_t ad5686_gain_mode(struct ad5686_dev *dev, uint8_t value)
pmallick 0:3afcd581558d 759 {
pmallick 0:3afcd581558d 760 if(chip_info[dev->act_device].register_map == AD5683_REG_MAP)
pmallick 0:3afcd581558d 761 return ad5686_set_shift_reg(dev, AD5683_CMD_WR_CTRL_REG, 0,
pmallick 0:3afcd581558d 762 AD5683_CTRL_GM(value));
pmallick 0:3afcd581558d 763 return -1;
pmallick 0:3afcd581558d 764 }