Pratyush Mallick / Mbed OS nano_dac

this is testing

noos_mbed/drivers/dac/ad5686/ad5686.h@0:e8a1ba50c46b, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 19:12:57 2021 +0530
Revision:
0:e8a1ba50c46b
this is testing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 0:e8a1ba50c46b 1 /***************************************************************************//**
pmallick 0:e8a1ba50c46b 2 * @file ad5686.h
pmallick 0:e8a1ba50c46b 3 * @brief Header file of AD5686 Driver. This driver supporting the following
pmallick 0:e8a1ba50c46b 4 * devices: AD5684R, AD5685R, AD5686R, AD5694R, AD5695R, AD5696R,
pmallick 0:e8a1ba50c46b 5 *
pmallick 0:e8a1ba50c46b 6 * @author Istvan Csomortani (istvan.csomortani@analog.com)
pmallick 0:e8a1ba50c46b 7 ********************************************************************************
pmallick 0:e8a1ba50c46b 8 * Copyright 2013, 2020(c) Analog Devices, Inc.
pmallick 0:e8a1ba50c46b 9 *
pmallick 0:e8a1ba50c46b 10 * All rights reserved.
pmallick 0:e8a1ba50c46b 11 *
pmallick 0:e8a1ba50c46b 12 * Redistribution and use in source and binary forms, with or without
pmallick 0:e8a1ba50c46b 13 * modification,
pmallick 0:e8a1ba50c46b 14 * are permitted provided that the following conditions are met:
pmallick 0:e8a1ba50c46b 15 * - Redistributions of source code must retain the above copyright
pmallick 0:e8a1ba50c46b 16 * notice, this list of conditions and the following disclaimer.
pmallick 0:e8a1ba50c46b 17 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:e8a1ba50c46b 18 * notice, this list of conditions and the following disclaimer in
pmallick 0:e8a1ba50c46b 19 * the documentation and/or other materials provided with the
pmallick 0:e8a1ba50c46b 20 * distribution.
pmallick 0:e8a1ba50c46b 21 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:e8a1ba50c46b 22 * contributors may be used to endorse or promote products derived
pmallick 0:e8a1ba50c46b 23 * from this software without specific prior written permission.
pmallick 0:e8a1ba50c46b 24 * - The use of this software may or may not infringe the patent rights
pmallick 0:e8a1ba50c46b 25 * of one or more patent holders. This license does not release you
pmallick 0:e8a1ba50c46b 26 * from the requirement that you obtain separate licenses from these
pmallick 0:e8a1ba50c46b 27 * patent holders to use this software.
pmallick 0:e8a1ba50c46b 28 * - Use of the software either in source or binary form, must be run
pmallick 0:e8a1ba50c46b 29 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:e8a1ba50c46b 30 *
pmallick 0:e8a1ba50c46b 31 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
pmallick 0:e8a1ba50c46b 32 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
pmallick 0:e8a1ba50c46b 33 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:e8a1ba50c46b 34 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
pmallick 0:e8a1ba50c46b 35 * INCIDENTAL,SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
pmallick 0:e8a1ba50c46b 36 * * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS
pmallick 0:e8a1ba50c46b 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
pmallick 0:e8a1ba50c46b 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
pmallick 0:e8a1ba50c46b 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
pmallick 0:e8a1ba50c46b 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
pmallick 0:e8a1ba50c46b 41 * DAMAGE.
pmallick 0:e8a1ba50c46b 42 *
pmallick 0:e8a1ba50c46b 43 *******************************************************************************/
pmallick 0:e8a1ba50c46b 44
pmallick 0:e8a1ba50c46b 45 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 46 /***************************** Include Files *********************************/
pmallick 0:e8a1ba50c46b 47 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 48 #include <stdint.h>
pmallick 0:e8a1ba50c46b 49 #include "i2c.h"
pmallick 0:e8a1ba50c46b 50
pmallick 0:e8a1ba50c46b 51 /* Control Bits */
pmallick 0:e8a1ba50c46b 52 #define AD5686_CTRL_NOP 0
pmallick 0:e8a1ba50c46b 53 #define AD5686_CTRL_WRITE 1
pmallick 0:e8a1ba50c46b 54 #define AD5686_CTRL_UPDATE 2
pmallick 0:e8a1ba50c46b 55 #define AD5686_CTRL_WRITEUPDATE 3
pmallick 0:e8a1ba50c46b 56 #define AD5686_CTRL_PWR 4
pmallick 0:e8a1ba50c46b 57 #define AD5686_CTRL_LDAC_MASK 5
pmallick 0:e8a1ba50c46b 58 #define AD5686_CTRL_SWRESET 6
pmallick 0:e8a1ba50c46b 59 #define AD5686_CTRL_IREF_REG 7
pmallick 0:e8a1ba50c46b 60 #define AD5686_CTRL_DCEN 8
pmallick 0:e8a1ba50c46b 61 #define AD5686_CTRL_RB_REG 9
pmallick 0:e8a1ba50c46b 62
pmallick 0:e8a1ba50c46b 63 #define AD5683_CMD_WR_CTRL_REG 4
pmallick 0:e8a1ba50c46b 64 #define AD5683_CTRL_RB_REG 5
pmallick 0:e8a1ba50c46b 65
pmallick 0:e8a1ba50c46b 66 /* Power-down operation modes masks */
pmallick 0:e8a1ba50c46b 67 #define AD5686_PWRM_NORMAL 0
pmallick 0:e8a1ba50c46b 68 #define AD5686_PWRM_1K 1
pmallick 0:e8a1ba50c46b 69 #define AD5686_PWRM_100K 2
pmallick 0:e8a1ba50c46b 70 #define AD5686_PWRM_THREESTATE 3
pmallick 0:e8a1ba50c46b 71
pmallick 0:e8a1ba50c46b 72 #define AD5686_PWRM_MASK 3
pmallick 0:e8a1ba50c46b 73
pmallick 0:e8a1ba50c46b 74 /* Enable/disable defines */
pmallick 0:e8a1ba50c46b 75 #define AD5686_INTREF_EN 1
pmallick 0:e8a1ba50c46b 76 #define AD5686_INTREF_DIS 0
pmallick 0:e8a1ba50c46b 77 #define AD5686_DC_EN 1
pmallick 0:e8a1ba50c46b 78 #define AD5686_DC_DIS 0
pmallick 0:e8a1ba50c46b 79 #define AD5686_RB_EN 1
pmallick 0:e8a1ba50c46b 80 #define AD5686_RB_DIS 0
pmallick 0:e8a1ba50c46b 81
pmallick 0:e8a1ba50c46b 82 #define MAX_RESOLUTION 16 // Maximum resolution of the supported devices
pmallick 0:e8a1ba50c46b 83
pmallick 0:e8a1ba50c46b 84 #define PKT_LENGTH 3 // SPI packet length in byte
pmallick 0:e8a1ba50c46b 85
pmallick 0:e8a1ba50c46b 86 #define ADDR_MASK 0xFF // Mask for Address bits
pmallick 0:e8a1ba50c46b 87 #define CMD_OFFSET 4 // Offset for Command
pmallick 0:e8a1ba50c46b 88
pmallick 0:e8a1ba50c46b 89 #define AD5686_CMD_MASK 0xFF
pmallick 0:e8a1ba50c46b 90 #define AD5686_MSB_MASK 0xFF00 // Most significant byte of the data word
pmallick 0:e8a1ba50c46b 91 #define AD5686_MSB_OFFSET 8
pmallick 0:e8a1ba50c46b 92 #define AD5686_LSB_MASK 0x00FF // Least significant byte of the data word
pmallick 0:e8a1ba50c46b 93 #define AD5686_LSB_OFFSET 0
pmallick 0:e8a1ba50c46b 94
pmallick 0:e8a1ba50c46b 95 #define AD5683_MIDB_OFFSET 4 // Offset for middle bits
pmallick 0:e8a1ba50c46b 96 #define AD5683_MIDB_MASK 0xFF
pmallick 0:e8a1ba50c46b 97 #define AD5683_MSB_OFFSET 12
pmallick 0:e8a1ba50c46b 98 #define AD5683_MSB_MASK 0xF
pmallick 0:e8a1ba50c46b 99 #define AD5683_CMD_MASK 0xF
pmallick 0:e8a1ba50c46b 100 #define AD5683_LSB_MASK 0xF
pmallick 0:e8a1ba50c46b 101 #define AD5683_LSB_OFFSET 4
pmallick 0:e8a1ba50c46b 102
pmallick 0:e8a1ba50c46b 103 #define AD5683_REG_MAP 0
pmallick 0:e8a1ba50c46b 104 #define AD5686_REG_MAP 1
pmallick 0:e8a1ba50c46b 105
pmallick 0:e8a1ba50c46b 106 /********************** AD5683 Write Control Register Bits ********************/
pmallick 0:e8a1ba50c46b 107
pmallick 0:e8a1ba50c46b 108 #define AD5683_CTRL_DCEN(x) (((((x) & 0x1) << 0) << 10) & 0xFC00)
pmallick 0:e8a1ba50c46b 109 #define AD5683_CTRL_GM(x) (((((x) & 0x1) << 1) << 10) & 0xFC00)
pmallick 0:e8a1ba50c46b 110 #define AD5683_CTRL_INT_REF(x) (((((x) & 0x1) << 2) << 10) & 0xFC00)
pmallick 0:e8a1ba50c46b 111 #define AD5683_CTRL_PWRM(x) (((((x) & 0x3) << 3) << 10) & 0xFC00)
pmallick 0:e8a1ba50c46b 112 #define AD5683_SW_RESET ((((0x1) << 5) << 10) & 0xFC00)
pmallick 0:e8a1ba50c46b 113
pmallick 0:e8a1ba50c46b 114 /******************************************************************************/
pmallick 0:e8a1ba50c46b 115 /*************************** Types Declarations *******************************/
pmallick 0:e8a1ba50c46b 116 /******************************************************************************/
pmallick 0:e8a1ba50c46b 117
pmallick 0:e8a1ba50c46b 118 /* Supported devices */
pmallick 0:e8a1ba50c46b 119 enum ad5686_type {
pmallick 0:e8a1ba50c46b 120 ID_AD5671R,
pmallick 0:e8a1ba50c46b 121 ID_AD5672R,
pmallick 0:e8a1ba50c46b 122 ID_AD5673R,
pmallick 0:e8a1ba50c46b 123 ID_AD5674,
pmallick 0:e8a1ba50c46b 124 ID_AD5674R,
pmallick 0:e8a1ba50c46b 125 ID_AD5675R,
pmallick 0:e8a1ba50c46b 126 ID_AD5676,
pmallick 0:e8a1ba50c46b 127 ID_AD5676R,
pmallick 0:e8a1ba50c46b 128 ID_AD5677R,
pmallick 0:e8a1ba50c46b 129 ID_AD5679,
pmallick 0:e8a1ba50c46b 130 ID_AD5679R,
pmallick 0:e8a1ba50c46b 131 ID_AD5686,
pmallick 0:e8a1ba50c46b 132 ID_AD5684R,
pmallick 0:e8a1ba50c46b 133 ID_AD5685R,
pmallick 0:e8a1ba50c46b 134 ID_AD5686R,
pmallick 0:e8a1ba50c46b 135 ID_AD5687,
pmallick 0:e8a1ba50c46b 136 ID_AD5687R,
pmallick 0:e8a1ba50c46b 137 ID_AD5689,
pmallick 0:e8a1ba50c46b 138 ID_AD5689R,
pmallick 0:e8a1ba50c46b 139 ID_AD5697R,
pmallick 0:e8a1ba50c46b 140 ID_AD5694,
pmallick 0:e8a1ba50c46b 141 ID_AD5694R,
pmallick 0:e8a1ba50c46b 142 ID_AD5695R,
pmallick 0:e8a1ba50c46b 143 ID_AD5696,
pmallick 0:e8a1ba50c46b 144 ID_AD5696R,
pmallick 0:e8a1ba50c46b 145 ID_AD5681R,
pmallick 0:e8a1ba50c46b 146 ID_AD5682R,
pmallick 0:e8a1ba50c46b 147 ID_AD5683R,
pmallick 0:e8a1ba50c46b 148 ID_AD5683,
pmallick 0:e8a1ba50c46b 149 ID_AD5691R,
pmallick 0:e8a1ba50c46b 150 ID_AD5692R,
pmallick 0:e8a1ba50c46b 151 ID_AD5693R,
pmallick 0:e8a1ba50c46b 152 ID_AD5693
pmallick 0:e8a1ba50c46b 153 };
pmallick 0:e8a1ba50c46b 154
pmallick 0:e8a1ba50c46b 155 enum comm_type {
pmallick 0:e8a1ba50c46b 156 SPI,
pmallick 0:e8a1ba50c46b 157 I2C,
pmallick 0:e8a1ba50c46b 158 };
pmallick 0:e8a1ba50c46b 159
pmallick 0:e8a1ba50c46b 160 enum ad5686_dac_channels {
pmallick 0:e8a1ba50c46b 161 AD5686_CH_0 = 0,
pmallick 0:e8a1ba50c46b 162 AD5686_CH_1,
pmallick 0:e8a1ba50c46b 163 AD5686_CH_2,
pmallick 0:e8a1ba50c46b 164 AD5686_CH_3,
pmallick 0:e8a1ba50c46b 165 AD5686_CH_4,
pmallick 0:e8a1ba50c46b 166 AD5686_CH_5,
pmallick 0:e8a1ba50c46b 167 AD5686_CH_6,
pmallick 0:e8a1ba50c46b 168 AD5686_CH_7,
pmallick 0:e8a1ba50c46b 169 AD5686_CH_8,
pmallick 0:e8a1ba50c46b 170 AD5686_CH_9,
pmallick 0:e8a1ba50c46b 171 AD5686_CH_10,
pmallick 0:e8a1ba50c46b 172 AD5686_CH_11,
pmallick 0:e8a1ba50c46b 173 AD5686_CH_12,
pmallick 0:e8a1ba50c46b 174 AD5686_CH_13,
pmallick 0:e8a1ba50c46b 175 AD5686_CH_14,
pmallick 0:e8a1ba50c46b 176 AD5686_CH_15,
pmallick 0:e8a1ba50c46b 177 };
pmallick 0:e8a1ba50c46b 178
pmallick 0:e8a1ba50c46b 179 struct ad5686_chip_info {
pmallick 0:e8a1ba50c46b 180 uint8_t resolution;
pmallick 0:e8a1ba50c46b 181 uint8_t register_map;
pmallick 0:e8a1ba50c46b 182 enum comm_type communication;
pmallick 0:e8a1ba50c46b 183 const uint32_t *channel_addr;
pmallick 0:e8a1ba50c46b 184 };
pmallick 0:e8a1ba50c46b 185
pmallick 0:e8a1ba50c46b 186 struct ad5686_dev {
pmallick 0:e8a1ba50c46b 187 /* I2C */
pmallick 0:e8a1ba50c46b 188 i2c_desc *i2c_desc;
pmallick 0:e8a1ba50c46b 189 /* SPI */
pmallick 0:e8a1ba50c46b 190 spi_desc *spi_desc;
pmallick 0:e8a1ba50c46b 191 /* GPIO */
pmallick 0:e8a1ba50c46b 192 struct gpio_desc *gpio_reset;
pmallick 0:e8a1ba50c46b 193 struct gpio_desc *gpio_ldac;
pmallick 0:e8a1ba50c46b 194 struct gpio_desc *gpio_gain;
pmallick 0:e8a1ba50c46b 195 /* Device Settings */
pmallick 0:e8a1ba50c46b 196 enum ad5686_type act_device;
pmallick 0:e8a1ba50c46b 197 uint32_t power_down_mask;
pmallick 0:e8a1ba50c46b 198 uint32_t ldac_mask;
pmallick 0:e8a1ba50c46b 199 };
pmallick 0:e8a1ba50c46b 200
pmallick 0:e8a1ba50c46b 201 struct ad5686_init_param {
pmallick 0:e8a1ba50c46b 202 /* I2C */
pmallick 0:e8a1ba50c46b 203 i2c_init_param i2c_init;
pmallick 0:e8a1ba50c46b 204 /* SPI */
pmallick 0:e8a1ba50c46b 205 spi_init_param spi_init;
pmallick 0:e8a1ba50c46b 206 /* GPIO */
pmallick 0:e8a1ba50c46b 207 struct gpio_init_param gpio_reset;
pmallick 0:e8a1ba50c46b 208 struct gpio_init_param gpio_ldac;
pmallick 0:e8a1ba50c46b 209 struct gpio_init_param gpio_gain;
pmallick 0:e8a1ba50c46b 210 /* Device Settings */
pmallick 0:e8a1ba50c46b 211 enum ad5686_type act_device;
pmallick 0:e8a1ba50c46b 212 };
pmallick 0:e8a1ba50c46b 213
pmallick 0:e8a1ba50c46b 214 /******************************************************************************/
pmallick 0:e8a1ba50c46b 215 /************************ Functions Declarations ******************************/
pmallick 0:e8a1ba50c46b 216 /******************************************************************************/
pmallick 0:e8a1ba50c46b 217 /* Initialize SPI and Initial Values for AD5686 Board. */
pmallick 0:e8a1ba50c46b 218 int32_t ad5686_init(struct ad5686_dev **device,
pmallick 0:e8a1ba50c46b 219 struct ad5686_init_param init_param);
pmallick 0:e8a1ba50c46b 220
pmallick 0:e8a1ba50c46b 221 /* Free the resources allocated by ad5686_init(). */
pmallick 0:e8a1ba50c46b 222 int32_t ad5686_remove(struct ad5686_dev *dev);
pmallick 0:e8a1ba50c46b 223
pmallick 0:e8a1ba50c46b 224 /* Write to input register */
pmallick 0:e8a1ba50c46b 225 uint16_t ad5686_set_shift_reg(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 226 uint8_t command,
pmallick 0:e8a1ba50c46b 227 uint8_t address,
pmallick 0:e8a1ba50c46b 228 uint16_t data);
pmallick 0:e8a1ba50c46b 229
pmallick 0:e8a1ba50c46b 230 /* Write to Input Register n (dependent on LDAC) */
pmallick 0:e8a1ba50c46b 231 void ad5686_write_register(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 232 enum ad5686_dac_channels channel,
pmallick 0:e8a1ba50c46b 233 uint16_t data);
pmallick 0:e8a1ba50c46b 234
pmallick 0:e8a1ba50c46b 235 /* Update DAC Register n with contents of Input Register n */
pmallick 0:e8a1ba50c46b 236 void ad5686_update_register(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 237 enum ad5686_dac_channels channel);
pmallick 0:e8a1ba50c46b 238
pmallick 0:e8a1ba50c46b 239 /* Write to and update DAC channel n */
pmallick 0:e8a1ba50c46b 240 void ad5686_write_update_register(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 241 enum ad5686_dac_channels channel,
pmallick 0:e8a1ba50c46b 242 uint16_t data);
pmallick 0:e8a1ba50c46b 243
pmallick 0:e8a1ba50c46b 244 /* Read back Input Register n */
pmallick 0:e8a1ba50c46b 245 uint16_t ad5686_read_back_register(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 246 enum ad5686_dac_channels channel);
pmallick 0:e8a1ba50c46b 247
pmallick 0:e8a1ba50c46b 248 /* Power down / power up DAC */
pmallick 0:e8a1ba50c46b 249 void ad5686_power_mode(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 250 enum ad5686_dac_channels channel,
pmallick 0:e8a1ba50c46b 251 uint8_t mode);
pmallick 0:e8a1ba50c46b 252
pmallick 0:e8a1ba50c46b 253 /* Set up LDAC mask register */
pmallick 0:e8a1ba50c46b 254 void ad5686_ldac_mask(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 255 enum ad5686_dac_channels channel,
pmallick 0:e8a1ba50c46b 256 uint8_t enable);
pmallick 0:e8a1ba50c46b 257
pmallick 0:e8a1ba50c46b 258 /* Software reset (power-on reset) */
pmallick 0:e8a1ba50c46b 259 void ad5686_software_reset(struct ad5686_dev *dev);
pmallick 0:e8a1ba50c46b 260
pmallick 0:e8a1ba50c46b 261 /* Write to Internal reference setup register */
pmallick 0:e8a1ba50c46b 262 void ad5686_internal_reference(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 263 uint8_t value);
pmallick 0:e8a1ba50c46b 264
pmallick 0:e8a1ba50c46b 265 /* Set up DCEN register (daisy-chain enable) */
pmallick 0:e8a1ba50c46b 266 void ad5686_daisy_chain_en(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 267 uint8_t value);
pmallick 0:e8a1ba50c46b 268
pmallick 0:e8a1ba50c46b 269 /* Set up readback register (readback enable) */
pmallick 0:e8a1ba50c46b 270 void ad5686_read_back_en(struct ad5686_dev *dev,
pmallick 0:e8a1ba50c46b 271 uint8_t value);
pmallick 0:e8a1ba50c46b 272
pmallick 0:e8a1ba50c46b 273 /* Set Gain mode */
pmallick 0:e8a1ba50c46b 274 int32_t ad5686_gain_mode(struct ad5686_dev *dev, uint8_t value);