Pratyush Mallick / Mbed OS nano_dac

this is testing

noos_mbed/drivers/adc/ad717x/ad717x.h@0:e8a1ba50c46b, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 19:12:57 2021 +0530
Revision:
0:e8a1ba50c46b
this is testing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 0:e8a1ba50c46b 1 /**************************************************************************//**
pmallick 0:e8a1ba50c46b 2 * @file AD717X.h
pmallick 0:e8a1ba50c46b 3 * @brief AD717X header file.
pmallick 0:e8a1ba50c46b 4 * Devices: AD7172-2, AD7172-4, AD7173-8, AD7175-2, AD7175-8, AD7176-2,
pmallick 0:e8a1ba50c46b 5 * AD7177-2, AD4111, AD4112, AD4114, AD4115
pmallick 0:e8a1ba50c46b 6 * @author acozma (andrei.cozma@analog.com)
pmallick 0:e8a1ba50c46b 7 * dnechita (dan.nechita@analog.com)
pmallick 0:e8a1ba50c46b 8 *******************************************************************************
pmallick 0:e8a1ba50c46b 9 * Copyright 2015, 2020(c) Analog Devices, Inc.
pmallick 0:e8a1ba50c46b 10 *
pmallick 0:e8a1ba50c46b 11 * All rights reserved.
pmallick 0:e8a1ba50c46b 12 *
pmallick 0:e8a1ba50c46b 13 * Redistribution and use in source and binary forms, with or without modification,
pmallick 0:e8a1ba50c46b 14 * are permitted provided that the following conditions are met:
pmallick 0:e8a1ba50c46b 15 * - Redistributions of source code must retain the above copyright
pmallick 0:e8a1ba50c46b 16 * notice, this list of conditions and the following disclaimer.
pmallick 0:e8a1ba50c46b 17 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:e8a1ba50c46b 18 * notice, this list of conditions and the following disclaimer in
pmallick 0:e8a1ba50c46b 19 * the documentation and/or other materials provided with the
pmallick 0:e8a1ba50c46b 20 * distribution.
pmallick 0:e8a1ba50c46b 21 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:e8a1ba50c46b 22 * contributors may be used to endorse or promote products derived
pmallick 0:e8a1ba50c46b 23 * from this software without specific prior written permission.
pmallick 0:e8a1ba50c46b 24 * - The use of this software may or may not infringe the patent rights
pmallick 0:e8a1ba50c46b 25 * of one or more patent holders. This license does not release you
pmallick 0:e8a1ba50c46b 26 * from the requirement that you obtain separate licenses from these
pmallick 0:e8a1ba50c46b 27 * patent holders to use this software.
pmallick 0:e8a1ba50c46b 28 * - Use of the software either in source or binary form, must be run
pmallick 0:e8a1ba50c46b 29 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:e8a1ba50c46b 30 *
pmallick 0:e8a1ba50c46b 31 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
pmallick 0:e8a1ba50c46b 32 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
pmallick 0:e8a1ba50c46b 33 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:e8a1ba50c46b 34 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
pmallick 0:e8a1ba50c46b 35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
pmallick 0:e8a1ba50c46b 36 * INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
pmallick 0:e8a1ba50c46b 37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
pmallick 0:e8a1ba50c46b 38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
pmallick 0:e8a1ba50c46b 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
pmallick 0:e8a1ba50c46b 40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
pmallick 0:e8a1ba50c46b 41 ******************************************************************************/
pmallick 0:e8a1ba50c46b 42
pmallick 0:e8a1ba50c46b 43 #ifndef __AD717X_H__
pmallick 0:e8a1ba50c46b 44 #define __AD717X_H__
pmallick 0:e8a1ba50c46b 45
pmallick 0:e8a1ba50c46b 46 /******************************************************************************/
pmallick 0:e8a1ba50c46b 47 /***************************** Include Files **********************************/
pmallick 0:e8a1ba50c46b 48 /******************************************************************************/
pmallick 0:e8a1ba50c46b 49 #include <stdint.h>
pmallick 0:e8a1ba50c46b 50 #include "platform_drivers.h"
pmallick 0:e8a1ba50c46b 51
pmallick 0:e8a1ba50c46b 52 /******************************************************************************/
pmallick 0:e8a1ba50c46b 53 /*************************** Types Declarations *******************************/
pmallick 0:e8a1ba50c46b 54 /******************************************************************************/
pmallick 0:e8a1ba50c46b 55
pmallick 0:e8a1ba50c46b 56 typedef enum {
pmallick 0:e8a1ba50c46b 57 AD717X_DISABLE,
pmallick 0:e8a1ba50c46b 58 AD717X_USE_CRC,
pmallick 0:e8a1ba50c46b 59 AD717X_USE_XOR,
pmallick 0:e8a1ba50c46b 60 } ad717x_crc_mode;
pmallick 0:e8a1ba50c46b 61
pmallick 0:e8a1ba50c46b 62 /*! AD717X register info */
pmallick 0:e8a1ba50c46b 63 typedef struct {
pmallick 0:e8a1ba50c46b 64 int32_t addr;
pmallick 0:e8a1ba50c46b 65 int32_t value;
pmallick 0:e8a1ba50c46b 66 int32_t size;
pmallick 0:e8a1ba50c46b 67 } ad717x_st_reg;
pmallick 0:e8a1ba50c46b 68
pmallick 0:e8a1ba50c46b 69 /*
pmallick 0:e8a1ba50c46b 70 * The structure describes the device and is used with the ad717x driver.
pmallick 0:e8a1ba50c46b 71 * @slave_select_id: The ID of the Slave Select to be passed to the SPI calls.
pmallick 0:e8a1ba50c46b 72 * @regs: A reference to the register list of the device that the user must
pmallick 0:e8a1ba50c46b 73 * provide when calling the Setup() function.
pmallick 0:e8a1ba50c46b 74 * @num_regs: The length of the register list.
pmallick 0:e8a1ba50c46b 75 * @userCRC: Error check type to use on SPI transfers.
pmallick 0:e8a1ba50c46b 76 */
pmallick 0:e8a1ba50c46b 77 typedef struct {
pmallick 0:e8a1ba50c46b 78 /* SPI */
pmallick 0:e8a1ba50c46b 79 spi_desc *spi_desc;
pmallick 0:e8a1ba50c46b 80 /* Device Settings */
pmallick 0:e8a1ba50c46b 81 ad717x_st_reg *regs;
pmallick 0:e8a1ba50c46b 82 uint8_t num_regs;
pmallick 0:e8a1ba50c46b 83 ad717x_crc_mode useCRC;
pmallick 0:e8a1ba50c46b 84 } ad717x_dev;
pmallick 0:e8a1ba50c46b 85
pmallick 0:e8a1ba50c46b 86 typedef struct {
pmallick 0:e8a1ba50c46b 87 /* SPI */
pmallick 0:e8a1ba50c46b 88 spi_init_param spi_init;
pmallick 0:e8a1ba50c46b 89 /* Device Settings */
pmallick 0:e8a1ba50c46b 90 ad717x_st_reg *regs;
pmallick 0:e8a1ba50c46b 91 uint8_t num_regs;
pmallick 0:e8a1ba50c46b 92 } ad717x_init_param;
pmallick 0:e8a1ba50c46b 93
pmallick 0:e8a1ba50c46b 94 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 95 /***************** AD717X Register Definitions *******************************/
pmallick 0:e8a1ba50c46b 96 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 97
pmallick 0:e8a1ba50c46b 98 /* AD717X Register Map */
pmallick 0:e8a1ba50c46b 99 #define AD717X_COMM_REG 0x00
pmallick 0:e8a1ba50c46b 100 #define AD717X_STATUS_REG 0x00
pmallick 0:e8a1ba50c46b 101 #define AD717X_ADCMODE_REG 0x01
pmallick 0:e8a1ba50c46b 102 #define AD717X_IFMODE_REG 0x02
pmallick 0:e8a1ba50c46b 103 #define AD717X_REGCHECK_REG 0x03
pmallick 0:e8a1ba50c46b 104 #define AD717X_DATA_REG 0x04
pmallick 0:e8a1ba50c46b 105 #define AD717X_GPIOCON_REG 0x06
pmallick 0:e8a1ba50c46b 106 #define AD717X_ID_REG 0x07
pmallick 0:e8a1ba50c46b 107 #define AD717X_CHMAP0_REG 0x10
pmallick 0:e8a1ba50c46b 108 #define AD717X_CHMAP1_REG 0x11
pmallick 0:e8a1ba50c46b 109 #define AD717X_CHMAP2_REG 0x12
pmallick 0:e8a1ba50c46b 110 #define AD717X_CHMAP3_REG 0x13
pmallick 0:e8a1ba50c46b 111 #define AD717X_CHMAP4_REG 0x14
pmallick 0:e8a1ba50c46b 112 #define AD717X_CHMAP5_REG 0x15
pmallick 0:e8a1ba50c46b 113 #define AD717X_CHMAP6_REG 0x16
pmallick 0:e8a1ba50c46b 114 #define AD717X_CHMAP7_REG 0x17
pmallick 0:e8a1ba50c46b 115 #define AD717X_CHMAP8_REG 0x18
pmallick 0:e8a1ba50c46b 116 #define AD717X_CHMAP9_REG 0x19
pmallick 0:e8a1ba50c46b 117 #define AD717X_CHMAP10_REG 0x1A
pmallick 0:e8a1ba50c46b 118 #define AD717X_CHMAP11_REG 0x1B
pmallick 0:e8a1ba50c46b 119 #define AD717X_CHMAP12_REG 0x1C
pmallick 0:e8a1ba50c46b 120 #define AD717X_CHMAP13_REG 0x1D
pmallick 0:e8a1ba50c46b 121 #define AD717X_CHMAP14_REG 0x1E
pmallick 0:e8a1ba50c46b 122 #define AD717X_CHMAP15_REG 0x1F
pmallick 0:e8a1ba50c46b 123 #define AD717X_SETUPCON0_REG 0x20
pmallick 0:e8a1ba50c46b 124 #define AD717X_SETUPCON1_REG 0x21
pmallick 0:e8a1ba50c46b 125 #define AD717X_SETUPCON2_REG 0x22
pmallick 0:e8a1ba50c46b 126 #define AD717X_SETUPCON3_REG 0x23
pmallick 0:e8a1ba50c46b 127 #define AD717X_SETUPCON4_REG 0x24
pmallick 0:e8a1ba50c46b 128 #define AD717X_SETUPCON5_REG 0x25
pmallick 0:e8a1ba50c46b 129 #define AD717X_SETUPCON6_REG 0x26
pmallick 0:e8a1ba50c46b 130 #define AD717X_SETUPCON7_REG 0x27
pmallick 0:e8a1ba50c46b 131 #define AD717X_FILTCON0_REG 0x28
pmallick 0:e8a1ba50c46b 132 #define AD717X_FILTCON1_REG 0x29
pmallick 0:e8a1ba50c46b 133 #define AD717X_FILTCON2_REG 0x2A
pmallick 0:e8a1ba50c46b 134 #define AD717X_FILTCON3_REG 0x2B
pmallick 0:e8a1ba50c46b 135 #define AD717X_FILTCON4_REG 0x2C
pmallick 0:e8a1ba50c46b 136 #define AD717X_FILTCON5_REG 0x2D
pmallick 0:e8a1ba50c46b 137 #define AD717X_FILTCON6_REG 0x2E
pmallick 0:e8a1ba50c46b 138 #define AD717X_FILTCON7_REG 0x2F
pmallick 0:e8a1ba50c46b 139 #define AD717X_OFFSET0_REG 0x30
pmallick 0:e8a1ba50c46b 140 #define AD717X_OFFSET1_REG 0x31
pmallick 0:e8a1ba50c46b 141 #define AD717X_OFFSET2_REG 0x32
pmallick 0:e8a1ba50c46b 142 #define AD717X_OFFSET3_REG 0x33
pmallick 0:e8a1ba50c46b 143 #define AD717X_OFFSET4_REG 0x34
pmallick 0:e8a1ba50c46b 144 #define AD717X_OFFSET5_REG 0x35
pmallick 0:e8a1ba50c46b 145 #define AD717X_OFFSET6_REG 0x36
pmallick 0:e8a1ba50c46b 146 #define AD717X_OFFSET7_REG 0x37
pmallick 0:e8a1ba50c46b 147 #define AD717X_GAIN0_REG 0x38
pmallick 0:e8a1ba50c46b 148 #define AD717X_GAIN1_REG 0x39
pmallick 0:e8a1ba50c46b 149 #define AD717X_GAIN2_REG 0x3A
pmallick 0:e8a1ba50c46b 150 #define AD717X_GAIN3_REG 0x3B
pmallick 0:e8a1ba50c46b 151 #define AD717X_GAIN4_REG 0x3C
pmallick 0:e8a1ba50c46b 152 #define AD717X_GAIN5_REG 0x3D
pmallick 0:e8a1ba50c46b 153 #define AD717X_GAIN6_REG 0x3E
pmallick 0:e8a1ba50c46b 154 #define AD717X_GAIN7_REG 0x3F
pmallick 0:e8a1ba50c46b 155
pmallick 0:e8a1ba50c46b 156 /* Communication Register bits */
pmallick 0:e8a1ba50c46b 157 #define AD717X_COMM_REG_WEN (0 << 7)
pmallick 0:e8a1ba50c46b 158 #define AD717X_COMM_REG_WR (0 << 6)
pmallick 0:e8a1ba50c46b 159 #define AD717X_COMM_REG_RD (1 << 6)
pmallick 0:e8a1ba50c46b 160 #define AD717X_COMM_REG_RA(x) ((x) & 0x3F)
pmallick 0:e8a1ba50c46b 161
pmallick 0:e8a1ba50c46b 162 /* Status Register bits */
pmallick 0:e8a1ba50c46b 163 #define AD717X_STATUS_REG_RDY (1 << 7)
pmallick 0:e8a1ba50c46b 164 #define AD717X_STATUS_REG_ADC_ERR (1 << 6)
pmallick 0:e8a1ba50c46b 165 #define AD717X_STATUS_REG_CRC_ERR (1 << 5)
pmallick 0:e8a1ba50c46b 166 #define AD717X_STATUS_REG_REG_ERR (1 << 4)
pmallick 0:e8a1ba50c46b 167 #define AD717X_STATUS_REG_CH(x) ((x) & 0x0F)
pmallick 0:e8a1ba50c46b 168
pmallick 0:e8a1ba50c46b 169 /* ADC Mode Register bits */
pmallick 0:e8a1ba50c46b 170 #define AD717X_ADCMODE_REG_REF_EN (1 << 15)
pmallick 0:e8a1ba50c46b 171 #define AD717X_ADCMODE_SING_CYC (1 << 13)
pmallick 0:e8a1ba50c46b 172 #define AD717X_ADCMODE_REG_DELAY(x) (((x) & 0x7) << 8)
pmallick 0:e8a1ba50c46b 173 #define AD717X_ADCMODE_REG_MODE(x) (((x) & 0x7) << 4)
pmallick 0:e8a1ba50c46b 174 #define AD717X_ADCMODE_REG_CLKSEL(x) (((x) & 0x3) << 2)
pmallick 0:e8a1ba50c46b 175
pmallick 0:e8a1ba50c46b 176 /* ADC Mode Register additional bits for AD7172-2, AD7172-4, AD4111 and AD4112 */
pmallick 0:e8a1ba50c46b 177 #define AD717X_ADCMODE_REG_HIDE_DELAY (1 << 14)
pmallick 0:e8a1ba50c46b 178
pmallick 0:e8a1ba50c46b 179 /* Interface Mode Register bits */
pmallick 0:e8a1ba50c46b 180 #define AD717X_IFMODE_REG_ALT_SYNC (1 << 12)
pmallick 0:e8a1ba50c46b 181 #define AD717X_IFMODE_REG_IOSTRENGTH (1 << 11)
pmallick 0:e8a1ba50c46b 182 #define AD717X_IFMODE_REG_HIDE_DELAY (1 << 10)
pmallick 0:e8a1ba50c46b 183 #define AD717X_IFMODE_REG_DOUT_RESET (1 << 8)
pmallick 0:e8a1ba50c46b 184 #define AD717X_IFMODE_REG_CONT_READ (1 << 7)
pmallick 0:e8a1ba50c46b 185 #define AD717X_IFMODE_REG_DATA_STAT (1 << 6)
pmallick 0:e8a1ba50c46b 186 #define AD717X_IFMODE_REG_REG_CHECK (1 << 5)
pmallick 0:e8a1ba50c46b 187 #define AD717X_IFMODE_REG_XOR_EN (0x01 << 2)
pmallick 0:e8a1ba50c46b 188 #define AD717X_IFMODE_REG_CRC_EN (0x02 << 2)
pmallick 0:e8a1ba50c46b 189 #define AD717X_IFMODE_REG_XOR_STAT(x) (((x) & AD717X_IFMODE_REG_XOR_EN) == AD717X_IFMODE_REG_XOR_EN)
pmallick 0:e8a1ba50c46b 190 #define AD717X_IFMODE_REG_CRC_STAT(x) (((x) & AD717X_IFMODE_REG_CRC_EN) == AD717X_IFMODE_REG_CRC_EN)
pmallick 0:e8a1ba50c46b 191 #define AD717X_IFMODE_REG_DATA_WL16 (1 << 0)
pmallick 0:e8a1ba50c46b 192
pmallick 0:e8a1ba50c46b 193 /* GPIO Configuration Register bits */
pmallick 0:e8a1ba50c46b 194 #define AD717X_GPIOCON_REG_MUX_IO (1 << 12)
pmallick 0:e8a1ba50c46b 195 #define AD717X_GPIOCON_REG_SYNC_EN (1 << 11)
pmallick 0:e8a1ba50c46b 196 #define AD717X_GPIOCON_REG_ERR_EN(x) (((x) & 0x3) << 9)
pmallick 0:e8a1ba50c46b 197 #define AD717X_GPIOCON_REG_ERR_DAT (1 << 8)
pmallick 0:e8a1ba50c46b 198 #define AD717X_GPIOCON_REG_IP_EN1 (1 << 5)
pmallick 0:e8a1ba50c46b 199 #define AD717X_GPIOCON_REG_IP_EN0 (1 << 4)
pmallick 0:e8a1ba50c46b 200 #define AD717X_GPIOCON_REG_OP_EN1 (1 << 3)
pmallick 0:e8a1ba50c46b 201 #define AD717X_GPIOCON_REG_OP_EN0 (1 << 2)
pmallick 0:e8a1ba50c46b 202 #define AD717X_GPIOCON_REG_DATA1 (1 << 1)
pmallick 0:e8a1ba50c46b 203 #define AD717X_GPIOCON_REG_DATA0 (1 << 0)
pmallick 0:e8a1ba50c46b 204
pmallick 0:e8a1ba50c46b 205 /* GPIO Configuration Register additional bits for AD7172-4, AD7173-8 */
pmallick 0:e8a1ba50c46b 206 #define AD717X_GPIOCON_REG_GP_DATA3 (1 << 7)
pmallick 0:e8a1ba50c46b 207 #define AD717X_GPIOCON_REG_GP_DATA2 (1 << 6)
pmallick 0:e8a1ba50c46b 208 #define AD717X_GPIOCON_REG_GP_DATA1 (1 << 1)
pmallick 0:e8a1ba50c46b 209 #define AD717X_GPIOCON_REG_GP_DATA0 (1 << 0)
pmallick 0:e8a1ba50c46b 210
pmallick 0:e8a1ba50c46b 211 /* GPIO Configuration Register additional bits for AD7173-8 */
pmallick 0:e8a1ba50c46b 212 #define AD717X_GPIOCON_REG_PDSW (1 << 14)
pmallick 0:e8a1ba50c46b 213 #define AD717X_GPIOCON_REG_OP_EN2_3 (1 << 13)
pmallick 0:e8a1ba50c46b 214
pmallick 0:e8a1ba50c46b 215 /* GPIO Configuration Register additional bits for AD4111, AD4112, AD4114, AD4115 */
pmallick 0:e8a1ba50c46b 216 #define AD4111_GPIOCON_REG_OP_EN0_1 (1 << 13)
pmallick 0:e8a1ba50c46b 217 #define AD4111_GPIOCON_REG_DATA1 (1 << 7)
pmallick 0:e8a1ba50c46b 218 #define AD4111_GPIOCON_REG_DATA0 (1 << 6)
pmallick 0:e8a1ba50c46b 219
pmallick 0:e8a1ba50c46b 220 /* GPIO Configuration Register additional bits for AD4111 */
pmallick 0:e8a1ba50c46b 221 #define AD4111_GPIOCON_REG_OW_EN (1 << 12)
pmallick 0:e8a1ba50c46b 222
pmallick 0:e8a1ba50c46b 223 /* Channel Map Register 0-3 bits */
pmallick 0:e8a1ba50c46b 224 #define AD717X_CHMAP_REG_CH_EN (1 << 15)
pmallick 0:e8a1ba50c46b 225 #define AD717X_CHMAP_REG_SETUP_SEL(x) (((x) & 0x7) << 12)
pmallick 0:e8a1ba50c46b 226 #define AD717X_CHMAP_REG_AINPOS(x) (((x) & 0x1F) << 5)
pmallick 0:e8a1ba50c46b 227 #define AD717X_CHMAP_REG_AINNEG(x) (((x) & 0x1F) << 0)
pmallick 0:e8a1ba50c46b 228
pmallick 0:e8a1ba50c46b 229 /* Channel Map Register additional bits for AD4111, AD4112 */
pmallick 0:e8a1ba50c46b 230 #define AD4111_CHMAP_REG_INPUT(x) (((x) & 0x3FF) << 0)
pmallick 0:e8a1ba50c46b 231
pmallick 0:e8a1ba50c46b 232 /* Setup Configuration Register 0-3 bits */
pmallick 0:e8a1ba50c46b 233 #define AD717X_SETUP_CONF_REG_BI_UNIPOLAR (1 << 12)
pmallick 0:e8a1ba50c46b 234 #define AD717X_SETUP_CONF_REG_REF_SEL(x) (((x) & 0x3) << 4)
pmallick 0:e8a1ba50c46b 235
pmallick 0:e8a1ba50c46b 236 /* Setup Configuration Register additional bits for AD7173-8 */
pmallick 0:e8a1ba50c46b 237 #define AD717X_SETUP_CONF_REG_REF_BUF(x) (((x) & 0x3) << 10)
pmallick 0:e8a1ba50c46b 238 #define AD717X_SETUP_CONF_REG_AIN_BUF(x) (((x) & 0x3) << 8)
pmallick 0:e8a1ba50c46b 239 #define AD717X_SETUP_CONF_REG_BURNOUT_EN (1 << 7)
pmallick 0:e8a1ba50c46b 240 #define AD717X_SETUP_CONF_REG_BUFCHOPMAX (1 << 6)
pmallick 0:e8a1ba50c46b 241
pmallick 0:e8a1ba50c46b 242 /* Setup Configuration Register additional bits for AD7172-2, AD7172-4, AD7175-2 */
pmallick 0:e8a1ba50c46b 243 #define AD717X_SETUP_CONF_REG_REFBUF_P (1 << 11)
pmallick 0:e8a1ba50c46b 244 #define AD717X_SETUP_CONF_REG_REFBUF_N (1 << 10)
pmallick 0:e8a1ba50c46b 245 #define AD717X_SETUP_CONF_REG_AINBUF_P (1 << 9)
pmallick 0:e8a1ba50c46b 246 #define AD717X_SETUP_CONF_REG_AINBUF_N (1 << 8)
pmallick 0:e8a1ba50c46b 247
pmallick 0:e8a1ba50c46b 248 /* Setup Configuration Register additional bits for AD4111, AD4112 */
pmallick 0:e8a1ba50c46b 249 #define AD4111_SETUP_CONF_REG_REFPOS_BUF (1 << 11)
pmallick 0:e8a1ba50c46b 250 #define AD4111_SETUP_CONF_REG_REFNEG_BUF (1 << 10)
pmallick 0:e8a1ba50c46b 251 #define AD4111_SETUP_CONF_REG_AIN_BUF(x) (((x) & 0x3) << 8)
pmallick 0:e8a1ba50c46b 252 #define AD4111_SETUP_CONF_REG_BUFCHOPMAX (1 << 6)
pmallick 0:e8a1ba50c46b 253
pmallick 0:e8a1ba50c46b 254 /* Filter Configuration Register 0-3 bits */
pmallick 0:e8a1ba50c46b 255 #define AD717X_FILT_CONF_REG_SINC3_MAP (1 << 15)
pmallick 0:e8a1ba50c46b 256 #define AD717X_FILT_CONF_REG_ENHFILTEN (1 << 11)
pmallick 0:e8a1ba50c46b 257 #define AD717X_FILT_CONF_REG_ENHFILT(x) (((x) & 0x7) << 8)
pmallick 0:e8a1ba50c46b 258 #define AD717X_FILT_CONF_REG_ORDER(x) (((x) & 0x3) << 5)
pmallick 0:e8a1ba50c46b 259 #define AD717X_FILT_CONF_REG_ODR(x) (((x) & 0x1F) << 0)
pmallick 0:e8a1ba50c46b 260
pmallick 0:e8a1ba50c46b 261 /* ID register mask for relevant bits */
pmallick 0:e8a1ba50c46b 262 #define AD717X_ID_REG_MASK 0xFFF0
pmallick 0:e8a1ba50c46b 263 /* AD7172-2 ID */
pmallick 0:e8a1ba50c46b 264 #define AD7172_2_ID_REG_VALUE 0x00D0
pmallick 0:e8a1ba50c46b 265 /* AD7172-4 ID */
pmallick 0:e8a1ba50c46b 266 #define AD7172_4_ID_REG_VALUE 0x2050
pmallick 0:e8a1ba50c46b 267 /* AD7173-8 ID */
pmallick 0:e8a1ba50c46b 268 #define AD7173_8_ID_REG_VALUE 0x30D0
pmallick 0:e8a1ba50c46b 269 /* AD7175-2 ID */
pmallick 0:e8a1ba50c46b 270 #define AD7175_2_ID_REG_VALUE 0x0CD0
pmallick 0:e8a1ba50c46b 271 /* AD7175-8 ID */
pmallick 0:e8a1ba50c46b 272 #define AD7175_8_ID_REG_VALUE 0x3CD0
pmallick 0:e8a1ba50c46b 273 /* AD7176-2 ID */
pmallick 0:e8a1ba50c46b 274 #define AD7176_2_ID_REG_VALUE 0x0C90
pmallick 0:e8a1ba50c46b 275 /* AD7177-2 ID */
pmallick 0:e8a1ba50c46b 276 #define AD7177_2_ID_REG_VALUE 0x4FD0
pmallick 0:e8a1ba50c46b 277 /* AD411x ID */
pmallick 0:e8a1ba50c46b 278 #define AD411X_ID_REG_VALUE 0x30D0
pmallick 0:e8a1ba50c46b 279
pmallick 0:e8a1ba50c46b 280 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 281 /******************* AD717X Constants ****************************************/
pmallick 0:e8a1ba50c46b 282 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 283 #define AD717X_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */
pmallick 0:e8a1ba50c46b 284
pmallick 0:e8a1ba50c46b 285 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 286 /************************ Functions Declarations *****************************/
pmallick 0:e8a1ba50c46b 287 /*****************************************************************************/
pmallick 0:e8a1ba50c46b 288
pmallick 0:e8a1ba50c46b 289 /*! Retrieves a pointer to the register that matches the given address */
pmallick 0:e8a1ba50c46b 290 ad717x_st_reg *AD717X_GetReg(ad717x_dev *device,
pmallick 0:e8a1ba50c46b 291 uint8_t reg_address);
pmallick 0:e8a1ba50c46b 292
pmallick 0:e8a1ba50c46b 293 /*! Reads the value of the specified register. */
pmallick 0:e8a1ba50c46b 294 int32_t AD717X_ReadRegister(ad717x_dev *device,
pmallick 0:e8a1ba50c46b 295 uint8_t addr);
pmallick 0:e8a1ba50c46b 296
pmallick 0:e8a1ba50c46b 297 /*! Writes the value of the specified register. */
pmallick 0:e8a1ba50c46b 298 int32_t AD717X_WriteRegister(ad717x_dev *device,
pmallick 0:e8a1ba50c46b 299 uint8_t);
pmallick 0:e8a1ba50c46b 300
pmallick 0:e8a1ba50c46b 301 /*! Resets the device. */
pmallick 0:e8a1ba50c46b 302 int32_t AD717X_Reset(ad717x_dev *device);
pmallick 0:e8a1ba50c46b 303
pmallick 0:e8a1ba50c46b 304 /*! Waits until a new conversion result is available. */
pmallick 0:e8a1ba50c46b 305 int32_t AD717X_WaitForReady(ad717x_dev *device,
pmallick 0:e8a1ba50c46b 306 uint32_t timeout);
pmallick 0:e8a1ba50c46b 307
pmallick 0:e8a1ba50c46b 308 /*! Reads the conversion result from the device. */
pmallick 0:e8a1ba50c46b 309 int32_t AD717X_ReadData(ad717x_dev *device,
pmallick 0:e8a1ba50c46b 310 int32_t* pData);
pmallick 0:e8a1ba50c46b 311
pmallick 0:e8a1ba50c46b 312 /*! Computes data register read size to account for bit number and status
pmallick 0:e8a1ba50c46b 313 * read. */
pmallick 0:e8a1ba50c46b 314 int32_t AD717X_ComputeDataregSize(ad717x_dev *device);
pmallick 0:e8a1ba50c46b 315
pmallick 0:e8a1ba50c46b 316 /*! Computes the CRC checksum for a data buffer. */
pmallick 0:e8a1ba50c46b 317 uint8_t AD717X_ComputeCRC8(uint8_t* pBuf,
pmallick 0:e8a1ba50c46b 318 uint8_t bufSize);
pmallick 0:e8a1ba50c46b 319
pmallick 0:e8a1ba50c46b 320 /*! Computes the XOR checksum for a data buffer. */
pmallick 0:e8a1ba50c46b 321 uint8_t AD717X_ComputeXOR8(uint8_t * pBuf,
pmallick 0:e8a1ba50c46b 322 uint8_t bufSize);
pmallick 0:e8a1ba50c46b 323
pmallick 0:e8a1ba50c46b 324 /*! Updates the CRC settings. */
pmallick 0:e8a1ba50c46b 325 int32_t AD717X_UpdateCRCSetting(ad717x_dev *device);
pmallick 0:e8a1ba50c46b 326
pmallick 0:e8a1ba50c46b 327 /*! Initializes the AD717X. */
pmallick 0:e8a1ba50c46b 328 int32_t AD717X_Init(ad717x_dev **device,
pmallick 0:e8a1ba50c46b 329 ad717x_init_param init_param);
pmallick 0:e8a1ba50c46b 330
pmallick 0:e8a1ba50c46b 331 /*! Free the resources allocated by AD717X_Init(). */
pmallick 0:e8a1ba50c46b 332 int32_t AD717X_remove(ad717x_dev *dev);
pmallick 0:e8a1ba50c46b 333
pmallick 0:e8a1ba50c46b 334 #endif /* __AD717X_H__ */