SPKT
targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/cmsis_nvic.c@0:e87aa4c49e95, 2019-06-04 (annotated)
- Committer:
- phungductung
- Date:
- Tue Jun 04 21:51:46 2019 +0000
- Revision:
- 0:e87aa4c49e95
libray
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
phungductung | 0:e87aa4c49e95 | 1 | /* mbed Microcontroller Library |
phungductung | 0:e87aa4c49e95 | 2 | * CMSIS-style functionality to support dynamic vectors |
phungductung | 0:e87aa4c49e95 | 3 | ******************************************************************************* |
phungductung | 0:e87aa4c49e95 | 4 | * Copyright (c) 2016, STMicroelectronics |
phungductung | 0:e87aa4c49e95 | 5 | * All rights reserved. |
phungductung | 0:e87aa4c49e95 | 6 | * |
phungductung | 0:e87aa4c49e95 | 7 | * Redistribution and use in source and binary forms, with or without |
phungductung | 0:e87aa4c49e95 | 8 | * modification, are permitted provided that the following conditions are met: |
phungductung | 0:e87aa4c49e95 | 9 | * |
phungductung | 0:e87aa4c49e95 | 10 | * 1. Redistributions of source code must retain the above copyright notice, |
phungductung | 0:e87aa4c49e95 | 11 | * this list of conditions and the following disclaimer. |
phungductung | 0:e87aa4c49e95 | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
phungductung | 0:e87aa4c49e95 | 13 | * this list of conditions and the following disclaimer in the documentation |
phungductung | 0:e87aa4c49e95 | 14 | * and/or other materials provided with the distribution. |
phungductung | 0:e87aa4c49e95 | 15 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
phungductung | 0:e87aa4c49e95 | 16 | * may be used to endorse or promote products derived from this software |
phungductung | 0:e87aa4c49e95 | 17 | * without specific prior written permission. |
phungductung | 0:e87aa4c49e95 | 18 | * |
phungductung | 0:e87aa4c49e95 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
phungductung | 0:e87aa4c49e95 | 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
phungductung | 0:e87aa4c49e95 | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
phungductung | 0:e87aa4c49e95 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
phungductung | 0:e87aa4c49e95 | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
phungductung | 0:e87aa4c49e95 | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
phungductung | 0:e87aa4c49e95 | 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
phungductung | 0:e87aa4c49e95 | 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
phungductung | 0:e87aa4c49e95 | 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
phungductung | 0:e87aa4c49e95 | 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
phungductung | 0:e87aa4c49e95 | 29 | ******************************************************************************* |
phungductung | 0:e87aa4c49e95 | 30 | */ |
phungductung | 0:e87aa4c49e95 | 31 | #include "cmsis_nvic.h" |
phungductung | 0:e87aa4c49e95 | 32 | |
phungductung | 0:e87aa4c49e95 | 33 | #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM |
phungductung | 0:e87aa4c49e95 | 34 | #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash |
phungductung | 0:e87aa4c49e95 | 35 | |
phungductung | 0:e87aa4c49e95 | 36 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
phungductung | 0:e87aa4c49e95 | 37 | uint32_t *vectors = (uint32_t *)SCB->VTOR; |
phungductung | 0:e87aa4c49e95 | 38 | uint32_t i; |
phungductung | 0:e87aa4c49e95 | 39 | |
phungductung | 0:e87aa4c49e95 | 40 | // Copy and switch to dynamic vectors if the first time called |
phungductung | 0:e87aa4c49e95 | 41 | if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) { |
phungductung | 0:e87aa4c49e95 | 42 | uint32_t *old_vectors = vectors; |
phungductung | 0:e87aa4c49e95 | 43 | vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; |
phungductung | 0:e87aa4c49e95 | 44 | for (i=0; i<NVIC_NUM_VECTORS; i++) { |
phungductung | 0:e87aa4c49e95 | 45 | vectors[i] = old_vectors[i]; |
phungductung | 0:e87aa4c49e95 | 46 | } |
phungductung | 0:e87aa4c49e95 | 47 | SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS; |
phungductung | 0:e87aa4c49e95 | 48 | } |
phungductung | 0:e87aa4c49e95 | 49 | vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector; |
phungductung | 0:e87aa4c49e95 | 50 | } |
phungductung | 0:e87aa4c49e95 | 51 | |
phungductung | 0:e87aa4c49e95 | 52 | uint32_t NVIC_GetVector(IRQn_Type IRQn) { |
phungductung | 0:e87aa4c49e95 | 53 | uint32_t *vectors = (uint32_t*)SCB->VTOR; |
phungductung | 0:e87aa4c49e95 | 54 | return vectors[IRQn + NVIC_USER_IRQ_OFFSET]; |
phungductung | 0:e87aa4c49e95 | 55 | } |