PHung Tung / SRC_STM32F7

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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_cortex.c@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:51:46 2019 +0000
Revision:
0:e87aa4c49e95
libray

Who changed what in which revision?

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phungductung 0:e87aa4c49e95 1 /**
phungductung 0:e87aa4c49e95 2 ******************************************************************************
phungductung 0:e87aa4c49e95 3 * @file stm32f7xx_hal_cortex.c
phungductung 0:e87aa4c49e95 4 * @author MCD Application Team
phungductung 0:e87aa4c49e95 5 * @version V1.0.4
phungductung 0:e87aa4c49e95 6 * @date 09-December-2015
phungductung 0:e87aa4c49e95 7 * @brief CORTEX HAL module driver.
phungductung 0:e87aa4c49e95 8 * This file provides firmware functions to manage the following
phungductung 0:e87aa4c49e95 9 * functionalities of the CORTEX:
phungductung 0:e87aa4c49e95 10 * + Initialization and de-initialization functions
phungductung 0:e87aa4c49e95 11 * + Peripheral Control functions
phungductung 0:e87aa4c49e95 12 *
phungductung 0:e87aa4c49e95 13 @verbatim
phungductung 0:e87aa4c49e95 14 ==============================================================================
phungductung 0:e87aa4c49e95 15 ##### How to use this driver #####
phungductung 0:e87aa4c49e95 16 ==============================================================================
phungductung 0:e87aa4c49e95 17
phungductung 0:e87aa4c49e95 18 [..]
phungductung 0:e87aa4c49e95 19 *** How to configure Interrupts using CORTEX HAL driver ***
phungductung 0:e87aa4c49e95 20 ===========================================================
phungductung 0:e87aa4c49e95 21 [..]
phungductung 0:e87aa4c49e95 22 This section provides functions allowing to configure the NVIC interrupts (IRQ).
phungductung 0:e87aa4c49e95 23 The Cortex-M4 exceptions are managed by CMSIS functions.
phungductung 0:e87aa4c49e95 24
phungductung 0:e87aa4c49e95 25 (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
phungductung 0:e87aa4c49e95 26 function according to the following table.
phungductung 0:e87aa4c49e95 27 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
phungductung 0:e87aa4c49e95 28 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
phungductung 0:e87aa4c49e95 29 (#) please refer to programming manual for details in how to configure priority.
phungductung 0:e87aa4c49e95 30
phungductung 0:e87aa4c49e95 31 -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ preemption is no more possible.
phungductung 0:e87aa4c49e95 32 The pending IRQ priority will be managed only by the sub priority.
phungductung 0:e87aa4c49e95 33
phungductung 0:e87aa4c49e95 34 -@- IRQ priority order (sorted by highest to lowest priority):
phungductung 0:e87aa4c49e95 35 (+@) Lowest preemption priority
phungductung 0:e87aa4c49e95 36 (+@) Lowest sub priority
phungductung 0:e87aa4c49e95 37 (+@) Lowest hardware priority (IRQ number)
phungductung 0:e87aa4c49e95 38
phungductung 0:e87aa4c49e95 39 [..]
phungductung 0:e87aa4c49e95 40 *** How to configure Systick using CORTEX HAL driver ***
phungductung 0:e87aa4c49e95 41 ========================================================
phungductung 0:e87aa4c49e95 42 [..]
phungductung 0:e87aa4c49e95 43 Setup SysTick Timer for time base.
phungductung 0:e87aa4c49e95 44
phungductung 0:e87aa4c49e95 45 (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
phungductung 0:e87aa4c49e95 46 is a CMSIS function that:
phungductung 0:e87aa4c49e95 47 (++) Configures the SysTick Reload register with value passed as function parameter.
phungductung 0:e87aa4c49e95 48 (++) Configures the SysTick IRQ priority to the lowest value (0x0F).
phungductung 0:e87aa4c49e95 49 (++) Resets the SysTick Counter register.
phungductung 0:e87aa4c49e95 50 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
phungductung 0:e87aa4c49e95 51 (++) Enables the SysTick Interrupt.
phungductung 0:e87aa4c49e95 52 (++) Starts the SysTick Counter.
phungductung 0:e87aa4c49e95 53
phungductung 0:e87aa4c49e95 54 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
phungductung 0:e87aa4c49e95 55 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
phungductung 0:e87aa4c49e95 56 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
phungductung 0:e87aa4c49e95 57 inside the stm32f7xx_hal_cortex.h file.
phungductung 0:e87aa4c49e95 58
phungductung 0:e87aa4c49e95 59 (+) You can change the SysTick IRQ priority by calling the
phungductung 0:e87aa4c49e95 60 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
phungductung 0:e87aa4c49e95 61 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
phungductung 0:e87aa4c49e95 62
phungductung 0:e87aa4c49e95 63 (+) To adjust the SysTick time base, use the following formula:
phungductung 0:e87aa4c49e95 64
phungductung 0:e87aa4c49e95 65 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
phungductung 0:e87aa4c49e95 66 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
phungductung 0:e87aa4c49e95 67 (++) Reload Value should not exceed 0xFFFFFF
phungductung 0:e87aa4c49e95 68
phungductung 0:e87aa4c49e95 69 @endverbatim
phungductung 0:e87aa4c49e95 70 ******************************************************************************
phungductung 0:e87aa4c49e95 71 * @attention
phungductung 0:e87aa4c49e95 72 *
phungductung 0:e87aa4c49e95 73 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:e87aa4c49e95 74 *
phungductung 0:e87aa4c49e95 75 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:e87aa4c49e95 76 * are permitted provided that the following conditions are met:
phungductung 0:e87aa4c49e95 77 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:e87aa4c49e95 78 * this list of conditions and the following disclaimer.
phungductung 0:e87aa4c49e95 79 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:e87aa4c49e95 80 * this list of conditions and the following disclaimer in the documentation
phungductung 0:e87aa4c49e95 81 * and/or other materials provided with the distribution.
phungductung 0:e87aa4c49e95 82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:e87aa4c49e95 83 * may be used to endorse or promote products derived from this software
phungductung 0:e87aa4c49e95 84 * without specific prior written permission.
phungductung 0:e87aa4c49e95 85 *
phungductung 0:e87aa4c49e95 86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:e87aa4c49e95 87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:e87aa4c49e95 88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:e87aa4c49e95 89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:e87aa4c49e95 90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:e87aa4c49e95 91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:e87aa4c49e95 92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:e87aa4c49e95 93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:e87aa4c49e95 94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:e87aa4c49e95 95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:e87aa4c49e95 96 *
phungductung 0:e87aa4c49e95 97 ******************************************************************************
phungductung 0:e87aa4c49e95 98 */
phungductung 0:e87aa4c49e95 99
phungductung 0:e87aa4c49e95 100 /* Includes ------------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 101 #include "stm32f7xx_hal.h"
phungductung 0:e87aa4c49e95 102
phungductung 0:e87aa4c49e95 103 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:e87aa4c49e95 104 * @{
phungductung 0:e87aa4c49e95 105 */
phungductung 0:e87aa4c49e95 106
phungductung 0:e87aa4c49e95 107 /** @defgroup CORTEX CORTEX
phungductung 0:e87aa4c49e95 108 * @brief CORTEX HAL module driver
phungductung 0:e87aa4c49e95 109 * @{
phungductung 0:e87aa4c49e95 110 */
phungductung 0:e87aa4c49e95 111
phungductung 0:e87aa4c49e95 112 #ifdef HAL_CORTEX_MODULE_ENABLED
phungductung 0:e87aa4c49e95 113
phungductung 0:e87aa4c49e95 114 /* Private types -------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 115 /* Private variables ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 116 /* Private constants ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 117 /* Private macros ------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 118 /* Private functions ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 119 /* Exported functions --------------------------------------------------------*/
phungductung 0:e87aa4c49e95 120
phungductung 0:e87aa4c49e95 121 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
phungductung 0:e87aa4c49e95 122 * @{
phungductung 0:e87aa4c49e95 123 */
phungductung 0:e87aa4c49e95 124
phungductung 0:e87aa4c49e95 125
phungductung 0:e87aa4c49e95 126 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
phungductung 0:e87aa4c49e95 127 * @brief Initialization and Configuration functions
phungductung 0:e87aa4c49e95 128 *
phungductung 0:e87aa4c49e95 129 @verbatim
phungductung 0:e87aa4c49e95 130 ==============================================================================
phungductung 0:e87aa4c49e95 131 ##### Initialization and de-initialization functions #####
phungductung 0:e87aa4c49e95 132 ==============================================================================
phungductung 0:e87aa4c49e95 133 [..]
phungductung 0:e87aa4c49e95 134 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
phungductung 0:e87aa4c49e95 135 Systick functionalities
phungductung 0:e87aa4c49e95 136
phungductung 0:e87aa4c49e95 137 @endverbatim
phungductung 0:e87aa4c49e95 138 * @{
phungductung 0:e87aa4c49e95 139 */
phungductung 0:e87aa4c49e95 140
phungductung 0:e87aa4c49e95 141
phungductung 0:e87aa4c49e95 142 /**
phungductung 0:e87aa4c49e95 143 * @brief Sets the priority grouping field (preemption priority and subpriority)
phungductung 0:e87aa4c49e95 144 * using the required unlock sequence.
phungductung 0:e87aa4c49e95 145 * @param PriorityGroup: The priority grouping bits length.
phungductung 0:e87aa4c49e95 146 * This parameter can be one of the following values:
phungductung 0:e87aa4c49e95 147 * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
phungductung 0:e87aa4c49e95 148 * 4 bits for subpriority
phungductung 0:e87aa4c49e95 149 * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
phungductung 0:e87aa4c49e95 150 * 3 bits for subpriority
phungductung 0:e87aa4c49e95 151 * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
phungductung 0:e87aa4c49e95 152 * 2 bits for subpriority
phungductung 0:e87aa4c49e95 153 * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
phungductung 0:e87aa4c49e95 154 * 1 bits for subpriority
phungductung 0:e87aa4c49e95 155 * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
phungductung 0:e87aa4c49e95 156 * 0 bits for subpriority
phungductung 0:e87aa4c49e95 157 * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
phungductung 0:e87aa4c49e95 158 * The pending IRQ priority will be managed only by the subpriority.
phungductung 0:e87aa4c49e95 159 * @retval None
phungductung 0:e87aa4c49e95 160 */
phungductung 0:e87aa4c49e95 161 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
phungductung 0:e87aa4c49e95 162 {
phungductung 0:e87aa4c49e95 163 /* Check the parameters */
phungductung 0:e87aa4c49e95 164 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
phungductung 0:e87aa4c49e95 165
phungductung 0:e87aa4c49e95 166 /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
phungductung 0:e87aa4c49e95 167 NVIC_SetPriorityGrouping(PriorityGroup);
phungductung 0:e87aa4c49e95 168 }
phungductung 0:e87aa4c49e95 169
phungductung 0:e87aa4c49e95 170 /**
phungductung 0:e87aa4c49e95 171 * @brief Sets the priority of an interrupt.
phungductung 0:e87aa4c49e95 172 * @param IRQn: External interrupt number.
phungductung 0:e87aa4c49e95 173 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 174 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 175 * @param PreemptPriority: The preemption priority for the IRQn channel.
phungductung 0:e87aa4c49e95 176 * This parameter can be a value between 0 and 15
phungductung 0:e87aa4c49e95 177 * A lower priority value indicates a higher priority
phungductung 0:e87aa4c49e95 178 * @param SubPriority: the subpriority level for the IRQ channel.
phungductung 0:e87aa4c49e95 179 * This parameter can be a value between 0 and 15
phungductung 0:e87aa4c49e95 180 * A lower priority value indicates a higher priority.
phungductung 0:e87aa4c49e95 181 * @retval None
phungductung 0:e87aa4c49e95 182 */
phungductung 0:e87aa4c49e95 183 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
phungductung 0:e87aa4c49e95 184 {
phungductung 0:e87aa4c49e95 185 uint32_t prioritygroup = 0x00;
phungductung 0:e87aa4c49e95 186
phungductung 0:e87aa4c49e95 187 /* Check the parameters */
phungductung 0:e87aa4c49e95 188 assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
phungductung 0:e87aa4c49e95 189 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
phungductung 0:e87aa4c49e95 190
phungductung 0:e87aa4c49e95 191 prioritygroup = NVIC_GetPriorityGrouping();
phungductung 0:e87aa4c49e95 192
phungductung 0:e87aa4c49e95 193 NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
phungductung 0:e87aa4c49e95 194 }
phungductung 0:e87aa4c49e95 195
phungductung 0:e87aa4c49e95 196 /**
phungductung 0:e87aa4c49e95 197 * @brief Enables a device specific interrupt in the NVIC interrupt controller.
phungductung 0:e87aa4c49e95 198 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
phungductung 0:e87aa4c49e95 199 * function should be called before.
phungductung 0:e87aa4c49e95 200 * @param IRQn External interrupt number.
phungductung 0:e87aa4c49e95 201 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 202 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 203 * @retval None
phungductung 0:e87aa4c49e95 204 */
phungductung 0:e87aa4c49e95 205 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
phungductung 0:e87aa4c49e95 206 {
phungductung 0:e87aa4c49e95 207 /* Check the parameters */
phungductung 0:e87aa4c49e95 208 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
phungductung 0:e87aa4c49e95 209
phungductung 0:e87aa4c49e95 210 /* Enable interrupt */
phungductung 0:e87aa4c49e95 211 NVIC_EnableIRQ(IRQn);
phungductung 0:e87aa4c49e95 212 }
phungductung 0:e87aa4c49e95 213
phungductung 0:e87aa4c49e95 214 /**
phungductung 0:e87aa4c49e95 215 * @brief Disables a device specific interrupt in the NVIC interrupt controller.
phungductung 0:e87aa4c49e95 216 * @param IRQn External interrupt number.
phungductung 0:e87aa4c49e95 217 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 218 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 219 * @retval None
phungductung 0:e87aa4c49e95 220 */
phungductung 0:e87aa4c49e95 221 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
phungductung 0:e87aa4c49e95 222 {
phungductung 0:e87aa4c49e95 223 /* Check the parameters */
phungductung 0:e87aa4c49e95 224 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
phungductung 0:e87aa4c49e95 225
phungductung 0:e87aa4c49e95 226 /* Disable interrupt */
phungductung 0:e87aa4c49e95 227 NVIC_DisableIRQ(IRQn);
phungductung 0:e87aa4c49e95 228 }
phungductung 0:e87aa4c49e95 229
phungductung 0:e87aa4c49e95 230 /**
phungductung 0:e87aa4c49e95 231 * @brief Initiates a system reset request to reset the MCU.
phungductung 0:e87aa4c49e95 232 * @retval None
phungductung 0:e87aa4c49e95 233 */
phungductung 0:e87aa4c49e95 234 void HAL_NVIC_SystemReset(void)
phungductung 0:e87aa4c49e95 235 {
phungductung 0:e87aa4c49e95 236 /* System Reset */
phungductung 0:e87aa4c49e95 237 NVIC_SystemReset();
phungductung 0:e87aa4c49e95 238 }
phungductung 0:e87aa4c49e95 239
phungductung 0:e87aa4c49e95 240 /**
phungductung 0:e87aa4c49e95 241 * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
phungductung 0:e87aa4c49e95 242 * Counter is in free running mode to generate periodic interrupts.
phungductung 0:e87aa4c49e95 243 * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
phungductung 0:e87aa4c49e95 244 * @retval status: - 0 Function succeeded.
phungductung 0:e87aa4c49e95 245 * - 1 Function failed.
phungductung 0:e87aa4c49e95 246 */
phungductung 0:e87aa4c49e95 247 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
phungductung 0:e87aa4c49e95 248 {
phungductung 0:e87aa4c49e95 249 return SysTick_Config(TicksNumb);
phungductung 0:e87aa4c49e95 250 }
phungductung 0:e87aa4c49e95 251 /**
phungductung 0:e87aa4c49e95 252 * @}
phungductung 0:e87aa4c49e95 253 */
phungductung 0:e87aa4c49e95 254
phungductung 0:e87aa4c49e95 255 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
phungductung 0:e87aa4c49e95 256 * @brief Cortex control functions
phungductung 0:e87aa4c49e95 257 *
phungductung 0:e87aa4c49e95 258 @verbatim
phungductung 0:e87aa4c49e95 259 ==============================================================================
phungductung 0:e87aa4c49e95 260 ##### Peripheral Control functions #####
phungductung 0:e87aa4c49e95 261 ==============================================================================
phungductung 0:e87aa4c49e95 262 [..]
phungductung 0:e87aa4c49e95 263 This subsection provides a set of functions allowing to control the CORTEX
phungductung 0:e87aa4c49e95 264 (NVIC, SYSTICK, MPU) functionalities.
phungductung 0:e87aa4c49e95 265
phungductung 0:e87aa4c49e95 266
phungductung 0:e87aa4c49e95 267 @endverbatim
phungductung 0:e87aa4c49e95 268 * @{
phungductung 0:e87aa4c49e95 269 */
phungductung 0:e87aa4c49e95 270
phungductung 0:e87aa4c49e95 271 #if (__MPU_PRESENT == 1)
phungductung 0:e87aa4c49e95 272 /**
phungductung 0:e87aa4c49e95 273 * @brief Initializes and configures the Region and the memory to be protected.
phungductung 0:e87aa4c49e95 274 * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
phungductung 0:e87aa4c49e95 275 * the initialization and configuration information.
phungductung 0:e87aa4c49e95 276 * @retval None
phungductung 0:e87aa4c49e95 277 */
phungductung 0:e87aa4c49e95 278 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
phungductung 0:e87aa4c49e95 279 {
phungductung 0:e87aa4c49e95 280 /* Check the parameters */
phungductung 0:e87aa4c49e95 281 assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
phungductung 0:e87aa4c49e95 282 assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
phungductung 0:e87aa4c49e95 283
phungductung 0:e87aa4c49e95 284 /* Set the Region number */
phungductung 0:e87aa4c49e95 285 MPU->RNR = MPU_Init->Number;
phungductung 0:e87aa4c49e95 286
phungductung 0:e87aa4c49e95 287 if ((MPU_Init->Enable) != RESET)
phungductung 0:e87aa4c49e95 288 {
phungductung 0:e87aa4c49e95 289 /* Check the parameters */
phungductung 0:e87aa4c49e95 290 assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
phungductung 0:e87aa4c49e95 291 assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
phungductung 0:e87aa4c49e95 292 assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
phungductung 0:e87aa4c49e95 293 assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
phungductung 0:e87aa4c49e95 294 assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
phungductung 0:e87aa4c49e95 295 assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
phungductung 0:e87aa4c49e95 296 assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
phungductung 0:e87aa4c49e95 297 assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
phungductung 0:e87aa4c49e95 298
phungductung 0:e87aa4c49e95 299 MPU->RBAR = MPU_Init->BaseAddress;
phungductung 0:e87aa4c49e95 300 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
phungductung 0:e87aa4c49e95 301 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
phungductung 0:e87aa4c49e95 302 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
phungductung 0:e87aa4c49e95 303 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
phungductung 0:e87aa4c49e95 304 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
phungductung 0:e87aa4c49e95 305 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
phungductung 0:e87aa4c49e95 306 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
phungductung 0:e87aa4c49e95 307 ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
phungductung 0:e87aa4c49e95 308 ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
phungductung 0:e87aa4c49e95 309 }
phungductung 0:e87aa4c49e95 310 else
phungductung 0:e87aa4c49e95 311 {
phungductung 0:e87aa4c49e95 312 MPU->RBAR = 0x00;
phungductung 0:e87aa4c49e95 313 MPU->RASR = 0x00;
phungductung 0:e87aa4c49e95 314 }
phungductung 0:e87aa4c49e95 315 }
phungductung 0:e87aa4c49e95 316 #endif /* __MPU_PRESENT */
phungductung 0:e87aa4c49e95 317
phungductung 0:e87aa4c49e95 318 /**
phungductung 0:e87aa4c49e95 319 * @brief Gets the priority grouping field from the NVIC Interrupt Controller.
phungductung 0:e87aa4c49e95 320 * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
phungductung 0:e87aa4c49e95 321 */
phungductung 0:e87aa4c49e95 322 uint32_t HAL_NVIC_GetPriorityGrouping(void)
phungductung 0:e87aa4c49e95 323 {
phungductung 0:e87aa4c49e95 324 /* Get the PRIGROUP[10:8] field value */
phungductung 0:e87aa4c49e95 325 return NVIC_GetPriorityGrouping();
phungductung 0:e87aa4c49e95 326 }
phungductung 0:e87aa4c49e95 327
phungductung 0:e87aa4c49e95 328 /**
phungductung 0:e87aa4c49e95 329 * @brief Gets the priority of an interrupt.
phungductung 0:e87aa4c49e95 330 * @param IRQn: External interrupt number.
phungductung 0:e87aa4c49e95 331 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 332 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 333 * @param PriorityGroup: the priority grouping bits length.
phungductung 0:e87aa4c49e95 334 * This parameter can be one of the following values:
phungductung 0:e87aa4c49e95 335 * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
phungductung 0:e87aa4c49e95 336 * 4 bits for subpriority
phungductung 0:e87aa4c49e95 337 * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
phungductung 0:e87aa4c49e95 338 * 3 bits for subpriority
phungductung 0:e87aa4c49e95 339 * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
phungductung 0:e87aa4c49e95 340 * 2 bits for subpriority
phungductung 0:e87aa4c49e95 341 * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
phungductung 0:e87aa4c49e95 342 * 1 bits for subpriority
phungductung 0:e87aa4c49e95 343 * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
phungductung 0:e87aa4c49e95 344 * 0 bits for subpriority
phungductung 0:e87aa4c49e95 345 * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
phungductung 0:e87aa4c49e95 346 * @param pSubPriority: Pointer on the Subpriority value (starting from 0).
phungductung 0:e87aa4c49e95 347 * @retval None
phungductung 0:e87aa4c49e95 348 */
phungductung 0:e87aa4c49e95 349 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
phungductung 0:e87aa4c49e95 350 {
phungductung 0:e87aa4c49e95 351 /* Check the parameters */
phungductung 0:e87aa4c49e95 352 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
phungductung 0:e87aa4c49e95 353 /* Get priority for Cortex-M system or device specific interrupts */
phungductung 0:e87aa4c49e95 354 NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
phungductung 0:e87aa4c49e95 355 }
phungductung 0:e87aa4c49e95 356
phungductung 0:e87aa4c49e95 357 /**
phungductung 0:e87aa4c49e95 358 * @brief Sets Pending bit of an external interrupt.
phungductung 0:e87aa4c49e95 359 * @param IRQn External interrupt number
phungductung 0:e87aa4c49e95 360 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 361 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 362 * @retval None
phungductung 0:e87aa4c49e95 363 */
phungductung 0:e87aa4c49e95 364 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
phungductung 0:e87aa4c49e95 365 {
phungductung 0:e87aa4c49e95 366 /* Check the parameters */
phungductung 0:e87aa4c49e95 367 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
phungductung 0:e87aa4c49e95 368
phungductung 0:e87aa4c49e95 369 /* Set interrupt pending */
phungductung 0:e87aa4c49e95 370 NVIC_SetPendingIRQ(IRQn);
phungductung 0:e87aa4c49e95 371 }
phungductung 0:e87aa4c49e95 372
phungductung 0:e87aa4c49e95 373 /**
phungductung 0:e87aa4c49e95 374 * @brief Gets Pending Interrupt (reads the pending register in the NVIC
phungductung 0:e87aa4c49e95 375 * and returns the pending bit for the specified interrupt).
phungductung 0:e87aa4c49e95 376 * @param IRQn External interrupt number.
phungductung 0:e87aa4c49e95 377 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 378 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 379 * @retval status: - 0 Interrupt status is not pending.
phungductung 0:e87aa4c49e95 380 * - 1 Interrupt status is pending.
phungductung 0:e87aa4c49e95 381 */
phungductung 0:e87aa4c49e95 382 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
phungductung 0:e87aa4c49e95 383 {
phungductung 0:e87aa4c49e95 384 /* Check the parameters */
phungductung 0:e87aa4c49e95 385 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
phungductung 0:e87aa4c49e95 386
phungductung 0:e87aa4c49e95 387 /* Return 1 if pending else 0 */
phungductung 0:e87aa4c49e95 388 return NVIC_GetPendingIRQ(IRQn);
phungductung 0:e87aa4c49e95 389 }
phungductung 0:e87aa4c49e95 390
phungductung 0:e87aa4c49e95 391 /**
phungductung 0:e87aa4c49e95 392 * @brief Clears the pending bit of an external interrupt.
phungductung 0:e87aa4c49e95 393 * @param IRQn External interrupt number.
phungductung 0:e87aa4c49e95 394 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 395 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 396 * @retval None
phungductung 0:e87aa4c49e95 397 */
phungductung 0:e87aa4c49e95 398 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
phungductung 0:e87aa4c49e95 399 {
phungductung 0:e87aa4c49e95 400 /* Check the parameters */
phungductung 0:e87aa4c49e95 401 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
phungductung 0:e87aa4c49e95 402
phungductung 0:e87aa4c49e95 403 /* Clear pending interrupt */
phungductung 0:e87aa4c49e95 404 NVIC_ClearPendingIRQ(IRQn);
phungductung 0:e87aa4c49e95 405 }
phungductung 0:e87aa4c49e95 406
phungductung 0:e87aa4c49e95 407 /**
phungductung 0:e87aa4c49e95 408 * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
phungductung 0:e87aa4c49e95 409 * @param IRQn External interrupt number
phungductung 0:e87aa4c49e95 410 * This parameter can be an enumerator of IRQn_Type enumeration
phungductung 0:e87aa4c49e95 411 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
phungductung 0:e87aa4c49e95 412 * @retval status: - 0 Interrupt status is not pending.
phungductung 0:e87aa4c49e95 413 * - 1 Interrupt status is pending.
phungductung 0:e87aa4c49e95 414 */
phungductung 0:e87aa4c49e95 415 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
phungductung 0:e87aa4c49e95 416 {
phungductung 0:e87aa4c49e95 417 /* Check the parameters */
phungductung 0:e87aa4c49e95 418 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
phungductung 0:e87aa4c49e95 419
phungductung 0:e87aa4c49e95 420 /* Return 1 if active else 0 */
phungductung 0:e87aa4c49e95 421 return NVIC_GetActive(IRQn);
phungductung 0:e87aa4c49e95 422 }
phungductung 0:e87aa4c49e95 423
phungductung 0:e87aa4c49e95 424 /**
phungductung 0:e87aa4c49e95 425 * @brief Configures the SysTick clock source.
phungductung 0:e87aa4c49e95 426 * @param CLKSource: specifies the SysTick clock source.
phungductung 0:e87aa4c49e95 427 * This parameter can be one of the following values:
phungductung 0:e87aa4c49e95 428 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
phungductung 0:e87aa4c49e95 429 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
phungductung 0:e87aa4c49e95 430 * @retval None
phungductung 0:e87aa4c49e95 431 */
phungductung 0:e87aa4c49e95 432 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
phungductung 0:e87aa4c49e95 433 {
phungductung 0:e87aa4c49e95 434 /* Check the parameters */
phungductung 0:e87aa4c49e95 435 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
phungductung 0:e87aa4c49e95 436 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
phungductung 0:e87aa4c49e95 437 {
phungductung 0:e87aa4c49e95 438 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
phungductung 0:e87aa4c49e95 439 }
phungductung 0:e87aa4c49e95 440 else
phungductung 0:e87aa4c49e95 441 {
phungductung 0:e87aa4c49e95 442 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
phungductung 0:e87aa4c49e95 443 }
phungductung 0:e87aa4c49e95 444 }
phungductung 0:e87aa4c49e95 445
phungductung 0:e87aa4c49e95 446 /**
phungductung 0:e87aa4c49e95 447 * @brief This function handles SYSTICK interrupt request.
phungductung 0:e87aa4c49e95 448 * @retval None
phungductung 0:e87aa4c49e95 449 */
phungductung 0:e87aa4c49e95 450 void HAL_SYSTICK_IRQHandler(void)
phungductung 0:e87aa4c49e95 451 {
phungductung 0:e87aa4c49e95 452 HAL_SYSTICK_Callback();
phungductung 0:e87aa4c49e95 453 }
phungductung 0:e87aa4c49e95 454
phungductung 0:e87aa4c49e95 455 /**
phungductung 0:e87aa4c49e95 456 * @brief SYSTICK callback.
phungductung 0:e87aa4c49e95 457 * @retval None
phungductung 0:e87aa4c49e95 458 */
phungductung 0:e87aa4c49e95 459 __weak void HAL_SYSTICK_Callback(void)
phungductung 0:e87aa4c49e95 460 {
phungductung 0:e87aa4c49e95 461 /* NOTE : This function Should not be modified, when the callback is needed,
phungductung 0:e87aa4c49e95 462 the HAL_SYSTICK_Callback could be implemented in the user file
phungductung 0:e87aa4c49e95 463 */
phungductung 0:e87aa4c49e95 464 }
phungductung 0:e87aa4c49e95 465
phungductung 0:e87aa4c49e95 466 /**
phungductung 0:e87aa4c49e95 467 * @}
phungductung 0:e87aa4c49e95 468 */
phungductung 0:e87aa4c49e95 469
phungductung 0:e87aa4c49e95 470 /**
phungductung 0:e87aa4c49e95 471 * @}
phungductung 0:e87aa4c49e95 472 */
phungductung 0:e87aa4c49e95 473
phungductung 0:e87aa4c49e95 474 #endif /* HAL_CORTEX_MODULE_ENABLED */
phungductung 0:e87aa4c49e95 475 /**
phungductung 0:e87aa4c49e95 476 * @}
phungductung 0:e87aa4c49e95 477 */
phungductung 0:e87aa4c49e95 478
phungductung 0:e87aa4c49e95 479 /**
phungductung 0:e87aa4c49e95 480 * @}
phungductung 0:e87aa4c49e95 481 */
phungductung 0:e87aa4c49e95 482
phungductung 0:e87aa4c49e95 483 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/