PHung Tung / DISCO-F746_WAV_PLAYER

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Dependencies:   F746_GUI SD_PlayerSkeleton F746_SAI_IO

SRC_STM32F7/targets/hal/TARGET_STM/TARGET_STM32F7/gpio_irq_api.c@0:8ede47d38d10, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:37:21 2019 +0000
Revision:
0:8ede47d38d10
SPKT

Who changed what in which revision?

UserRevisionLine numberNew contents of line
phungductung 0:8ede47d38d10 1 /* mbed Microcontroller Library
phungductung 0:8ede47d38d10 2 *******************************************************************************
phungductung 0:8ede47d38d10 3 * Copyright (c) 2015, STMicroelectronics
phungductung 0:8ede47d38d10 4 * All rights reserved.
phungductung 0:8ede47d38d10 5 *
phungductung 0:8ede47d38d10 6 * Redistribution and use in source and binary forms, with or without
phungductung 0:8ede47d38d10 7 * modification, are permitted provided that the following conditions are met:
phungductung 0:8ede47d38d10 8 *
phungductung 0:8ede47d38d10 9 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:8ede47d38d10 10 * this list of conditions and the following disclaimer.
phungductung 0:8ede47d38d10 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:8ede47d38d10 12 * this list of conditions and the following disclaimer in the documentation
phungductung 0:8ede47d38d10 13 * and/or other materials provided with the distribution.
phungductung 0:8ede47d38d10 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:8ede47d38d10 15 * may be used to endorse or promote products derived from this software
phungductung 0:8ede47d38d10 16 * without specific prior written permission.
phungductung 0:8ede47d38d10 17 *
phungductung 0:8ede47d38d10 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:8ede47d38d10 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:8ede47d38d10 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:8ede47d38d10 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:8ede47d38d10 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:8ede47d38d10 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:8ede47d38d10 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:8ede47d38d10 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:8ede47d38d10 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:8ede47d38d10 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:8ede47d38d10 28 *******************************************************************************
phungductung 0:8ede47d38d10 29 */
phungductung 0:8ede47d38d10 30 #include <stddef.h>
phungductung 0:8ede47d38d10 31 #include "cmsis.h"
phungductung 0:8ede47d38d10 32 #include "gpio_irq_api.h"
phungductung 0:8ede47d38d10 33 #include "pinmap.h"
phungductung 0:8ede47d38d10 34 #include "mbed_error.h"
phungductung 0:8ede47d38d10 35
phungductung 0:8ede47d38d10 36 #define EDGE_NONE (0)
phungductung 0:8ede47d38d10 37 #define EDGE_RISE (1)
phungductung 0:8ede47d38d10 38 #define EDGE_FALL (2)
phungductung 0:8ede47d38d10 39 #define EDGE_BOTH (3)
phungductung 0:8ede47d38d10 40
phungductung 0:8ede47d38d10 41 // Number of EXTI irq vectors (EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5_9, EXTI10_15)
phungductung 0:8ede47d38d10 42 #define CHANNEL_NUM (7)
phungductung 0:8ede47d38d10 43
phungductung 0:8ede47d38d10 44 // Max pins for one line (max with EXTI10_15)
phungductung 0:8ede47d38d10 45 #define MAX_PIN_LINE (6)
phungductung 0:8ede47d38d10 46
phungductung 0:8ede47d38d10 47 typedef struct gpio_channel {
phungductung 0:8ede47d38d10 48 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
phungductung 0:8ede47d38d10 49 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
phungductung 0:8ede47d38d10 50 uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
phungductung 0:8ede47d38d10 51 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
phungductung 0:8ede47d38d10 52 } gpio_channel_t;
phungductung 0:8ede47d38d10 53
phungductung 0:8ede47d38d10 54 static gpio_channel_t channels[CHANNEL_NUM] = {
phungductung 0:8ede47d38d10 55 {.pin_mask = 0},
phungductung 0:8ede47d38d10 56 {.pin_mask = 0},
phungductung 0:8ede47d38d10 57 {.pin_mask = 0},
phungductung 0:8ede47d38d10 58 {.pin_mask = 0},
phungductung 0:8ede47d38d10 59 {.pin_mask = 0},
phungductung 0:8ede47d38d10 60 {.pin_mask = 0},
phungductung 0:8ede47d38d10 61 {.pin_mask = 0}
phungductung 0:8ede47d38d10 62 };
phungductung 0:8ede47d38d10 63
phungductung 0:8ede47d38d10 64 // Used to return the index for channels array.
phungductung 0:8ede47d38d10 65 static uint32_t pin_base_nr[16] = {
phungductung 0:8ede47d38d10 66 // EXTI0
phungductung 0:8ede47d38d10 67 0, // pin 0
phungductung 0:8ede47d38d10 68 // EXTI1
phungductung 0:8ede47d38d10 69 0, // pin 1
phungductung 0:8ede47d38d10 70 // EXTI2
phungductung 0:8ede47d38d10 71 0, // pin 2
phungductung 0:8ede47d38d10 72 // EXTI3
phungductung 0:8ede47d38d10 73 0, // pin 3
phungductung 0:8ede47d38d10 74 // EXTI4
phungductung 0:8ede47d38d10 75 0, // pin 4
phungductung 0:8ede47d38d10 76 // EXTI5_9
phungductung 0:8ede47d38d10 77 0, // pin 5
phungductung 0:8ede47d38d10 78 1, // pin 6
phungductung 0:8ede47d38d10 79 2, // pin 7
phungductung 0:8ede47d38d10 80 3, // pin 8
phungductung 0:8ede47d38d10 81 4, // pin 9
phungductung 0:8ede47d38d10 82 // EXTI10_15
phungductung 0:8ede47d38d10 83 0, // pin 10
phungductung 0:8ede47d38d10 84 1, // pin 11
phungductung 0:8ede47d38d10 85 2, // pin 12
phungductung 0:8ede47d38d10 86 3, // pin 13
phungductung 0:8ede47d38d10 87 4, // pin 14
phungductung 0:8ede47d38d10 88 5 // pin 15
phungductung 0:8ede47d38d10 89 };
phungductung 0:8ede47d38d10 90
phungductung 0:8ede47d38d10 91 static gpio_irq_handler irq_handler;
phungductung 0:8ede47d38d10 92
phungductung 0:8ede47d38d10 93 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
phungductung 0:8ede47d38d10 94 {
phungductung 0:8ede47d38d10 95 gpio_channel_t *gpio_channel = &channels[irq_index];
phungductung 0:8ede47d38d10 96 uint32_t gpio_idx;
phungductung 0:8ede47d38d10 97
phungductung 0:8ede47d38d10 98 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
phungductung 0:8ede47d38d10 99 uint32_t current_mask = (1 << gpio_idx);
phungductung 0:8ede47d38d10 100
phungductung 0:8ede47d38d10 101 if (gpio_channel->pin_mask & current_mask) {
phungductung 0:8ede47d38d10 102 // Retrieve the gpio and pin that generate the irq
phungductung 0:8ede47d38d10 103 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
phungductung 0:8ede47d38d10 104 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
phungductung 0:8ede47d38d10 105
phungductung 0:8ede47d38d10 106 // Clear interrupt flag
phungductung 0:8ede47d38d10 107 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
phungductung 0:8ede47d38d10 108 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
phungductung 0:8ede47d38d10 109
phungductung 0:8ede47d38d10 110 if (gpio_channel->channel_ids[gpio_idx] == 0) continue;
phungductung 0:8ede47d38d10 111
phungductung 0:8ede47d38d10 112 // Check which edge has generated the irq
phungductung 0:8ede47d38d10 113 if ((gpio->IDR & pin) == 0) {
phungductung 0:8ede47d38d10 114 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
phungductung 0:8ede47d38d10 115 } else {
phungductung 0:8ede47d38d10 116 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
phungductung 0:8ede47d38d10 117 }
phungductung 0:8ede47d38d10 118 }
phungductung 0:8ede47d38d10 119 }
phungductung 0:8ede47d38d10 120 }
phungductung 0:8ede47d38d10 121 }
phungductung 0:8ede47d38d10 122
phungductung 0:8ede47d38d10 123 // EXTI line 0
phungductung 0:8ede47d38d10 124 static void gpio_irq0(void)
phungductung 0:8ede47d38d10 125 {
phungductung 0:8ede47d38d10 126 handle_interrupt_in(0, 1);
phungductung 0:8ede47d38d10 127 }
phungductung 0:8ede47d38d10 128
phungductung 0:8ede47d38d10 129 // EXTI line 1
phungductung 0:8ede47d38d10 130 static void gpio_irq1(void)
phungductung 0:8ede47d38d10 131 {
phungductung 0:8ede47d38d10 132 handle_interrupt_in(1, 1);
phungductung 0:8ede47d38d10 133 }
phungductung 0:8ede47d38d10 134
phungductung 0:8ede47d38d10 135 // EXTI line 2
phungductung 0:8ede47d38d10 136 static void gpio_irq2(void)
phungductung 0:8ede47d38d10 137 {
phungductung 0:8ede47d38d10 138 handle_interrupt_in(2, 1);
phungductung 0:8ede47d38d10 139 }
phungductung 0:8ede47d38d10 140
phungductung 0:8ede47d38d10 141 // EXTI line 3
phungductung 0:8ede47d38d10 142 static void gpio_irq3(void)
phungductung 0:8ede47d38d10 143 {
phungductung 0:8ede47d38d10 144 handle_interrupt_in(3, 1);
phungductung 0:8ede47d38d10 145 }
phungductung 0:8ede47d38d10 146
phungductung 0:8ede47d38d10 147 // EXTI line 4
phungductung 0:8ede47d38d10 148 static void gpio_irq4(void)
phungductung 0:8ede47d38d10 149 {
phungductung 0:8ede47d38d10 150 handle_interrupt_in(4, 1);
phungductung 0:8ede47d38d10 151 }
phungductung 0:8ede47d38d10 152
phungductung 0:8ede47d38d10 153 // EXTI lines 5 to 9
phungductung 0:8ede47d38d10 154 static void gpio_irq5(void)
phungductung 0:8ede47d38d10 155 {
phungductung 0:8ede47d38d10 156 handle_interrupt_in(5, 5);
phungductung 0:8ede47d38d10 157 }
phungductung 0:8ede47d38d10 158
phungductung 0:8ede47d38d10 159 // EXTI lines 10 to 15
phungductung 0:8ede47d38d10 160 static void gpio_irq6(void)
phungductung 0:8ede47d38d10 161 {
phungductung 0:8ede47d38d10 162 handle_interrupt_in(6, 6);
phungductung 0:8ede47d38d10 163 }
phungductung 0:8ede47d38d10 164
phungductung 0:8ede47d38d10 165 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
phungductung 0:8ede47d38d10 166
phungductung 0:8ede47d38d10 167 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
phungductung 0:8ede47d38d10 168 {
phungductung 0:8ede47d38d10 169 IRQn_Type irq_n = (IRQn_Type)0;
phungductung 0:8ede47d38d10 170 uint32_t vector = 0;
phungductung 0:8ede47d38d10 171 uint32_t irq_index;
phungductung 0:8ede47d38d10 172 gpio_channel_t *gpio_channel;
phungductung 0:8ede47d38d10 173 uint32_t gpio_idx;
phungductung 0:8ede47d38d10 174
phungductung 0:8ede47d38d10 175 if (pin == NC) return -1;
phungductung 0:8ede47d38d10 176
phungductung 0:8ede47d38d10 177 uint32_t port_index = STM_PORT(pin);
phungductung 0:8ede47d38d10 178 uint32_t pin_index = STM_PIN(pin);
phungductung 0:8ede47d38d10 179
phungductung 0:8ede47d38d10 180 // Select irq number and interrupt routine
phungductung 0:8ede47d38d10 181 switch (pin_index) {
phungductung 0:8ede47d38d10 182 case 0:
phungductung 0:8ede47d38d10 183 irq_n = EXTI0_IRQn;
phungductung 0:8ede47d38d10 184 vector = (uint32_t)&gpio_irq0;
phungductung 0:8ede47d38d10 185 irq_index = 0;
phungductung 0:8ede47d38d10 186 break;
phungductung 0:8ede47d38d10 187 case 1:
phungductung 0:8ede47d38d10 188 irq_n = EXTI1_IRQn;
phungductung 0:8ede47d38d10 189 vector = (uint32_t)&gpio_irq1;
phungductung 0:8ede47d38d10 190 irq_index = 1;
phungductung 0:8ede47d38d10 191 break;
phungductung 0:8ede47d38d10 192 case 2:
phungductung 0:8ede47d38d10 193 irq_n = EXTI2_IRQn;
phungductung 0:8ede47d38d10 194 vector = (uint32_t)&gpio_irq2;
phungductung 0:8ede47d38d10 195 irq_index = 2;
phungductung 0:8ede47d38d10 196 break;
phungductung 0:8ede47d38d10 197 case 3:
phungductung 0:8ede47d38d10 198 irq_n = EXTI3_IRQn;
phungductung 0:8ede47d38d10 199 vector = (uint32_t)&gpio_irq3;
phungductung 0:8ede47d38d10 200 irq_index = 3;
phungductung 0:8ede47d38d10 201 break;
phungductung 0:8ede47d38d10 202 case 4:
phungductung 0:8ede47d38d10 203 irq_n = EXTI4_IRQn;
phungductung 0:8ede47d38d10 204 vector = (uint32_t)&gpio_irq4;
phungductung 0:8ede47d38d10 205 irq_index = 4;
phungductung 0:8ede47d38d10 206 break;
phungductung 0:8ede47d38d10 207 case 5:
phungductung 0:8ede47d38d10 208 case 6:
phungductung 0:8ede47d38d10 209 case 7:
phungductung 0:8ede47d38d10 210 case 8:
phungductung 0:8ede47d38d10 211 case 9:
phungductung 0:8ede47d38d10 212 irq_n = EXTI9_5_IRQn;
phungductung 0:8ede47d38d10 213 vector = (uint32_t)&gpio_irq5;
phungductung 0:8ede47d38d10 214 irq_index = 5;
phungductung 0:8ede47d38d10 215 break;
phungductung 0:8ede47d38d10 216 case 10:
phungductung 0:8ede47d38d10 217 case 11:
phungductung 0:8ede47d38d10 218 case 12:
phungductung 0:8ede47d38d10 219 case 13:
phungductung 0:8ede47d38d10 220 case 14:
phungductung 0:8ede47d38d10 221 case 15:
phungductung 0:8ede47d38d10 222 irq_n = EXTI15_10_IRQn;
phungductung 0:8ede47d38d10 223 vector = (uint32_t)&gpio_irq6;
phungductung 0:8ede47d38d10 224 irq_index = 6;
phungductung 0:8ede47d38d10 225 break;
phungductung 0:8ede47d38d10 226 default:
phungductung 0:8ede47d38d10 227 error("InterruptIn error: pin not supported.\n");
phungductung 0:8ede47d38d10 228 return -1;
phungductung 0:8ede47d38d10 229 }
phungductung 0:8ede47d38d10 230
phungductung 0:8ede47d38d10 231 // Enable GPIO clock
phungductung 0:8ede47d38d10 232 uint32_t gpio_add = Set_GPIO_Clock(port_index);
phungductung 0:8ede47d38d10 233
phungductung 0:8ede47d38d10 234 // Configure GPIO
phungductung 0:8ede47d38d10 235 pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0));
phungductung 0:8ede47d38d10 236
phungductung 0:8ede47d38d10 237 // Enable EXTI interrupt
phungductung 0:8ede47d38d10 238 NVIC_SetVector(irq_n, vector);
phungductung 0:8ede47d38d10 239 NVIC_EnableIRQ(irq_n);
phungductung 0:8ede47d38d10 240
phungductung 0:8ede47d38d10 241 // Save informations for future use
phungductung 0:8ede47d38d10 242 obj->irq_n = irq_n;
phungductung 0:8ede47d38d10 243 obj->irq_index = irq_index;
phungductung 0:8ede47d38d10 244 obj->event = EDGE_NONE;
phungductung 0:8ede47d38d10 245 obj->pin = pin;
phungductung 0:8ede47d38d10 246
phungductung 0:8ede47d38d10 247 gpio_channel = &channels[irq_index];
phungductung 0:8ede47d38d10 248 gpio_idx = pin_base_nr[pin_index];
phungductung 0:8ede47d38d10 249 gpio_channel->pin_mask |= (1 << gpio_idx);
phungductung 0:8ede47d38d10 250 gpio_channel->channel_ids[gpio_idx] = id;
phungductung 0:8ede47d38d10 251 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
phungductung 0:8ede47d38d10 252 gpio_channel->channel_pin[gpio_idx] = pin_index;
phungductung 0:8ede47d38d10 253
phungductung 0:8ede47d38d10 254 irq_handler = handler;
phungductung 0:8ede47d38d10 255
phungductung 0:8ede47d38d10 256 return 0;
phungductung 0:8ede47d38d10 257 }
phungductung 0:8ede47d38d10 258
phungductung 0:8ede47d38d10 259 void gpio_irq_free(gpio_irq_t *obj)
phungductung 0:8ede47d38d10 260 {
phungductung 0:8ede47d38d10 261 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
phungductung 0:8ede47d38d10 262 uint32_t pin_index = STM_PIN(obj->pin);
phungductung 0:8ede47d38d10 263 uint32_t gpio_idx = pin_base_nr[pin_index];
phungductung 0:8ede47d38d10 264
phungductung 0:8ede47d38d10 265 gpio_channel->pin_mask &= ~(1 << gpio_idx);
phungductung 0:8ede47d38d10 266 gpio_channel->channel_ids[gpio_idx] = 0;
phungductung 0:8ede47d38d10 267 gpio_channel->channel_gpio[gpio_idx] = 0;
phungductung 0:8ede47d38d10 268 gpio_channel->channel_pin[gpio_idx] = 0;
phungductung 0:8ede47d38d10 269
phungductung 0:8ede47d38d10 270 // Disable EXTI line
phungductung 0:8ede47d38d10 271 pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
phungductung 0:8ede47d38d10 272 obj->event = EDGE_NONE;
phungductung 0:8ede47d38d10 273 }
phungductung 0:8ede47d38d10 274
phungductung 0:8ede47d38d10 275 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
phungductung 0:8ede47d38d10 276 {
phungductung 0:8ede47d38d10 277 uint32_t mode = STM_MODE_IT_EVT_RESET;
phungductung 0:8ede47d38d10 278 uint32_t pull = GPIO_NOPULL;
phungductung 0:8ede47d38d10 279
phungductung 0:8ede47d38d10 280 if (enable) {
phungductung 0:8ede47d38d10 281 if (event == IRQ_RISE) {
phungductung 0:8ede47d38d10 282 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
phungductung 0:8ede47d38d10 283 mode = STM_MODE_IT_RISING_FALLING;
phungductung 0:8ede47d38d10 284 obj->event = EDGE_BOTH;
phungductung 0:8ede47d38d10 285 } else { // NONE or RISE
phungductung 0:8ede47d38d10 286 mode = STM_MODE_IT_RISING;
phungductung 0:8ede47d38d10 287 obj->event = EDGE_RISE;
phungductung 0:8ede47d38d10 288 }
phungductung 0:8ede47d38d10 289 }
phungductung 0:8ede47d38d10 290 if (event == IRQ_FALL) {
phungductung 0:8ede47d38d10 291 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
phungductung 0:8ede47d38d10 292 mode = STM_MODE_IT_RISING_FALLING;
phungductung 0:8ede47d38d10 293 obj->event = EDGE_BOTH;
phungductung 0:8ede47d38d10 294 } else { // NONE or FALL
phungductung 0:8ede47d38d10 295 mode = STM_MODE_IT_FALLING;
phungductung 0:8ede47d38d10 296 obj->event = EDGE_FALL;
phungductung 0:8ede47d38d10 297 }
phungductung 0:8ede47d38d10 298 }
phungductung 0:8ede47d38d10 299 } else { // Disable
phungductung 0:8ede47d38d10 300 if (event == IRQ_RISE) {
phungductung 0:8ede47d38d10 301 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
phungductung 0:8ede47d38d10 302 mode = STM_MODE_IT_FALLING;
phungductung 0:8ede47d38d10 303 obj->event = EDGE_FALL;
phungductung 0:8ede47d38d10 304 } else { // NONE or RISE
phungductung 0:8ede47d38d10 305 mode = STM_MODE_IT_EVT_RESET;
phungductung 0:8ede47d38d10 306 obj->event = EDGE_NONE;
phungductung 0:8ede47d38d10 307 }
phungductung 0:8ede47d38d10 308 }
phungductung 0:8ede47d38d10 309 if (event == IRQ_FALL) {
phungductung 0:8ede47d38d10 310 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
phungductung 0:8ede47d38d10 311 mode = STM_MODE_IT_RISING;
phungductung 0:8ede47d38d10 312 obj->event = EDGE_RISE;
phungductung 0:8ede47d38d10 313 } else { // NONE or FALL
phungductung 0:8ede47d38d10 314 mode = STM_MODE_IT_EVT_RESET;
phungductung 0:8ede47d38d10 315 obj->event = EDGE_NONE;
phungductung 0:8ede47d38d10 316 }
phungductung 0:8ede47d38d10 317 }
phungductung 0:8ede47d38d10 318 }
phungductung 0:8ede47d38d10 319
phungductung 0:8ede47d38d10 320 pin_function(obj->pin, STM_PIN_DATA(mode, pull, 0));
phungductung 0:8ede47d38d10 321 }
phungductung 0:8ede47d38d10 322
phungductung 0:8ede47d38d10 323 void gpio_irq_enable(gpio_irq_t *obj)
phungductung 0:8ede47d38d10 324 {
phungductung 0:8ede47d38d10 325 NVIC_EnableIRQ(obj->irq_n);
phungductung 0:8ede47d38d10 326 }
phungductung 0:8ede47d38d10 327
phungductung 0:8ede47d38d10 328 void gpio_irq_disable(gpio_irq_t *obj)
phungductung 0:8ede47d38d10 329 {
phungductung 0:8ede47d38d10 330 NVIC_DisableIRQ(obj->irq_n);
phungductung 0:8ede47d38d10 331 obj->event = EDGE_NONE;
phungductung 0:8ede47d38d10 332 }