PHung Tung / DISCO-F746_WAV_PLAYER

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SRC_STM32F7/targets/cmsis/core_cmInstr.h@0:8ede47d38d10, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:37:21 2019 +0000
Revision:
0:8ede47d38d10
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phungductung 0:8ede47d38d10 1 /**************************************************************************//**
phungductung 0:8ede47d38d10 2 * @file core_cmInstr.h
phungductung 0:8ede47d38d10 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
phungductung 0:8ede47d38d10 4 * @version V4.10
phungductung 0:8ede47d38d10 5 * @date 18. March 2015
phungductung 0:8ede47d38d10 6 *
phungductung 0:8ede47d38d10 7 * @note
phungductung 0:8ede47d38d10 8 *
phungductung 0:8ede47d38d10 9 ******************************************************************************/
phungductung 0:8ede47d38d10 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
phungductung 0:8ede47d38d10 11
phungductung 0:8ede47d38d10 12 All rights reserved.
phungductung 0:8ede47d38d10 13 Redistribution and use in source and binary forms, with or without
phungductung 0:8ede47d38d10 14 modification, are permitted provided that the following conditions are met:
phungductung 0:8ede47d38d10 15 - Redistributions of source code must retain the above copyright
phungductung 0:8ede47d38d10 16 notice, this list of conditions and the following disclaimer.
phungductung 0:8ede47d38d10 17 - Redistributions in binary form must reproduce the above copyright
phungductung 0:8ede47d38d10 18 notice, this list of conditions and the following disclaimer in the
phungductung 0:8ede47d38d10 19 documentation and/or other materials provided with the distribution.
phungductung 0:8ede47d38d10 20 - Neither the name of ARM nor the names of its contributors may be used
phungductung 0:8ede47d38d10 21 to endorse or promote products derived from this software without
phungductung 0:8ede47d38d10 22 specific prior written permission.
phungductung 0:8ede47d38d10 23 *
phungductung 0:8ede47d38d10 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:8ede47d38d10 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:8ede47d38d10 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
phungductung 0:8ede47d38d10 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
phungductung 0:8ede47d38d10 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
phungductung 0:8ede47d38d10 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
phungductung 0:8ede47d38d10 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
phungductung 0:8ede47d38d10 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
phungductung 0:8ede47d38d10 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
phungductung 0:8ede47d38d10 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
phungductung 0:8ede47d38d10 34 POSSIBILITY OF SUCH DAMAGE.
phungductung 0:8ede47d38d10 35 ---------------------------------------------------------------------------*/
phungductung 0:8ede47d38d10 36
phungductung 0:8ede47d38d10 37
phungductung 0:8ede47d38d10 38 #ifndef __CORE_CMINSTR_H
phungductung 0:8ede47d38d10 39 #define __CORE_CMINSTR_H
phungductung 0:8ede47d38d10 40
phungductung 0:8ede47d38d10 41
phungductung 0:8ede47d38d10 42 /* ########################## Core Instruction Access ######################### */
phungductung 0:8ede47d38d10 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
phungductung 0:8ede47d38d10 44 Access to dedicated instructions
phungductung 0:8ede47d38d10 45 @{
phungductung 0:8ede47d38d10 46 */
phungductung 0:8ede47d38d10 47
phungductung 0:8ede47d38d10 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
phungductung 0:8ede47d38d10 49 /* ARM armcc specific functions */
phungductung 0:8ede47d38d10 50
phungductung 0:8ede47d38d10 51 #if (__ARMCC_VERSION < 400677)
phungductung 0:8ede47d38d10 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
phungductung 0:8ede47d38d10 53 #endif
phungductung 0:8ede47d38d10 54
phungductung 0:8ede47d38d10 55
phungductung 0:8ede47d38d10 56 /** \brief No Operation
phungductung 0:8ede47d38d10 57
phungductung 0:8ede47d38d10 58 No Operation does nothing. This instruction can be used for code alignment purposes.
phungductung 0:8ede47d38d10 59 */
phungductung 0:8ede47d38d10 60 #define __NOP __nop
phungductung 0:8ede47d38d10 61
phungductung 0:8ede47d38d10 62
phungductung 0:8ede47d38d10 63 /** \brief Wait For Interrupt
phungductung 0:8ede47d38d10 64
phungductung 0:8ede47d38d10 65 Wait For Interrupt is a hint instruction that suspends execution
phungductung 0:8ede47d38d10 66 until one of a number of events occurs.
phungductung 0:8ede47d38d10 67 */
phungductung 0:8ede47d38d10 68 #define __WFI __wfi
phungductung 0:8ede47d38d10 69
phungductung 0:8ede47d38d10 70
phungductung 0:8ede47d38d10 71 /** \brief Wait For Event
phungductung 0:8ede47d38d10 72
phungductung 0:8ede47d38d10 73 Wait For Event is a hint instruction that permits the processor to enter
phungductung 0:8ede47d38d10 74 a low-power state until one of a number of events occurs.
phungductung 0:8ede47d38d10 75 */
phungductung 0:8ede47d38d10 76 #define __WFE __wfe
phungductung 0:8ede47d38d10 77
phungductung 0:8ede47d38d10 78
phungductung 0:8ede47d38d10 79 /** \brief Send Event
phungductung 0:8ede47d38d10 80
phungductung 0:8ede47d38d10 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
phungductung 0:8ede47d38d10 82 */
phungductung 0:8ede47d38d10 83 #define __SEV __sev
phungductung 0:8ede47d38d10 84
phungductung 0:8ede47d38d10 85
phungductung 0:8ede47d38d10 86 /** \brief Instruction Synchronization Barrier
phungductung 0:8ede47d38d10 87
phungductung 0:8ede47d38d10 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
phungductung 0:8ede47d38d10 89 so that all instructions following the ISB are fetched from cache or
phungductung 0:8ede47d38d10 90 memory, after the instruction has been completed.
phungductung 0:8ede47d38d10 91 */
phungductung 0:8ede47d38d10 92 #define __ISB() do {\
phungductung 0:8ede47d38d10 93 __schedule_barrier();\
phungductung 0:8ede47d38d10 94 __isb(0xF);\
phungductung 0:8ede47d38d10 95 __schedule_barrier();\
phungductung 0:8ede47d38d10 96 } while (0)
phungductung 0:8ede47d38d10 97
phungductung 0:8ede47d38d10 98 /** \brief Data Synchronization Barrier
phungductung 0:8ede47d38d10 99
phungductung 0:8ede47d38d10 100 This function acts as a special kind of Data Memory Barrier.
phungductung 0:8ede47d38d10 101 It completes when all explicit memory accesses before this instruction complete.
phungductung 0:8ede47d38d10 102 */
phungductung 0:8ede47d38d10 103 #define __DSB() do {\
phungductung 0:8ede47d38d10 104 __schedule_barrier();\
phungductung 0:8ede47d38d10 105 __dsb(0xF);\
phungductung 0:8ede47d38d10 106 __schedule_barrier();\
phungductung 0:8ede47d38d10 107 } while (0)
phungductung 0:8ede47d38d10 108
phungductung 0:8ede47d38d10 109 /** \brief Data Memory Barrier
phungductung 0:8ede47d38d10 110
phungductung 0:8ede47d38d10 111 This function ensures the apparent order of the explicit memory operations before
phungductung 0:8ede47d38d10 112 and after the instruction, without ensuring their completion.
phungductung 0:8ede47d38d10 113 */
phungductung 0:8ede47d38d10 114 #define __DMB() do {\
phungductung 0:8ede47d38d10 115 __schedule_barrier();\
phungductung 0:8ede47d38d10 116 __dmb(0xF);\
phungductung 0:8ede47d38d10 117 __schedule_barrier();\
phungductung 0:8ede47d38d10 118 } while (0)
phungductung 0:8ede47d38d10 119
phungductung 0:8ede47d38d10 120 /** \brief Reverse byte order (32 bit)
phungductung 0:8ede47d38d10 121
phungductung 0:8ede47d38d10 122 This function reverses the byte order in integer value.
phungductung 0:8ede47d38d10 123
phungductung 0:8ede47d38d10 124 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 125 \return Reversed value
phungductung 0:8ede47d38d10 126 */
phungductung 0:8ede47d38d10 127 #define __REV __rev
phungductung 0:8ede47d38d10 128
phungductung 0:8ede47d38d10 129
phungductung 0:8ede47d38d10 130 /** \brief Reverse byte order (16 bit)
phungductung 0:8ede47d38d10 131
phungductung 0:8ede47d38d10 132 This function reverses the byte order in two unsigned short values.
phungductung 0:8ede47d38d10 133
phungductung 0:8ede47d38d10 134 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 135 \return Reversed value
phungductung 0:8ede47d38d10 136 */
phungductung 0:8ede47d38d10 137 #ifndef __NO_EMBEDDED_ASM
phungductung 0:8ede47d38d10 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
phungductung 0:8ede47d38d10 139 {
phungductung 0:8ede47d38d10 140 rev16 r0, r0
phungductung 0:8ede47d38d10 141 bx lr
phungductung 0:8ede47d38d10 142 }
phungductung 0:8ede47d38d10 143 #endif
phungductung 0:8ede47d38d10 144
phungductung 0:8ede47d38d10 145 /** \brief Reverse byte order in signed short value
phungductung 0:8ede47d38d10 146
phungductung 0:8ede47d38d10 147 This function reverses the byte order in a signed short value with sign extension to integer.
phungductung 0:8ede47d38d10 148
phungductung 0:8ede47d38d10 149 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 150 \return Reversed value
phungductung 0:8ede47d38d10 151 */
phungductung 0:8ede47d38d10 152 #ifndef __NO_EMBEDDED_ASM
phungductung 0:8ede47d38d10 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
phungductung 0:8ede47d38d10 154 {
phungductung 0:8ede47d38d10 155 revsh r0, r0
phungductung 0:8ede47d38d10 156 bx lr
phungductung 0:8ede47d38d10 157 }
phungductung 0:8ede47d38d10 158 #endif
phungductung 0:8ede47d38d10 159
phungductung 0:8ede47d38d10 160
phungductung 0:8ede47d38d10 161 /** \brief Rotate Right in unsigned value (32 bit)
phungductung 0:8ede47d38d10 162
phungductung 0:8ede47d38d10 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
phungductung 0:8ede47d38d10 164
phungductung 0:8ede47d38d10 165 \param [in] value Value to rotate
phungductung 0:8ede47d38d10 166 \param [in] value Number of Bits to rotate
phungductung 0:8ede47d38d10 167 \return Rotated value
phungductung 0:8ede47d38d10 168 */
phungductung 0:8ede47d38d10 169 #define __ROR __ror
phungductung 0:8ede47d38d10 170
phungductung 0:8ede47d38d10 171
phungductung 0:8ede47d38d10 172 /** \brief Breakpoint
phungductung 0:8ede47d38d10 173
phungductung 0:8ede47d38d10 174 This function causes the processor to enter Debug state.
phungductung 0:8ede47d38d10 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
phungductung 0:8ede47d38d10 176
phungductung 0:8ede47d38d10 177 \param [in] value is ignored by the processor.
phungductung 0:8ede47d38d10 178 If required, a debugger can use it to store additional information about the breakpoint.
phungductung 0:8ede47d38d10 179 */
phungductung 0:8ede47d38d10 180 #define __BKPT(value) __breakpoint(value)
phungductung 0:8ede47d38d10 181
phungductung 0:8ede47d38d10 182
phungductung 0:8ede47d38d10 183 /** \brief Reverse bit order of value
phungductung 0:8ede47d38d10 184
phungductung 0:8ede47d38d10 185 This function reverses the bit order of the given value.
phungductung 0:8ede47d38d10 186
phungductung 0:8ede47d38d10 187 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 188 \return Reversed value
phungductung 0:8ede47d38d10 189 */
phungductung 0:8ede47d38d10 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
phungductung 0:8ede47d38d10 191 #define __RBIT __rbit
phungductung 0:8ede47d38d10 192 #else
phungductung 0:8ede47d38d10 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
phungductung 0:8ede47d38d10 194 {
phungductung 0:8ede47d38d10 195 uint32_t result;
phungductung 0:8ede47d38d10 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
phungductung 0:8ede47d38d10 197
phungductung 0:8ede47d38d10 198 result = value; // r will be reversed bits of v; first get LSB of v
phungductung 0:8ede47d38d10 199 for (value >>= 1; value; value >>= 1)
phungductung 0:8ede47d38d10 200 {
phungductung 0:8ede47d38d10 201 result <<= 1;
phungductung 0:8ede47d38d10 202 result |= value & 1;
phungductung 0:8ede47d38d10 203 s--;
phungductung 0:8ede47d38d10 204 }
phungductung 0:8ede47d38d10 205 result <<= s; // shift when v's highest bits are zero
phungductung 0:8ede47d38d10 206 return(result);
phungductung 0:8ede47d38d10 207 }
phungductung 0:8ede47d38d10 208 #endif
phungductung 0:8ede47d38d10 209
phungductung 0:8ede47d38d10 210
phungductung 0:8ede47d38d10 211 /** \brief Count leading zeros
phungductung 0:8ede47d38d10 212
phungductung 0:8ede47d38d10 213 This function counts the number of leading zeros of a data value.
phungductung 0:8ede47d38d10 214
phungductung 0:8ede47d38d10 215 \param [in] value Value to count the leading zeros
phungductung 0:8ede47d38d10 216 \return number of leading zeros in value
phungductung 0:8ede47d38d10 217 */
phungductung 0:8ede47d38d10 218 #define __CLZ __clz
phungductung 0:8ede47d38d10 219
phungductung 0:8ede47d38d10 220
phungductung 0:8ede47d38d10 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
phungductung 0:8ede47d38d10 222
phungductung 0:8ede47d38d10 223 /** \brief LDR Exclusive (8 bit)
phungductung 0:8ede47d38d10 224
phungductung 0:8ede47d38d10 225 This function executes a exclusive LDR instruction for 8 bit value.
phungductung 0:8ede47d38d10 226
phungductung 0:8ede47d38d10 227 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 228 \return value of type uint8_t at (*ptr)
phungductung 0:8ede47d38d10 229 */
phungductung 0:8ede47d38d10 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
phungductung 0:8ede47d38d10 231
phungductung 0:8ede47d38d10 232
phungductung 0:8ede47d38d10 233 /** \brief LDR Exclusive (16 bit)
phungductung 0:8ede47d38d10 234
phungductung 0:8ede47d38d10 235 This function executes a exclusive LDR instruction for 16 bit values.
phungductung 0:8ede47d38d10 236
phungductung 0:8ede47d38d10 237 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 238 \return value of type uint16_t at (*ptr)
phungductung 0:8ede47d38d10 239 */
phungductung 0:8ede47d38d10 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
phungductung 0:8ede47d38d10 241
phungductung 0:8ede47d38d10 242
phungductung 0:8ede47d38d10 243 /** \brief LDR Exclusive (32 bit)
phungductung 0:8ede47d38d10 244
phungductung 0:8ede47d38d10 245 This function executes a exclusive LDR instruction for 32 bit values.
phungductung 0:8ede47d38d10 246
phungductung 0:8ede47d38d10 247 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 248 \return value of type uint32_t at (*ptr)
phungductung 0:8ede47d38d10 249 */
phungductung 0:8ede47d38d10 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
phungductung 0:8ede47d38d10 251
phungductung 0:8ede47d38d10 252
phungductung 0:8ede47d38d10 253 /** \brief STR Exclusive (8 bit)
phungductung 0:8ede47d38d10 254
phungductung 0:8ede47d38d10 255 This function executes a exclusive STR instruction for 8 bit values.
phungductung 0:8ede47d38d10 256
phungductung 0:8ede47d38d10 257 \param [in] value Value to store
phungductung 0:8ede47d38d10 258 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 259 \return 0 Function succeeded
phungductung 0:8ede47d38d10 260 \return 1 Function failed
phungductung 0:8ede47d38d10 261 */
phungductung 0:8ede47d38d10 262 #define __STREXB(value, ptr) __strex(value, ptr)
phungductung 0:8ede47d38d10 263
phungductung 0:8ede47d38d10 264
phungductung 0:8ede47d38d10 265 /** \brief STR Exclusive (16 bit)
phungductung 0:8ede47d38d10 266
phungductung 0:8ede47d38d10 267 This function executes a exclusive STR instruction for 16 bit values.
phungductung 0:8ede47d38d10 268
phungductung 0:8ede47d38d10 269 \param [in] value Value to store
phungductung 0:8ede47d38d10 270 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 271 \return 0 Function succeeded
phungductung 0:8ede47d38d10 272 \return 1 Function failed
phungductung 0:8ede47d38d10 273 */
phungductung 0:8ede47d38d10 274 #define __STREXH(value, ptr) __strex(value, ptr)
phungductung 0:8ede47d38d10 275
phungductung 0:8ede47d38d10 276
phungductung 0:8ede47d38d10 277 /** \brief STR Exclusive (32 bit)
phungductung 0:8ede47d38d10 278
phungductung 0:8ede47d38d10 279 This function executes a exclusive STR instruction for 32 bit values.
phungductung 0:8ede47d38d10 280
phungductung 0:8ede47d38d10 281 \param [in] value Value to store
phungductung 0:8ede47d38d10 282 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 283 \return 0 Function succeeded
phungductung 0:8ede47d38d10 284 \return 1 Function failed
phungductung 0:8ede47d38d10 285 */
phungductung 0:8ede47d38d10 286 #define __STREXW(value, ptr) __strex(value, ptr)
phungductung 0:8ede47d38d10 287
phungductung 0:8ede47d38d10 288
phungductung 0:8ede47d38d10 289 /** \brief Remove the exclusive lock
phungductung 0:8ede47d38d10 290
phungductung 0:8ede47d38d10 291 This function removes the exclusive lock which is created by LDREX.
phungductung 0:8ede47d38d10 292
phungductung 0:8ede47d38d10 293 */
phungductung 0:8ede47d38d10 294 #define __CLREX __clrex
phungductung 0:8ede47d38d10 295
phungductung 0:8ede47d38d10 296
phungductung 0:8ede47d38d10 297 /** \brief Signed Saturate
phungductung 0:8ede47d38d10 298
phungductung 0:8ede47d38d10 299 This function saturates a signed value.
phungductung 0:8ede47d38d10 300
phungductung 0:8ede47d38d10 301 \param [in] value Value to be saturated
phungductung 0:8ede47d38d10 302 \param [in] sat Bit position to saturate to (1..32)
phungductung 0:8ede47d38d10 303 \return Saturated value
phungductung 0:8ede47d38d10 304 */
phungductung 0:8ede47d38d10 305 #define __SSAT __ssat
phungductung 0:8ede47d38d10 306
phungductung 0:8ede47d38d10 307
phungductung 0:8ede47d38d10 308 /** \brief Unsigned Saturate
phungductung 0:8ede47d38d10 309
phungductung 0:8ede47d38d10 310 This function saturates an unsigned value.
phungductung 0:8ede47d38d10 311
phungductung 0:8ede47d38d10 312 \param [in] value Value to be saturated
phungductung 0:8ede47d38d10 313 \param [in] sat Bit position to saturate to (0..31)
phungductung 0:8ede47d38d10 314 \return Saturated value
phungductung 0:8ede47d38d10 315 */
phungductung 0:8ede47d38d10 316 #define __USAT __usat
phungductung 0:8ede47d38d10 317
phungductung 0:8ede47d38d10 318
phungductung 0:8ede47d38d10 319 /** \brief Rotate Right with Extend (32 bit)
phungductung 0:8ede47d38d10 320
phungductung 0:8ede47d38d10 321 This function moves each bit of a bitstring right by one bit.
phungductung 0:8ede47d38d10 322 The carry input is shifted in at the left end of the bitstring.
phungductung 0:8ede47d38d10 323
phungductung 0:8ede47d38d10 324 \param [in] value Value to rotate
phungductung 0:8ede47d38d10 325 \return Rotated value
phungductung 0:8ede47d38d10 326 */
phungductung 0:8ede47d38d10 327 #ifndef __NO_EMBEDDED_ASM
phungductung 0:8ede47d38d10 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
phungductung 0:8ede47d38d10 329 {
phungductung 0:8ede47d38d10 330 rrx r0, r0
phungductung 0:8ede47d38d10 331 bx lr
phungductung 0:8ede47d38d10 332 }
phungductung 0:8ede47d38d10 333 #endif
phungductung 0:8ede47d38d10 334
phungductung 0:8ede47d38d10 335
phungductung 0:8ede47d38d10 336 /** \brief LDRT Unprivileged (8 bit)
phungductung 0:8ede47d38d10 337
phungductung 0:8ede47d38d10 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
phungductung 0:8ede47d38d10 339
phungductung 0:8ede47d38d10 340 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 341 \return value of type uint8_t at (*ptr)
phungductung 0:8ede47d38d10 342 */
phungductung 0:8ede47d38d10 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
phungductung 0:8ede47d38d10 344
phungductung 0:8ede47d38d10 345
phungductung 0:8ede47d38d10 346 /** \brief LDRT Unprivileged (16 bit)
phungductung 0:8ede47d38d10 347
phungductung 0:8ede47d38d10 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
phungductung 0:8ede47d38d10 349
phungductung 0:8ede47d38d10 350 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 351 \return value of type uint16_t at (*ptr)
phungductung 0:8ede47d38d10 352 */
phungductung 0:8ede47d38d10 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
phungductung 0:8ede47d38d10 354
phungductung 0:8ede47d38d10 355
phungductung 0:8ede47d38d10 356 /** \brief LDRT Unprivileged (32 bit)
phungductung 0:8ede47d38d10 357
phungductung 0:8ede47d38d10 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
phungductung 0:8ede47d38d10 359
phungductung 0:8ede47d38d10 360 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 361 \return value of type uint32_t at (*ptr)
phungductung 0:8ede47d38d10 362 */
phungductung 0:8ede47d38d10 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
phungductung 0:8ede47d38d10 364
phungductung 0:8ede47d38d10 365
phungductung 0:8ede47d38d10 366 /** \brief STRT Unprivileged (8 bit)
phungductung 0:8ede47d38d10 367
phungductung 0:8ede47d38d10 368 This function executes a Unprivileged STRT instruction for 8 bit values.
phungductung 0:8ede47d38d10 369
phungductung 0:8ede47d38d10 370 \param [in] value Value to store
phungductung 0:8ede47d38d10 371 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 372 */
phungductung 0:8ede47d38d10 373 #define __STRBT(value, ptr) __strt(value, ptr)
phungductung 0:8ede47d38d10 374
phungductung 0:8ede47d38d10 375
phungductung 0:8ede47d38d10 376 /** \brief STRT Unprivileged (16 bit)
phungductung 0:8ede47d38d10 377
phungductung 0:8ede47d38d10 378 This function executes a Unprivileged STRT instruction for 16 bit values.
phungductung 0:8ede47d38d10 379
phungductung 0:8ede47d38d10 380 \param [in] value Value to store
phungductung 0:8ede47d38d10 381 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 382 */
phungductung 0:8ede47d38d10 383 #define __STRHT(value, ptr) __strt(value, ptr)
phungductung 0:8ede47d38d10 384
phungductung 0:8ede47d38d10 385
phungductung 0:8ede47d38d10 386 /** \brief STRT Unprivileged (32 bit)
phungductung 0:8ede47d38d10 387
phungductung 0:8ede47d38d10 388 This function executes a Unprivileged STRT instruction for 32 bit values.
phungductung 0:8ede47d38d10 389
phungductung 0:8ede47d38d10 390 \param [in] value Value to store
phungductung 0:8ede47d38d10 391 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 392 */
phungductung 0:8ede47d38d10 393 #define __STRT(value, ptr) __strt(value, ptr)
phungductung 0:8ede47d38d10 394
phungductung 0:8ede47d38d10 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
phungductung 0:8ede47d38d10 396
phungductung 0:8ede47d38d10 397
phungductung 0:8ede47d38d10 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
phungductung 0:8ede47d38d10 399 /* GNU gcc specific functions */
phungductung 0:8ede47d38d10 400
phungductung 0:8ede47d38d10 401 /* Define macros for porting to both thumb1 and thumb2.
phungductung 0:8ede47d38d10 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
phungductung 0:8ede47d38d10 403 * Otherwise, use general registers, specified by constrant "r" */
phungductung 0:8ede47d38d10 404 #if defined (__thumb__) && !defined (__thumb2__)
phungductung 0:8ede47d38d10 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
phungductung 0:8ede47d38d10 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
phungductung 0:8ede47d38d10 407 #else
phungductung 0:8ede47d38d10 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
phungductung 0:8ede47d38d10 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
phungductung 0:8ede47d38d10 410 #endif
phungductung 0:8ede47d38d10 411
phungductung 0:8ede47d38d10 412 /** \brief No Operation
phungductung 0:8ede47d38d10 413
phungductung 0:8ede47d38d10 414 No Operation does nothing. This instruction can be used for code alignment purposes.
phungductung 0:8ede47d38d10 415 */
phungductung 0:8ede47d38d10 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
phungductung 0:8ede47d38d10 417 {
phungductung 0:8ede47d38d10 418 __ASM volatile ("nop");
phungductung 0:8ede47d38d10 419 }
phungductung 0:8ede47d38d10 420
phungductung 0:8ede47d38d10 421
phungductung 0:8ede47d38d10 422 /** \brief Wait For Interrupt
phungductung 0:8ede47d38d10 423
phungductung 0:8ede47d38d10 424 Wait For Interrupt is a hint instruction that suspends execution
phungductung 0:8ede47d38d10 425 until one of a number of events occurs.
phungductung 0:8ede47d38d10 426 */
phungductung 0:8ede47d38d10 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
phungductung 0:8ede47d38d10 428 {
phungductung 0:8ede47d38d10 429 __ASM volatile ("wfi");
phungductung 0:8ede47d38d10 430 }
phungductung 0:8ede47d38d10 431
phungductung 0:8ede47d38d10 432
phungductung 0:8ede47d38d10 433 /** \brief Wait For Event
phungductung 0:8ede47d38d10 434
phungductung 0:8ede47d38d10 435 Wait For Event is a hint instruction that permits the processor to enter
phungductung 0:8ede47d38d10 436 a low-power state until one of a number of events occurs.
phungductung 0:8ede47d38d10 437 */
phungductung 0:8ede47d38d10 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
phungductung 0:8ede47d38d10 439 {
phungductung 0:8ede47d38d10 440 __ASM volatile ("wfe");
phungductung 0:8ede47d38d10 441 }
phungductung 0:8ede47d38d10 442
phungductung 0:8ede47d38d10 443
phungductung 0:8ede47d38d10 444 /** \brief Send Event
phungductung 0:8ede47d38d10 445
phungductung 0:8ede47d38d10 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
phungductung 0:8ede47d38d10 447 */
phungductung 0:8ede47d38d10 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
phungductung 0:8ede47d38d10 449 {
phungductung 0:8ede47d38d10 450 __ASM volatile ("sev");
phungductung 0:8ede47d38d10 451 }
phungductung 0:8ede47d38d10 452
phungductung 0:8ede47d38d10 453
phungductung 0:8ede47d38d10 454 /** \brief Instruction Synchronization Barrier
phungductung 0:8ede47d38d10 455
phungductung 0:8ede47d38d10 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
phungductung 0:8ede47d38d10 457 so that all instructions following the ISB are fetched from cache or
phungductung 0:8ede47d38d10 458 memory, after the instruction has been completed.
phungductung 0:8ede47d38d10 459 */
phungductung 0:8ede47d38d10 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
phungductung 0:8ede47d38d10 461 {
phungductung 0:8ede47d38d10 462 __ASM volatile ("isb 0xF":::"memory");
phungductung 0:8ede47d38d10 463 }
phungductung 0:8ede47d38d10 464
phungductung 0:8ede47d38d10 465
phungductung 0:8ede47d38d10 466 /** \brief Data Synchronization Barrier
phungductung 0:8ede47d38d10 467
phungductung 0:8ede47d38d10 468 This function acts as a special kind of Data Memory Barrier.
phungductung 0:8ede47d38d10 469 It completes when all explicit memory accesses before this instruction complete.
phungductung 0:8ede47d38d10 470 */
phungductung 0:8ede47d38d10 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
phungductung 0:8ede47d38d10 472 {
phungductung 0:8ede47d38d10 473 __ASM volatile ("dsb 0xF":::"memory");
phungductung 0:8ede47d38d10 474 }
phungductung 0:8ede47d38d10 475
phungductung 0:8ede47d38d10 476
phungductung 0:8ede47d38d10 477 /** \brief Data Memory Barrier
phungductung 0:8ede47d38d10 478
phungductung 0:8ede47d38d10 479 This function ensures the apparent order of the explicit memory operations before
phungductung 0:8ede47d38d10 480 and after the instruction, without ensuring their completion.
phungductung 0:8ede47d38d10 481 */
phungductung 0:8ede47d38d10 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
phungductung 0:8ede47d38d10 483 {
phungductung 0:8ede47d38d10 484 __ASM volatile ("dmb 0xF":::"memory");
phungductung 0:8ede47d38d10 485 }
phungductung 0:8ede47d38d10 486
phungductung 0:8ede47d38d10 487
phungductung 0:8ede47d38d10 488 /** \brief Reverse byte order (32 bit)
phungductung 0:8ede47d38d10 489
phungductung 0:8ede47d38d10 490 This function reverses the byte order in integer value.
phungductung 0:8ede47d38d10 491
phungductung 0:8ede47d38d10 492 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 493 \return Reversed value
phungductung 0:8ede47d38d10 494 */
phungductung 0:8ede47d38d10 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
phungductung 0:8ede47d38d10 496 {
phungductung 0:8ede47d38d10 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
phungductung 0:8ede47d38d10 498 return __builtin_bswap32(value);
phungductung 0:8ede47d38d10 499 #else
phungductung 0:8ede47d38d10 500 uint32_t result;
phungductung 0:8ede47d38d10 501
phungductung 0:8ede47d38d10 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
phungductung 0:8ede47d38d10 503 return(result);
phungductung 0:8ede47d38d10 504 #endif
phungductung 0:8ede47d38d10 505 }
phungductung 0:8ede47d38d10 506
phungductung 0:8ede47d38d10 507
phungductung 0:8ede47d38d10 508 /** \brief Reverse byte order (16 bit)
phungductung 0:8ede47d38d10 509
phungductung 0:8ede47d38d10 510 This function reverses the byte order in two unsigned short values.
phungductung 0:8ede47d38d10 511
phungductung 0:8ede47d38d10 512 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 513 \return Reversed value
phungductung 0:8ede47d38d10 514 */
phungductung 0:8ede47d38d10 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
phungductung 0:8ede47d38d10 516 {
phungductung 0:8ede47d38d10 517 uint32_t result;
phungductung 0:8ede47d38d10 518
phungductung 0:8ede47d38d10 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
phungductung 0:8ede47d38d10 520 return(result);
phungductung 0:8ede47d38d10 521 }
phungductung 0:8ede47d38d10 522
phungductung 0:8ede47d38d10 523
phungductung 0:8ede47d38d10 524 /** \brief Reverse byte order in signed short value
phungductung 0:8ede47d38d10 525
phungductung 0:8ede47d38d10 526 This function reverses the byte order in a signed short value with sign extension to integer.
phungductung 0:8ede47d38d10 527
phungductung 0:8ede47d38d10 528 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 529 \return Reversed value
phungductung 0:8ede47d38d10 530 */
phungductung 0:8ede47d38d10 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
phungductung 0:8ede47d38d10 532 {
phungductung 0:8ede47d38d10 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
phungductung 0:8ede47d38d10 534 return (short)__builtin_bswap16(value);
phungductung 0:8ede47d38d10 535 #else
phungductung 0:8ede47d38d10 536 uint32_t result;
phungductung 0:8ede47d38d10 537
phungductung 0:8ede47d38d10 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
phungductung 0:8ede47d38d10 539 return(result);
phungductung 0:8ede47d38d10 540 #endif
phungductung 0:8ede47d38d10 541 }
phungductung 0:8ede47d38d10 542
phungductung 0:8ede47d38d10 543
phungductung 0:8ede47d38d10 544 /** \brief Rotate Right in unsigned value (32 bit)
phungductung 0:8ede47d38d10 545
phungductung 0:8ede47d38d10 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
phungductung 0:8ede47d38d10 547
phungductung 0:8ede47d38d10 548 \param [in] value Value to rotate
phungductung 0:8ede47d38d10 549 \param [in] value Number of Bits to rotate
phungductung 0:8ede47d38d10 550 \return Rotated value
phungductung 0:8ede47d38d10 551 */
phungductung 0:8ede47d38d10 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
phungductung 0:8ede47d38d10 553 {
phungductung 0:8ede47d38d10 554 return (op1 >> op2) | (op1 << (32 - op2));
phungductung 0:8ede47d38d10 555 }
phungductung 0:8ede47d38d10 556
phungductung 0:8ede47d38d10 557
phungductung 0:8ede47d38d10 558 /** \brief Breakpoint
phungductung 0:8ede47d38d10 559
phungductung 0:8ede47d38d10 560 This function causes the processor to enter Debug state.
phungductung 0:8ede47d38d10 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
phungductung 0:8ede47d38d10 562
phungductung 0:8ede47d38d10 563 \param [in] value is ignored by the processor.
phungductung 0:8ede47d38d10 564 If required, a debugger can use it to store additional information about the breakpoint.
phungductung 0:8ede47d38d10 565 */
phungductung 0:8ede47d38d10 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
phungductung 0:8ede47d38d10 567
phungductung 0:8ede47d38d10 568
phungductung 0:8ede47d38d10 569 /** \brief Reverse bit order of value
phungductung 0:8ede47d38d10 570
phungductung 0:8ede47d38d10 571 This function reverses the bit order of the given value.
phungductung 0:8ede47d38d10 572
phungductung 0:8ede47d38d10 573 \param [in] value Value to reverse
phungductung 0:8ede47d38d10 574 \return Reversed value
phungductung 0:8ede47d38d10 575 */
phungductung 0:8ede47d38d10 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
phungductung 0:8ede47d38d10 577 {
phungductung 0:8ede47d38d10 578 uint32_t result;
phungductung 0:8ede47d38d10 579
phungductung 0:8ede47d38d10 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
phungductung 0:8ede47d38d10 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
phungductung 0:8ede47d38d10 582 #else
phungductung 0:8ede47d38d10 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
phungductung 0:8ede47d38d10 584
phungductung 0:8ede47d38d10 585 result = value; // r will be reversed bits of v; first get LSB of v
phungductung 0:8ede47d38d10 586 for (value >>= 1; value; value >>= 1)
phungductung 0:8ede47d38d10 587 {
phungductung 0:8ede47d38d10 588 result <<= 1;
phungductung 0:8ede47d38d10 589 result |= value & 1;
phungductung 0:8ede47d38d10 590 s--;
phungductung 0:8ede47d38d10 591 }
phungductung 0:8ede47d38d10 592 result <<= s; // shift when v's highest bits are zero
phungductung 0:8ede47d38d10 593 #endif
phungductung 0:8ede47d38d10 594 return(result);
phungductung 0:8ede47d38d10 595 }
phungductung 0:8ede47d38d10 596
phungductung 0:8ede47d38d10 597
phungductung 0:8ede47d38d10 598 /** \brief Count leading zeros
phungductung 0:8ede47d38d10 599
phungductung 0:8ede47d38d10 600 This function counts the number of leading zeros of a data value.
phungductung 0:8ede47d38d10 601
phungductung 0:8ede47d38d10 602 \param [in] value Value to count the leading zeros
phungductung 0:8ede47d38d10 603 \return number of leading zeros in value
phungductung 0:8ede47d38d10 604 */
phungductung 0:8ede47d38d10 605 #define __CLZ __builtin_clz
phungductung 0:8ede47d38d10 606
phungductung 0:8ede47d38d10 607
phungductung 0:8ede47d38d10 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
phungductung 0:8ede47d38d10 609
phungductung 0:8ede47d38d10 610 /** \brief LDR Exclusive (8 bit)
phungductung 0:8ede47d38d10 611
phungductung 0:8ede47d38d10 612 This function executes a exclusive LDR instruction for 8 bit value.
phungductung 0:8ede47d38d10 613
phungductung 0:8ede47d38d10 614 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 615 \return value of type uint8_t at (*ptr)
phungductung 0:8ede47d38d10 616 */
phungductung 0:8ede47d38d10 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
phungductung 0:8ede47d38d10 618 {
phungductung 0:8ede47d38d10 619 uint32_t result;
phungductung 0:8ede47d38d10 620
phungductung 0:8ede47d38d10 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
phungductung 0:8ede47d38d10 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
phungductung 0:8ede47d38d10 623 #else
phungductung 0:8ede47d38d10 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
phungductung 0:8ede47d38d10 625 accepted by assembler. So has to use following less efficient pattern.
phungductung 0:8ede47d38d10 626 */
phungductung 0:8ede47d38d10 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
phungductung 0:8ede47d38d10 628 #endif
phungductung 0:8ede47d38d10 629 return ((uint8_t) result); /* Add explicit type cast here */
phungductung 0:8ede47d38d10 630 }
phungductung 0:8ede47d38d10 631
phungductung 0:8ede47d38d10 632
phungductung 0:8ede47d38d10 633 /** \brief LDR Exclusive (16 bit)
phungductung 0:8ede47d38d10 634
phungductung 0:8ede47d38d10 635 This function executes a exclusive LDR instruction for 16 bit values.
phungductung 0:8ede47d38d10 636
phungductung 0:8ede47d38d10 637 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 638 \return value of type uint16_t at (*ptr)
phungductung 0:8ede47d38d10 639 */
phungductung 0:8ede47d38d10 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
phungductung 0:8ede47d38d10 641 {
phungductung 0:8ede47d38d10 642 uint32_t result;
phungductung 0:8ede47d38d10 643
phungductung 0:8ede47d38d10 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
phungductung 0:8ede47d38d10 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
phungductung 0:8ede47d38d10 646 #else
phungductung 0:8ede47d38d10 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
phungductung 0:8ede47d38d10 648 accepted by assembler. So has to use following less efficient pattern.
phungductung 0:8ede47d38d10 649 */
phungductung 0:8ede47d38d10 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
phungductung 0:8ede47d38d10 651 #endif
phungductung 0:8ede47d38d10 652 return ((uint16_t) result); /* Add explicit type cast here */
phungductung 0:8ede47d38d10 653 }
phungductung 0:8ede47d38d10 654
phungductung 0:8ede47d38d10 655
phungductung 0:8ede47d38d10 656 /** \brief LDR Exclusive (32 bit)
phungductung 0:8ede47d38d10 657
phungductung 0:8ede47d38d10 658 This function executes a exclusive LDR instruction for 32 bit values.
phungductung 0:8ede47d38d10 659
phungductung 0:8ede47d38d10 660 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 661 \return value of type uint32_t at (*ptr)
phungductung 0:8ede47d38d10 662 */
phungductung 0:8ede47d38d10 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
phungductung 0:8ede47d38d10 664 {
phungductung 0:8ede47d38d10 665 uint32_t result;
phungductung 0:8ede47d38d10 666
phungductung 0:8ede47d38d10 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
phungductung 0:8ede47d38d10 668 return(result);
phungductung 0:8ede47d38d10 669 }
phungductung 0:8ede47d38d10 670
phungductung 0:8ede47d38d10 671
phungductung 0:8ede47d38d10 672 /** \brief STR Exclusive (8 bit)
phungductung 0:8ede47d38d10 673
phungductung 0:8ede47d38d10 674 This function executes a exclusive STR instruction for 8 bit values.
phungductung 0:8ede47d38d10 675
phungductung 0:8ede47d38d10 676 \param [in] value Value to store
phungductung 0:8ede47d38d10 677 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 678 \return 0 Function succeeded
phungductung 0:8ede47d38d10 679 \return 1 Function failed
phungductung 0:8ede47d38d10 680 */
phungductung 0:8ede47d38d10 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
phungductung 0:8ede47d38d10 682 {
phungductung 0:8ede47d38d10 683 uint32_t result;
phungductung 0:8ede47d38d10 684
phungductung 0:8ede47d38d10 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
phungductung 0:8ede47d38d10 686 return(result);
phungductung 0:8ede47d38d10 687 }
phungductung 0:8ede47d38d10 688
phungductung 0:8ede47d38d10 689
phungductung 0:8ede47d38d10 690 /** \brief STR Exclusive (16 bit)
phungductung 0:8ede47d38d10 691
phungductung 0:8ede47d38d10 692 This function executes a exclusive STR instruction for 16 bit values.
phungductung 0:8ede47d38d10 693
phungductung 0:8ede47d38d10 694 \param [in] value Value to store
phungductung 0:8ede47d38d10 695 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 696 \return 0 Function succeeded
phungductung 0:8ede47d38d10 697 \return 1 Function failed
phungductung 0:8ede47d38d10 698 */
phungductung 0:8ede47d38d10 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
phungductung 0:8ede47d38d10 700 {
phungductung 0:8ede47d38d10 701 uint32_t result;
phungductung 0:8ede47d38d10 702
phungductung 0:8ede47d38d10 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
phungductung 0:8ede47d38d10 704 return(result);
phungductung 0:8ede47d38d10 705 }
phungductung 0:8ede47d38d10 706
phungductung 0:8ede47d38d10 707
phungductung 0:8ede47d38d10 708 /** \brief STR Exclusive (32 bit)
phungductung 0:8ede47d38d10 709
phungductung 0:8ede47d38d10 710 This function executes a exclusive STR instruction for 32 bit values.
phungductung 0:8ede47d38d10 711
phungductung 0:8ede47d38d10 712 \param [in] value Value to store
phungductung 0:8ede47d38d10 713 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 714 \return 0 Function succeeded
phungductung 0:8ede47d38d10 715 \return 1 Function failed
phungductung 0:8ede47d38d10 716 */
phungductung 0:8ede47d38d10 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
phungductung 0:8ede47d38d10 718 {
phungductung 0:8ede47d38d10 719 uint32_t result;
phungductung 0:8ede47d38d10 720
phungductung 0:8ede47d38d10 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
phungductung 0:8ede47d38d10 722 return(result);
phungductung 0:8ede47d38d10 723 }
phungductung 0:8ede47d38d10 724
phungductung 0:8ede47d38d10 725
phungductung 0:8ede47d38d10 726 /** \brief Remove the exclusive lock
phungductung 0:8ede47d38d10 727
phungductung 0:8ede47d38d10 728 This function removes the exclusive lock which is created by LDREX.
phungductung 0:8ede47d38d10 729
phungductung 0:8ede47d38d10 730 */
phungductung 0:8ede47d38d10 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
phungductung 0:8ede47d38d10 732 {
phungductung 0:8ede47d38d10 733 __ASM volatile ("clrex" ::: "memory");
phungductung 0:8ede47d38d10 734 }
phungductung 0:8ede47d38d10 735
phungductung 0:8ede47d38d10 736
phungductung 0:8ede47d38d10 737 /** \brief Signed Saturate
phungductung 0:8ede47d38d10 738
phungductung 0:8ede47d38d10 739 This function saturates a signed value.
phungductung 0:8ede47d38d10 740
phungductung 0:8ede47d38d10 741 \param [in] value Value to be saturated
phungductung 0:8ede47d38d10 742 \param [in] sat Bit position to saturate to (1..32)
phungductung 0:8ede47d38d10 743 \return Saturated value
phungductung 0:8ede47d38d10 744 */
phungductung 0:8ede47d38d10 745 #define __SSAT(ARG1,ARG2) \
phungductung 0:8ede47d38d10 746 ({ \
phungductung 0:8ede47d38d10 747 uint32_t __RES, __ARG1 = (ARG1); \
phungductung 0:8ede47d38d10 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
phungductung 0:8ede47d38d10 749 __RES; \
phungductung 0:8ede47d38d10 750 })
phungductung 0:8ede47d38d10 751
phungductung 0:8ede47d38d10 752
phungductung 0:8ede47d38d10 753 /** \brief Unsigned Saturate
phungductung 0:8ede47d38d10 754
phungductung 0:8ede47d38d10 755 This function saturates an unsigned value.
phungductung 0:8ede47d38d10 756
phungductung 0:8ede47d38d10 757 \param [in] value Value to be saturated
phungductung 0:8ede47d38d10 758 \param [in] sat Bit position to saturate to (0..31)
phungductung 0:8ede47d38d10 759 \return Saturated value
phungductung 0:8ede47d38d10 760 */
phungductung 0:8ede47d38d10 761 #define __USAT(ARG1,ARG2) \
phungductung 0:8ede47d38d10 762 ({ \
phungductung 0:8ede47d38d10 763 uint32_t __RES, __ARG1 = (ARG1); \
phungductung 0:8ede47d38d10 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
phungductung 0:8ede47d38d10 765 __RES; \
phungductung 0:8ede47d38d10 766 })
phungductung 0:8ede47d38d10 767
phungductung 0:8ede47d38d10 768
phungductung 0:8ede47d38d10 769 /** \brief Rotate Right with Extend (32 bit)
phungductung 0:8ede47d38d10 770
phungductung 0:8ede47d38d10 771 This function moves each bit of a bitstring right by one bit.
phungductung 0:8ede47d38d10 772 The carry input is shifted in at the left end of the bitstring.
phungductung 0:8ede47d38d10 773
phungductung 0:8ede47d38d10 774 \param [in] value Value to rotate
phungductung 0:8ede47d38d10 775 \return Rotated value
phungductung 0:8ede47d38d10 776 */
phungductung 0:8ede47d38d10 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
phungductung 0:8ede47d38d10 778 {
phungductung 0:8ede47d38d10 779 uint32_t result;
phungductung 0:8ede47d38d10 780
phungductung 0:8ede47d38d10 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
phungductung 0:8ede47d38d10 782 return(result);
phungductung 0:8ede47d38d10 783 }
phungductung 0:8ede47d38d10 784
phungductung 0:8ede47d38d10 785
phungductung 0:8ede47d38d10 786 /** \brief LDRT Unprivileged (8 bit)
phungductung 0:8ede47d38d10 787
phungductung 0:8ede47d38d10 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
phungductung 0:8ede47d38d10 789
phungductung 0:8ede47d38d10 790 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 791 \return value of type uint8_t at (*ptr)
phungductung 0:8ede47d38d10 792 */
phungductung 0:8ede47d38d10 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
phungductung 0:8ede47d38d10 794 {
phungductung 0:8ede47d38d10 795 uint32_t result;
phungductung 0:8ede47d38d10 796
phungductung 0:8ede47d38d10 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
phungductung 0:8ede47d38d10 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
phungductung 0:8ede47d38d10 799 #else
phungductung 0:8ede47d38d10 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
phungductung 0:8ede47d38d10 801 accepted by assembler. So has to use following less efficient pattern.
phungductung 0:8ede47d38d10 802 */
phungductung 0:8ede47d38d10 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
phungductung 0:8ede47d38d10 804 #endif
phungductung 0:8ede47d38d10 805 return ((uint8_t) result); /* Add explicit type cast here */
phungductung 0:8ede47d38d10 806 }
phungductung 0:8ede47d38d10 807
phungductung 0:8ede47d38d10 808
phungductung 0:8ede47d38d10 809 /** \brief LDRT Unprivileged (16 bit)
phungductung 0:8ede47d38d10 810
phungductung 0:8ede47d38d10 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
phungductung 0:8ede47d38d10 812
phungductung 0:8ede47d38d10 813 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 814 \return value of type uint16_t at (*ptr)
phungductung 0:8ede47d38d10 815 */
phungductung 0:8ede47d38d10 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
phungductung 0:8ede47d38d10 817 {
phungductung 0:8ede47d38d10 818 uint32_t result;
phungductung 0:8ede47d38d10 819
phungductung 0:8ede47d38d10 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
phungductung 0:8ede47d38d10 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
phungductung 0:8ede47d38d10 822 #else
phungductung 0:8ede47d38d10 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
phungductung 0:8ede47d38d10 824 accepted by assembler. So has to use following less efficient pattern.
phungductung 0:8ede47d38d10 825 */
phungductung 0:8ede47d38d10 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
phungductung 0:8ede47d38d10 827 #endif
phungductung 0:8ede47d38d10 828 return ((uint16_t) result); /* Add explicit type cast here */
phungductung 0:8ede47d38d10 829 }
phungductung 0:8ede47d38d10 830
phungductung 0:8ede47d38d10 831
phungductung 0:8ede47d38d10 832 /** \brief LDRT Unprivileged (32 bit)
phungductung 0:8ede47d38d10 833
phungductung 0:8ede47d38d10 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
phungductung 0:8ede47d38d10 835
phungductung 0:8ede47d38d10 836 \param [in] ptr Pointer to data
phungductung 0:8ede47d38d10 837 \return value of type uint32_t at (*ptr)
phungductung 0:8ede47d38d10 838 */
phungductung 0:8ede47d38d10 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
phungductung 0:8ede47d38d10 840 {
phungductung 0:8ede47d38d10 841 uint32_t result;
phungductung 0:8ede47d38d10 842
phungductung 0:8ede47d38d10 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
phungductung 0:8ede47d38d10 844 return(result);
phungductung 0:8ede47d38d10 845 }
phungductung 0:8ede47d38d10 846
phungductung 0:8ede47d38d10 847
phungductung 0:8ede47d38d10 848 /** \brief STRT Unprivileged (8 bit)
phungductung 0:8ede47d38d10 849
phungductung 0:8ede47d38d10 850 This function executes a Unprivileged STRT instruction for 8 bit values.
phungductung 0:8ede47d38d10 851
phungductung 0:8ede47d38d10 852 \param [in] value Value to store
phungductung 0:8ede47d38d10 853 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 854 */
phungductung 0:8ede47d38d10 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
phungductung 0:8ede47d38d10 856 {
phungductung 0:8ede47d38d10 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
phungductung 0:8ede47d38d10 858 }
phungductung 0:8ede47d38d10 859
phungductung 0:8ede47d38d10 860
phungductung 0:8ede47d38d10 861 /** \brief STRT Unprivileged (16 bit)
phungductung 0:8ede47d38d10 862
phungductung 0:8ede47d38d10 863 This function executes a Unprivileged STRT instruction for 16 bit values.
phungductung 0:8ede47d38d10 864
phungductung 0:8ede47d38d10 865 \param [in] value Value to store
phungductung 0:8ede47d38d10 866 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 867 */
phungductung 0:8ede47d38d10 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
phungductung 0:8ede47d38d10 869 {
phungductung 0:8ede47d38d10 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
phungductung 0:8ede47d38d10 871 }
phungductung 0:8ede47d38d10 872
phungductung 0:8ede47d38d10 873
phungductung 0:8ede47d38d10 874 /** \brief STRT Unprivileged (32 bit)
phungductung 0:8ede47d38d10 875
phungductung 0:8ede47d38d10 876 This function executes a Unprivileged STRT instruction for 32 bit values.
phungductung 0:8ede47d38d10 877
phungductung 0:8ede47d38d10 878 \param [in] value Value to store
phungductung 0:8ede47d38d10 879 \param [in] ptr Pointer to location
phungductung 0:8ede47d38d10 880 */
phungductung 0:8ede47d38d10 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
phungductung 0:8ede47d38d10 882 {
phungductung 0:8ede47d38d10 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
phungductung 0:8ede47d38d10 884 }
phungductung 0:8ede47d38d10 885
phungductung 0:8ede47d38d10 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
phungductung 0:8ede47d38d10 887
phungductung 0:8ede47d38d10 888
phungductung 0:8ede47d38d10 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
phungductung 0:8ede47d38d10 890 /* IAR iccarm specific functions */
phungductung 0:8ede47d38d10 891 #include <cmsis_iar.h>
phungductung 0:8ede47d38d10 892
phungductung 0:8ede47d38d10 893
phungductung 0:8ede47d38d10 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
phungductung 0:8ede47d38d10 895 /* TI CCS specific functions */
phungductung 0:8ede47d38d10 896 #include <cmsis_ccs.h>
phungductung 0:8ede47d38d10 897
phungductung 0:8ede47d38d10 898
phungductung 0:8ede47d38d10 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
phungductung 0:8ede47d38d10 900 /* TASKING carm specific functions */
phungductung 0:8ede47d38d10 901 /*
phungductung 0:8ede47d38d10 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
phungductung 0:8ede47d38d10 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
phungductung 0:8ede47d38d10 904 * Including the CMSIS ones.
phungductung 0:8ede47d38d10 905 */
phungductung 0:8ede47d38d10 906
phungductung 0:8ede47d38d10 907
phungductung 0:8ede47d38d10 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
phungductung 0:8ede47d38d10 909 /* Cosmic specific functions */
phungductung 0:8ede47d38d10 910 #include <cmsis_csm.h>
phungductung 0:8ede47d38d10 911
phungductung 0:8ede47d38d10 912 #endif
phungductung 0:8ede47d38d10 913
phungductung 0:8ede47d38d10 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
phungductung 0:8ede47d38d10 915
phungductung 0:8ede47d38d10 916 #endif /* __CORE_CMINSTR_H */