DISCO-F746_WAV_PLAYER - SPKT

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Dependencies: F746_GUI SD_PlayerSkeleton F746_SAI_IO

SRC_STM32F7/targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_tim.c@0:8ede47d38d10, 2019-06-04 (annotated)

Committer:: phungductung
Date:: Tue Jun 04 21:37:21 2019 +0000
Revision:: 0:8ede47d38d10

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User	Revision	Line number	New contents of line
phungductung	0:8ede47d38d10	1	/**
phungductung	0:8ede47d38d10	2	******************************************************************************
phungductung	0:8ede47d38d10	3	* @file stm32f7xx_hal_tim.c
phungductung	0:8ede47d38d10	4	* @author MCD Application Team
phungductung	0:8ede47d38d10	5	* @version V1.0.4
phungductung	0:8ede47d38d10	6	* @date 09-December-2015
phungductung	0:8ede47d38d10	7	* @brief TIM HAL module driver.
phungductung	0:8ede47d38d10	8	* This file provides firmware functions to manage the following
phungductung	0:8ede47d38d10	9	* functionalities of the Timer (TIM) peripheral:
phungductung	0:8ede47d38d10	10	* + Time Base Initialization
phungductung	0:8ede47d38d10	11	* + Time Base Start
phungductung	0:8ede47d38d10	12	* + Time Base Start Interruption
phungductung	0:8ede47d38d10	13	* + Time Base Start DMA
phungductung	0:8ede47d38d10	14	* + Time Output Compare/PWM Initialization
phungductung	0:8ede47d38d10	15	* + Time Output Compare/PWM Channel Configuration
phungductung	0:8ede47d38d10	16	* + Time Output Compare/PWM Start
phungductung	0:8ede47d38d10	17	* + Time Output Compare/PWM Start Interruption
phungductung	0:8ede47d38d10	18	* + Time Output Compare/PWM Start DMA
phungductung	0:8ede47d38d10	19	* + Time Input Capture Initialization
phungductung	0:8ede47d38d10	20	* + Time Input Capture Channel Configuration
phungductung	0:8ede47d38d10	21	* + Time Input Capture Start
phungductung	0:8ede47d38d10	22	* + Time Input Capture Start Interruption
phungductung	0:8ede47d38d10	23	* + Time Input Capture Start DMA
phungductung	0:8ede47d38d10	24	* + Time One Pulse Initialization
phungductung	0:8ede47d38d10	25	* + Time One Pulse Channel Configuration
phungductung	0:8ede47d38d10	26	* + Time One Pulse Start
phungductung	0:8ede47d38d10	27	* + Time Encoder Interface Initialization
phungductung	0:8ede47d38d10	28	* + Time Encoder Interface Start
phungductung	0:8ede47d38d10	29	* + Time Encoder Interface Start Interruption
phungductung	0:8ede47d38d10	30	* + Time Encoder Interface Start DMA
phungductung	0:8ede47d38d10	31	* + Commutation Event configuration with Interruption and DMA
phungductung	0:8ede47d38d10	32	* + Time OCRef clear configuration
phungductung	0:8ede47d38d10	33	* + Time External Clock configuration
phungductung	0:8ede47d38d10	34	@verbatim
phungductung	0:8ede47d38d10	35	==============================================================================
phungductung	0:8ede47d38d10	36	##### TIMER Generic features #####
phungductung	0:8ede47d38d10	37	==============================================================================
phungductung	0:8ede47d38d10	38	[..] The Timer features include:
phungductung	0:8ede47d38d10	39	(#) 16-bit up, down, up/down auto-reload counter.
phungductung	0:8ede47d38d10	40	(#) 16-bit programmable prescaler allowing dividing (also on the fly) the
phungductung	0:8ede47d38d10	41	counter clock frequency either by any factor between 1 and 65536.
phungductung	0:8ede47d38d10	42	(#) Up to 4 independent channels for:
phungductung	0:8ede47d38d10	43	(++) Input Capture
phungductung	0:8ede47d38d10	44	(++) Output Compare
phungductung	0:8ede47d38d10	45	(++) PWM generation (Edge and Center-aligned Mode)
phungductung	0:8ede47d38d10	46	(++) One-pulse mode output
phungductung	0:8ede47d38d10	47
phungductung	0:8ede47d38d10	48	##### How to use this driver #####
phungductung	0:8ede47d38d10	49	==============================================================================
phungductung	0:8ede47d38d10	50	[..]
phungductung	0:8ede47d38d10	51	(#) Initialize the TIM low level resources by implementing the following functions
phungductung	0:8ede47d38d10	52	depending from feature used :
phungductung	0:8ede47d38d10	53	(++) Time Base : HAL_TIM_Base_MspInit()
phungductung	0:8ede47d38d10	54	(++) Input Capture : HAL_TIM_IC_MspInit()
phungductung	0:8ede47d38d10	55	(++) Output Compare : HAL_TIM_OC_MspInit()
phungductung	0:8ede47d38d10	56	(++) PWM generation : HAL_TIM_PWM_MspInit()
phungductung	0:8ede47d38d10	57	(++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
phungductung	0:8ede47d38d10	58	(++) Encoder mode output : HAL_TIM_Encoder_MspInit()
phungductung	0:8ede47d38d10	59
phungductung	0:8ede47d38d10	60	(#) Initialize the TIM low level resources :
phungductung	0:8ede47d38d10	61	(##) Enable the TIM interface clock using __TIMx_CLK_ENABLE();
phungductung	0:8ede47d38d10	62	(##) TIM pins configuration
phungductung	0:8ede47d38d10	63	(+++) Enable the clock for the TIM GPIOs using the following function:
phungductung	0:8ede47d38d10	64	__GPIOx_CLK_ENABLE();
phungductung	0:8ede47d38d10	65	(+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
phungductung	0:8ede47d38d10	66
phungductung	0:8ede47d38d10	67	(#) The external Clock can be configured, if needed (the default clock is the
phungductung	0:8ede47d38d10	68	internal clock from the APBx), using the following function:
phungductung	0:8ede47d38d10	69	HAL_TIM_ConfigClockSource, the clock configuration should be done before
phungductung	0:8ede47d38d10	70	any start function.
phungductung	0:8ede47d38d10	71
phungductung	0:8ede47d38d10	72	(#) Configure the TIM in the desired functioning mode using one of the
phungductung	0:8ede47d38d10	73	initialization function of this driver:
phungductung	0:8ede47d38d10	74	(++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
phungductung	0:8ede47d38d10	75	(++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
phungductung	0:8ede47d38d10	76	Output Compare signal.
phungductung	0:8ede47d38d10	77	(++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
phungductung	0:8ede47d38d10	78	PWM signal.
phungductung	0:8ede47d38d10	79	(++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an
phungductung	0:8ede47d38d10	80	external signal.
phungductung	0:8ede47d38d10	81	(++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer
phungductung	0:8ede47d38d10	82	in One Pulse Mode.
phungductung	0:8ede47d38d10	83	(++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
phungductung	0:8ede47d38d10	84
phungductung	0:8ede47d38d10	85	(#) Activate the TIM peripheral using one of the start functions depending from the feature used:
phungductung	0:8ede47d38d10	86	(++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT()
phungductung	0:8ede47d38d10	87	(++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT()
phungductung	0:8ede47d38d10	88	(++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT()
phungductung	0:8ede47d38d10	89	(++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT()
phungductung	0:8ede47d38d10	90	(++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT()
phungductung	0:8ede47d38d10	91	(++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT().
phungductung	0:8ede47d38d10	92
phungductung	0:8ede47d38d10	93	(#) The DMA Burst is managed with the two following functions:
phungductung	0:8ede47d38d10	94	HAL_TIM_DMABurst_WriteStart()
phungductung	0:8ede47d38d10	95	HAL_TIM_DMABurst_ReadStart()
phungductung	0:8ede47d38d10	96
phungductung	0:8ede47d38d10	97	@endverbatim
phungductung	0:8ede47d38d10	98	******************************************************************************
phungductung	0:8ede47d38d10	99	* @attention
phungductung	0:8ede47d38d10	100	*
phungductung	0:8ede47d38d10	101	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung	0:8ede47d38d10	102	*
phungductung	0:8ede47d38d10	103	* Redistribution and use in source and binary forms, with or without modification,
phungductung	0:8ede47d38d10	104	* are permitted provided that the following conditions are met:
phungductung	0:8ede47d38d10	105	* 1. Redistributions of source code must retain the above copyright notice,
phungductung	0:8ede47d38d10	106	* this list of conditions and the following disclaimer.
phungductung	0:8ede47d38d10	107	* 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung	0:8ede47d38d10	108	* this list of conditions and the following disclaimer in the documentation
phungductung	0:8ede47d38d10	109	* and/or other materials provided with the distribution.
phungductung	0:8ede47d38d10	110	* 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung	0:8ede47d38d10	111	* may be used to endorse or promote products derived from this software
phungductung	0:8ede47d38d10	112	* without specific prior written permission.
phungductung	0:8ede47d38d10	113	*
phungductung	0:8ede47d38d10	114	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung	0:8ede47d38d10	115	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung	0:8ede47d38d10	116	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung	0:8ede47d38d10	117	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung	0:8ede47d38d10	118	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung	0:8ede47d38d10	119	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung	0:8ede47d38d10	120	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung	0:8ede47d38d10	121	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung	0:8ede47d38d10	122	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung	0:8ede47d38d10	123	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung	0:8ede47d38d10	124	*
phungductung	0:8ede47d38d10	125	******************************************************************************
phungductung	0:8ede47d38d10	126	*/
phungductung	0:8ede47d38d10	127
phungductung	0:8ede47d38d10	128	/* Includes ------------------------------------------------------------------*/
phungductung	0:8ede47d38d10	129	#include "stm32f7xx_hal.h"
phungductung	0:8ede47d38d10	130
phungductung	0:8ede47d38d10	131	/** @addtogroup STM32F7xx_HAL_Driver
phungductung	0:8ede47d38d10	132	* @{
phungductung	0:8ede47d38d10	133	*/
phungductung	0:8ede47d38d10	134
phungductung	0:8ede47d38d10	135	/** @defgroup TIM TIM
phungductung	0:8ede47d38d10	136	* @brief TIM HAL module driver
phungductung	0:8ede47d38d10	137	* @{
phungductung	0:8ede47d38d10	138	*/
phungductung	0:8ede47d38d10	139
phungductung	0:8ede47d38d10	140	#ifdef HAL_TIM_MODULE_ENABLED
phungductung	0:8ede47d38d10	141
phungductung	0:8ede47d38d10	142	/* Private typedef -----------------------------------------------------------*/
phungductung	0:8ede47d38d10	143	/* Private define ------------------------------------------------------------*/
phungductung	0:8ede47d38d10	144	/* Private macro -------------------------------------------------------------*/
phungductung	0:8ede47d38d10	145	/* Private variables ---------------------------------------------------------*/
phungductung	0:8ede47d38d10	146	/** @addtogroup TIM_Private_Functions
phungductung	0:8ede47d38d10	147	* @{
phungductung	0:8ede47d38d10	148	*/
phungductung	0:8ede47d38d10	149	/* Private function prototypes -----------------------------------------------*/
phungductung	0:8ede47d38d10	150	static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
phungductung	0:8ede47d38d10	151	static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
phungductung	0:8ede47d38d10	152	uint32_t TIM_ICFilter);
phungductung	0:8ede47d38d10	153	static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
phungductung	0:8ede47d38d10	154	static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
phungductung	0:8ede47d38d10	155	uint32_t TIM_ICFilter);
phungductung	0:8ede47d38d10	156	static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
phungductung	0:8ede47d38d10	157	uint32_t TIM_ICFilter);
phungductung	0:8ede47d38d10	158
phungductung	0:8ede47d38d10	159	static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t TIM_ITRx);
phungductung	0:8ede47d38d10	160	static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
phungductung	0:8ede47d38d10	161	static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
phungductung	0:8ede47d38d10	162	static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
phungductung	0:8ede47d38d10	163	TIM_SlaveConfigTypeDef * sSlaveConfig);
phungductung	0:8ede47d38d10	164	/**
phungductung	0:8ede47d38d10	165	* @}
phungductung	0:8ede47d38d10	166	*/
phungductung	0:8ede47d38d10	167
phungductung	0:8ede47d38d10	168	/* Exported functions --------------------------------------------------------*/
phungductung	0:8ede47d38d10	169	/** @defgroup TIM_Exported_Functions TIM Exported Functions
phungductung	0:8ede47d38d10	170	* @{
phungductung	0:8ede47d38d10	171	*/
phungductung	0:8ede47d38d10	172
phungductung	0:8ede47d38d10	173	/** @defgroup TIM_Exported_Functions_Group1 Time Base functions
phungductung	0:8ede47d38d10	174	* @brief Time Base functions
phungductung	0:8ede47d38d10	175	*
phungductung	0:8ede47d38d10	176	@verbatim
phungductung	0:8ede47d38d10	177	==============================================================================
phungductung	0:8ede47d38d10	178	##### Time Base functions #####
phungductung	0:8ede47d38d10	179	==============================================================================
phungductung	0:8ede47d38d10	180	[..]
phungductung	0:8ede47d38d10	181	This section provides functions allowing to:
phungductung	0:8ede47d38d10	182	(+) Initialize and configure the TIM base.
phungductung	0:8ede47d38d10	183	(+) De-initialize the TIM base.
phungductung	0:8ede47d38d10	184	(+) Start the Time Base.
phungductung	0:8ede47d38d10	185	(+) Stop the Time Base.
phungductung	0:8ede47d38d10	186	(+) Start the Time Base and enable interrupt.
phungductung	0:8ede47d38d10	187	(+) Stop the Time Base and disable interrupt.
phungductung	0:8ede47d38d10	188	(+) Start the Time Base and enable DMA transfer.
phungductung	0:8ede47d38d10	189	(+) Stop the Time Base and disable DMA transfer.
phungductung	0:8ede47d38d10	190
phungductung	0:8ede47d38d10	191	@endverbatim
phungductung	0:8ede47d38d10	192	* @{
phungductung	0:8ede47d38d10	193	*/
phungductung	0:8ede47d38d10	194	/**
phungductung	0:8ede47d38d10	195	* @brief Initializes the TIM Time base Unit according to the specified
phungductung	0:8ede47d38d10	196	* parameters in the TIM_HandleTypeDef and create the associated handle.
phungductung	0:8ede47d38d10	197	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	198	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	199	* @retval HAL status
phungductung	0:8ede47d38d10	200	*/
phungductung	0:8ede47d38d10	201	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	202	{
phungductung	0:8ede47d38d10	203	/* Check the TIM handle allocation */
phungductung	0:8ede47d38d10	204	if(htim == NULL)
phungductung	0:8ede47d38d10	205	{
phungductung	0:8ede47d38d10	206	return HAL_ERROR;
phungductung	0:8ede47d38d10	207	}
phungductung	0:8ede47d38d10	208
phungductung	0:8ede47d38d10	209	/* Check the parameters */
phungductung	0:8ede47d38d10	210	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	211	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
phungductung	0:8ede47d38d10	212	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
phungductung	0:8ede47d38d10	213
phungductung	0:8ede47d38d10	214	if(htim->State == HAL_TIM_STATE_RESET)
phungductung	0:8ede47d38d10	215	{
phungductung	0:8ede47d38d10	216	/* Init the low level hardware : GPIO, CLOCK, NVIC */
phungductung	0:8ede47d38d10	217	HAL_TIM_Base_MspInit(htim);
phungductung	0:8ede47d38d10	218	}
phungductung	0:8ede47d38d10	219
phungductung	0:8ede47d38d10	220	/* Set the TIM state */
phungductung	0:8ede47d38d10	221	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	222
phungductung	0:8ede47d38d10	223	/* Set the Time Base configuration */
phungductung	0:8ede47d38d10	224	TIM_Base_SetConfig(htim->Instance, &htim->Init);
phungductung	0:8ede47d38d10	225
phungductung	0:8ede47d38d10	226	/* Initialize the TIM state*/
phungductung	0:8ede47d38d10	227	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	228
phungductung	0:8ede47d38d10	229	return HAL_OK;
phungductung	0:8ede47d38d10	230	}
phungductung	0:8ede47d38d10	231
phungductung	0:8ede47d38d10	232	/**
phungductung	0:8ede47d38d10	233	* @brief DeInitializes the TIM Base peripheral
phungductung	0:8ede47d38d10	234	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	235	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	236	* @retval HAL status
phungductung	0:8ede47d38d10	237	*/
phungductung	0:8ede47d38d10	238	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	239	{
phungductung	0:8ede47d38d10	240	/* Check the parameters */
phungductung	0:8ede47d38d10	241	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	242
phungductung	0:8ede47d38d10	243	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	244
phungductung	0:8ede47d38d10	245	/* Disable the TIM Peripheral Clock */
phungductung	0:8ede47d38d10	246	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	247
phungductung	0:8ede47d38d10	248	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
phungductung	0:8ede47d38d10	249	HAL_TIM_Base_MspDeInit(htim);
phungductung	0:8ede47d38d10	250
phungductung	0:8ede47d38d10	251	/* Change TIM state */
phungductung	0:8ede47d38d10	252	htim->State = HAL_TIM_STATE_RESET;
phungductung	0:8ede47d38d10	253
phungductung	0:8ede47d38d10	254	/* Release Lock */
phungductung	0:8ede47d38d10	255	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	256
phungductung	0:8ede47d38d10	257	return HAL_OK;
phungductung	0:8ede47d38d10	258	}
phungductung	0:8ede47d38d10	259
phungductung	0:8ede47d38d10	260	/**
phungductung	0:8ede47d38d10	261	* @brief Initializes the TIM Base MSP.
phungductung	0:8ede47d38d10	262	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	263	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	264	* @retval None
phungductung	0:8ede47d38d10	265	*/
phungductung	0:8ede47d38d10	266	__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	267	{
phungductung	0:8ede47d38d10	268	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	269	UNUSED(htim);
phungductung	0:8ede47d38d10	270
phungductung	0:8ede47d38d10	271	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	272	the HAL_TIM_Base_MspInit could be implemented in the user file
phungductung	0:8ede47d38d10	273	*/
phungductung	0:8ede47d38d10	274	}
phungductung	0:8ede47d38d10	275
phungductung	0:8ede47d38d10	276	/**
phungductung	0:8ede47d38d10	277	* @brief DeInitializes TIM Base MSP.
phungductung	0:8ede47d38d10	278	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	279	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	280	* @retval None
phungductung	0:8ede47d38d10	281	*/
phungductung	0:8ede47d38d10	282	__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	283	{
phungductung	0:8ede47d38d10	284	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	285	UNUSED(htim);
phungductung	0:8ede47d38d10	286
phungductung	0:8ede47d38d10	287	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	288	the HAL_TIM_Base_MspDeInit could be implemented in the user file
phungductung	0:8ede47d38d10	289	*/
phungductung	0:8ede47d38d10	290	}
phungductung	0:8ede47d38d10	291
phungductung	0:8ede47d38d10	292	/**
phungductung	0:8ede47d38d10	293	* @brief Starts the TIM Base generation.
phungductung	0:8ede47d38d10	294	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	295	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	296	* @retval HAL status
phungductung	0:8ede47d38d10	297	*/
phungductung	0:8ede47d38d10	298	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	299	{
phungductung	0:8ede47d38d10	300	/* Check the parameters */
phungductung	0:8ede47d38d10	301	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	302
phungductung	0:8ede47d38d10	303	/* Set the TIM state */
phungductung	0:8ede47d38d10	304	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	305
phungductung	0:8ede47d38d10	306	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	307	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	308
phungductung	0:8ede47d38d10	309	/* Change the TIM state*/
phungductung	0:8ede47d38d10	310	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	311
phungductung	0:8ede47d38d10	312	/* Return function status */
phungductung	0:8ede47d38d10	313	return HAL_OK;
phungductung	0:8ede47d38d10	314	}
phungductung	0:8ede47d38d10	315
phungductung	0:8ede47d38d10	316	/**
phungductung	0:8ede47d38d10	317	* @brief Stops the TIM Base generation.
phungductung	0:8ede47d38d10	318	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	319	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	320	* @retval HAL status
phungductung	0:8ede47d38d10	321	*/
phungductung	0:8ede47d38d10	322	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	323	{
phungductung	0:8ede47d38d10	324	/* Check the parameters */
phungductung	0:8ede47d38d10	325	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	326
phungductung	0:8ede47d38d10	327	/* Set the TIM state */
phungductung	0:8ede47d38d10	328	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	329
phungductung	0:8ede47d38d10	330	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	331	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	332
phungductung	0:8ede47d38d10	333	/* Change the TIM state*/
phungductung	0:8ede47d38d10	334	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	335
phungductung	0:8ede47d38d10	336	/* Return function status */
phungductung	0:8ede47d38d10	337	return HAL_OK;
phungductung	0:8ede47d38d10	338	}
phungductung	0:8ede47d38d10	339
phungductung	0:8ede47d38d10	340	/**
phungductung	0:8ede47d38d10	341	* @brief Starts the TIM Base generation in interrupt mode.
phungductung	0:8ede47d38d10	342	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	343	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	344	* @retval HAL status
phungductung	0:8ede47d38d10	345	*/
phungductung	0:8ede47d38d10	346	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	347	{
phungductung	0:8ede47d38d10	348	/* Check the parameters */
phungductung	0:8ede47d38d10	349	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	350
phungductung	0:8ede47d38d10	351	/* Enable the TIM Update interrupt */
phungductung	0:8ede47d38d10	352	__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
phungductung	0:8ede47d38d10	353
phungductung	0:8ede47d38d10	354	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	355	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	356
phungductung	0:8ede47d38d10	357	/* Return function status */
phungductung	0:8ede47d38d10	358	return HAL_OK;
phungductung	0:8ede47d38d10	359	}
phungductung	0:8ede47d38d10	360
phungductung	0:8ede47d38d10	361	/**
phungductung	0:8ede47d38d10	362	* @brief Stops the TIM Base generation in interrupt mode.
phungductung	0:8ede47d38d10	363	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	364	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	365	* @retval HAL status
phungductung	0:8ede47d38d10	366	*/
phungductung	0:8ede47d38d10	367	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	368	{
phungductung	0:8ede47d38d10	369	/* Check the parameters */
phungductung	0:8ede47d38d10	370	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	371	/* Disable the TIM Update interrupt */
phungductung	0:8ede47d38d10	372	__HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
phungductung	0:8ede47d38d10	373
phungductung	0:8ede47d38d10	374	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	375	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	376
phungductung	0:8ede47d38d10	377	/* Return function status */
phungductung	0:8ede47d38d10	378	return HAL_OK;
phungductung	0:8ede47d38d10	379	}
phungductung	0:8ede47d38d10	380
phungductung	0:8ede47d38d10	381	/**
phungductung	0:8ede47d38d10	382	* @brief Starts the TIM Base generation in DMA mode.
phungductung	0:8ede47d38d10	383	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	384	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	385	* @param pData: The source Buffer address.
phungductung	0:8ede47d38d10	386	* @param Length: The length of data to be transferred from memory to peripheral.
phungductung	0:8ede47d38d10	387	* @retval HAL status
phungductung	0:8ede47d38d10	388	*/
phungductung	0:8ede47d38d10	389	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length)
phungductung	0:8ede47d38d10	390	{
phungductung	0:8ede47d38d10	391	/* Check the parameters */
phungductung	0:8ede47d38d10	392	assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	393
phungductung	0:8ede47d38d10	394	if((htim->State == HAL_TIM_STATE_BUSY))
phungductung	0:8ede47d38d10	395	{
phungductung	0:8ede47d38d10	396	return HAL_BUSY;
phungductung	0:8ede47d38d10	397	}
phungductung	0:8ede47d38d10	398	else if((htim->State == HAL_TIM_STATE_READY))
phungductung	0:8ede47d38d10	399	{
phungductung	0:8ede47d38d10	400	if((pData == 0 ) && (Length > 0))
phungductung	0:8ede47d38d10	401	{
phungductung	0:8ede47d38d10	402	return HAL_ERROR;
phungductung	0:8ede47d38d10	403	}
phungductung	0:8ede47d38d10	404	else
phungductung	0:8ede47d38d10	405	{
phungductung	0:8ede47d38d10	406	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	407	}
phungductung	0:8ede47d38d10	408	}
phungductung	0:8ede47d38d10	409	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	410	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
phungductung	0:8ede47d38d10	411
phungductung	0:8ede47d38d10	412	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	413	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	414
phungductung	0:8ede47d38d10	415	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	416	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
phungductung	0:8ede47d38d10	417
phungductung	0:8ede47d38d10	418	/* Enable the TIM Update DMA request */
phungductung	0:8ede47d38d10	419	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
phungductung	0:8ede47d38d10	420
phungductung	0:8ede47d38d10	421	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	422	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	423
phungductung	0:8ede47d38d10	424	/* Return function status */
phungductung	0:8ede47d38d10	425	return HAL_OK;
phungductung	0:8ede47d38d10	426	}
phungductung	0:8ede47d38d10	427
phungductung	0:8ede47d38d10	428	/**
phungductung	0:8ede47d38d10	429	* @brief Stops the TIM Base generation in DMA mode.
phungductung	0:8ede47d38d10	430	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	431	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	432	* @retval HAL status
phungductung	0:8ede47d38d10	433	*/
phungductung	0:8ede47d38d10	434	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	435	{
phungductung	0:8ede47d38d10	436	/* Check the parameters */
phungductung	0:8ede47d38d10	437	assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	438
phungductung	0:8ede47d38d10	439	/* Disable the TIM Update DMA request */
phungductung	0:8ede47d38d10	440	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
phungductung	0:8ede47d38d10	441
phungductung	0:8ede47d38d10	442	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	443	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	444
phungductung	0:8ede47d38d10	445	/* Change the htim state */
phungductung	0:8ede47d38d10	446	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	447
phungductung	0:8ede47d38d10	448	/* Return function status */
phungductung	0:8ede47d38d10	449	return HAL_OK;
phungductung	0:8ede47d38d10	450	}
phungductung	0:8ede47d38d10	451
phungductung	0:8ede47d38d10	452	/**
phungductung	0:8ede47d38d10	453	* @}
phungductung	0:8ede47d38d10	454	*/
phungductung	0:8ede47d38d10	455
phungductung	0:8ede47d38d10	456	/** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions
phungductung	0:8ede47d38d10	457	* @brief Time Output Compare functions
phungductung	0:8ede47d38d10	458	*
phungductung	0:8ede47d38d10	459	@verbatim
phungductung	0:8ede47d38d10	460	==============================================================================
phungductung	0:8ede47d38d10	461	##### Time Output Compare functions #####
phungductung	0:8ede47d38d10	462	==============================================================================
phungductung	0:8ede47d38d10	463	[..]
phungductung	0:8ede47d38d10	464	This section provides functions allowing to:
phungductung	0:8ede47d38d10	465	(+) Initialize and configure the TIM Output Compare.
phungductung	0:8ede47d38d10	466	(+) De-initialize the TIM Output Compare.
phungductung	0:8ede47d38d10	467	(+) Start the Time Output Compare.
phungductung	0:8ede47d38d10	468	(+) Stop the Time Output Compare.
phungductung	0:8ede47d38d10	469	(+) Start the Time Output Compare and enable interrupt.
phungductung	0:8ede47d38d10	470	(+) Stop the Time Output Compare and disable interrupt.
phungductung	0:8ede47d38d10	471	(+) Start the Time Output Compare and enable DMA transfer.
phungductung	0:8ede47d38d10	472	(+) Stop the Time Output Compare and disable DMA transfer.
phungductung	0:8ede47d38d10	473
phungductung	0:8ede47d38d10	474	@endverbatim
phungductung	0:8ede47d38d10	475	* @{
phungductung	0:8ede47d38d10	476	*/
phungductung	0:8ede47d38d10	477	/**
phungductung	0:8ede47d38d10	478	* @brief Initializes the TIM Output Compare according to the specified
phungductung	0:8ede47d38d10	479	* parameters in the TIM_HandleTypeDef and create the associated handle.
phungductung	0:8ede47d38d10	480	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	481	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	482	* @retval HAL status
phungductung	0:8ede47d38d10	483	*/
phungductung	0:8ede47d38d10	484	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
phungductung	0:8ede47d38d10	485	{
phungductung	0:8ede47d38d10	486	/* Check the TIM handle allocation */
phungductung	0:8ede47d38d10	487	if(htim == NULL)
phungductung	0:8ede47d38d10	488	{
phungductung	0:8ede47d38d10	489	return HAL_ERROR;
phungductung	0:8ede47d38d10	490	}
phungductung	0:8ede47d38d10	491
phungductung	0:8ede47d38d10	492	/* Check the parameters */
phungductung	0:8ede47d38d10	493	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	494	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
phungductung	0:8ede47d38d10	495	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
phungductung	0:8ede47d38d10	496
phungductung	0:8ede47d38d10	497	if(htim->State == HAL_TIM_STATE_RESET)
phungductung	0:8ede47d38d10	498	{
phungductung	0:8ede47d38d10	499	/* Allocate lock resource and initialize it */
phungductung	0:8ede47d38d10	500	htim->Lock = HAL_UNLOCKED;
phungductung	0:8ede47d38d10	501	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	502	HAL_TIM_OC_MspInit(htim);
phungductung	0:8ede47d38d10	503	}
phungductung	0:8ede47d38d10	504
phungductung	0:8ede47d38d10	505	/* Set the TIM state */
phungductung	0:8ede47d38d10	506	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	507
phungductung	0:8ede47d38d10	508	/* Init the base time for the Output Compare */
phungductung	0:8ede47d38d10	509	TIM_Base_SetConfig(htim->Instance, &htim->Init);
phungductung	0:8ede47d38d10	510
phungductung	0:8ede47d38d10	511	/* Initialize the TIM state*/
phungductung	0:8ede47d38d10	512	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	513
phungductung	0:8ede47d38d10	514	return HAL_OK;
phungductung	0:8ede47d38d10	515	}
phungductung	0:8ede47d38d10	516
phungductung	0:8ede47d38d10	517	/**
phungductung	0:8ede47d38d10	518	* @brief DeInitializes the TIM peripheral
phungductung	0:8ede47d38d10	519	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	520	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	521	* @retval HAL status
phungductung	0:8ede47d38d10	522	*/
phungductung	0:8ede47d38d10	523	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	524	{
phungductung	0:8ede47d38d10	525	/* Check the parameters */
phungductung	0:8ede47d38d10	526	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	527
phungductung	0:8ede47d38d10	528	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	529
phungductung	0:8ede47d38d10	530	/* Disable the TIM Peripheral Clock */
phungductung	0:8ede47d38d10	531	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	532
phungductung	0:8ede47d38d10	533	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	534	HAL_TIM_OC_MspDeInit(htim);
phungductung	0:8ede47d38d10	535
phungductung	0:8ede47d38d10	536	/* Change TIM state */
phungductung	0:8ede47d38d10	537	htim->State = HAL_TIM_STATE_RESET;
phungductung	0:8ede47d38d10	538
phungductung	0:8ede47d38d10	539	/* Release Lock */
phungductung	0:8ede47d38d10	540	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	541
phungductung	0:8ede47d38d10	542	return HAL_OK;
phungductung	0:8ede47d38d10	543	}
phungductung	0:8ede47d38d10	544
phungductung	0:8ede47d38d10	545	/**
phungductung	0:8ede47d38d10	546	* @brief Initializes the TIM Output Compare MSP.
phungductung	0:8ede47d38d10	547	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	548	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	549	* @retval None
phungductung	0:8ede47d38d10	550	*/
phungductung	0:8ede47d38d10	551	__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	552	{
phungductung	0:8ede47d38d10	553	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	554	UNUSED(htim);
phungductung	0:8ede47d38d10	555
phungductung	0:8ede47d38d10	556	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	557	the HAL_TIM_OC_MspInit could be implemented in the user file
phungductung	0:8ede47d38d10	558	*/
phungductung	0:8ede47d38d10	559	}
phungductung	0:8ede47d38d10	560
phungductung	0:8ede47d38d10	561	/**
phungductung	0:8ede47d38d10	562	* @brief DeInitializes TIM Output Compare MSP.
phungductung	0:8ede47d38d10	563	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	564	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	565	* @retval None
phungductung	0:8ede47d38d10	566	*/
phungductung	0:8ede47d38d10	567	__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	568	{
phungductung	0:8ede47d38d10	569	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	570	UNUSED(htim);
phungductung	0:8ede47d38d10	571
phungductung	0:8ede47d38d10	572	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	573	the HAL_TIM_OC_MspDeInit could be implemented in the user file
phungductung	0:8ede47d38d10	574	*/
phungductung	0:8ede47d38d10	575	}
phungductung	0:8ede47d38d10	576
phungductung	0:8ede47d38d10	577	/**
phungductung	0:8ede47d38d10	578	* @brief Starts the TIM Output Compare signal generation.
phungductung	0:8ede47d38d10	579	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	580	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	581	* @param Channel: TIM Channel to be enabled.
phungductung	0:8ede47d38d10	582	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	583	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	584	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	585	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	586	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	587	* @retval HAL status
phungductung	0:8ede47d38d10	588	*/
phungductung	0:8ede47d38d10	589	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	590	{
phungductung	0:8ede47d38d10	591	/* Check the parameters */
phungductung	0:8ede47d38d10	592	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	593
phungductung	0:8ede47d38d10	594	/* Enable the Output compare channel */
phungductung	0:8ede47d38d10	595	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	596
phungductung	0:8ede47d38d10	597	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	598	{
phungductung	0:8ede47d38d10	599	/* Enable the main output */
phungductung	0:8ede47d38d10	600	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	601	}
phungductung	0:8ede47d38d10	602
phungductung	0:8ede47d38d10	603	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	604	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	605
phungductung	0:8ede47d38d10	606	/* Return function status */
phungductung	0:8ede47d38d10	607	return HAL_OK;
phungductung	0:8ede47d38d10	608	}
phungductung	0:8ede47d38d10	609
phungductung	0:8ede47d38d10	610	/**
phungductung	0:8ede47d38d10	611	* @brief Stops the TIM Output Compare signal generation.
phungductung	0:8ede47d38d10	612	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	613	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	614	* @param Channel: TIM Channel to be disabled.
phungductung	0:8ede47d38d10	615	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	616	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	617	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	618	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	619	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	620	* @retval HAL status
phungductung	0:8ede47d38d10	621	*/
phungductung	0:8ede47d38d10	622	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	623	{
phungductung	0:8ede47d38d10	624	/* Check the parameters */
phungductung	0:8ede47d38d10	625	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	626
phungductung	0:8ede47d38d10	627	/* Disable the Output compare channel */
phungductung	0:8ede47d38d10	628	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	629
phungductung	0:8ede47d38d10	630	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	631	{
phungductung	0:8ede47d38d10	632	/* Disable the Main Output */
phungductung	0:8ede47d38d10	633	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	634	}
phungductung	0:8ede47d38d10	635
phungductung	0:8ede47d38d10	636	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	637	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	638
phungductung	0:8ede47d38d10	639	/* Return function status */
phungductung	0:8ede47d38d10	640	return HAL_OK;
phungductung	0:8ede47d38d10	641	}
phungductung	0:8ede47d38d10	642
phungductung	0:8ede47d38d10	643	/**
phungductung	0:8ede47d38d10	644	* @brief Starts the TIM Output Compare signal generation in interrupt mode.
phungductung	0:8ede47d38d10	645	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	646	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	647	* @param Channel: TIM Channel to be enabled.
phungductung	0:8ede47d38d10	648	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	649	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	650	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	651	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	652	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	653	* @retval HAL status
phungductung	0:8ede47d38d10	654	*/
phungductung	0:8ede47d38d10	655	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	656	{
phungductung	0:8ede47d38d10	657	/* Check the parameters */
phungductung	0:8ede47d38d10	658	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	659
phungductung	0:8ede47d38d10	660	switch (Channel)
phungductung	0:8ede47d38d10	661	{
phungductung	0:8ede47d38d10	662	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	663	{
phungductung	0:8ede47d38d10	664	/* Enable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	665	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	666	}
phungductung	0:8ede47d38d10	667	break;
phungductung	0:8ede47d38d10	668
phungductung	0:8ede47d38d10	669	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	670	{
phungductung	0:8ede47d38d10	671	/* Enable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	672	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	673	}
phungductung	0:8ede47d38d10	674	break;
phungductung	0:8ede47d38d10	675
phungductung	0:8ede47d38d10	676	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	677	{
phungductung	0:8ede47d38d10	678	/* Enable the TIM Capture/Compare 3 interrupt */
phungductung	0:8ede47d38d10	679	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
phungductung	0:8ede47d38d10	680	}
phungductung	0:8ede47d38d10	681	break;
phungductung	0:8ede47d38d10	682
phungductung	0:8ede47d38d10	683	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	684	{
phungductung	0:8ede47d38d10	685	/* Enable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	686	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
phungductung	0:8ede47d38d10	687	}
phungductung	0:8ede47d38d10	688	break;
phungductung	0:8ede47d38d10	689
phungductung	0:8ede47d38d10	690	default:
phungductung	0:8ede47d38d10	691	break;
phungductung	0:8ede47d38d10	692	}
phungductung	0:8ede47d38d10	693
phungductung	0:8ede47d38d10	694	/* Enable the Output compare channel */
phungductung	0:8ede47d38d10	695	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	696
phungductung	0:8ede47d38d10	697	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	698	{
phungductung	0:8ede47d38d10	699	/* Enable the main output */
phungductung	0:8ede47d38d10	700	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	701	}
phungductung	0:8ede47d38d10	702
phungductung	0:8ede47d38d10	703	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	704	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	705
phungductung	0:8ede47d38d10	706	/* Return function status */
phungductung	0:8ede47d38d10	707	return HAL_OK;
phungductung	0:8ede47d38d10	708	}
phungductung	0:8ede47d38d10	709
phungductung	0:8ede47d38d10	710	/**
phungductung	0:8ede47d38d10	711	* @brief Stops the TIM Output Compare signal generation in interrupt mode.
phungductung	0:8ede47d38d10	712	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	713	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	714	* @param Channel: TIM Channel to be disabled.
phungductung	0:8ede47d38d10	715	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	716	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	717	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	718	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	719	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	720	* @retval HAL status
phungductung	0:8ede47d38d10	721	*/
phungductung	0:8ede47d38d10	722	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	723	{
phungductung	0:8ede47d38d10	724	/* Check the parameters */
phungductung	0:8ede47d38d10	725	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	726
phungductung	0:8ede47d38d10	727	switch (Channel)
phungductung	0:8ede47d38d10	728	{
phungductung	0:8ede47d38d10	729	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	730	{
phungductung	0:8ede47d38d10	731	/* Disable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	732	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	733	}
phungductung	0:8ede47d38d10	734	break;
phungductung	0:8ede47d38d10	735
phungductung	0:8ede47d38d10	736	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	737	{
phungductung	0:8ede47d38d10	738	/* Disable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	739	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	740	}
phungductung	0:8ede47d38d10	741	break;
phungductung	0:8ede47d38d10	742
phungductung	0:8ede47d38d10	743	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	744	{
phungductung	0:8ede47d38d10	745	/* Disable the TIM Capture/Compare 3 interrupt */
phungductung	0:8ede47d38d10	746	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
phungductung	0:8ede47d38d10	747	}
phungductung	0:8ede47d38d10	748	break;
phungductung	0:8ede47d38d10	749
phungductung	0:8ede47d38d10	750	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	751	{
phungductung	0:8ede47d38d10	752	/* Disable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	753	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
phungductung	0:8ede47d38d10	754	}
phungductung	0:8ede47d38d10	755	break;
phungductung	0:8ede47d38d10	756
phungductung	0:8ede47d38d10	757	default:
phungductung	0:8ede47d38d10	758	break;
phungductung	0:8ede47d38d10	759	}
phungductung	0:8ede47d38d10	760
phungductung	0:8ede47d38d10	761	/* Disable the Output compare channel */
phungductung	0:8ede47d38d10	762	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	763
phungductung	0:8ede47d38d10	764	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	765	{
phungductung	0:8ede47d38d10	766	/* Disable the Main Output */
phungductung	0:8ede47d38d10	767	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	768	}
phungductung	0:8ede47d38d10	769
phungductung	0:8ede47d38d10	770	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	771	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	772
phungductung	0:8ede47d38d10	773	/* Return function status */
phungductung	0:8ede47d38d10	774	return HAL_OK;
phungductung	0:8ede47d38d10	775	}
phungductung	0:8ede47d38d10	776
phungductung	0:8ede47d38d10	777	/**
phungductung	0:8ede47d38d10	778	* @brief Starts the TIM Output Compare signal generation in DMA mode.
phungductung	0:8ede47d38d10	779	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	780	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	781	* @param Channel: TIM Channel to be enabled.
phungductung	0:8ede47d38d10	782	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	783	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	784	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	785	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	786	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	787	* @param pData: The source Buffer address.
phungductung	0:8ede47d38d10	788	* @param Length: The length of data to be transferred from memory to TIM peripheral
phungductung	0:8ede47d38d10	789	* @retval HAL status
phungductung	0:8ede47d38d10	790	*/
phungductung	0:8ede47d38d10	791	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
phungductung	0:8ede47d38d10	792	{
phungductung	0:8ede47d38d10	793	/* Check the parameters */
phungductung	0:8ede47d38d10	794	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	795
phungductung	0:8ede47d38d10	796	if((htim->State == HAL_TIM_STATE_BUSY))
phungductung	0:8ede47d38d10	797	{
phungductung	0:8ede47d38d10	798	return HAL_BUSY;
phungductung	0:8ede47d38d10	799	}
phungductung	0:8ede47d38d10	800	else if((htim->State == HAL_TIM_STATE_READY))
phungductung	0:8ede47d38d10	801	{
phungductung	0:8ede47d38d10	802	if(((uint32_t)pData == 0 ) && (Length > 0))
phungductung	0:8ede47d38d10	803	{
phungductung	0:8ede47d38d10	804	return HAL_ERROR;
phungductung	0:8ede47d38d10	805	}
phungductung	0:8ede47d38d10	806	else
phungductung	0:8ede47d38d10	807	{
phungductung	0:8ede47d38d10	808	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	809	}
phungductung	0:8ede47d38d10	810	}
phungductung	0:8ede47d38d10	811	switch (Channel)
phungductung	0:8ede47d38d10	812	{
phungductung	0:8ede47d38d10	813	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	814	{
phungductung	0:8ede47d38d10	815	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	816	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	817
phungductung	0:8ede47d38d10	818	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	819	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	820
phungductung	0:8ede47d38d10	821	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	822	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
phungductung	0:8ede47d38d10	823
phungductung	0:8ede47d38d10	824	/* Enable the TIM Capture/Compare 1 DMA request */
phungductung	0:8ede47d38d10	825	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	826	}
phungductung	0:8ede47d38d10	827	break;
phungductung	0:8ede47d38d10	828
phungductung	0:8ede47d38d10	829	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	830	{
phungductung	0:8ede47d38d10	831	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	832	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	833
phungductung	0:8ede47d38d10	834	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	835	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	836
phungductung	0:8ede47d38d10	837	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	838	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
phungductung	0:8ede47d38d10	839
phungductung	0:8ede47d38d10	840	/* Enable the TIM Capture/Compare 2 DMA request */
phungductung	0:8ede47d38d10	841	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	842	}
phungductung	0:8ede47d38d10	843	break;
phungductung	0:8ede47d38d10	844
phungductung	0:8ede47d38d10	845	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	846	{
phungductung	0:8ede47d38d10	847	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	848	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	849
phungductung	0:8ede47d38d10	850	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	851	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	852
phungductung	0:8ede47d38d10	853	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	854	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
phungductung	0:8ede47d38d10	855
phungductung	0:8ede47d38d10	856	/* Enable the TIM Capture/Compare 3 DMA request */
phungductung	0:8ede47d38d10	857	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
phungductung	0:8ede47d38d10	858	}
phungductung	0:8ede47d38d10	859	break;
phungductung	0:8ede47d38d10	860
phungductung	0:8ede47d38d10	861	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	862	{
phungductung	0:8ede47d38d10	863	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	864	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	865
phungductung	0:8ede47d38d10	866	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	867	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	868
phungductung	0:8ede47d38d10	869	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	870	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
phungductung	0:8ede47d38d10	871
phungductung	0:8ede47d38d10	872	/* Enable the TIM Capture/Compare 4 DMA request */
phungductung	0:8ede47d38d10	873	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
phungductung	0:8ede47d38d10	874	}
phungductung	0:8ede47d38d10	875	break;
phungductung	0:8ede47d38d10	876
phungductung	0:8ede47d38d10	877	default:
phungductung	0:8ede47d38d10	878	break;
phungductung	0:8ede47d38d10	879	}
phungductung	0:8ede47d38d10	880
phungductung	0:8ede47d38d10	881	/* Enable the Output compare channel */
phungductung	0:8ede47d38d10	882	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	883
phungductung	0:8ede47d38d10	884	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	885	{
phungductung	0:8ede47d38d10	886	/* Enable the main output */
phungductung	0:8ede47d38d10	887	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	888	}
phungductung	0:8ede47d38d10	889
phungductung	0:8ede47d38d10	890	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	891	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	892
phungductung	0:8ede47d38d10	893	/* Return function status */
phungductung	0:8ede47d38d10	894	return HAL_OK;
phungductung	0:8ede47d38d10	895	}
phungductung	0:8ede47d38d10	896
phungductung	0:8ede47d38d10	897	/**
phungductung	0:8ede47d38d10	898	* @brief Stops the TIM Output Compare signal generation in DMA mode.
phungductung	0:8ede47d38d10	899	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	900	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	901	* @param Channel: TIM Channel to be disabled.
phungductung	0:8ede47d38d10	902	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	903	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	904	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	905	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	906	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	907	* @retval HAL status
phungductung	0:8ede47d38d10	908	*/
phungductung	0:8ede47d38d10	909	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	910	{
phungductung	0:8ede47d38d10	911	/* Check the parameters */
phungductung	0:8ede47d38d10	912	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	913
phungductung	0:8ede47d38d10	914	switch (Channel)
phungductung	0:8ede47d38d10	915	{
phungductung	0:8ede47d38d10	916	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	917	{
phungductung	0:8ede47d38d10	918	/* Disable the TIM Capture/Compare 1 DMA request */
phungductung	0:8ede47d38d10	919	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	920	}
phungductung	0:8ede47d38d10	921	break;
phungductung	0:8ede47d38d10	922
phungductung	0:8ede47d38d10	923	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	924	{
phungductung	0:8ede47d38d10	925	/* Disable the TIM Capture/Compare 2 DMA request */
phungductung	0:8ede47d38d10	926	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	927	}
phungductung	0:8ede47d38d10	928	break;
phungductung	0:8ede47d38d10	929
phungductung	0:8ede47d38d10	930	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	931	{
phungductung	0:8ede47d38d10	932	/* Disable the TIM Capture/Compare 3 DMA request */
phungductung	0:8ede47d38d10	933	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
phungductung	0:8ede47d38d10	934	}
phungductung	0:8ede47d38d10	935	break;
phungductung	0:8ede47d38d10	936
phungductung	0:8ede47d38d10	937	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	938	{
phungductung	0:8ede47d38d10	939	/* Disable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	940	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
phungductung	0:8ede47d38d10	941	}
phungductung	0:8ede47d38d10	942	break;
phungductung	0:8ede47d38d10	943
phungductung	0:8ede47d38d10	944	default:
phungductung	0:8ede47d38d10	945	break;
phungductung	0:8ede47d38d10	946	}
phungductung	0:8ede47d38d10	947
phungductung	0:8ede47d38d10	948	/* Disable the Output compare channel */
phungductung	0:8ede47d38d10	949	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	950
phungductung	0:8ede47d38d10	951	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	952	{
phungductung	0:8ede47d38d10	953	/* Disable the Main Output */
phungductung	0:8ede47d38d10	954	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	955	}
phungductung	0:8ede47d38d10	956
phungductung	0:8ede47d38d10	957	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	958	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	959
phungductung	0:8ede47d38d10	960	/* Change the htim state */
phungductung	0:8ede47d38d10	961	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	962
phungductung	0:8ede47d38d10	963	/* Return function status */
phungductung	0:8ede47d38d10	964	return HAL_OK;
phungductung	0:8ede47d38d10	965	}
phungductung	0:8ede47d38d10	966
phungductung	0:8ede47d38d10	967	/**
phungductung	0:8ede47d38d10	968	* @}
phungductung	0:8ede47d38d10	969	*/
phungductung	0:8ede47d38d10	970
phungductung	0:8ede47d38d10	971	/** @defgroup TIM_Exported_Functions_Group3 Time PWM functions
phungductung	0:8ede47d38d10	972	* @brief Time PWM functions
phungductung	0:8ede47d38d10	973	*
phungductung	0:8ede47d38d10	974	@verbatim
phungductung	0:8ede47d38d10	975	==============================================================================
phungductung	0:8ede47d38d10	976	##### Time PWM functions #####
phungductung	0:8ede47d38d10	977	==============================================================================
phungductung	0:8ede47d38d10	978	[..]
phungductung	0:8ede47d38d10	979	This section provides functions allowing to:
phungductung	0:8ede47d38d10	980	(+) Initialize and configure the TIM OPWM.
phungductung	0:8ede47d38d10	981	(+) De-initialize the TIM PWM.
phungductung	0:8ede47d38d10	982	(+) Start the Time PWM.
phungductung	0:8ede47d38d10	983	(+) Stop the Time PWM.
phungductung	0:8ede47d38d10	984	(+) Start the Time PWM and enable interrupt.
phungductung	0:8ede47d38d10	985	(+) Stop the Time PWM and disable interrupt.
phungductung	0:8ede47d38d10	986	(+) Start the Time PWM and enable DMA transfer.
phungductung	0:8ede47d38d10	987	(+) Stop the Time PWM and disable DMA transfer.
phungductung	0:8ede47d38d10	988
phungductung	0:8ede47d38d10	989	@endverbatim
phungductung	0:8ede47d38d10	990	* @{
phungductung	0:8ede47d38d10	991	*/
phungductung	0:8ede47d38d10	992	/**
phungductung	0:8ede47d38d10	993	* @brief Initializes the TIM PWM Time Base according to the specified
phungductung	0:8ede47d38d10	994	* parameters in the TIM_HandleTypeDef and create the associated handle.
phungductung	0:8ede47d38d10	995	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	996	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	997	* @retval HAL status
phungductung	0:8ede47d38d10	998	*/
phungductung	0:8ede47d38d10	999	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1000	{
phungductung	0:8ede47d38d10	1001	/* Check the TIM handle allocation */
phungductung	0:8ede47d38d10	1002	if(htim == NULL)
phungductung	0:8ede47d38d10	1003	{
phungductung	0:8ede47d38d10	1004	return HAL_ERROR;
phungductung	0:8ede47d38d10	1005	}
phungductung	0:8ede47d38d10	1006
phungductung	0:8ede47d38d10	1007	/* Check the parameters */
phungductung	0:8ede47d38d10	1008	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	1009	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
phungductung	0:8ede47d38d10	1010	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
phungductung	0:8ede47d38d10	1011
phungductung	0:8ede47d38d10	1012	if(htim->State == HAL_TIM_STATE_RESET)
phungductung	0:8ede47d38d10	1013	{
phungductung	0:8ede47d38d10	1014	/* Allocate lock resource and initialize it */
phungductung	0:8ede47d38d10	1015	htim->Lock = HAL_UNLOCKED;
phungductung	0:8ede47d38d10	1016	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	1017	HAL_TIM_PWM_MspInit(htim);
phungductung	0:8ede47d38d10	1018	}
phungductung	0:8ede47d38d10	1019
phungductung	0:8ede47d38d10	1020	/* Set the TIM state */
phungductung	0:8ede47d38d10	1021	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	1022
phungductung	0:8ede47d38d10	1023	/* Init the base time for the PWM */
phungductung	0:8ede47d38d10	1024	TIM_Base_SetConfig(htim->Instance, &htim->Init);
phungductung	0:8ede47d38d10	1025
phungductung	0:8ede47d38d10	1026	/* Initialize the TIM state*/
phungductung	0:8ede47d38d10	1027	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	1028
phungductung	0:8ede47d38d10	1029	return HAL_OK;
phungductung	0:8ede47d38d10	1030	}
phungductung	0:8ede47d38d10	1031
phungductung	0:8ede47d38d10	1032	/**
phungductung	0:8ede47d38d10	1033	* @brief DeInitializes the TIM peripheral
phungductung	0:8ede47d38d10	1034	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1035	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1036	* @retval HAL status
phungductung	0:8ede47d38d10	1037	*/
phungductung	0:8ede47d38d10	1038	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1039	{
phungductung	0:8ede47d38d10	1040	/* Check the parameters */
phungductung	0:8ede47d38d10	1041	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	1042
phungductung	0:8ede47d38d10	1043	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	1044
phungductung	0:8ede47d38d10	1045	/* Disable the TIM Peripheral Clock */
phungductung	0:8ede47d38d10	1046	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1047
phungductung	0:8ede47d38d10	1048	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	1049	HAL_TIM_PWM_MspDeInit(htim);
phungductung	0:8ede47d38d10	1050
phungductung	0:8ede47d38d10	1051	/* Change TIM state */
phungductung	0:8ede47d38d10	1052	htim->State = HAL_TIM_STATE_RESET;
phungductung	0:8ede47d38d10	1053
phungductung	0:8ede47d38d10	1054	/* Release Lock */
phungductung	0:8ede47d38d10	1055	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	1056
phungductung	0:8ede47d38d10	1057	return HAL_OK;
phungductung	0:8ede47d38d10	1058	}
phungductung	0:8ede47d38d10	1059
phungductung	0:8ede47d38d10	1060	/**
phungductung	0:8ede47d38d10	1061	* @brief Initializes the TIM PWM MSP.
phungductung	0:8ede47d38d10	1062	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1063	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1064	* @retval None
phungductung	0:8ede47d38d10	1065	*/
phungductung	0:8ede47d38d10	1066	__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1067	{
phungductung	0:8ede47d38d10	1068	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	1069	UNUSED(htim);
phungductung	0:8ede47d38d10	1070
phungductung	0:8ede47d38d10	1071	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	1072	the HAL_TIM_PWM_MspInit could be implemented in the user file
phungductung	0:8ede47d38d10	1073	*/
phungductung	0:8ede47d38d10	1074	}
phungductung	0:8ede47d38d10	1075
phungductung	0:8ede47d38d10	1076	/**
phungductung	0:8ede47d38d10	1077	* @brief DeInitializes TIM PWM MSP.
phungductung	0:8ede47d38d10	1078	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1079	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1080	* @retval None
phungductung	0:8ede47d38d10	1081	*/
phungductung	0:8ede47d38d10	1082	__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1083	{
phungductung	0:8ede47d38d10	1084	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	1085	UNUSED(htim);
phungductung	0:8ede47d38d10	1086
phungductung	0:8ede47d38d10	1087	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	1088	the HAL_TIM_PWM_MspDeInit could be implemented in the user file
phungductung	0:8ede47d38d10	1089	*/
phungductung	0:8ede47d38d10	1090	}
phungductung	0:8ede47d38d10	1091
phungductung	0:8ede47d38d10	1092	/**
phungductung	0:8ede47d38d10	1093	* @brief Starts the PWM signal generation.
phungductung	0:8ede47d38d10	1094	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1095	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1096	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	1097	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1098	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1099	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1100	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1101	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1102	* @retval HAL status
phungductung	0:8ede47d38d10	1103	*/
phungductung	0:8ede47d38d10	1104	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1105	{
phungductung	0:8ede47d38d10	1106	/* Check the parameters */
phungductung	0:8ede47d38d10	1107	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1108
phungductung	0:8ede47d38d10	1109	/* Enable the Capture compare channel */
phungductung	0:8ede47d38d10	1110	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	1111
phungductung	0:8ede47d38d10	1112	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	1113	{
phungductung	0:8ede47d38d10	1114	/* Enable the main output */
phungductung	0:8ede47d38d10	1115	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	1116	}
phungductung	0:8ede47d38d10	1117
phungductung	0:8ede47d38d10	1118	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	1119	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	1120
phungductung	0:8ede47d38d10	1121	/* Return function status */
phungductung	0:8ede47d38d10	1122	return HAL_OK;
phungductung	0:8ede47d38d10	1123	}
phungductung	0:8ede47d38d10	1124
phungductung	0:8ede47d38d10	1125	/**
phungductung	0:8ede47d38d10	1126	* @brief Stops the PWM signal generation.
phungductung	0:8ede47d38d10	1127	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1128	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1129	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	1130	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1131	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1132	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1133	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1134	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1135	* @retval HAL status
phungductung	0:8ede47d38d10	1136	*/
phungductung	0:8ede47d38d10	1137	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1138	{
phungductung	0:8ede47d38d10	1139	/* Check the parameters */
phungductung	0:8ede47d38d10	1140	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1141
phungductung	0:8ede47d38d10	1142	/* Disable the Capture compare channel */
phungductung	0:8ede47d38d10	1143	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	1144
phungductung	0:8ede47d38d10	1145	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	1146	{
phungductung	0:8ede47d38d10	1147	/* Disable the Main Output */
phungductung	0:8ede47d38d10	1148	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	1149	}
phungductung	0:8ede47d38d10	1150
phungductung	0:8ede47d38d10	1151	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	1152	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1153
phungductung	0:8ede47d38d10	1154	/* Change the htim state */
phungductung	0:8ede47d38d10	1155	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	1156
phungductung	0:8ede47d38d10	1157	/* Return function status */
phungductung	0:8ede47d38d10	1158	return HAL_OK;
phungductung	0:8ede47d38d10	1159	}
phungductung	0:8ede47d38d10	1160
phungductung	0:8ede47d38d10	1161	/**
phungductung	0:8ede47d38d10	1162	* @brief Starts the PWM signal generation in interrupt mode.
phungductung	0:8ede47d38d10	1163	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1164	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1165	* @param Channel: TIM Channel to be disabled.
phungductung	0:8ede47d38d10	1166	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1167	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1168	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1169	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1170	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1171	* @retval HAL status
phungductung	0:8ede47d38d10	1172	*/
phungductung	0:8ede47d38d10	1173	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1174	{
phungductung	0:8ede47d38d10	1175	/* Check the parameters */
phungductung	0:8ede47d38d10	1176	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1177
phungductung	0:8ede47d38d10	1178	switch (Channel)
phungductung	0:8ede47d38d10	1179	{
phungductung	0:8ede47d38d10	1180	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1181	{
phungductung	0:8ede47d38d10	1182	/* Enable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	1183	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	1184	}
phungductung	0:8ede47d38d10	1185	break;
phungductung	0:8ede47d38d10	1186
phungductung	0:8ede47d38d10	1187	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1188	{
phungductung	0:8ede47d38d10	1189	/* Enable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	1190	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	1191	}
phungductung	0:8ede47d38d10	1192	break;
phungductung	0:8ede47d38d10	1193
phungductung	0:8ede47d38d10	1194	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1195	{
phungductung	0:8ede47d38d10	1196	/* Enable the TIM Capture/Compare 3 interrupt */
phungductung	0:8ede47d38d10	1197	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
phungductung	0:8ede47d38d10	1198	}
phungductung	0:8ede47d38d10	1199	break;
phungductung	0:8ede47d38d10	1200
phungductung	0:8ede47d38d10	1201	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1202	{
phungductung	0:8ede47d38d10	1203	/* Enable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	1204	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
phungductung	0:8ede47d38d10	1205	}
phungductung	0:8ede47d38d10	1206	break;
phungductung	0:8ede47d38d10	1207
phungductung	0:8ede47d38d10	1208	default:
phungductung	0:8ede47d38d10	1209	break;
phungductung	0:8ede47d38d10	1210	}
phungductung	0:8ede47d38d10	1211
phungductung	0:8ede47d38d10	1212	/* Enable the Capture compare channel */
phungductung	0:8ede47d38d10	1213	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	1214
phungductung	0:8ede47d38d10	1215	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	1216	{
phungductung	0:8ede47d38d10	1217	/* Enable the main output */
phungductung	0:8ede47d38d10	1218	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	1219	}
phungductung	0:8ede47d38d10	1220
phungductung	0:8ede47d38d10	1221	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	1222	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	1223
phungductung	0:8ede47d38d10	1224	/* Return function status */
phungductung	0:8ede47d38d10	1225	return HAL_OK;
phungductung	0:8ede47d38d10	1226	}
phungductung	0:8ede47d38d10	1227
phungductung	0:8ede47d38d10	1228	/**
phungductung	0:8ede47d38d10	1229	* @brief Stops the PWM signal generation in interrupt mode.
phungductung	0:8ede47d38d10	1230	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1231	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1232	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	1233	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1234	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1235	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1236	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1237	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1238	* @retval HAL status
phungductung	0:8ede47d38d10	1239	*/
phungductung	0:8ede47d38d10	1240	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1241	{
phungductung	0:8ede47d38d10	1242	/* Check the parameters */
phungductung	0:8ede47d38d10	1243	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1244
phungductung	0:8ede47d38d10	1245	switch (Channel)
phungductung	0:8ede47d38d10	1246	{
phungductung	0:8ede47d38d10	1247	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1248	{
phungductung	0:8ede47d38d10	1249	/* Disable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	1250	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	1251	}
phungductung	0:8ede47d38d10	1252	break;
phungductung	0:8ede47d38d10	1253
phungductung	0:8ede47d38d10	1254	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1255	{
phungductung	0:8ede47d38d10	1256	/* Disable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	1257	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	1258	}
phungductung	0:8ede47d38d10	1259	break;
phungductung	0:8ede47d38d10	1260
phungductung	0:8ede47d38d10	1261	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1262	{
phungductung	0:8ede47d38d10	1263	/* Disable the TIM Capture/Compare 3 interrupt */
phungductung	0:8ede47d38d10	1264	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
phungductung	0:8ede47d38d10	1265	}
phungductung	0:8ede47d38d10	1266	break;
phungductung	0:8ede47d38d10	1267
phungductung	0:8ede47d38d10	1268	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1269	{
phungductung	0:8ede47d38d10	1270	/* Disable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	1271	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
phungductung	0:8ede47d38d10	1272	}
phungductung	0:8ede47d38d10	1273	break;
phungductung	0:8ede47d38d10	1274
phungductung	0:8ede47d38d10	1275	default:
phungductung	0:8ede47d38d10	1276	break;
phungductung	0:8ede47d38d10	1277	}
phungductung	0:8ede47d38d10	1278
phungductung	0:8ede47d38d10	1279	/* Disable the Capture compare channel */
phungductung	0:8ede47d38d10	1280	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	1281
phungductung	0:8ede47d38d10	1282	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	1283	{
phungductung	0:8ede47d38d10	1284	/* Disable the Main Output */
phungductung	0:8ede47d38d10	1285	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	1286	}
phungductung	0:8ede47d38d10	1287
phungductung	0:8ede47d38d10	1288	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	1289	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1290
phungductung	0:8ede47d38d10	1291	/* Return function status */
phungductung	0:8ede47d38d10	1292	return HAL_OK;
phungductung	0:8ede47d38d10	1293	}
phungductung	0:8ede47d38d10	1294
phungductung	0:8ede47d38d10	1295	/**
phungductung	0:8ede47d38d10	1296	* @brief Starts the TIM PWM signal generation in DMA mode.
phungductung	0:8ede47d38d10	1297	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1298	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1299	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	1300	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1301	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1302	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1303	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1304	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1305	* @param pData: The source Buffer address.
phungductung	0:8ede47d38d10	1306	* @param Length: The length of data to be transferred from memory to TIM peripheral
phungductung	0:8ede47d38d10	1307	* @retval HAL status
phungductung	0:8ede47d38d10	1308	*/
phungductung	0:8ede47d38d10	1309	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
phungductung	0:8ede47d38d10	1310	{
phungductung	0:8ede47d38d10	1311	/* Check the parameters */
phungductung	0:8ede47d38d10	1312	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1313
phungductung	0:8ede47d38d10	1314	if((htim->State == HAL_TIM_STATE_BUSY))
phungductung	0:8ede47d38d10	1315	{
phungductung	0:8ede47d38d10	1316	return HAL_BUSY;
phungductung	0:8ede47d38d10	1317	}
phungductung	0:8ede47d38d10	1318	else if((htim->State == HAL_TIM_STATE_READY))
phungductung	0:8ede47d38d10	1319	{
phungductung	0:8ede47d38d10	1320	if(((uint32_t)pData == 0 ) && (Length > 0))
phungductung	0:8ede47d38d10	1321	{
phungductung	0:8ede47d38d10	1322	return HAL_ERROR;
phungductung	0:8ede47d38d10	1323	}
phungductung	0:8ede47d38d10	1324	else
phungductung	0:8ede47d38d10	1325	{
phungductung	0:8ede47d38d10	1326	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	1327	}
phungductung	0:8ede47d38d10	1328	}
phungductung	0:8ede47d38d10	1329	switch (Channel)
phungductung	0:8ede47d38d10	1330	{
phungductung	0:8ede47d38d10	1331	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1332	{
phungductung	0:8ede47d38d10	1333	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1334	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	1335
phungductung	0:8ede47d38d10	1336	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1337	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1338
phungductung	0:8ede47d38d10	1339	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1340	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
phungductung	0:8ede47d38d10	1341
phungductung	0:8ede47d38d10	1342	/* Enable the TIM Capture/Compare 1 DMA request */
phungductung	0:8ede47d38d10	1343	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	1344	}
phungductung	0:8ede47d38d10	1345	break;
phungductung	0:8ede47d38d10	1346
phungductung	0:8ede47d38d10	1347	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1348	{
phungductung	0:8ede47d38d10	1349	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1350	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	1351
phungductung	0:8ede47d38d10	1352	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1353	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1354
phungductung	0:8ede47d38d10	1355	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1356	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
phungductung	0:8ede47d38d10	1357
phungductung	0:8ede47d38d10	1358	/* Enable the TIM Capture/Compare 2 DMA request */
phungductung	0:8ede47d38d10	1359	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	1360	}
phungductung	0:8ede47d38d10	1361	break;
phungductung	0:8ede47d38d10	1362
phungductung	0:8ede47d38d10	1363	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1364	{
phungductung	0:8ede47d38d10	1365	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1366	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	1367
phungductung	0:8ede47d38d10	1368	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1369	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1370
phungductung	0:8ede47d38d10	1371	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1372	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
phungductung	0:8ede47d38d10	1373
phungductung	0:8ede47d38d10	1374	/* Enable the TIM Output Capture/Compare 3 request */
phungductung	0:8ede47d38d10	1375	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
phungductung	0:8ede47d38d10	1376	}
phungductung	0:8ede47d38d10	1377	break;
phungductung	0:8ede47d38d10	1378
phungductung	0:8ede47d38d10	1379	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1380	{
phungductung	0:8ede47d38d10	1381	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1382	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	1383
phungductung	0:8ede47d38d10	1384	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1385	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1386
phungductung	0:8ede47d38d10	1387	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1388	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
phungductung	0:8ede47d38d10	1389
phungductung	0:8ede47d38d10	1390	/* Enable the TIM Capture/Compare 4 DMA request */
phungductung	0:8ede47d38d10	1391	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
phungductung	0:8ede47d38d10	1392	}
phungductung	0:8ede47d38d10	1393	break;
phungductung	0:8ede47d38d10	1394
phungductung	0:8ede47d38d10	1395	default:
phungductung	0:8ede47d38d10	1396	break;
phungductung	0:8ede47d38d10	1397	}
phungductung	0:8ede47d38d10	1398
phungductung	0:8ede47d38d10	1399	/* Enable the Capture compare channel */
phungductung	0:8ede47d38d10	1400	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	1401
phungductung	0:8ede47d38d10	1402	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	1403	{
phungductung	0:8ede47d38d10	1404	/* Enable the main output */
phungductung	0:8ede47d38d10	1405	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	1406	}
phungductung	0:8ede47d38d10	1407
phungductung	0:8ede47d38d10	1408	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	1409	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	1410
phungductung	0:8ede47d38d10	1411	/* Return function status */
phungductung	0:8ede47d38d10	1412	return HAL_OK;
phungductung	0:8ede47d38d10	1413	}
phungductung	0:8ede47d38d10	1414
phungductung	0:8ede47d38d10	1415	/**
phungductung	0:8ede47d38d10	1416	* @brief Stops the TIM PWM signal generation in DMA mode.
phungductung	0:8ede47d38d10	1417	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1418	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1419	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	1420	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1421	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1422	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1423	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1424	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1425	* @retval HAL status
phungductung	0:8ede47d38d10	1426	*/
phungductung	0:8ede47d38d10	1427	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1428	{
phungductung	0:8ede47d38d10	1429	/* Check the parameters */
phungductung	0:8ede47d38d10	1430	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1431
phungductung	0:8ede47d38d10	1432	switch (Channel)
phungductung	0:8ede47d38d10	1433	{
phungductung	0:8ede47d38d10	1434	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1435	{
phungductung	0:8ede47d38d10	1436	/* Disable the TIM Capture/Compare 1 DMA request */
phungductung	0:8ede47d38d10	1437	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	1438	}
phungductung	0:8ede47d38d10	1439	break;
phungductung	0:8ede47d38d10	1440
phungductung	0:8ede47d38d10	1441	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1442	{
phungductung	0:8ede47d38d10	1443	/* Disable the TIM Capture/Compare 2 DMA request */
phungductung	0:8ede47d38d10	1444	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	1445	}
phungductung	0:8ede47d38d10	1446	break;
phungductung	0:8ede47d38d10	1447
phungductung	0:8ede47d38d10	1448	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1449	{
phungductung	0:8ede47d38d10	1450	/* Disable the TIM Capture/Compare 3 DMA request */
phungductung	0:8ede47d38d10	1451	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
phungductung	0:8ede47d38d10	1452	}
phungductung	0:8ede47d38d10	1453	break;
phungductung	0:8ede47d38d10	1454
phungductung	0:8ede47d38d10	1455	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1456	{
phungductung	0:8ede47d38d10	1457	/* Disable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	1458	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
phungductung	0:8ede47d38d10	1459	}
phungductung	0:8ede47d38d10	1460	break;
phungductung	0:8ede47d38d10	1461
phungductung	0:8ede47d38d10	1462	default:
phungductung	0:8ede47d38d10	1463	break;
phungductung	0:8ede47d38d10	1464	}
phungductung	0:8ede47d38d10	1465
phungductung	0:8ede47d38d10	1466	/* Disable the Capture compare channel */
phungductung	0:8ede47d38d10	1467	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	1468
phungductung	0:8ede47d38d10	1469	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	1470	{
phungductung	0:8ede47d38d10	1471	/* Disable the Main Output */
phungductung	0:8ede47d38d10	1472	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	1473	}
phungductung	0:8ede47d38d10	1474
phungductung	0:8ede47d38d10	1475	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	1476	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1477
phungductung	0:8ede47d38d10	1478	/* Change the htim state */
phungductung	0:8ede47d38d10	1479	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	1480
phungductung	0:8ede47d38d10	1481	/* Return function status */
phungductung	0:8ede47d38d10	1482	return HAL_OK;
phungductung	0:8ede47d38d10	1483	}
phungductung	0:8ede47d38d10	1484
phungductung	0:8ede47d38d10	1485	/**
phungductung	0:8ede47d38d10	1486	* @}
phungductung	0:8ede47d38d10	1487	*/
phungductung	0:8ede47d38d10	1488
phungductung	0:8ede47d38d10	1489	/** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions
phungductung	0:8ede47d38d10	1490	* @brief Time Input Capture functions
phungductung	0:8ede47d38d10	1491	*
phungductung	0:8ede47d38d10	1492	@verbatim
phungductung	0:8ede47d38d10	1493	==============================================================================
phungductung	0:8ede47d38d10	1494	##### Time Input Capture functions #####
phungductung	0:8ede47d38d10	1495	==============================================================================
phungductung	0:8ede47d38d10	1496	[..]
phungductung	0:8ede47d38d10	1497	This section provides functions allowing to:
phungductung	0:8ede47d38d10	1498	(+) Initialize and configure the TIM Input Capture.
phungductung	0:8ede47d38d10	1499	(+) De-initialize the TIM Input Capture.
phungductung	0:8ede47d38d10	1500	(+) Start the Time Input Capture.
phungductung	0:8ede47d38d10	1501	(+) Stop the Time Input Capture.
phungductung	0:8ede47d38d10	1502	(+) Start the Time Input Capture and enable interrupt.
phungductung	0:8ede47d38d10	1503	(+) Stop the Time Input Capture and disable interrupt.
phungductung	0:8ede47d38d10	1504	(+) Start the Time Input Capture and enable DMA transfer.
phungductung	0:8ede47d38d10	1505	(+) Stop the Time Input Capture and disable DMA transfer.
phungductung	0:8ede47d38d10	1506
phungductung	0:8ede47d38d10	1507	@endverbatim
phungductung	0:8ede47d38d10	1508	* @{
phungductung	0:8ede47d38d10	1509	*/
phungductung	0:8ede47d38d10	1510	/**
phungductung	0:8ede47d38d10	1511	* @brief Initializes the TIM Input Capture Time base according to the specified
phungductung	0:8ede47d38d10	1512	* parameters in the TIM_HandleTypeDef and create the associated handle.
phungductung	0:8ede47d38d10	1513	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1514	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1515	* @retval HAL status
phungductung	0:8ede47d38d10	1516	*/
phungductung	0:8ede47d38d10	1517	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1518	{
phungductung	0:8ede47d38d10	1519	/* Check the TIM handle allocation */
phungductung	0:8ede47d38d10	1520	if(htim == NULL)
phungductung	0:8ede47d38d10	1521	{
phungductung	0:8ede47d38d10	1522	return HAL_ERROR;
phungductung	0:8ede47d38d10	1523	}
phungductung	0:8ede47d38d10	1524
phungductung	0:8ede47d38d10	1525	/* Check the parameters */
phungductung	0:8ede47d38d10	1526	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	1527	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
phungductung	0:8ede47d38d10	1528	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
phungductung	0:8ede47d38d10	1529
phungductung	0:8ede47d38d10	1530	if(htim->State == HAL_TIM_STATE_RESET)
phungductung	0:8ede47d38d10	1531	{
phungductung	0:8ede47d38d10	1532	/* Allocate lock resource and initialize it */
phungductung	0:8ede47d38d10	1533	htim->Lock = HAL_UNLOCKED;
phungductung	0:8ede47d38d10	1534	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	1535	HAL_TIM_IC_MspInit(htim);
phungductung	0:8ede47d38d10	1536	}
phungductung	0:8ede47d38d10	1537
phungductung	0:8ede47d38d10	1538	/* Set the TIM state */
phungductung	0:8ede47d38d10	1539	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	1540
phungductung	0:8ede47d38d10	1541	/* Init the base time for the input capture */
phungductung	0:8ede47d38d10	1542	TIM_Base_SetConfig(htim->Instance, &htim->Init);
phungductung	0:8ede47d38d10	1543
phungductung	0:8ede47d38d10	1544	/* Initialize the TIM state*/
phungductung	0:8ede47d38d10	1545	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	1546
phungductung	0:8ede47d38d10	1547	return HAL_OK;
phungductung	0:8ede47d38d10	1548	}
phungductung	0:8ede47d38d10	1549
phungductung	0:8ede47d38d10	1550	/**
phungductung	0:8ede47d38d10	1551	* @brief DeInitializes the TIM peripheral
phungductung	0:8ede47d38d10	1552	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1553	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1554	* @retval HAL status
phungductung	0:8ede47d38d10	1555	*/
phungductung	0:8ede47d38d10	1556	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1557	{
phungductung	0:8ede47d38d10	1558	/* Check the parameters */
phungductung	0:8ede47d38d10	1559	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	1560
phungductung	0:8ede47d38d10	1561	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	1562
phungductung	0:8ede47d38d10	1563	/* Disable the TIM Peripheral Clock */
phungductung	0:8ede47d38d10	1564	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1565
phungductung	0:8ede47d38d10	1566	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	1567	HAL_TIM_IC_MspDeInit(htim);
phungductung	0:8ede47d38d10	1568
phungductung	0:8ede47d38d10	1569	/* Change TIM state */
phungductung	0:8ede47d38d10	1570	htim->State = HAL_TIM_STATE_RESET;
phungductung	0:8ede47d38d10	1571
phungductung	0:8ede47d38d10	1572	/* Release Lock */
phungductung	0:8ede47d38d10	1573	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	1574
phungductung	0:8ede47d38d10	1575	return HAL_OK;
phungductung	0:8ede47d38d10	1576	}
phungductung	0:8ede47d38d10	1577
phungductung	0:8ede47d38d10	1578	/**
phungductung	0:8ede47d38d10	1579	* @brief Initializes the TIM INput Capture MSP.
phungductung	0:8ede47d38d10	1580	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1581	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1582	* @retval None
phungductung	0:8ede47d38d10	1583	*/
phungductung	0:8ede47d38d10	1584	__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1585	{
phungductung	0:8ede47d38d10	1586	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	1587	UNUSED(htim);
phungductung	0:8ede47d38d10	1588
phungductung	0:8ede47d38d10	1589	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	1590	the HAL_TIM_IC_MspInit could be implemented in the user file
phungductung	0:8ede47d38d10	1591	*/
phungductung	0:8ede47d38d10	1592	}
phungductung	0:8ede47d38d10	1593
phungductung	0:8ede47d38d10	1594	/**
phungductung	0:8ede47d38d10	1595	* @brief DeInitializes TIM Input Capture MSP.
phungductung	0:8ede47d38d10	1596	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1597	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1598	* @retval None
phungductung	0:8ede47d38d10	1599	*/
phungductung	0:8ede47d38d10	1600	__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	1601	{
phungductung	0:8ede47d38d10	1602	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	1603	UNUSED(htim);
phungductung	0:8ede47d38d10	1604
phungductung	0:8ede47d38d10	1605	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	1606	the HAL_TIM_IC_MspDeInit could be implemented in the user file
phungductung	0:8ede47d38d10	1607	*/
phungductung	0:8ede47d38d10	1608	}
phungductung	0:8ede47d38d10	1609
phungductung	0:8ede47d38d10	1610	/**
phungductung	0:8ede47d38d10	1611	* @brief Starts the TIM Input Capture measurement.
phungductung	0:8ede47d38d10	1612	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1613	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1614	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	1615	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1616	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1617	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1618	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1619	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1620	* @retval HAL status
phungductung	0:8ede47d38d10	1621	*/
phungductung	0:8ede47d38d10	1622	HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1623	{
phungductung	0:8ede47d38d10	1624	/* Check the parameters */
phungductung	0:8ede47d38d10	1625	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1626
phungductung	0:8ede47d38d10	1627	/* Enable the Input Capture channel */
phungductung	0:8ede47d38d10	1628	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	1629
phungductung	0:8ede47d38d10	1630	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	1631	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	1632
phungductung	0:8ede47d38d10	1633	/* Return function status */
phungductung	0:8ede47d38d10	1634	return HAL_OK;
phungductung	0:8ede47d38d10	1635	}
phungductung	0:8ede47d38d10	1636
phungductung	0:8ede47d38d10	1637	/**
phungductung	0:8ede47d38d10	1638	* @brief Stops the TIM Input Capture measurement.
phungductung	0:8ede47d38d10	1639	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1640	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1641	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	1642	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1643	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1644	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1645	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1646	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1647	* @retval HAL status
phungductung	0:8ede47d38d10	1648	*/
phungductung	0:8ede47d38d10	1649	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1650	{
phungductung	0:8ede47d38d10	1651	/* Check the parameters */
phungductung	0:8ede47d38d10	1652	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1653
phungductung	0:8ede47d38d10	1654	/* Disable the Input Capture channel */
phungductung	0:8ede47d38d10	1655	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	1656
phungductung	0:8ede47d38d10	1657	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	1658	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1659
phungductung	0:8ede47d38d10	1660	/* Return function status */
phungductung	0:8ede47d38d10	1661	return HAL_OK;
phungductung	0:8ede47d38d10	1662	}
phungductung	0:8ede47d38d10	1663
phungductung	0:8ede47d38d10	1664	/**
phungductung	0:8ede47d38d10	1665	* @brief Starts the TIM Input Capture measurement in interrupt mode.
phungductung	0:8ede47d38d10	1666	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1667	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1668	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	1669	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1670	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1671	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1672	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1673	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1674	* @retval HAL status
phungductung	0:8ede47d38d10	1675	*/
phungductung	0:8ede47d38d10	1676	HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1677	{
phungductung	0:8ede47d38d10	1678	/* Check the parameters */
phungductung	0:8ede47d38d10	1679	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1680
phungductung	0:8ede47d38d10	1681	switch (Channel)
phungductung	0:8ede47d38d10	1682	{
phungductung	0:8ede47d38d10	1683	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1684	{
phungductung	0:8ede47d38d10	1685	/* Enable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	1686	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	1687	}
phungductung	0:8ede47d38d10	1688	break;
phungductung	0:8ede47d38d10	1689
phungductung	0:8ede47d38d10	1690	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1691	{
phungductung	0:8ede47d38d10	1692	/* Enable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	1693	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	1694	}
phungductung	0:8ede47d38d10	1695	break;
phungductung	0:8ede47d38d10	1696
phungductung	0:8ede47d38d10	1697	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1698	{
phungductung	0:8ede47d38d10	1699	/* Enable the TIM Capture/Compare 3 interrupt */
phungductung	0:8ede47d38d10	1700	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
phungductung	0:8ede47d38d10	1701	}
phungductung	0:8ede47d38d10	1702	break;
phungductung	0:8ede47d38d10	1703
phungductung	0:8ede47d38d10	1704	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1705	{
phungductung	0:8ede47d38d10	1706	/* Enable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	1707	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
phungductung	0:8ede47d38d10	1708	}
phungductung	0:8ede47d38d10	1709	break;
phungductung	0:8ede47d38d10	1710
phungductung	0:8ede47d38d10	1711	default:
phungductung	0:8ede47d38d10	1712	break;
phungductung	0:8ede47d38d10	1713	}
phungductung	0:8ede47d38d10	1714	/* Enable the Input Capture channel */
phungductung	0:8ede47d38d10	1715	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	1716
phungductung	0:8ede47d38d10	1717	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	1718	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	1719
phungductung	0:8ede47d38d10	1720	/* Return function status */
phungductung	0:8ede47d38d10	1721	return HAL_OK;
phungductung	0:8ede47d38d10	1722	}
phungductung	0:8ede47d38d10	1723
phungductung	0:8ede47d38d10	1724	/**
phungductung	0:8ede47d38d10	1725	* @brief Stops the TIM Input Capture measurement in interrupt mode.
phungductung	0:8ede47d38d10	1726	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1727	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1728	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	1729	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1730	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1731	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1732	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1733	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1734	* @retval HAL status
phungductung	0:8ede47d38d10	1735	*/
phungductung	0:8ede47d38d10	1736	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1737	{
phungductung	0:8ede47d38d10	1738	/* Check the parameters */
phungductung	0:8ede47d38d10	1739	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1740
phungductung	0:8ede47d38d10	1741	switch (Channel)
phungductung	0:8ede47d38d10	1742	{
phungductung	0:8ede47d38d10	1743	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1744	{
phungductung	0:8ede47d38d10	1745	/* Disable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	1746	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	1747	}
phungductung	0:8ede47d38d10	1748	break;
phungductung	0:8ede47d38d10	1749
phungductung	0:8ede47d38d10	1750	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1751	{
phungductung	0:8ede47d38d10	1752	/* Disable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	1753	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	1754	}
phungductung	0:8ede47d38d10	1755	break;
phungductung	0:8ede47d38d10	1756
phungductung	0:8ede47d38d10	1757	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1758	{
phungductung	0:8ede47d38d10	1759	/* Disable the TIM Capture/Compare 3 interrupt */
phungductung	0:8ede47d38d10	1760	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
phungductung	0:8ede47d38d10	1761	}
phungductung	0:8ede47d38d10	1762	break;
phungductung	0:8ede47d38d10	1763
phungductung	0:8ede47d38d10	1764	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1765	{
phungductung	0:8ede47d38d10	1766	/* Disable the TIM Capture/Compare 4 interrupt */
phungductung	0:8ede47d38d10	1767	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
phungductung	0:8ede47d38d10	1768	}
phungductung	0:8ede47d38d10	1769	break;
phungductung	0:8ede47d38d10	1770
phungductung	0:8ede47d38d10	1771	default:
phungductung	0:8ede47d38d10	1772	break;
phungductung	0:8ede47d38d10	1773	}
phungductung	0:8ede47d38d10	1774
phungductung	0:8ede47d38d10	1775	/* Disable the Input Capture channel */
phungductung	0:8ede47d38d10	1776	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	1777
phungductung	0:8ede47d38d10	1778	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	1779	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1780
phungductung	0:8ede47d38d10	1781	/* Return function status */
phungductung	0:8ede47d38d10	1782	return HAL_OK;
phungductung	0:8ede47d38d10	1783	}
phungductung	0:8ede47d38d10	1784
phungductung	0:8ede47d38d10	1785	/**
phungductung	0:8ede47d38d10	1786	* @brief Starts the TIM Input Capture measurement on in DMA mode.
phungductung	0:8ede47d38d10	1787	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1788	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1789	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	1790	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1791	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1792	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1793	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1794	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1795	* @param pData: The destination Buffer address.
phungductung	0:8ede47d38d10	1796	* @param Length: The length of data to be transferred from TIM peripheral to memory.
phungductung	0:8ede47d38d10	1797	* @retval HAL status
phungductung	0:8ede47d38d10	1798	*/
phungductung	0:8ede47d38d10	1799	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
phungductung	0:8ede47d38d10	1800	{
phungductung	0:8ede47d38d10	1801	/* Check the parameters */
phungductung	0:8ede47d38d10	1802	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1803	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	1804
phungductung	0:8ede47d38d10	1805	if((htim->State == HAL_TIM_STATE_BUSY))
phungductung	0:8ede47d38d10	1806	{
phungductung	0:8ede47d38d10	1807	return HAL_BUSY;
phungductung	0:8ede47d38d10	1808	}
phungductung	0:8ede47d38d10	1809	else if((htim->State == HAL_TIM_STATE_READY))
phungductung	0:8ede47d38d10	1810	{
phungductung	0:8ede47d38d10	1811	if((pData == 0 ) && (Length > 0))
phungductung	0:8ede47d38d10	1812	{
phungductung	0:8ede47d38d10	1813	return HAL_ERROR;
phungductung	0:8ede47d38d10	1814	}
phungductung	0:8ede47d38d10	1815	else
phungductung	0:8ede47d38d10	1816	{
phungductung	0:8ede47d38d10	1817	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	1818	}
phungductung	0:8ede47d38d10	1819	}
phungductung	0:8ede47d38d10	1820
phungductung	0:8ede47d38d10	1821	switch (Channel)
phungductung	0:8ede47d38d10	1822	{
phungductung	0:8ede47d38d10	1823	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1824	{
phungductung	0:8ede47d38d10	1825	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1826	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	1827
phungductung	0:8ede47d38d10	1828	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1829	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1830
phungductung	0:8ede47d38d10	1831	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1832	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
phungductung	0:8ede47d38d10	1833
phungductung	0:8ede47d38d10	1834	/* Enable the TIM Capture/Compare 1 DMA request */
phungductung	0:8ede47d38d10	1835	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	1836	}
phungductung	0:8ede47d38d10	1837	break;
phungductung	0:8ede47d38d10	1838
phungductung	0:8ede47d38d10	1839	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1840	{
phungductung	0:8ede47d38d10	1841	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1842	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	1843
phungductung	0:8ede47d38d10	1844	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1845	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1846
phungductung	0:8ede47d38d10	1847	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1848	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
phungductung	0:8ede47d38d10	1849
phungductung	0:8ede47d38d10	1850	/* Enable the TIM Capture/Compare 2 DMA request */
phungductung	0:8ede47d38d10	1851	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	1852	}
phungductung	0:8ede47d38d10	1853	break;
phungductung	0:8ede47d38d10	1854
phungductung	0:8ede47d38d10	1855	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1856	{
phungductung	0:8ede47d38d10	1857	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1858	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	1859
phungductung	0:8ede47d38d10	1860	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1861	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1862
phungductung	0:8ede47d38d10	1863	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1864	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
phungductung	0:8ede47d38d10	1865
phungductung	0:8ede47d38d10	1866	/* Enable the TIM Capture/Compare 3 DMA request */
phungductung	0:8ede47d38d10	1867	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
phungductung	0:8ede47d38d10	1868	}
phungductung	0:8ede47d38d10	1869	break;
phungductung	0:8ede47d38d10	1870
phungductung	0:8ede47d38d10	1871	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1872	{
phungductung	0:8ede47d38d10	1873	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	1874	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	1875
phungductung	0:8ede47d38d10	1876	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	1877	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	1878
phungductung	0:8ede47d38d10	1879	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	1880	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
phungductung	0:8ede47d38d10	1881
phungductung	0:8ede47d38d10	1882	/* Enable the TIM Capture/Compare 4 DMA request */
phungductung	0:8ede47d38d10	1883	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
phungductung	0:8ede47d38d10	1884	}
phungductung	0:8ede47d38d10	1885	break;
phungductung	0:8ede47d38d10	1886
phungductung	0:8ede47d38d10	1887	default:
phungductung	0:8ede47d38d10	1888	break;
phungductung	0:8ede47d38d10	1889	}
phungductung	0:8ede47d38d10	1890
phungductung	0:8ede47d38d10	1891	/* Enable the Input Capture channel */
phungductung	0:8ede47d38d10	1892	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	1893
phungductung	0:8ede47d38d10	1894	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	1895	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	1896
phungductung	0:8ede47d38d10	1897	/* Return function status */
phungductung	0:8ede47d38d10	1898	return HAL_OK;
phungductung	0:8ede47d38d10	1899	}
phungductung	0:8ede47d38d10	1900
phungductung	0:8ede47d38d10	1901	/**
phungductung	0:8ede47d38d10	1902	* @brief Stops the TIM Input Capture measurement on in DMA mode.
phungductung	0:8ede47d38d10	1903	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1904	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1905	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	1906	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1907	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	1908	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	1909	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	1910	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	1911	* @retval HAL status
phungductung	0:8ede47d38d10	1912	*/
phungductung	0:8ede47d38d10	1913	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	1914	{
phungductung	0:8ede47d38d10	1915	/* Check the parameters */
phungductung	0:8ede47d38d10	1916	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
phungductung	0:8ede47d38d10	1917	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	1918
phungductung	0:8ede47d38d10	1919	switch (Channel)
phungductung	0:8ede47d38d10	1920	{
phungductung	0:8ede47d38d10	1921	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	1922	{
phungductung	0:8ede47d38d10	1923	/* Disable the TIM Capture/Compare 1 DMA request */
phungductung	0:8ede47d38d10	1924	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	1925	}
phungductung	0:8ede47d38d10	1926	break;
phungductung	0:8ede47d38d10	1927
phungductung	0:8ede47d38d10	1928	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	1929	{
phungductung	0:8ede47d38d10	1930	/* Disable the TIM Capture/Compare 2 DMA request */
phungductung	0:8ede47d38d10	1931	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	1932	}
phungductung	0:8ede47d38d10	1933	break;
phungductung	0:8ede47d38d10	1934
phungductung	0:8ede47d38d10	1935	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	1936	{
phungductung	0:8ede47d38d10	1937	/* Disable the TIM Capture/Compare 3 DMA request */
phungductung	0:8ede47d38d10	1938	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
phungductung	0:8ede47d38d10	1939	}
phungductung	0:8ede47d38d10	1940	break;
phungductung	0:8ede47d38d10	1941
phungductung	0:8ede47d38d10	1942	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	1943	{
phungductung	0:8ede47d38d10	1944	/* Disable the TIM Capture/Compare 4 DMA request */
phungductung	0:8ede47d38d10	1945	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
phungductung	0:8ede47d38d10	1946	}
phungductung	0:8ede47d38d10	1947	break;
phungductung	0:8ede47d38d10	1948
phungductung	0:8ede47d38d10	1949	default:
phungductung	0:8ede47d38d10	1950	break;
phungductung	0:8ede47d38d10	1951	}
phungductung	0:8ede47d38d10	1952
phungductung	0:8ede47d38d10	1953	/* Disable the Input Capture channel */
phungductung	0:8ede47d38d10	1954	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	1955
phungductung	0:8ede47d38d10	1956	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	1957	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	1958
phungductung	0:8ede47d38d10	1959	/* Change the htim state */
phungductung	0:8ede47d38d10	1960	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	1961
phungductung	0:8ede47d38d10	1962	/* Return function status */
phungductung	0:8ede47d38d10	1963	return HAL_OK;
phungductung	0:8ede47d38d10	1964	}
phungductung	0:8ede47d38d10	1965	/**
phungductung	0:8ede47d38d10	1966	* @}
phungductung	0:8ede47d38d10	1967	*/
phungductung	0:8ede47d38d10	1968
phungductung	0:8ede47d38d10	1969	/** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions
phungductung	0:8ede47d38d10	1970	* @brief Time One Pulse functions
phungductung	0:8ede47d38d10	1971	*
phungductung	0:8ede47d38d10	1972	@verbatim
phungductung	0:8ede47d38d10	1973	==============================================================================
phungductung	0:8ede47d38d10	1974	##### Time One Pulse functions #####
phungductung	0:8ede47d38d10	1975	==============================================================================
phungductung	0:8ede47d38d10	1976	[..]
phungductung	0:8ede47d38d10	1977	This section provides functions allowing to:
phungductung	0:8ede47d38d10	1978	(+) Initialize and configure the TIM One Pulse.
phungductung	0:8ede47d38d10	1979	(+) De-initialize the TIM One Pulse.
phungductung	0:8ede47d38d10	1980	(+) Start the Time One Pulse.
phungductung	0:8ede47d38d10	1981	(+) Stop the Time One Pulse.
phungductung	0:8ede47d38d10	1982	(+) Start the Time One Pulse and enable interrupt.
phungductung	0:8ede47d38d10	1983	(+) Stop the Time One Pulse and disable interrupt.
phungductung	0:8ede47d38d10	1984	(+) Start the Time One Pulse and enable DMA transfer.
phungductung	0:8ede47d38d10	1985	(+) Stop the Time One Pulse and disable DMA transfer.
phungductung	0:8ede47d38d10	1986
phungductung	0:8ede47d38d10	1987	@endverbatim
phungductung	0:8ede47d38d10	1988	* @{
phungductung	0:8ede47d38d10	1989	*/
phungductung	0:8ede47d38d10	1990	/**
phungductung	0:8ede47d38d10	1991	* @brief Initializes the TIM One Pulse Time Base according to the specified
phungductung	0:8ede47d38d10	1992	* parameters in the TIM_HandleTypeDef and create the associated handle.
phungductung	0:8ede47d38d10	1993	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	1994	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	1995	* @param OnePulseMode: Select the One pulse mode.
phungductung	0:8ede47d38d10	1996	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	1997	* @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
phungductung	0:8ede47d38d10	1998	* @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
phungductung	0:8ede47d38d10	1999	* @retval HAL status
phungductung	0:8ede47d38d10	2000	*/
phungductung	0:8ede47d38d10	2001	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
phungductung	0:8ede47d38d10	2002	{
phungductung	0:8ede47d38d10	2003	/* Check the TIM handle allocation */
phungductung	0:8ede47d38d10	2004	if(htim == NULL)
phungductung	0:8ede47d38d10	2005	{
phungductung	0:8ede47d38d10	2006	return HAL_ERROR;
phungductung	0:8ede47d38d10	2007	}
phungductung	0:8ede47d38d10	2008
phungductung	0:8ede47d38d10	2009	/* Check the parameters */
phungductung	0:8ede47d38d10	2010	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2011	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
phungductung	0:8ede47d38d10	2012	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
phungductung	0:8ede47d38d10	2013	assert_param(IS_TIM_OPM_MODE(OnePulseMode));
phungductung	0:8ede47d38d10	2014
phungductung	0:8ede47d38d10	2015	if(htim->State == HAL_TIM_STATE_RESET)
phungductung	0:8ede47d38d10	2016	{
phungductung	0:8ede47d38d10	2017	/* Allocate lock resource and initialize it */
phungductung	0:8ede47d38d10	2018	htim->Lock = HAL_UNLOCKED;
phungductung	0:8ede47d38d10	2019	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	2020	HAL_TIM_OnePulse_MspInit(htim);
phungductung	0:8ede47d38d10	2021	}
phungductung	0:8ede47d38d10	2022
phungductung	0:8ede47d38d10	2023	/* Set the TIM state */
phungductung	0:8ede47d38d10	2024	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	2025
phungductung	0:8ede47d38d10	2026	/* Configure the Time base in the One Pulse Mode */
phungductung	0:8ede47d38d10	2027	TIM_Base_SetConfig(htim->Instance, &htim->Init);
phungductung	0:8ede47d38d10	2028
phungductung	0:8ede47d38d10	2029	/* Reset the OPM Bit */
phungductung	0:8ede47d38d10	2030	htim->Instance->CR1 &= ~TIM_CR1_OPM;
phungductung	0:8ede47d38d10	2031
phungductung	0:8ede47d38d10	2032	/* Configure the OPM Mode */
phungductung	0:8ede47d38d10	2033	htim->Instance->CR1 \|= OnePulseMode;
phungductung	0:8ede47d38d10	2034
phungductung	0:8ede47d38d10	2035	/* Initialize the TIM state*/
phungductung	0:8ede47d38d10	2036	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	2037
phungductung	0:8ede47d38d10	2038	return HAL_OK;
phungductung	0:8ede47d38d10	2039	}
phungductung	0:8ede47d38d10	2040
phungductung	0:8ede47d38d10	2041	/**
phungductung	0:8ede47d38d10	2042	* @brief DeInitializes the TIM One Pulse
phungductung	0:8ede47d38d10	2043	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2044	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2045	* @retval HAL status
phungductung	0:8ede47d38d10	2046	*/
phungductung	0:8ede47d38d10	2047	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	2048	{
phungductung	0:8ede47d38d10	2049	/* Check the parameters */
phungductung	0:8ede47d38d10	2050	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2051
phungductung	0:8ede47d38d10	2052	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	2053
phungductung	0:8ede47d38d10	2054	/* Disable the TIM Peripheral Clock */
phungductung	0:8ede47d38d10	2055	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	2056
phungductung	0:8ede47d38d10	2057	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
phungductung	0:8ede47d38d10	2058	HAL_TIM_OnePulse_MspDeInit(htim);
phungductung	0:8ede47d38d10	2059
phungductung	0:8ede47d38d10	2060	/* Change TIM state */
phungductung	0:8ede47d38d10	2061	htim->State = HAL_TIM_STATE_RESET;
phungductung	0:8ede47d38d10	2062
phungductung	0:8ede47d38d10	2063	/* Release Lock */
phungductung	0:8ede47d38d10	2064	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	2065
phungductung	0:8ede47d38d10	2066	return HAL_OK;
phungductung	0:8ede47d38d10	2067	}
phungductung	0:8ede47d38d10	2068
phungductung	0:8ede47d38d10	2069	/**
phungductung	0:8ede47d38d10	2070	* @brief Initializes the TIM One Pulse MSP.
phungductung	0:8ede47d38d10	2071	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2072	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2073	* @retval None
phungductung	0:8ede47d38d10	2074	*/
phungductung	0:8ede47d38d10	2075	__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	2076	{
phungductung	0:8ede47d38d10	2077	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	2078	UNUSED(htim);
phungductung	0:8ede47d38d10	2079
phungductung	0:8ede47d38d10	2080	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	2081	the HAL_TIM_OnePulse_MspInit could be implemented in the user file
phungductung	0:8ede47d38d10	2082	*/
phungductung	0:8ede47d38d10	2083	}
phungductung	0:8ede47d38d10	2084
phungductung	0:8ede47d38d10	2085	/**
phungductung	0:8ede47d38d10	2086	* @brief DeInitializes TIM One Pulse MSP.
phungductung	0:8ede47d38d10	2087	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2088	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2089	* @retval None
phungductung	0:8ede47d38d10	2090	*/
phungductung	0:8ede47d38d10	2091	__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	2092	{
phungductung	0:8ede47d38d10	2093	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	2094	UNUSED(htim);
phungductung	0:8ede47d38d10	2095
phungductung	0:8ede47d38d10	2096	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	2097	the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
phungductung	0:8ede47d38d10	2098	*/
phungductung	0:8ede47d38d10	2099	}
phungductung	0:8ede47d38d10	2100
phungductung	0:8ede47d38d10	2101	/**
phungductung	0:8ede47d38d10	2102	* @brief Starts the TIM One Pulse signal generation.
phungductung	0:8ede47d38d10	2103	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2104	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2105	* @param OutputChannel : TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2106	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2107	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2108	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2109	* @retval HAL status
phungductung	0:8ede47d38d10	2110	*/
phungductung	0:8ede47d38d10	2111	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
phungductung	0:8ede47d38d10	2112	{
phungductung	0:8ede47d38d10	2113	/* Enable the Capture compare and the Input Capture channels
phungductung	0:8ede47d38d10	2114	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
phungductung	0:8ede47d38d10	2115	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
phungductung	0:8ede47d38d10	2116	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
phungductung	0:8ede47d38d10	2117	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
phungductung	0:8ede47d38d10	2118
phungductung	0:8ede47d38d10	2119	No need to enable the counter, it's enabled automatically by hardware
phungductung	0:8ede47d38d10	2120	(the counter starts in response to a stimulus and generate a pulse */
phungductung	0:8ede47d38d10	2121
phungductung	0:8ede47d38d10	2122	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2123	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2124
phungductung	0:8ede47d38d10	2125	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	2126	{
phungductung	0:8ede47d38d10	2127	/* Enable the main output */
phungductung	0:8ede47d38d10	2128	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	2129	}
phungductung	0:8ede47d38d10	2130
phungductung	0:8ede47d38d10	2131	/* Return function status */
phungductung	0:8ede47d38d10	2132	return HAL_OK;
phungductung	0:8ede47d38d10	2133	}
phungductung	0:8ede47d38d10	2134
phungductung	0:8ede47d38d10	2135	/**
phungductung	0:8ede47d38d10	2136	* @brief Stops the TIM One Pulse signal generation.
phungductung	0:8ede47d38d10	2137	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2138	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2139	* @param OutputChannel : TIM Channels to be disable.
phungductung	0:8ede47d38d10	2140	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2141	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2142	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2143	* @retval HAL status
phungductung	0:8ede47d38d10	2144	*/
phungductung	0:8ede47d38d10	2145	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
phungductung	0:8ede47d38d10	2146	{
phungductung	0:8ede47d38d10	2147	/* Disable the Capture compare and the Input Capture channels
phungductung	0:8ede47d38d10	2148	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
phungductung	0:8ede47d38d10	2149	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
phungductung	0:8ede47d38d10	2150	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
phungductung	0:8ede47d38d10	2151	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
phungductung	0:8ede47d38d10	2152
phungductung	0:8ede47d38d10	2153	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2154	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2155
phungductung	0:8ede47d38d10	2156	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	2157	{
phungductung	0:8ede47d38d10	2158	/* Disable the Main Output */
phungductung	0:8ede47d38d10	2159	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	2160	}
phungductung	0:8ede47d38d10	2161
phungductung	0:8ede47d38d10	2162	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	2163	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	2164
phungductung	0:8ede47d38d10	2165	/* Return function status */
phungductung	0:8ede47d38d10	2166	return HAL_OK;
phungductung	0:8ede47d38d10	2167	}
phungductung	0:8ede47d38d10	2168
phungductung	0:8ede47d38d10	2169	/**
phungductung	0:8ede47d38d10	2170	* @brief Starts the TIM One Pulse signal generation in interrupt mode.
phungductung	0:8ede47d38d10	2171	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2172	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2173	* @param OutputChannel : TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2174	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2175	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2176	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2177	* @retval HAL status
phungductung	0:8ede47d38d10	2178	*/
phungductung	0:8ede47d38d10	2179	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
phungductung	0:8ede47d38d10	2180	{
phungductung	0:8ede47d38d10	2181	/* Enable the Capture compare and the Input Capture channels
phungductung	0:8ede47d38d10	2182	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
phungductung	0:8ede47d38d10	2183	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
phungductung	0:8ede47d38d10	2184	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
phungductung	0:8ede47d38d10	2185	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
phungductung	0:8ede47d38d10	2186
phungductung	0:8ede47d38d10	2187	No need to enable the counter, it's enabled automatically by hardware
phungductung	0:8ede47d38d10	2188	(the counter starts in response to a stimulus and generate a pulse */
phungductung	0:8ede47d38d10	2189
phungductung	0:8ede47d38d10	2190	/* Enable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	2191	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	2192
phungductung	0:8ede47d38d10	2193	/* Enable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	2194	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	2195
phungductung	0:8ede47d38d10	2196	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2197	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2198
phungductung	0:8ede47d38d10	2199	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	2200	{
phungductung	0:8ede47d38d10	2201	/* Enable the main output */
phungductung	0:8ede47d38d10	2202	__HAL_TIM_MOE_ENABLE(htim);
phungductung	0:8ede47d38d10	2203	}
phungductung	0:8ede47d38d10	2204
phungductung	0:8ede47d38d10	2205	/* Return function status */
phungductung	0:8ede47d38d10	2206	return HAL_OK;
phungductung	0:8ede47d38d10	2207	}
phungductung	0:8ede47d38d10	2208
phungductung	0:8ede47d38d10	2209	/**
phungductung	0:8ede47d38d10	2210	* @brief Stops the TIM One Pulse signal generation in interrupt mode.
phungductung	0:8ede47d38d10	2211	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2212	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2213	* @param OutputChannel : TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2214	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2215	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2216	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2217	* @retval HAL status
phungductung	0:8ede47d38d10	2218	*/
phungductung	0:8ede47d38d10	2219	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
phungductung	0:8ede47d38d10	2220	{
phungductung	0:8ede47d38d10	2221	/* Disable the TIM Capture/Compare 1 interrupt */
phungductung	0:8ede47d38d10	2222	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	2223
phungductung	0:8ede47d38d10	2224	/* Disable the TIM Capture/Compare 2 interrupt */
phungductung	0:8ede47d38d10	2225	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	2226
phungductung	0:8ede47d38d10	2227	/* Disable the Capture compare and the Input Capture channels
phungductung	0:8ede47d38d10	2228	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
phungductung	0:8ede47d38d10	2229	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
phungductung	0:8ede47d38d10	2230	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
phungductung	0:8ede47d38d10	2231	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
phungductung	0:8ede47d38d10	2232	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2233	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2234
phungductung	0:8ede47d38d10	2235	if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
phungductung	0:8ede47d38d10	2236	{
phungductung	0:8ede47d38d10	2237	/* Disable the Main Output */
phungductung	0:8ede47d38d10	2238	__HAL_TIM_MOE_DISABLE(htim);
phungductung	0:8ede47d38d10	2239	}
phungductung	0:8ede47d38d10	2240
phungductung	0:8ede47d38d10	2241	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	2242	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	2243
phungductung	0:8ede47d38d10	2244	/* Return function status */
phungductung	0:8ede47d38d10	2245	return HAL_OK;
phungductung	0:8ede47d38d10	2246	}
phungductung	0:8ede47d38d10	2247
phungductung	0:8ede47d38d10	2248	/**
phungductung	0:8ede47d38d10	2249	* @}
phungductung	0:8ede47d38d10	2250	*/
phungductung	0:8ede47d38d10	2251
phungductung	0:8ede47d38d10	2252	/** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions
phungductung	0:8ede47d38d10	2253	* @brief Time Encoder functions
phungductung	0:8ede47d38d10	2254	*
phungductung	0:8ede47d38d10	2255	@verbatim
phungductung	0:8ede47d38d10	2256	==============================================================================
phungductung	0:8ede47d38d10	2257	##### Time Encoder functions #####
phungductung	0:8ede47d38d10	2258	==============================================================================
phungductung	0:8ede47d38d10	2259	[..]
phungductung	0:8ede47d38d10	2260	This section provides functions allowing to:
phungductung	0:8ede47d38d10	2261	(+) Initialize and configure the TIM Encoder.
phungductung	0:8ede47d38d10	2262	(+) De-initialize the TIM Encoder.
phungductung	0:8ede47d38d10	2263	(+) Start the Time Encoder.
phungductung	0:8ede47d38d10	2264	(+) Stop the Time Encoder.
phungductung	0:8ede47d38d10	2265	(+) Start the Time Encoder and enable interrupt.
phungductung	0:8ede47d38d10	2266	(+) Stop the Time Encoder and disable interrupt.
phungductung	0:8ede47d38d10	2267	(+) Start the Time Encoder and enable DMA transfer.
phungductung	0:8ede47d38d10	2268	(+) Stop the Time Encoder and disable DMA transfer.
phungductung	0:8ede47d38d10	2269
phungductung	0:8ede47d38d10	2270	@endverbatim
phungductung	0:8ede47d38d10	2271	* @{
phungductung	0:8ede47d38d10	2272	*/
phungductung	0:8ede47d38d10	2273	/**
phungductung	0:8ede47d38d10	2274	* @brief Initializes the TIM Encoder Interface and create the associated handle.
phungductung	0:8ede47d38d10	2275	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2276	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2277	* @param sConfig: TIM Encoder Interface configuration structure
phungductung	0:8ede47d38d10	2278	* @retval HAL status
phungductung	0:8ede47d38d10	2279	*/
phungductung	0:8ede47d38d10	2280	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig)
phungductung	0:8ede47d38d10	2281	{
phungductung	0:8ede47d38d10	2282	uint32_t tmpsmcr = 0;
phungductung	0:8ede47d38d10	2283	uint32_t tmpccmr1 = 0;
phungductung	0:8ede47d38d10	2284	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	2285
phungductung	0:8ede47d38d10	2286	/* Check the TIM handle allocation */
phungductung	0:8ede47d38d10	2287	if(htim == NULL)
phungductung	0:8ede47d38d10	2288	{
phungductung	0:8ede47d38d10	2289	return HAL_ERROR;
phungductung	0:8ede47d38d10	2290	}
phungductung	0:8ede47d38d10	2291
phungductung	0:8ede47d38d10	2292	/* Check the parameters */
phungductung	0:8ede47d38d10	2293	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2294	assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
phungductung	0:8ede47d38d10	2295	assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
phungductung	0:8ede47d38d10	2296	assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
phungductung	0:8ede47d38d10	2297	assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
phungductung	0:8ede47d38d10	2298	assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
phungductung	0:8ede47d38d10	2299	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
phungductung	0:8ede47d38d10	2300	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
phungductung	0:8ede47d38d10	2301	assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
phungductung	0:8ede47d38d10	2302	assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
phungductung	0:8ede47d38d10	2303
phungductung	0:8ede47d38d10	2304	if(htim->State == HAL_TIM_STATE_RESET)
phungductung	0:8ede47d38d10	2305	{
phungductung	0:8ede47d38d10	2306	/* Allocate lock resource and initialize it */
phungductung	0:8ede47d38d10	2307	htim->Lock = HAL_UNLOCKED;
phungductung	0:8ede47d38d10	2308	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
phungductung	0:8ede47d38d10	2309	HAL_TIM_Encoder_MspInit(htim);
phungductung	0:8ede47d38d10	2310	}
phungductung	0:8ede47d38d10	2311
phungductung	0:8ede47d38d10	2312	/* Set the TIM state */
phungductung	0:8ede47d38d10	2313	htim->State= HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	2314
phungductung	0:8ede47d38d10	2315	/* Reset the SMS bits */
phungductung	0:8ede47d38d10	2316	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
phungductung	0:8ede47d38d10	2317
phungductung	0:8ede47d38d10	2318	/* Configure the Time base in the Encoder Mode */
phungductung	0:8ede47d38d10	2319	TIM_Base_SetConfig(htim->Instance, &htim->Init);
phungductung	0:8ede47d38d10	2320
phungductung	0:8ede47d38d10	2321	/* Get the TIMx SMCR register value */
phungductung	0:8ede47d38d10	2322	tmpsmcr = htim->Instance->SMCR;
phungductung	0:8ede47d38d10	2323
phungductung	0:8ede47d38d10	2324	/* Get the TIMx CCMR1 register value */
phungductung	0:8ede47d38d10	2325	tmpccmr1 = htim->Instance->CCMR1;
phungductung	0:8ede47d38d10	2326
phungductung	0:8ede47d38d10	2327	/* Get the TIMx CCER register value */
phungductung	0:8ede47d38d10	2328	tmpccer = htim->Instance->CCER;
phungductung	0:8ede47d38d10	2329
phungductung	0:8ede47d38d10	2330	/* Set the encoder Mode */
phungductung	0:8ede47d38d10	2331	tmpsmcr \|= sConfig->EncoderMode;
phungductung	0:8ede47d38d10	2332
phungductung	0:8ede47d38d10	2333	/* Select the Capture Compare 1 and the Capture Compare 2 as input */
phungductung	0:8ede47d38d10	2334	tmpccmr1 &= ~(TIM_CCMR1_CC1S \| TIM_CCMR1_CC2S);
phungductung	0:8ede47d38d10	2335	tmpccmr1 \|= (sConfig->IC1Selection \| (sConfig->IC2Selection << 8));
phungductung	0:8ede47d38d10	2336
phungductung	0:8ede47d38d10	2337	/* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
phungductung	0:8ede47d38d10	2338	tmpccmr1 &= ~(TIM_CCMR1_IC1PSC \| TIM_CCMR1_IC2PSC);
phungductung	0:8ede47d38d10	2339	tmpccmr1 &= ~(TIM_CCMR1_IC1F \| TIM_CCMR1_IC2F);
phungductung	0:8ede47d38d10	2340	tmpccmr1 \|= sConfig->IC1Prescaler \| (sConfig->IC2Prescaler << 8);
phungductung	0:8ede47d38d10	2341	tmpccmr1 \|= (sConfig->IC1Filter << 4) \| (sConfig->IC2Filter << 12);
phungductung	0:8ede47d38d10	2342
phungductung	0:8ede47d38d10	2343	/* Set the TI1 and the TI2 Polarities */
phungductung	0:8ede47d38d10	2344	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC2P);
phungductung	0:8ede47d38d10	2345	tmpccer &= ~(TIM_CCER_CC1NP \| TIM_CCER_CC2NP);
phungductung	0:8ede47d38d10	2346	tmpccer \|= sConfig->IC1Polarity \| (sConfig->IC2Polarity << 4);
phungductung	0:8ede47d38d10	2347
phungductung	0:8ede47d38d10	2348	/* Write to TIMx SMCR */
phungductung	0:8ede47d38d10	2349	htim->Instance->SMCR = tmpsmcr;
phungductung	0:8ede47d38d10	2350
phungductung	0:8ede47d38d10	2351	/* Write to TIMx CCMR1 */
phungductung	0:8ede47d38d10	2352	htim->Instance->CCMR1 = tmpccmr1;
phungductung	0:8ede47d38d10	2353
phungductung	0:8ede47d38d10	2354	/* Write to TIMx CCER */
phungductung	0:8ede47d38d10	2355	htim->Instance->CCER = tmpccer;
phungductung	0:8ede47d38d10	2356
phungductung	0:8ede47d38d10	2357	/* Initialize the TIM state*/
phungductung	0:8ede47d38d10	2358	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	2359
phungductung	0:8ede47d38d10	2360	return HAL_OK;
phungductung	0:8ede47d38d10	2361	}
phungductung	0:8ede47d38d10	2362
phungductung	0:8ede47d38d10	2363	/**
phungductung	0:8ede47d38d10	2364	* @brief DeInitializes the TIM Encoder interface
phungductung	0:8ede47d38d10	2365	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2366	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2367	* @retval HAL status
phungductung	0:8ede47d38d10	2368	*/
phungductung	0:8ede47d38d10	2369	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	2370	{
phungductung	0:8ede47d38d10	2371	/* Check the parameters */
phungductung	0:8ede47d38d10	2372	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2373
phungductung	0:8ede47d38d10	2374	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	2375
phungductung	0:8ede47d38d10	2376	/* Disable the TIM Peripheral Clock */
phungductung	0:8ede47d38d10	2377	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	2378
phungductung	0:8ede47d38d10	2379	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
phungductung	0:8ede47d38d10	2380	HAL_TIM_Encoder_MspDeInit(htim);
phungductung	0:8ede47d38d10	2381
phungductung	0:8ede47d38d10	2382	/* Change TIM state */
phungductung	0:8ede47d38d10	2383	htim->State = HAL_TIM_STATE_RESET;
phungductung	0:8ede47d38d10	2384
phungductung	0:8ede47d38d10	2385	/* Release Lock */
phungductung	0:8ede47d38d10	2386	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	2387
phungductung	0:8ede47d38d10	2388	return HAL_OK;
phungductung	0:8ede47d38d10	2389	}
phungductung	0:8ede47d38d10	2390
phungductung	0:8ede47d38d10	2391	/**
phungductung	0:8ede47d38d10	2392	* @brief Initializes the TIM Encoder Interface MSP.
phungductung	0:8ede47d38d10	2393	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2394	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2395	* @retval None
phungductung	0:8ede47d38d10	2396	*/
phungductung	0:8ede47d38d10	2397	__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	2398	{
phungductung	0:8ede47d38d10	2399	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	2400	UNUSED(htim);
phungductung	0:8ede47d38d10	2401
phungductung	0:8ede47d38d10	2402	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	2403	the HAL_TIM_Encoder_MspInit could be implemented in the user file
phungductung	0:8ede47d38d10	2404	*/
phungductung	0:8ede47d38d10	2405	}
phungductung	0:8ede47d38d10	2406
phungductung	0:8ede47d38d10	2407	/**
phungductung	0:8ede47d38d10	2408	* @brief DeInitializes TIM Encoder Interface MSP.
phungductung	0:8ede47d38d10	2409	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2410	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2411	* @retval None
phungductung	0:8ede47d38d10	2412	*/
phungductung	0:8ede47d38d10	2413	__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	2414	{
phungductung	0:8ede47d38d10	2415	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	2416	UNUSED(htim);
phungductung	0:8ede47d38d10	2417
phungductung	0:8ede47d38d10	2418	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	2419	the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
phungductung	0:8ede47d38d10	2420	*/
phungductung	0:8ede47d38d10	2421	}
phungductung	0:8ede47d38d10	2422
phungductung	0:8ede47d38d10	2423	/**
phungductung	0:8ede47d38d10	2424	* @brief Starts the TIM Encoder Interface.
phungductung	0:8ede47d38d10	2425	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2426	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2427	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2428	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2429	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2430	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2431	* @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
phungductung	0:8ede47d38d10	2432	* @retval HAL status
phungductung	0:8ede47d38d10	2433	*/
phungductung	0:8ede47d38d10	2434	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	2435	{
phungductung	0:8ede47d38d10	2436	/* Check the parameters */
phungductung	0:8ede47d38d10	2437	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2438
phungductung	0:8ede47d38d10	2439	/* Enable the encoder interface channels */
phungductung	0:8ede47d38d10	2440	switch (Channel)
phungductung	0:8ede47d38d10	2441	{
phungductung	0:8ede47d38d10	2442	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	2443	{
phungductung	0:8ede47d38d10	2444	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2445	break;
phungductung	0:8ede47d38d10	2446	}
phungductung	0:8ede47d38d10	2447	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	2448	{
phungductung	0:8ede47d38d10	2449	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2450	break;
phungductung	0:8ede47d38d10	2451	}
phungductung	0:8ede47d38d10	2452	default :
phungductung	0:8ede47d38d10	2453	{
phungductung	0:8ede47d38d10	2454	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2455	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2456	break;
phungductung	0:8ede47d38d10	2457	}
phungductung	0:8ede47d38d10	2458	}
phungductung	0:8ede47d38d10	2459	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	2460	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	2461
phungductung	0:8ede47d38d10	2462	/* Return function status */
phungductung	0:8ede47d38d10	2463	return HAL_OK;
phungductung	0:8ede47d38d10	2464	}
phungductung	0:8ede47d38d10	2465
phungductung	0:8ede47d38d10	2466	/**
phungductung	0:8ede47d38d10	2467	* @brief Stops the TIM Encoder Interface.
phungductung	0:8ede47d38d10	2468	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2469	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2470	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	2471	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2472	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2473	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2474	* @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
phungductung	0:8ede47d38d10	2475	* @retval HAL status
phungductung	0:8ede47d38d10	2476	*/
phungductung	0:8ede47d38d10	2477	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	2478	{
phungductung	0:8ede47d38d10	2479	/* Check the parameters */
phungductung	0:8ede47d38d10	2480	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2481
phungductung	0:8ede47d38d10	2482	/* Disable the Input Capture channels 1 and 2
phungductung	0:8ede47d38d10	2483	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
phungductung	0:8ede47d38d10	2484	switch (Channel)
phungductung	0:8ede47d38d10	2485	{
phungductung	0:8ede47d38d10	2486	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	2487	{
phungductung	0:8ede47d38d10	2488	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2489	break;
phungductung	0:8ede47d38d10	2490	}
phungductung	0:8ede47d38d10	2491	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	2492	{
phungductung	0:8ede47d38d10	2493	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2494	break;
phungductung	0:8ede47d38d10	2495	}
phungductung	0:8ede47d38d10	2496	default :
phungductung	0:8ede47d38d10	2497	{
phungductung	0:8ede47d38d10	2498	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2499	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2500	break;
phungductung	0:8ede47d38d10	2501	}
phungductung	0:8ede47d38d10	2502	}
phungductung	0:8ede47d38d10	2503	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	2504	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	2505
phungductung	0:8ede47d38d10	2506	/* Return function status */
phungductung	0:8ede47d38d10	2507	return HAL_OK;
phungductung	0:8ede47d38d10	2508	}
phungductung	0:8ede47d38d10	2509
phungductung	0:8ede47d38d10	2510	/**
phungductung	0:8ede47d38d10	2511	* @brief Starts the TIM Encoder Interface in interrupt mode.
phungductung	0:8ede47d38d10	2512	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2513	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2514	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2515	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2516	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2517	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2518	* @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
phungductung	0:8ede47d38d10	2519	* @retval HAL status
phungductung	0:8ede47d38d10	2520	*/
phungductung	0:8ede47d38d10	2521	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	2522	{
phungductung	0:8ede47d38d10	2523	/* Check the parameters */
phungductung	0:8ede47d38d10	2524	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2525
phungductung	0:8ede47d38d10	2526	/* Enable the encoder interface channels */
phungductung	0:8ede47d38d10	2527	/* Enable the capture compare Interrupts 1 and/or 2 */
phungductung	0:8ede47d38d10	2528	switch (Channel)
phungductung	0:8ede47d38d10	2529	{
phungductung	0:8ede47d38d10	2530	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	2531	{
phungductung	0:8ede47d38d10	2532	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2533	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	2534	break;
phungductung	0:8ede47d38d10	2535	}
phungductung	0:8ede47d38d10	2536	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	2537	{
phungductung	0:8ede47d38d10	2538	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2539	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	2540	break;
phungductung	0:8ede47d38d10	2541	}
phungductung	0:8ede47d38d10	2542	default :
phungductung	0:8ede47d38d10	2543	{
phungductung	0:8ede47d38d10	2544	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2545	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2546	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	2547	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	2548	break;
phungductung	0:8ede47d38d10	2549	}
phungductung	0:8ede47d38d10	2550	}
phungductung	0:8ede47d38d10	2551
phungductung	0:8ede47d38d10	2552	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	2553	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	2554
phungductung	0:8ede47d38d10	2555	/* Return function status */
phungductung	0:8ede47d38d10	2556	return HAL_OK;
phungductung	0:8ede47d38d10	2557	}
phungductung	0:8ede47d38d10	2558
phungductung	0:8ede47d38d10	2559	/**
phungductung	0:8ede47d38d10	2560	* @brief Stops the TIM Encoder Interface in interrupt mode.
phungductung	0:8ede47d38d10	2561	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2562	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2563	* @param Channel: TIM Channels to be disabled.
phungductung	0:8ede47d38d10	2564	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2565	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2566	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2567	* @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
phungductung	0:8ede47d38d10	2568	* @retval HAL status
phungductung	0:8ede47d38d10	2569	*/
phungductung	0:8ede47d38d10	2570	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	2571	{
phungductung	0:8ede47d38d10	2572	/* Check the parameters */
phungductung	0:8ede47d38d10	2573	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2574
phungductung	0:8ede47d38d10	2575	/* Disable the Input Capture channels 1 and 2
phungductung	0:8ede47d38d10	2576	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
phungductung	0:8ede47d38d10	2577	if(Channel == TIM_CHANNEL_1)
phungductung	0:8ede47d38d10	2578	{
phungductung	0:8ede47d38d10	2579	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2580
phungductung	0:8ede47d38d10	2581	/* Disable the capture compare Interrupts 1 */
phungductung	0:8ede47d38d10	2582	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	2583	}
phungductung	0:8ede47d38d10	2584	else if(Channel == TIM_CHANNEL_2)
phungductung	0:8ede47d38d10	2585	{
phungductung	0:8ede47d38d10	2586	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2587
phungductung	0:8ede47d38d10	2588	/* Disable the capture compare Interrupts 2 */
phungductung	0:8ede47d38d10	2589	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	2590	}
phungductung	0:8ede47d38d10	2591	else
phungductung	0:8ede47d38d10	2592	{
phungductung	0:8ede47d38d10	2593	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2594	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2595
phungductung	0:8ede47d38d10	2596	/* Disable the capture compare Interrupts 1 and 2 */
phungductung	0:8ede47d38d10	2597	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	2598	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	2599	}
phungductung	0:8ede47d38d10	2600
phungductung	0:8ede47d38d10	2601	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	2602	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	2603
phungductung	0:8ede47d38d10	2604	/* Change the htim state */
phungductung	0:8ede47d38d10	2605	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	2606
phungductung	0:8ede47d38d10	2607	/* Return function status */
phungductung	0:8ede47d38d10	2608	return HAL_OK;
phungductung	0:8ede47d38d10	2609	}
phungductung	0:8ede47d38d10	2610
phungductung	0:8ede47d38d10	2611	/**
phungductung	0:8ede47d38d10	2612	* @brief Starts the TIM Encoder Interface in DMA mode.
phungductung	0:8ede47d38d10	2613	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2614	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2615	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2616	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2617	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2618	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2619	* @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
phungductung	0:8ede47d38d10	2620	* @param pData1: The destination Buffer address for IC1.
phungductung	0:8ede47d38d10	2621	* @param pData2: The destination Buffer address for IC2.
phungductung	0:8ede47d38d10	2622	* @param Length: The length of data to be transferred from TIM peripheral to memory.
phungductung	0:8ede47d38d10	2623	* @retval HAL status
phungductung	0:8ede47d38d10	2624	*/
phungductung	0:8ede47d38d10	2625	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length)
phungductung	0:8ede47d38d10	2626	{
phungductung	0:8ede47d38d10	2627	/* Check the parameters */
phungductung	0:8ede47d38d10	2628	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2629
phungductung	0:8ede47d38d10	2630	if((htim->State == HAL_TIM_STATE_BUSY))
phungductung	0:8ede47d38d10	2631	{
phungductung	0:8ede47d38d10	2632	return HAL_BUSY;
phungductung	0:8ede47d38d10	2633	}
phungductung	0:8ede47d38d10	2634	else if((htim->State == HAL_TIM_STATE_READY))
phungductung	0:8ede47d38d10	2635	{
phungductung	0:8ede47d38d10	2636	if((((pData1 == 0) \|\| (pData2 == 0) )) && (Length > 0))
phungductung	0:8ede47d38d10	2637	{
phungductung	0:8ede47d38d10	2638	return HAL_ERROR;
phungductung	0:8ede47d38d10	2639	}
phungductung	0:8ede47d38d10	2640	else
phungductung	0:8ede47d38d10	2641	{
phungductung	0:8ede47d38d10	2642	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	2643	}
phungductung	0:8ede47d38d10	2644	}
phungductung	0:8ede47d38d10	2645
phungductung	0:8ede47d38d10	2646	switch (Channel)
phungductung	0:8ede47d38d10	2647	{
phungductung	0:8ede47d38d10	2648	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	2649	{
phungductung	0:8ede47d38d10	2650	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	2651	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	2652
phungductung	0:8ede47d38d10	2653	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	2654	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	2655
phungductung	0:8ede47d38d10	2656	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	2657	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length);
phungductung	0:8ede47d38d10	2658
phungductung	0:8ede47d38d10	2659	/* Enable the TIM Input Capture DMA request */
phungductung	0:8ede47d38d10	2660	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	2661
phungductung	0:8ede47d38d10	2662	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	2663	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	2664
phungductung	0:8ede47d38d10	2665	/* Enable the Capture compare channel */
phungductung	0:8ede47d38d10	2666	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2667	}
phungductung	0:8ede47d38d10	2668	break;
phungductung	0:8ede47d38d10	2669
phungductung	0:8ede47d38d10	2670	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	2671	{
phungductung	0:8ede47d38d10	2672	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	2673	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	2674
phungductung	0:8ede47d38d10	2675	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	2676	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError;
phungductung	0:8ede47d38d10	2677	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	2678	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
phungductung	0:8ede47d38d10	2679
phungductung	0:8ede47d38d10	2680	/* Enable the TIM Input Capture DMA request */
phungductung	0:8ede47d38d10	2681	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	2682
phungductung	0:8ede47d38d10	2683	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	2684	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	2685
phungductung	0:8ede47d38d10	2686	/* Enable the Capture compare channel */
phungductung	0:8ede47d38d10	2687	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2688	}
phungductung	0:8ede47d38d10	2689	break;
phungductung	0:8ede47d38d10	2690
phungductung	0:8ede47d38d10	2691	case TIM_CHANNEL_ALL:
phungductung	0:8ede47d38d10	2692	{
phungductung	0:8ede47d38d10	2693	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	2694	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	2695
phungductung	0:8ede47d38d10	2696	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	2697	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	2698
phungductung	0:8ede47d38d10	2699	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	2700	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
phungductung	0:8ede47d38d10	2701
phungductung	0:8ede47d38d10	2702	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	2703	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	2704
phungductung	0:8ede47d38d10	2705	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	2706	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	2707
phungductung	0:8ede47d38d10	2708	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	2709	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
phungductung	0:8ede47d38d10	2710
phungductung	0:8ede47d38d10	2711	/* Enable the Peripheral */
phungductung	0:8ede47d38d10	2712	__HAL_TIM_ENABLE(htim);
phungductung	0:8ede47d38d10	2713
phungductung	0:8ede47d38d10	2714	/* Enable the Capture compare channel */
phungductung	0:8ede47d38d10	2715	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2716	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
phungductung	0:8ede47d38d10	2717
phungductung	0:8ede47d38d10	2718	/* Enable the TIM Input Capture DMA request */
phungductung	0:8ede47d38d10	2719	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	2720	/* Enable the TIM Input Capture DMA request */
phungductung	0:8ede47d38d10	2721	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	2722	}
phungductung	0:8ede47d38d10	2723	break;
phungductung	0:8ede47d38d10	2724
phungductung	0:8ede47d38d10	2725	default:
phungductung	0:8ede47d38d10	2726	break;
phungductung	0:8ede47d38d10	2727	}
phungductung	0:8ede47d38d10	2728	/* Return function status */
phungductung	0:8ede47d38d10	2729	return HAL_OK;
phungductung	0:8ede47d38d10	2730	}
phungductung	0:8ede47d38d10	2731
phungductung	0:8ede47d38d10	2732	/**
phungductung	0:8ede47d38d10	2733	* @brief Stops the TIM Encoder Interface in DMA mode.
phungductung	0:8ede47d38d10	2734	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2735	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2736	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2737	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2738	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2739	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2740	* @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
phungductung	0:8ede47d38d10	2741	* @retval HAL status
phungductung	0:8ede47d38d10	2742	*/
phungductung	0:8ede47d38d10	2743	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	2744	{
phungductung	0:8ede47d38d10	2745	/* Check the parameters */
phungductung	0:8ede47d38d10	2746	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2747
phungductung	0:8ede47d38d10	2748	/* Disable the Input Capture channels 1 and 2
phungductung	0:8ede47d38d10	2749	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
phungductung	0:8ede47d38d10	2750	if(Channel == TIM_CHANNEL_1)
phungductung	0:8ede47d38d10	2751	{
phungductung	0:8ede47d38d10	2752	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2753
phungductung	0:8ede47d38d10	2754	/* Disable the capture compare DMA Request 1 */
phungductung	0:8ede47d38d10	2755	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	2756	}
phungductung	0:8ede47d38d10	2757	else if(Channel == TIM_CHANNEL_2)
phungductung	0:8ede47d38d10	2758	{
phungductung	0:8ede47d38d10	2759	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2760
phungductung	0:8ede47d38d10	2761	/* Disable the capture compare DMA Request 2 */
phungductung	0:8ede47d38d10	2762	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	2763	}
phungductung	0:8ede47d38d10	2764	else
phungductung	0:8ede47d38d10	2765	{
phungductung	0:8ede47d38d10	2766	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2767	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
phungductung	0:8ede47d38d10	2768
phungductung	0:8ede47d38d10	2769	/* Disable the capture compare DMA Request 1 and 2 */
phungductung	0:8ede47d38d10	2770	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
phungductung	0:8ede47d38d10	2771	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
phungductung	0:8ede47d38d10	2772	}
phungductung	0:8ede47d38d10	2773
phungductung	0:8ede47d38d10	2774	/* Disable the Peripheral */
phungductung	0:8ede47d38d10	2775	__HAL_TIM_DISABLE(htim);
phungductung	0:8ede47d38d10	2776
phungductung	0:8ede47d38d10	2777	/* Change the htim state */
phungductung	0:8ede47d38d10	2778	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	2779
phungductung	0:8ede47d38d10	2780	/* Return function status */
phungductung	0:8ede47d38d10	2781	return HAL_OK;
phungductung	0:8ede47d38d10	2782	}
phungductung	0:8ede47d38d10	2783
phungductung	0:8ede47d38d10	2784	/**
phungductung	0:8ede47d38d10	2785	* @}
phungductung	0:8ede47d38d10	2786	*/
phungductung	0:8ede47d38d10	2787	/** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management
phungductung	0:8ede47d38d10	2788	* @brief IRQ handler management
phungductung	0:8ede47d38d10	2789	*
phungductung	0:8ede47d38d10	2790	@verbatim
phungductung	0:8ede47d38d10	2791	==============================================================================
phungductung	0:8ede47d38d10	2792	##### IRQ handler management #####
phungductung	0:8ede47d38d10	2793	==============================================================================
phungductung	0:8ede47d38d10	2794	[..]
phungductung	0:8ede47d38d10	2795	This section provides Timer IRQ handler function.
phungductung	0:8ede47d38d10	2796
phungductung	0:8ede47d38d10	2797	@endverbatim
phungductung	0:8ede47d38d10	2798	* @{
phungductung	0:8ede47d38d10	2799	*/
phungductung	0:8ede47d38d10	2800	/**
phungductung	0:8ede47d38d10	2801	* @brief This function handles TIM interrupts requests.
phungductung	0:8ede47d38d10	2802	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2803	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2804	* @retval None
phungductung	0:8ede47d38d10	2805	*/
phungductung	0:8ede47d38d10	2806	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	2807	{
phungductung	0:8ede47d38d10	2808	/* Capture compare 1 event */
phungductung	0:8ede47d38d10	2809	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
phungductung	0:8ede47d38d10	2810	{
phungductung	0:8ede47d38d10	2811	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
phungductung	0:8ede47d38d10	2812	{
phungductung	0:8ede47d38d10	2813	{
phungductung	0:8ede47d38d10	2814	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
phungductung	0:8ede47d38d10	2815	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
phungductung	0:8ede47d38d10	2816
phungductung	0:8ede47d38d10	2817	/* Input capture event */
phungductung	0:8ede47d38d10	2818	if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00)
phungductung	0:8ede47d38d10	2819	{
phungductung	0:8ede47d38d10	2820	HAL_TIM_IC_CaptureCallback(htim);
phungductung	0:8ede47d38d10	2821	}
phungductung	0:8ede47d38d10	2822	/* Output compare event */
phungductung	0:8ede47d38d10	2823	else
phungductung	0:8ede47d38d10	2824	{
phungductung	0:8ede47d38d10	2825	HAL_TIM_OC_DelayElapsedCallback(htim);
phungductung	0:8ede47d38d10	2826	HAL_TIM_PWM_PulseFinishedCallback(htim);
phungductung	0:8ede47d38d10	2827	}
phungductung	0:8ede47d38d10	2828	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
phungductung	0:8ede47d38d10	2829	}
phungductung	0:8ede47d38d10	2830	}
phungductung	0:8ede47d38d10	2831	}
phungductung	0:8ede47d38d10	2832	/* Capture compare 2 event */
phungductung	0:8ede47d38d10	2833	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
phungductung	0:8ede47d38d10	2834	{
phungductung	0:8ede47d38d10	2835	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
phungductung	0:8ede47d38d10	2836	{
phungductung	0:8ede47d38d10	2837	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
phungductung	0:8ede47d38d10	2838	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
phungductung	0:8ede47d38d10	2839	/* Input capture event */
phungductung	0:8ede47d38d10	2840	if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00)
phungductung	0:8ede47d38d10	2841	{
phungductung	0:8ede47d38d10	2842	HAL_TIM_IC_CaptureCallback(htim);
phungductung	0:8ede47d38d10	2843	}
phungductung	0:8ede47d38d10	2844	/* Output compare event */
phungductung	0:8ede47d38d10	2845	else
phungductung	0:8ede47d38d10	2846	{
phungductung	0:8ede47d38d10	2847	HAL_TIM_OC_DelayElapsedCallback(htim);
phungductung	0:8ede47d38d10	2848	HAL_TIM_PWM_PulseFinishedCallback(htim);
phungductung	0:8ede47d38d10	2849	}
phungductung	0:8ede47d38d10	2850	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
phungductung	0:8ede47d38d10	2851	}
phungductung	0:8ede47d38d10	2852	}
phungductung	0:8ede47d38d10	2853	/* Capture compare 3 event */
phungductung	0:8ede47d38d10	2854	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
phungductung	0:8ede47d38d10	2855	{
phungductung	0:8ede47d38d10	2856	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
phungductung	0:8ede47d38d10	2857	{
phungductung	0:8ede47d38d10	2858	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
phungductung	0:8ede47d38d10	2859	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
phungductung	0:8ede47d38d10	2860	/* Input capture event */
phungductung	0:8ede47d38d10	2861	if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00)
phungductung	0:8ede47d38d10	2862	{
phungductung	0:8ede47d38d10	2863	HAL_TIM_IC_CaptureCallback(htim);
phungductung	0:8ede47d38d10	2864	}
phungductung	0:8ede47d38d10	2865	/* Output compare event */
phungductung	0:8ede47d38d10	2866	else
phungductung	0:8ede47d38d10	2867	{
phungductung	0:8ede47d38d10	2868	HAL_TIM_OC_DelayElapsedCallback(htim);
phungductung	0:8ede47d38d10	2869	HAL_TIM_PWM_PulseFinishedCallback(htim);
phungductung	0:8ede47d38d10	2870	}
phungductung	0:8ede47d38d10	2871	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
phungductung	0:8ede47d38d10	2872	}
phungductung	0:8ede47d38d10	2873	}
phungductung	0:8ede47d38d10	2874	/* Capture compare 4 event */
phungductung	0:8ede47d38d10	2875	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
phungductung	0:8ede47d38d10	2876	{
phungductung	0:8ede47d38d10	2877	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
phungductung	0:8ede47d38d10	2878	{
phungductung	0:8ede47d38d10	2879	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
phungductung	0:8ede47d38d10	2880	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
phungductung	0:8ede47d38d10	2881	/* Input capture event */
phungductung	0:8ede47d38d10	2882	if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00)
phungductung	0:8ede47d38d10	2883	{
phungductung	0:8ede47d38d10	2884	HAL_TIM_IC_CaptureCallback(htim);
phungductung	0:8ede47d38d10	2885	}
phungductung	0:8ede47d38d10	2886	/* Output compare event */
phungductung	0:8ede47d38d10	2887	else
phungductung	0:8ede47d38d10	2888	{
phungductung	0:8ede47d38d10	2889	HAL_TIM_OC_DelayElapsedCallback(htim);
phungductung	0:8ede47d38d10	2890	HAL_TIM_PWM_PulseFinishedCallback(htim);
phungductung	0:8ede47d38d10	2891	}
phungductung	0:8ede47d38d10	2892	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
phungductung	0:8ede47d38d10	2893	}
phungductung	0:8ede47d38d10	2894	}
phungductung	0:8ede47d38d10	2895	/* TIM Update event */
phungductung	0:8ede47d38d10	2896	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
phungductung	0:8ede47d38d10	2897	{
phungductung	0:8ede47d38d10	2898	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
phungductung	0:8ede47d38d10	2899	{
phungductung	0:8ede47d38d10	2900	__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
phungductung	0:8ede47d38d10	2901	HAL_TIM_PeriodElapsedCallback(htim);
phungductung	0:8ede47d38d10	2902	}
phungductung	0:8ede47d38d10	2903	}
phungductung	0:8ede47d38d10	2904	/* TIM Break input event */
phungductung	0:8ede47d38d10	2905	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
phungductung	0:8ede47d38d10	2906	{
phungductung	0:8ede47d38d10	2907	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
phungductung	0:8ede47d38d10	2908	{
phungductung	0:8ede47d38d10	2909	__HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
phungductung	0:8ede47d38d10	2910	HAL_TIMEx_BreakCallback(htim);
phungductung	0:8ede47d38d10	2911	}
phungductung	0:8ede47d38d10	2912	}
phungductung	0:8ede47d38d10	2913
phungductung	0:8ede47d38d10	2914	/* TIM Break input event */
phungductung	0:8ede47d38d10	2915	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
phungductung	0:8ede47d38d10	2916	{
phungductung	0:8ede47d38d10	2917	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
phungductung	0:8ede47d38d10	2918	{
phungductung	0:8ede47d38d10	2919	__HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
phungductung	0:8ede47d38d10	2920	HAL_TIMEx_BreakCallback(htim);
phungductung	0:8ede47d38d10	2921	}
phungductung	0:8ede47d38d10	2922	}
phungductung	0:8ede47d38d10	2923
phungductung	0:8ede47d38d10	2924	/* TIM Trigger detection event */
phungductung	0:8ede47d38d10	2925	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
phungductung	0:8ede47d38d10	2926	{
phungductung	0:8ede47d38d10	2927	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
phungductung	0:8ede47d38d10	2928	{
phungductung	0:8ede47d38d10	2929	__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
phungductung	0:8ede47d38d10	2930	HAL_TIM_TriggerCallback(htim);
phungductung	0:8ede47d38d10	2931	}
phungductung	0:8ede47d38d10	2932	}
phungductung	0:8ede47d38d10	2933	/* TIM commutation event */
phungductung	0:8ede47d38d10	2934	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
phungductung	0:8ede47d38d10	2935	{
phungductung	0:8ede47d38d10	2936	if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
phungductung	0:8ede47d38d10	2937	{
phungductung	0:8ede47d38d10	2938	__HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
phungductung	0:8ede47d38d10	2939	HAL_TIMEx_CommutationCallback(htim);
phungductung	0:8ede47d38d10	2940	}
phungductung	0:8ede47d38d10	2941	}
phungductung	0:8ede47d38d10	2942	}
phungductung	0:8ede47d38d10	2943
phungductung	0:8ede47d38d10	2944	/**
phungductung	0:8ede47d38d10	2945	* @}
phungductung	0:8ede47d38d10	2946	*/
phungductung	0:8ede47d38d10	2947
phungductung	0:8ede47d38d10	2948	/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
phungductung	0:8ede47d38d10	2949	* @brief Peripheral Control functions
phungductung	0:8ede47d38d10	2950	*
phungductung	0:8ede47d38d10	2951	@verbatim
phungductung	0:8ede47d38d10	2952	==============================================================================
phungductung	0:8ede47d38d10	2953	##### Peripheral Control functions #####
phungductung	0:8ede47d38d10	2954	==============================================================================
phungductung	0:8ede47d38d10	2955	[..]
phungductung	0:8ede47d38d10	2956	This section provides functions allowing to:
phungductung	0:8ede47d38d10	2957	(+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
phungductung	0:8ede47d38d10	2958	(+) Configure External Clock source.
phungductung	0:8ede47d38d10	2959	(+) Configure Complementary channels, break features and dead time.
phungductung	0:8ede47d38d10	2960	(+) Configure Master and the Slave synchronization.
phungductung	0:8ede47d38d10	2961	(+) Configure the DMA Burst Mode.
phungductung	0:8ede47d38d10	2962
phungductung	0:8ede47d38d10	2963	@endverbatim
phungductung	0:8ede47d38d10	2964	* @{
phungductung	0:8ede47d38d10	2965	*/
phungductung	0:8ede47d38d10	2966
phungductung	0:8ede47d38d10	2967	/**
phungductung	0:8ede47d38d10	2968	* @brief Initializes the TIM Output Compare Channels according to the specified
phungductung	0:8ede47d38d10	2969	* parameters in the TIM_OC_InitTypeDef.
phungductung	0:8ede47d38d10	2970	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	2971	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	2972	* @param sConfig: TIM Output Compare configuration structure
phungductung	0:8ede47d38d10	2973	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	2974	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	2975	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	2976	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	2977	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	2978	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	2979	* @retval HAL status
phungductung	0:8ede47d38d10	2980	*/
phungductung	0:8ede47d38d10	2981	__weak HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel)
phungductung	0:8ede47d38d10	2982	{
phungductung	0:8ede47d38d10	2983	/* Check the parameters */
phungductung	0:8ede47d38d10	2984	assert_param(IS_TIM_CHANNELS(Channel));
phungductung	0:8ede47d38d10	2985	assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
phungductung	0:8ede47d38d10	2986	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
phungductung	0:8ede47d38d10	2987
phungductung	0:8ede47d38d10	2988	/* Check input state */
phungductung	0:8ede47d38d10	2989	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	2990
phungductung	0:8ede47d38d10	2991	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	2992
phungductung	0:8ede47d38d10	2993	switch (Channel)
phungductung	0:8ede47d38d10	2994	{
phungductung	0:8ede47d38d10	2995	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	2996	{
phungductung	0:8ede47d38d10	2997	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	2998	/* Configure the TIM Channel 1 in Output Compare */
phungductung	0:8ede47d38d10	2999	TIM_OC1_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3000	}
phungductung	0:8ede47d38d10	3001	break;
phungductung	0:8ede47d38d10	3002
phungductung	0:8ede47d38d10	3003	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	3004	{
phungductung	0:8ede47d38d10	3005	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3006	/* Configure the TIM Channel 2 in Output Compare */
phungductung	0:8ede47d38d10	3007	TIM_OC2_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3008	}
phungductung	0:8ede47d38d10	3009	break;
phungductung	0:8ede47d38d10	3010
phungductung	0:8ede47d38d10	3011	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	3012	{
phungductung	0:8ede47d38d10	3013	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3014	/* Configure the TIM Channel 3 in Output Compare */
phungductung	0:8ede47d38d10	3015	TIM_OC3_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3016	}
phungductung	0:8ede47d38d10	3017	break;
phungductung	0:8ede47d38d10	3018
phungductung	0:8ede47d38d10	3019	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	3020	{
phungductung	0:8ede47d38d10	3021	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3022	/* Configure the TIM Channel 4 in Output Compare */
phungductung	0:8ede47d38d10	3023	TIM_OC4_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3024	}
phungductung	0:8ede47d38d10	3025	break;
phungductung	0:8ede47d38d10	3026
phungductung	0:8ede47d38d10	3027	default:
phungductung	0:8ede47d38d10	3028	break;
phungductung	0:8ede47d38d10	3029	}
phungductung	0:8ede47d38d10	3030	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3031
phungductung	0:8ede47d38d10	3032	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	3033
phungductung	0:8ede47d38d10	3034	return HAL_OK;
phungductung	0:8ede47d38d10	3035	}
phungductung	0:8ede47d38d10	3036
phungductung	0:8ede47d38d10	3037	/**
phungductung	0:8ede47d38d10	3038	* @brief Initializes the TIM Input Capture Channels according to the specified
phungductung	0:8ede47d38d10	3039	* parameters in the TIM_IC_InitTypeDef.
phungductung	0:8ede47d38d10	3040	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3041	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3042	* @param sConfig: TIM Input Capture configuration structure
phungductung	0:8ede47d38d10	3043	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	3044	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	3045	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	3046	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	3047	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	3048	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	3049	* @retval HAL status
phungductung	0:8ede47d38d10	3050	*/
phungductung	0:8ede47d38d10	3051	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel)
phungductung	0:8ede47d38d10	3052	{
phungductung	0:8ede47d38d10	3053	/* Check the parameters */
phungductung	0:8ede47d38d10	3054	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3055	assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
phungductung	0:8ede47d38d10	3056	assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
phungductung	0:8ede47d38d10	3057	assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
phungductung	0:8ede47d38d10	3058	assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
phungductung	0:8ede47d38d10	3059
phungductung	0:8ede47d38d10	3060	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	3061
phungductung	0:8ede47d38d10	3062	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3063
phungductung	0:8ede47d38d10	3064	if (Channel == TIM_CHANNEL_1)
phungductung	0:8ede47d38d10	3065	{
phungductung	0:8ede47d38d10	3066	/* TI1 Configuration */
phungductung	0:8ede47d38d10	3067	TIM_TI1_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	3068	sConfig->ICPolarity,
phungductung	0:8ede47d38d10	3069	sConfig->ICSelection,
phungductung	0:8ede47d38d10	3070	sConfig->ICFilter);
phungductung	0:8ede47d38d10	3071
phungductung	0:8ede47d38d10	3072	/* Reset the IC1PSC Bits */
phungductung	0:8ede47d38d10	3073	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
phungductung	0:8ede47d38d10	3074
phungductung	0:8ede47d38d10	3075	/* Set the IC1PSC value */
phungductung	0:8ede47d38d10	3076	htim->Instance->CCMR1 \|= sConfig->ICPrescaler;
phungductung	0:8ede47d38d10	3077	}
phungductung	0:8ede47d38d10	3078	else if (Channel == TIM_CHANNEL_2)
phungductung	0:8ede47d38d10	3079	{
phungductung	0:8ede47d38d10	3080	/* TI2 Configuration */
phungductung	0:8ede47d38d10	3081	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3082
phungductung	0:8ede47d38d10	3083	TIM_TI2_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	3084	sConfig->ICPolarity,
phungductung	0:8ede47d38d10	3085	sConfig->ICSelection,
phungductung	0:8ede47d38d10	3086	sConfig->ICFilter);
phungductung	0:8ede47d38d10	3087
phungductung	0:8ede47d38d10	3088	/* Reset the IC2PSC Bits */
phungductung	0:8ede47d38d10	3089	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
phungductung	0:8ede47d38d10	3090
phungductung	0:8ede47d38d10	3091	/* Set the IC2PSC value */
phungductung	0:8ede47d38d10	3092	htim->Instance->CCMR1 \|= (sConfig->ICPrescaler << 8);
phungductung	0:8ede47d38d10	3093	}
phungductung	0:8ede47d38d10	3094	else if (Channel == TIM_CHANNEL_3)
phungductung	0:8ede47d38d10	3095	{
phungductung	0:8ede47d38d10	3096	/* TI3 Configuration */
phungductung	0:8ede47d38d10	3097	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3098
phungductung	0:8ede47d38d10	3099	TIM_TI3_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	3100	sConfig->ICPolarity,
phungductung	0:8ede47d38d10	3101	sConfig->ICSelection,
phungductung	0:8ede47d38d10	3102	sConfig->ICFilter);
phungductung	0:8ede47d38d10	3103
phungductung	0:8ede47d38d10	3104	/* Reset the IC3PSC Bits */
phungductung	0:8ede47d38d10	3105	htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
phungductung	0:8ede47d38d10	3106
phungductung	0:8ede47d38d10	3107	/* Set the IC3PSC value */
phungductung	0:8ede47d38d10	3108	htim->Instance->CCMR2 \|= sConfig->ICPrescaler;
phungductung	0:8ede47d38d10	3109	}
phungductung	0:8ede47d38d10	3110	else
phungductung	0:8ede47d38d10	3111	{
phungductung	0:8ede47d38d10	3112	/* TI4 Configuration */
phungductung	0:8ede47d38d10	3113	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3114
phungductung	0:8ede47d38d10	3115	TIM_TI4_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	3116	sConfig->ICPolarity,
phungductung	0:8ede47d38d10	3117	sConfig->ICSelection,
phungductung	0:8ede47d38d10	3118	sConfig->ICFilter);
phungductung	0:8ede47d38d10	3119
phungductung	0:8ede47d38d10	3120	/* Reset the IC4PSC Bits */
phungductung	0:8ede47d38d10	3121	htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
phungductung	0:8ede47d38d10	3122
phungductung	0:8ede47d38d10	3123	/* Set the IC4PSC value */
phungductung	0:8ede47d38d10	3124	htim->Instance->CCMR2 \|= (sConfig->ICPrescaler << 8);
phungductung	0:8ede47d38d10	3125	}
phungductung	0:8ede47d38d10	3126
phungductung	0:8ede47d38d10	3127	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3128
phungductung	0:8ede47d38d10	3129	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	3130
phungductung	0:8ede47d38d10	3131	return HAL_OK;
phungductung	0:8ede47d38d10	3132	}
phungductung	0:8ede47d38d10	3133
phungductung	0:8ede47d38d10	3134	/**
phungductung	0:8ede47d38d10	3135	* @brief Initializes the TIM PWM channels according to the specified
phungductung	0:8ede47d38d10	3136	* parameters in the TIM_OC_InitTypeDef.
phungductung	0:8ede47d38d10	3137	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3138	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3139	* @param sConfig: TIM PWM configuration structure
phungductung	0:8ede47d38d10	3140	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	3141	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	3142	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	3143	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	3144	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	3145	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	3146	* @retval HAL status
phungductung	0:8ede47d38d10	3147	*/
phungductung	0:8ede47d38d10	3148	__weak HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel)
phungductung	0:8ede47d38d10	3149	{
phungductung	0:8ede47d38d10	3150	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	3151
phungductung	0:8ede47d38d10	3152	/* Check the parameters */
phungductung	0:8ede47d38d10	3153	assert_param(IS_TIM_CHANNELS(Channel));
phungductung	0:8ede47d38d10	3154	assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
phungductung	0:8ede47d38d10	3155	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
phungductung	0:8ede47d38d10	3156	assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
phungductung	0:8ede47d38d10	3157
phungductung	0:8ede47d38d10	3158	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3159
phungductung	0:8ede47d38d10	3160	switch (Channel)
phungductung	0:8ede47d38d10	3161	{
phungductung	0:8ede47d38d10	3162	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	3163	{
phungductung	0:8ede47d38d10	3164	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3165	/* Configure the Channel 1 in PWM mode */
phungductung	0:8ede47d38d10	3166	TIM_OC1_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3167
phungductung	0:8ede47d38d10	3168	/* Set the Preload enable bit for channel1 */
phungductung	0:8ede47d38d10	3169	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1PE;
phungductung	0:8ede47d38d10	3170
phungductung	0:8ede47d38d10	3171	/* Configure the Output Fast mode */
phungductung	0:8ede47d38d10	3172	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
phungductung	0:8ede47d38d10	3173	htim->Instance->CCMR1 \|= sConfig->OCFastMode;
phungductung	0:8ede47d38d10	3174	}
phungductung	0:8ede47d38d10	3175	break;
phungductung	0:8ede47d38d10	3176
phungductung	0:8ede47d38d10	3177	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	3178	{
phungductung	0:8ede47d38d10	3179	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3180	/* Configure the Channel 2 in PWM mode */
phungductung	0:8ede47d38d10	3181	TIM_OC2_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3182
phungductung	0:8ede47d38d10	3183	/* Set the Preload enable bit for channel2 */
phungductung	0:8ede47d38d10	3184	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2PE;
phungductung	0:8ede47d38d10	3185
phungductung	0:8ede47d38d10	3186	/* Configure the Output Fast mode */
phungductung	0:8ede47d38d10	3187	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
phungductung	0:8ede47d38d10	3188	htim->Instance->CCMR1 \|= sConfig->OCFastMode << 8;
phungductung	0:8ede47d38d10	3189	}
phungductung	0:8ede47d38d10	3190	break;
phungductung	0:8ede47d38d10	3191
phungductung	0:8ede47d38d10	3192	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	3193	{
phungductung	0:8ede47d38d10	3194	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3195	/* Configure the Channel 3 in PWM mode */
phungductung	0:8ede47d38d10	3196	TIM_OC3_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3197
phungductung	0:8ede47d38d10	3198	/* Set the Preload enable bit for channel3 */
phungductung	0:8ede47d38d10	3199	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3PE;
phungductung	0:8ede47d38d10	3200
phungductung	0:8ede47d38d10	3201	/* Configure the Output Fast mode */
phungductung	0:8ede47d38d10	3202	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
phungductung	0:8ede47d38d10	3203	htim->Instance->CCMR2 \|= sConfig->OCFastMode;
phungductung	0:8ede47d38d10	3204	}
phungductung	0:8ede47d38d10	3205	break;
phungductung	0:8ede47d38d10	3206
phungductung	0:8ede47d38d10	3207	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	3208	{
phungductung	0:8ede47d38d10	3209	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3210	/* Configure the Channel 4 in PWM mode */
phungductung	0:8ede47d38d10	3211	TIM_OC4_SetConfig(htim->Instance, sConfig);
phungductung	0:8ede47d38d10	3212
phungductung	0:8ede47d38d10	3213	/* Set the Preload enable bit for channel4 */
phungductung	0:8ede47d38d10	3214	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4PE;
phungductung	0:8ede47d38d10	3215
phungductung	0:8ede47d38d10	3216	/* Configure the Output Fast mode */
phungductung	0:8ede47d38d10	3217	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
phungductung	0:8ede47d38d10	3218	htim->Instance->CCMR2 \|= sConfig->OCFastMode << 8;
phungductung	0:8ede47d38d10	3219	}
phungductung	0:8ede47d38d10	3220	break;
phungductung	0:8ede47d38d10	3221
phungductung	0:8ede47d38d10	3222	default:
phungductung	0:8ede47d38d10	3223	break;
phungductung	0:8ede47d38d10	3224	}
phungductung	0:8ede47d38d10	3225
phungductung	0:8ede47d38d10	3226	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3227
phungductung	0:8ede47d38d10	3228	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	3229
phungductung	0:8ede47d38d10	3230	return HAL_OK;
phungductung	0:8ede47d38d10	3231	}
phungductung	0:8ede47d38d10	3232
phungductung	0:8ede47d38d10	3233	/**
phungductung	0:8ede47d38d10	3234	* @brief Initializes the TIM One Pulse Channels according to the specified
phungductung	0:8ede47d38d10	3235	* parameters in the TIM_OnePulse_InitTypeDef.
phungductung	0:8ede47d38d10	3236	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3237	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3238	* @param sConfig: TIM One Pulse configuration structure
phungductung	0:8ede47d38d10	3239	* @param OutputChannel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	3240	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	3241	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	3242	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	3243	* @param InputChannel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	3244	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	3245	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	3246	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	3247	* @retval HAL status
phungductung	0:8ede47d38d10	3248	*/
phungductung	0:8ede47d38d10	3249	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel)
phungductung	0:8ede47d38d10	3250	{
phungductung	0:8ede47d38d10	3251	TIM_OC_InitTypeDef temp1;
phungductung	0:8ede47d38d10	3252
phungductung	0:8ede47d38d10	3253	/* Check the parameters */
phungductung	0:8ede47d38d10	3254	assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
phungductung	0:8ede47d38d10	3255	assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
phungductung	0:8ede47d38d10	3256
phungductung	0:8ede47d38d10	3257	if(OutputChannel != InputChannel)
phungductung	0:8ede47d38d10	3258	{
phungductung	0:8ede47d38d10	3259	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	3260
phungductung	0:8ede47d38d10	3261	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3262
phungductung	0:8ede47d38d10	3263	/* Extract the Output compare configuration from sConfig structure */
phungductung	0:8ede47d38d10	3264	temp1.OCMode = sConfig->OCMode;
phungductung	0:8ede47d38d10	3265	temp1.Pulse = sConfig->Pulse;
phungductung	0:8ede47d38d10	3266	temp1.OCPolarity = sConfig->OCPolarity;
phungductung	0:8ede47d38d10	3267	temp1.OCNPolarity = sConfig->OCNPolarity;
phungductung	0:8ede47d38d10	3268	temp1.OCIdleState = sConfig->OCIdleState;
phungductung	0:8ede47d38d10	3269	temp1.OCNIdleState = sConfig->OCNIdleState;
phungductung	0:8ede47d38d10	3270
phungductung	0:8ede47d38d10	3271	switch (OutputChannel)
phungductung	0:8ede47d38d10	3272	{
phungductung	0:8ede47d38d10	3273	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	3274	{
phungductung	0:8ede47d38d10	3275	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3276
phungductung	0:8ede47d38d10	3277	TIM_OC1_SetConfig(htim->Instance, &temp1);
phungductung	0:8ede47d38d10	3278	}
phungductung	0:8ede47d38d10	3279	break;
phungductung	0:8ede47d38d10	3280	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	3281	{
phungductung	0:8ede47d38d10	3282	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3283
phungductung	0:8ede47d38d10	3284	TIM_OC2_SetConfig(htim->Instance, &temp1);
phungductung	0:8ede47d38d10	3285	}
phungductung	0:8ede47d38d10	3286	break;
phungductung	0:8ede47d38d10	3287	default:
phungductung	0:8ede47d38d10	3288	break;
phungductung	0:8ede47d38d10	3289	}
phungductung	0:8ede47d38d10	3290	switch (InputChannel)
phungductung	0:8ede47d38d10	3291	{
phungductung	0:8ede47d38d10	3292	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	3293	{
phungductung	0:8ede47d38d10	3294	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3295
phungductung	0:8ede47d38d10	3296	TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
phungductung	0:8ede47d38d10	3297	sConfig->ICSelection, sConfig->ICFilter);
phungductung	0:8ede47d38d10	3298
phungductung	0:8ede47d38d10	3299	/* Reset the IC1PSC Bits */
phungductung	0:8ede47d38d10	3300	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
phungductung	0:8ede47d38d10	3301
phungductung	0:8ede47d38d10	3302	/* Select the Trigger source */
phungductung	0:8ede47d38d10	3303	htim->Instance->SMCR &= ~TIM_SMCR_TS;
phungductung	0:8ede47d38d10	3304	htim->Instance->SMCR \|= TIM_TS_TI1FP1;
phungductung	0:8ede47d38d10	3305
phungductung	0:8ede47d38d10	3306	/* Select the Slave Mode */
phungductung	0:8ede47d38d10	3307	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
phungductung	0:8ede47d38d10	3308	htim->Instance->SMCR \|= TIM_SLAVEMODE_TRIGGER;
phungductung	0:8ede47d38d10	3309	}
phungductung	0:8ede47d38d10	3310	break;
phungductung	0:8ede47d38d10	3311	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	3312	{
phungductung	0:8ede47d38d10	3313	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3314
phungductung	0:8ede47d38d10	3315	TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
phungductung	0:8ede47d38d10	3316	sConfig->ICSelection, sConfig->ICFilter);
phungductung	0:8ede47d38d10	3317
phungductung	0:8ede47d38d10	3318	/* Reset the IC2PSC Bits */
phungductung	0:8ede47d38d10	3319	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
phungductung	0:8ede47d38d10	3320
phungductung	0:8ede47d38d10	3321	/* Select the Trigger source */
phungductung	0:8ede47d38d10	3322	htim->Instance->SMCR &= ~TIM_SMCR_TS;
phungductung	0:8ede47d38d10	3323	htim->Instance->SMCR \|= TIM_TS_TI2FP2;
phungductung	0:8ede47d38d10	3324
phungductung	0:8ede47d38d10	3325	/* Select the Slave Mode */
phungductung	0:8ede47d38d10	3326	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
phungductung	0:8ede47d38d10	3327	htim->Instance->SMCR \|= TIM_SLAVEMODE_TRIGGER;
phungductung	0:8ede47d38d10	3328	}
phungductung	0:8ede47d38d10	3329	break;
phungductung	0:8ede47d38d10	3330
phungductung	0:8ede47d38d10	3331	default:
phungductung	0:8ede47d38d10	3332	break;
phungductung	0:8ede47d38d10	3333	}
phungductung	0:8ede47d38d10	3334
phungductung	0:8ede47d38d10	3335	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3336
phungductung	0:8ede47d38d10	3337	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	3338
phungductung	0:8ede47d38d10	3339	return HAL_OK;
phungductung	0:8ede47d38d10	3340	}
phungductung	0:8ede47d38d10	3341	else
phungductung	0:8ede47d38d10	3342	{
phungductung	0:8ede47d38d10	3343	return HAL_ERROR;
phungductung	0:8ede47d38d10	3344	}
phungductung	0:8ede47d38d10	3345	}
phungductung	0:8ede47d38d10	3346
phungductung	0:8ede47d38d10	3347	/**
phungductung	0:8ede47d38d10	3348	* @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
phungductung	0:8ede47d38d10	3349	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3350	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3351	* @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data write.
phungductung	0:8ede47d38d10	3352	* This parameters can be on of the following values:
phungductung	0:8ede47d38d10	3353	* @arg TIM_DMABASE_CR1
phungductung	0:8ede47d38d10	3354	* @arg TIM_DMABASE_CR2
phungductung	0:8ede47d38d10	3355	* @arg TIM_DMABASE_SMCR
phungductung	0:8ede47d38d10	3356	* @arg TIM_DMABASE_DIER
phungductung	0:8ede47d38d10	3357	* @arg TIM_DMABASE_SR
phungductung	0:8ede47d38d10	3358	* @arg TIM_DMABASE_EGR
phungductung	0:8ede47d38d10	3359	* @arg TIM_DMABASE_CCMR1
phungductung	0:8ede47d38d10	3360	* @arg TIM_DMABASE_CCMR2
phungductung	0:8ede47d38d10	3361	* @arg TIM_DMABASE_CCER
phungductung	0:8ede47d38d10	3362	* @arg TIM_DMABASE_CNT
phungductung	0:8ede47d38d10	3363	* @arg TIM_DMABASE_PSC
phungductung	0:8ede47d38d10	3364	* @arg TIM_DMABASE_ARR
phungductung	0:8ede47d38d10	3365	* @arg TIM_DMABASE_RCR
phungductung	0:8ede47d38d10	3366	* @arg TIM_DMABASE_CCR1
phungductung	0:8ede47d38d10	3367	* @arg TIM_DMABASE_CCR2
phungductung	0:8ede47d38d10	3368	* @arg TIM_DMABASE_CCR3
phungductung	0:8ede47d38d10	3369	* @arg TIM_DMABASE_CCR4
phungductung	0:8ede47d38d10	3370	* @arg TIM_DMABASE_BDTR
phungductung	0:8ede47d38d10	3371	* @arg TIM_DMABASE_DCR
phungductung	0:8ede47d38d10	3372	* @param BurstRequestSrc: TIM DMA Request sources.
phungductung	0:8ede47d38d10	3373	* This parameters can be on of the following values:
phungductung	0:8ede47d38d10	3374	* @arg TIM_DMA_UPDATE: TIM update Interrupt source
phungductung	0:8ede47d38d10	3375	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
phungductung	0:8ede47d38d10	3376	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
phungductung	0:8ede47d38d10	3377	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
phungductung	0:8ede47d38d10	3378	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
phungductung	0:8ede47d38d10	3379	* @arg TIM_DMA_COM: TIM Commutation DMA source
phungductung	0:8ede47d38d10	3380	* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
phungductung	0:8ede47d38d10	3381	* @param BurstBuffer: The Buffer address.
phungductung	0:8ede47d38d10	3382	* @param BurstLength: DMA Burst length. This parameter can be one value
phungductung	0:8ede47d38d10	3383	* between TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
phungductung	0:8ede47d38d10	3384	* @retval HAL status
phungductung	0:8ede47d38d10	3385	*/
phungductung	0:8ede47d38d10	3386	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
phungductung	0:8ede47d38d10	3387	uint32_t* BurstBuffer, uint32_t BurstLength)
phungductung	0:8ede47d38d10	3388	{
phungductung	0:8ede47d38d10	3389	/* Check the parameters */
phungductung	0:8ede47d38d10	3390	assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3391	assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
phungductung	0:8ede47d38d10	3392	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
phungductung	0:8ede47d38d10	3393	assert_param(IS_TIM_DMA_LENGTH(BurstLength));
phungductung	0:8ede47d38d10	3394
phungductung	0:8ede47d38d10	3395	if((htim->State == HAL_TIM_STATE_BUSY))
phungductung	0:8ede47d38d10	3396	{
phungductung	0:8ede47d38d10	3397	return HAL_BUSY;
phungductung	0:8ede47d38d10	3398	}
phungductung	0:8ede47d38d10	3399	else if((htim->State == HAL_TIM_STATE_READY))
phungductung	0:8ede47d38d10	3400	{
phungductung	0:8ede47d38d10	3401	if((BurstBuffer == 0 ) && (BurstLength > 0))
phungductung	0:8ede47d38d10	3402	{
phungductung	0:8ede47d38d10	3403	return HAL_ERROR;
phungductung	0:8ede47d38d10	3404	}
phungductung	0:8ede47d38d10	3405	else
phungductung	0:8ede47d38d10	3406	{
phungductung	0:8ede47d38d10	3407	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3408	}
phungductung	0:8ede47d38d10	3409	}
phungductung	0:8ede47d38d10	3410	switch(BurstRequestSrc)
phungductung	0:8ede47d38d10	3411	{
phungductung	0:8ede47d38d10	3412	case TIM_DMA_UPDATE:
phungductung	0:8ede47d38d10	3413	{
phungductung	0:8ede47d38d10	3414	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3415	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
phungductung	0:8ede47d38d10	3416
phungductung	0:8ede47d38d10	3417	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3418	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3419
phungductung	0:8ede47d38d10	3420	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3421	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3422	}
phungductung	0:8ede47d38d10	3423	break;
phungductung	0:8ede47d38d10	3424	case TIM_DMA_CC1:
phungductung	0:8ede47d38d10	3425	{
phungductung	0:8ede47d38d10	3426	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3427	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	3428
phungductung	0:8ede47d38d10	3429	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3430	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3431
phungductung	0:8ede47d38d10	3432	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3433	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3434	}
phungductung	0:8ede47d38d10	3435	break;
phungductung	0:8ede47d38d10	3436	case TIM_DMA_CC2:
phungductung	0:8ede47d38d10	3437	{
phungductung	0:8ede47d38d10	3438	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3439	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	3440
phungductung	0:8ede47d38d10	3441	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3442	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3443
phungductung	0:8ede47d38d10	3444	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3445	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3446	}
phungductung	0:8ede47d38d10	3447	break;
phungductung	0:8ede47d38d10	3448	case TIM_DMA_CC3:
phungductung	0:8ede47d38d10	3449	{
phungductung	0:8ede47d38d10	3450	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3451	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	3452
phungductung	0:8ede47d38d10	3453	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3454	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3455
phungductung	0:8ede47d38d10	3456	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3457	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3458	}
phungductung	0:8ede47d38d10	3459	break;
phungductung	0:8ede47d38d10	3460	case TIM_DMA_CC4:
phungductung	0:8ede47d38d10	3461	{
phungductung	0:8ede47d38d10	3462	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3463	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
phungductung	0:8ede47d38d10	3464
phungductung	0:8ede47d38d10	3465	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3466	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3467
phungductung	0:8ede47d38d10	3468	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3469	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3470	}
phungductung	0:8ede47d38d10	3471	break;
phungductung	0:8ede47d38d10	3472	case TIM_DMA_COM:
phungductung	0:8ede47d38d10	3473	{
phungductung	0:8ede47d38d10	3474	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3475	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
phungductung	0:8ede47d38d10	3476
phungductung	0:8ede47d38d10	3477	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3478	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3479
phungductung	0:8ede47d38d10	3480	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3481	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3482	}
phungductung	0:8ede47d38d10	3483	break;
phungductung	0:8ede47d38d10	3484	case TIM_DMA_TRIGGER:
phungductung	0:8ede47d38d10	3485	{
phungductung	0:8ede47d38d10	3486	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3487	htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
phungductung	0:8ede47d38d10	3488
phungductung	0:8ede47d38d10	3489	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3490	htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3491
phungductung	0:8ede47d38d10	3492	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3493	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3494	}
phungductung	0:8ede47d38d10	3495	break;
phungductung	0:8ede47d38d10	3496	default:
phungductung	0:8ede47d38d10	3497	break;
phungductung	0:8ede47d38d10	3498	}
phungductung	0:8ede47d38d10	3499	/* configure the DMA Burst Mode */
phungductung	0:8ede47d38d10	3500	htim->Instance->DCR = BurstBaseAddress \| BurstLength;
phungductung	0:8ede47d38d10	3501
phungductung	0:8ede47d38d10	3502	/* Enable the TIM DMA Request */
phungductung	0:8ede47d38d10	3503	__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
phungductung	0:8ede47d38d10	3504
phungductung	0:8ede47d38d10	3505	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3506
phungductung	0:8ede47d38d10	3507	/* Return function status */
phungductung	0:8ede47d38d10	3508	return HAL_OK;
phungductung	0:8ede47d38d10	3509	}
phungductung	0:8ede47d38d10	3510
phungductung	0:8ede47d38d10	3511	/**
phungductung	0:8ede47d38d10	3512	* @brief Stops the TIM DMA Burst mode
phungductung	0:8ede47d38d10	3513	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3514	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3515	* @param BurstRequestSrc: TIM DMA Request sources to disable
phungductung	0:8ede47d38d10	3516	* @retval HAL status
phungductung	0:8ede47d38d10	3517	*/
phungductung	0:8ede47d38d10	3518	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
phungductung	0:8ede47d38d10	3519	{
phungductung	0:8ede47d38d10	3520	/* Check the parameters */
phungductung	0:8ede47d38d10	3521	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
phungductung	0:8ede47d38d10	3522
phungductung	0:8ede47d38d10	3523	/* Abort the DMA transfer (at least disable the DMA channel) */
phungductung	0:8ede47d38d10	3524	switch(BurstRequestSrc)
phungductung	0:8ede47d38d10	3525	{
phungductung	0:8ede47d38d10	3526	case TIM_DMA_UPDATE:
phungductung	0:8ede47d38d10	3527	{
phungductung	0:8ede47d38d10	3528	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
phungductung	0:8ede47d38d10	3529	}
phungductung	0:8ede47d38d10	3530	break;
phungductung	0:8ede47d38d10	3531	case TIM_DMA_CC1:
phungductung	0:8ede47d38d10	3532	{
phungductung	0:8ede47d38d10	3533	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
phungductung	0:8ede47d38d10	3534	}
phungductung	0:8ede47d38d10	3535	break;
phungductung	0:8ede47d38d10	3536	case TIM_DMA_CC2:
phungductung	0:8ede47d38d10	3537	{
phungductung	0:8ede47d38d10	3538	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
phungductung	0:8ede47d38d10	3539	}
phungductung	0:8ede47d38d10	3540	break;
phungductung	0:8ede47d38d10	3541	case TIM_DMA_CC3:
phungductung	0:8ede47d38d10	3542	{
phungductung	0:8ede47d38d10	3543	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
phungductung	0:8ede47d38d10	3544	}
phungductung	0:8ede47d38d10	3545	break;
phungductung	0:8ede47d38d10	3546	case TIM_DMA_CC4:
phungductung	0:8ede47d38d10	3547	{
phungductung	0:8ede47d38d10	3548	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
phungductung	0:8ede47d38d10	3549	}
phungductung	0:8ede47d38d10	3550	break;
phungductung	0:8ede47d38d10	3551	case TIM_DMA_COM:
phungductung	0:8ede47d38d10	3552	{
phungductung	0:8ede47d38d10	3553	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
phungductung	0:8ede47d38d10	3554	}
phungductung	0:8ede47d38d10	3555	break;
phungductung	0:8ede47d38d10	3556	case TIM_DMA_TRIGGER:
phungductung	0:8ede47d38d10	3557	{
phungductung	0:8ede47d38d10	3558	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
phungductung	0:8ede47d38d10	3559	}
phungductung	0:8ede47d38d10	3560	break;
phungductung	0:8ede47d38d10	3561	default:
phungductung	0:8ede47d38d10	3562	break;
phungductung	0:8ede47d38d10	3563	}
phungductung	0:8ede47d38d10	3564
phungductung	0:8ede47d38d10	3565	/* Disable the TIM Update DMA request */
phungductung	0:8ede47d38d10	3566	__HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
phungductung	0:8ede47d38d10	3567
phungductung	0:8ede47d38d10	3568	/* Return function status */
phungductung	0:8ede47d38d10	3569	return HAL_OK;
phungductung	0:8ede47d38d10	3570	}
phungductung	0:8ede47d38d10	3571
phungductung	0:8ede47d38d10	3572	/**
phungductung	0:8ede47d38d10	3573	* @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
phungductung	0:8ede47d38d10	3574	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3575	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3576	* @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data read.
phungductung	0:8ede47d38d10	3577	* This parameters can be on of the following values:
phungductung	0:8ede47d38d10	3578	* @arg TIM_DMABASE_CR1
phungductung	0:8ede47d38d10	3579	* @arg TIM_DMABASE_CR2
phungductung	0:8ede47d38d10	3580	* @arg TIM_DMABASE_SMCR
phungductung	0:8ede47d38d10	3581	* @arg TIM_DMABASE_DIER
phungductung	0:8ede47d38d10	3582	* @arg TIM_DMABASE_SR
phungductung	0:8ede47d38d10	3583	* @arg TIM_DMABASE_EGR
phungductung	0:8ede47d38d10	3584	* @arg TIM_DMABASE_CCMR1
phungductung	0:8ede47d38d10	3585	* @arg TIM_DMABASE_CCMR2
phungductung	0:8ede47d38d10	3586	* @arg TIM_DMABASE_CCER
phungductung	0:8ede47d38d10	3587	* @arg TIM_DMABASE_CNT
phungductung	0:8ede47d38d10	3588	* @arg TIM_DMABASE_PSC
phungductung	0:8ede47d38d10	3589	* @arg TIM_DMABASE_ARR
phungductung	0:8ede47d38d10	3590	* @arg TIM_DMABASE_RCR
phungductung	0:8ede47d38d10	3591	* @arg TIM_DMABASE_CCR1
phungductung	0:8ede47d38d10	3592	* @arg TIM_DMABASE_CCR2
phungductung	0:8ede47d38d10	3593	* @arg TIM_DMABASE_CCR3
phungductung	0:8ede47d38d10	3594	* @arg TIM_DMABASE_CCR4
phungductung	0:8ede47d38d10	3595	* @arg TIM_DMABASE_BDTR
phungductung	0:8ede47d38d10	3596	* @arg TIM_DMABASE_DCR
phungductung	0:8ede47d38d10	3597	* @param BurstRequestSrc: TIM DMA Request sources.
phungductung	0:8ede47d38d10	3598	* This parameters can be on of the following values:
phungductung	0:8ede47d38d10	3599	* @arg TIM_DMA_UPDATE: TIM update Interrupt source
phungductung	0:8ede47d38d10	3600	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
phungductung	0:8ede47d38d10	3601	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
phungductung	0:8ede47d38d10	3602	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
phungductung	0:8ede47d38d10	3603	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
phungductung	0:8ede47d38d10	3604	* @arg TIM_DMA_COM: TIM Commutation DMA source
phungductung	0:8ede47d38d10	3605	* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
phungductung	0:8ede47d38d10	3606	* @param BurstBuffer: The Buffer address.
phungductung	0:8ede47d38d10	3607	* @param BurstLength: DMA Burst length. This parameter can be one value
phungductung	0:8ede47d38d10	3608	* between TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
phungductung	0:8ede47d38d10	3609	* @retval HAL status
phungductung	0:8ede47d38d10	3610	*/
phungductung	0:8ede47d38d10	3611	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
phungductung	0:8ede47d38d10	3612	uint32_t *BurstBuffer, uint32_t BurstLength)
phungductung	0:8ede47d38d10	3613	{
phungductung	0:8ede47d38d10	3614	/* Check the parameters */
phungductung	0:8ede47d38d10	3615	assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3616	assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
phungductung	0:8ede47d38d10	3617	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
phungductung	0:8ede47d38d10	3618	assert_param(IS_TIM_DMA_LENGTH(BurstLength));
phungductung	0:8ede47d38d10	3619
phungductung	0:8ede47d38d10	3620	if((htim->State == HAL_TIM_STATE_BUSY))
phungductung	0:8ede47d38d10	3621	{
phungductung	0:8ede47d38d10	3622	return HAL_BUSY;
phungductung	0:8ede47d38d10	3623	}
phungductung	0:8ede47d38d10	3624	else if((htim->State == HAL_TIM_STATE_READY))
phungductung	0:8ede47d38d10	3625	{
phungductung	0:8ede47d38d10	3626	if((BurstBuffer == 0 ) && (BurstLength > 0))
phungductung	0:8ede47d38d10	3627	{
phungductung	0:8ede47d38d10	3628	return HAL_ERROR;
phungductung	0:8ede47d38d10	3629	}
phungductung	0:8ede47d38d10	3630	else
phungductung	0:8ede47d38d10	3631	{
phungductung	0:8ede47d38d10	3632	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3633	}
phungductung	0:8ede47d38d10	3634	}
phungductung	0:8ede47d38d10	3635	switch(BurstRequestSrc)
phungductung	0:8ede47d38d10	3636	{
phungductung	0:8ede47d38d10	3637	case TIM_DMA_UPDATE:
phungductung	0:8ede47d38d10	3638	{
phungductung	0:8ede47d38d10	3639	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3640	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
phungductung	0:8ede47d38d10	3641
phungductung	0:8ede47d38d10	3642	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3643	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3644
phungductung	0:8ede47d38d10	3645	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3646	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3647	}
phungductung	0:8ede47d38d10	3648	break;
phungductung	0:8ede47d38d10	3649	case TIM_DMA_CC1:
phungductung	0:8ede47d38d10	3650	{
phungductung	0:8ede47d38d10	3651	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3652	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	3653
phungductung	0:8ede47d38d10	3654	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3655	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3656
phungductung	0:8ede47d38d10	3657	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3658	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3659	}
phungductung	0:8ede47d38d10	3660	break;
phungductung	0:8ede47d38d10	3661	case TIM_DMA_CC2:
phungductung	0:8ede47d38d10	3662	{
phungductung	0:8ede47d38d10	3663	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3664	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	3665
phungductung	0:8ede47d38d10	3666	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3667	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3668
phungductung	0:8ede47d38d10	3669	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3670	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3671	}
phungductung	0:8ede47d38d10	3672	break;
phungductung	0:8ede47d38d10	3673	case TIM_DMA_CC3:
phungductung	0:8ede47d38d10	3674	{
phungductung	0:8ede47d38d10	3675	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3676	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	3677
phungductung	0:8ede47d38d10	3678	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3679	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3680
phungductung	0:8ede47d38d10	3681	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3682	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3683	}
phungductung	0:8ede47d38d10	3684	break;
phungductung	0:8ede47d38d10	3685	case TIM_DMA_CC4:
phungductung	0:8ede47d38d10	3686	{
phungductung	0:8ede47d38d10	3687	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3688	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
phungductung	0:8ede47d38d10	3689
phungductung	0:8ede47d38d10	3690	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3691	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3692
phungductung	0:8ede47d38d10	3693	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3694	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3695	}
phungductung	0:8ede47d38d10	3696	break;
phungductung	0:8ede47d38d10	3697	case TIM_DMA_COM:
phungductung	0:8ede47d38d10	3698	{
phungductung	0:8ede47d38d10	3699	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3700	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
phungductung	0:8ede47d38d10	3701
phungductung	0:8ede47d38d10	3702	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3703	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3704
phungductung	0:8ede47d38d10	3705	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3706	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3707	}
phungductung	0:8ede47d38d10	3708	break;
phungductung	0:8ede47d38d10	3709	case TIM_DMA_TRIGGER:
phungductung	0:8ede47d38d10	3710	{
phungductung	0:8ede47d38d10	3711	/* Set the DMA Period elapsed callback */
phungductung	0:8ede47d38d10	3712	htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
phungductung	0:8ede47d38d10	3713
phungductung	0:8ede47d38d10	3714	/* Set the DMA error callback */
phungductung	0:8ede47d38d10	3715	htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
phungductung	0:8ede47d38d10	3716
phungductung	0:8ede47d38d10	3717	/* Enable the DMA Stream */
phungductung	0:8ede47d38d10	3718	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
phungductung	0:8ede47d38d10	3719	}
phungductung	0:8ede47d38d10	3720	break;
phungductung	0:8ede47d38d10	3721	default:
phungductung	0:8ede47d38d10	3722	break;
phungductung	0:8ede47d38d10	3723	}
phungductung	0:8ede47d38d10	3724
phungductung	0:8ede47d38d10	3725	/* configure the DMA Burst Mode */
phungductung	0:8ede47d38d10	3726	htim->Instance->DCR = BurstBaseAddress \| BurstLength;
phungductung	0:8ede47d38d10	3727
phungductung	0:8ede47d38d10	3728	/* Enable the TIM DMA Request */
phungductung	0:8ede47d38d10	3729	__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
phungductung	0:8ede47d38d10	3730
phungductung	0:8ede47d38d10	3731	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3732
phungductung	0:8ede47d38d10	3733	/* Return function status */
phungductung	0:8ede47d38d10	3734	return HAL_OK;
phungductung	0:8ede47d38d10	3735	}
phungductung	0:8ede47d38d10	3736
phungductung	0:8ede47d38d10	3737	/**
phungductung	0:8ede47d38d10	3738	* @brief Stop the DMA burst reading
phungductung	0:8ede47d38d10	3739	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3740	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3741	* @param BurstRequestSrc: TIM DMA Request sources to disable.
phungductung	0:8ede47d38d10	3742	* @retval HAL status
phungductung	0:8ede47d38d10	3743	*/
phungductung	0:8ede47d38d10	3744	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
phungductung	0:8ede47d38d10	3745	{
phungductung	0:8ede47d38d10	3746	/* Check the parameters */
phungductung	0:8ede47d38d10	3747	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
phungductung	0:8ede47d38d10	3748
phungductung	0:8ede47d38d10	3749	/* Abort the DMA transfer (at least disable the DMA channel) */
phungductung	0:8ede47d38d10	3750	switch(BurstRequestSrc)
phungductung	0:8ede47d38d10	3751	{
phungductung	0:8ede47d38d10	3752	case TIM_DMA_UPDATE:
phungductung	0:8ede47d38d10	3753	{
phungductung	0:8ede47d38d10	3754	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
phungductung	0:8ede47d38d10	3755	}
phungductung	0:8ede47d38d10	3756	break;
phungductung	0:8ede47d38d10	3757	case TIM_DMA_CC1:
phungductung	0:8ede47d38d10	3758	{
phungductung	0:8ede47d38d10	3759	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
phungductung	0:8ede47d38d10	3760	}
phungductung	0:8ede47d38d10	3761	break;
phungductung	0:8ede47d38d10	3762	case TIM_DMA_CC2:
phungductung	0:8ede47d38d10	3763	{
phungductung	0:8ede47d38d10	3764	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
phungductung	0:8ede47d38d10	3765	}
phungductung	0:8ede47d38d10	3766	break;
phungductung	0:8ede47d38d10	3767	case TIM_DMA_CC3:
phungductung	0:8ede47d38d10	3768	{
phungductung	0:8ede47d38d10	3769	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
phungductung	0:8ede47d38d10	3770	}
phungductung	0:8ede47d38d10	3771	break;
phungductung	0:8ede47d38d10	3772	case TIM_DMA_CC4:
phungductung	0:8ede47d38d10	3773	{
phungductung	0:8ede47d38d10	3774	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
phungductung	0:8ede47d38d10	3775	}
phungductung	0:8ede47d38d10	3776	break;
phungductung	0:8ede47d38d10	3777	case TIM_DMA_COM:
phungductung	0:8ede47d38d10	3778	{
phungductung	0:8ede47d38d10	3779	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
phungductung	0:8ede47d38d10	3780	}
phungductung	0:8ede47d38d10	3781	break;
phungductung	0:8ede47d38d10	3782	case TIM_DMA_TRIGGER:
phungductung	0:8ede47d38d10	3783	{
phungductung	0:8ede47d38d10	3784	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
phungductung	0:8ede47d38d10	3785	}
phungductung	0:8ede47d38d10	3786	break;
phungductung	0:8ede47d38d10	3787	default:
phungductung	0:8ede47d38d10	3788	break;
phungductung	0:8ede47d38d10	3789	}
phungductung	0:8ede47d38d10	3790
phungductung	0:8ede47d38d10	3791	/* Disable the TIM Update DMA request */
phungductung	0:8ede47d38d10	3792	__HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
phungductung	0:8ede47d38d10	3793
phungductung	0:8ede47d38d10	3794	/* Return function status */
phungductung	0:8ede47d38d10	3795	return HAL_OK;
phungductung	0:8ede47d38d10	3796	}
phungductung	0:8ede47d38d10	3797
phungductung	0:8ede47d38d10	3798	/**
phungductung	0:8ede47d38d10	3799	* @brief Generate a software event
phungductung	0:8ede47d38d10	3800	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3801	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3802	* @param EventSource: specifies the event source.
phungductung	0:8ede47d38d10	3803	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	3804	* @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source
phungductung	0:8ede47d38d10	3805	* @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source
phungductung	0:8ede47d38d10	3806	* @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source
phungductung	0:8ede47d38d10	3807	* @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source
phungductung	0:8ede47d38d10	3808	* @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source
phungductung	0:8ede47d38d10	3809	* @arg TIM_EVENTSOURCE_COM: Timer COM event source
phungductung	0:8ede47d38d10	3810	* @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source
phungductung	0:8ede47d38d10	3811	* @arg TIM_EVENTSOURCE_BREAK: Timer Break event source
phungductung	0:8ede47d38d10	3812	* @arg TIM_EVENTSOURCE_BREAK2: Timer Break2 event source
phungductung	0:8ede47d38d10	3813	* @note TIM6 and TIM7 can only generate an update event.
phungductung	0:8ede47d38d10	3814	* @note TIM_EVENTSOURCE_COM, TIM_EVENTSOURCE_BREAK and TIM_EVENTSOURCE_BREAK2 are used only with TIM1 and TIM8.
phungductung	0:8ede47d38d10	3815	* @retval HAL status
phungductung	0:8ede47d38d10	3816	*/
phungductung	0:8ede47d38d10	3817
phungductung	0:8ede47d38d10	3818	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
phungductung	0:8ede47d38d10	3819	{
phungductung	0:8ede47d38d10	3820	/* Check the parameters */
phungductung	0:8ede47d38d10	3821	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3822	assert_param(IS_TIM_EVENT_SOURCE(EventSource));
phungductung	0:8ede47d38d10	3823
phungductung	0:8ede47d38d10	3824	/* Process Locked */
phungductung	0:8ede47d38d10	3825	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	3826
phungductung	0:8ede47d38d10	3827	/* Change the TIM state */
phungductung	0:8ede47d38d10	3828	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3829
phungductung	0:8ede47d38d10	3830	/* Set the event sources */
phungductung	0:8ede47d38d10	3831	htim->Instance->EGR = EventSource;
phungductung	0:8ede47d38d10	3832
phungductung	0:8ede47d38d10	3833	/* Change the TIM state */
phungductung	0:8ede47d38d10	3834	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3835
phungductung	0:8ede47d38d10	3836	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	3837
phungductung	0:8ede47d38d10	3838	/* Return function status */
phungductung	0:8ede47d38d10	3839	return HAL_OK;
phungductung	0:8ede47d38d10	3840	}
phungductung	0:8ede47d38d10	3841
phungductung	0:8ede47d38d10	3842	/**
phungductung	0:8ede47d38d10	3843	* @brief Configures the OCRef clear feature
phungductung	0:8ede47d38d10	3844	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3845	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3846	* @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
phungductung	0:8ede47d38d10	3847	* contains the OCREF clear feature and parameters for the TIM peripheral.
phungductung	0:8ede47d38d10	3848	* @param Channel: specifies the TIM Channel.
phungductung	0:8ede47d38d10	3849	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	3850	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	3851	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	3852	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	3853	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	3854	* @retval HAL status
phungductung	0:8ede47d38d10	3855	*/
phungductung	0:8ede47d38d10	3856	__weak HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel)
phungductung	0:8ede47d38d10	3857	{
phungductung	0:8ede47d38d10	3858	/* Check the parameters */
phungductung	0:8ede47d38d10	3859	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3860	assert_param(IS_TIM_CHANNELS(Channel));
phungductung	0:8ede47d38d10	3861	assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
phungductung	0:8ede47d38d10	3862
phungductung	0:8ede47d38d10	3863	/* Process Locked */
phungductung	0:8ede47d38d10	3864	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	3865
phungductung	0:8ede47d38d10	3866	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3867
phungductung	0:8ede47d38d10	3868	if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR)
phungductung	0:8ede47d38d10	3869	{
phungductung	0:8ede47d38d10	3870	assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
phungductung	0:8ede47d38d10	3871	assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
phungductung	0:8ede47d38d10	3872	assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
phungductung	0:8ede47d38d10	3873
phungductung	0:8ede47d38d10	3874	TIM_ETR_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	3875	sClearInputConfig->ClearInputPrescaler,
phungductung	0:8ede47d38d10	3876	sClearInputConfig->ClearInputPolarity,
phungductung	0:8ede47d38d10	3877	sClearInputConfig->ClearInputFilter);
phungductung	0:8ede47d38d10	3878	}
phungductung	0:8ede47d38d10	3879
phungductung	0:8ede47d38d10	3880	switch (Channel)
phungductung	0:8ede47d38d10	3881	{
phungductung	0:8ede47d38d10	3882	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	3883	{
phungductung	0:8ede47d38d10	3884	if(sClearInputConfig->ClearInputState != RESET)
phungductung	0:8ede47d38d10	3885	{
phungductung	0:8ede47d38d10	3886	/* Enable the Ocref clear feature for Channel 1 */
phungductung	0:8ede47d38d10	3887	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1CE;
phungductung	0:8ede47d38d10	3888	}
phungductung	0:8ede47d38d10	3889	else
phungductung	0:8ede47d38d10	3890	{
phungductung	0:8ede47d38d10	3891	/* Disable the Ocref clear feature for Channel 1 */
phungductung	0:8ede47d38d10	3892	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
phungductung	0:8ede47d38d10	3893	}
phungductung	0:8ede47d38d10	3894	}
phungductung	0:8ede47d38d10	3895	break;
phungductung	0:8ede47d38d10	3896	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	3897	{
phungductung	0:8ede47d38d10	3898	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3899	if(sClearInputConfig->ClearInputState != RESET)
phungductung	0:8ede47d38d10	3900	{
phungductung	0:8ede47d38d10	3901	/* Enable the Ocref clear feature for Channel 2 */
phungductung	0:8ede47d38d10	3902	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2CE;
phungductung	0:8ede47d38d10	3903	}
phungductung	0:8ede47d38d10	3904	else
phungductung	0:8ede47d38d10	3905	{
phungductung	0:8ede47d38d10	3906	/* Disable the Ocref clear feature for Channel 2 */
phungductung	0:8ede47d38d10	3907	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
phungductung	0:8ede47d38d10	3908	}
phungductung	0:8ede47d38d10	3909	}
phungductung	0:8ede47d38d10	3910	break;
phungductung	0:8ede47d38d10	3911	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	3912	{
phungductung	0:8ede47d38d10	3913	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3914	if(sClearInputConfig->ClearInputState != RESET)
phungductung	0:8ede47d38d10	3915	{
phungductung	0:8ede47d38d10	3916	/* Enable the Ocref clear feature for Channel 3 */
phungductung	0:8ede47d38d10	3917	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3CE;
phungductung	0:8ede47d38d10	3918	}
phungductung	0:8ede47d38d10	3919	else
phungductung	0:8ede47d38d10	3920	{
phungductung	0:8ede47d38d10	3921	/* Disable the Ocref clear feature for Channel 3 */
phungductung	0:8ede47d38d10	3922	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
phungductung	0:8ede47d38d10	3923	}
phungductung	0:8ede47d38d10	3924	}
phungductung	0:8ede47d38d10	3925	break;
phungductung	0:8ede47d38d10	3926	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	3927	{
phungductung	0:8ede47d38d10	3928	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3929	if(sClearInputConfig->ClearInputState != RESET)
phungductung	0:8ede47d38d10	3930	{
phungductung	0:8ede47d38d10	3931	/* Enable the Ocref clear feature for Channel 4 */
phungductung	0:8ede47d38d10	3932	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4CE;
phungductung	0:8ede47d38d10	3933	}
phungductung	0:8ede47d38d10	3934	else
phungductung	0:8ede47d38d10	3935	{
phungductung	0:8ede47d38d10	3936	/* Disable the Ocref clear feature for Channel 4 */
phungductung	0:8ede47d38d10	3937	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
phungductung	0:8ede47d38d10	3938	}
phungductung	0:8ede47d38d10	3939	}
phungductung	0:8ede47d38d10	3940	break;
phungductung	0:8ede47d38d10	3941	default:
phungductung	0:8ede47d38d10	3942	break;
phungductung	0:8ede47d38d10	3943	}
phungductung	0:8ede47d38d10	3944
phungductung	0:8ede47d38d10	3945	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	3946
phungductung	0:8ede47d38d10	3947	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	3948
phungductung	0:8ede47d38d10	3949	return HAL_OK;
phungductung	0:8ede47d38d10	3950	}
phungductung	0:8ede47d38d10	3951
phungductung	0:8ede47d38d10	3952	/**
phungductung	0:8ede47d38d10	3953	* @brief Configures the clock source to be used
phungductung	0:8ede47d38d10	3954	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	3955	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	3956	* @param sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that
phungductung	0:8ede47d38d10	3957	* contains the clock source information for the TIM peripheral.
phungductung	0:8ede47d38d10	3958	* @retval HAL status
phungductung	0:8ede47d38d10	3959	*/
phungductung	0:8ede47d38d10	3960	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig)
phungductung	0:8ede47d38d10	3961	{
phungductung	0:8ede47d38d10	3962	uint32_t tmpsmcr = 0;
phungductung	0:8ede47d38d10	3963
phungductung	0:8ede47d38d10	3964	/* Process Locked */
phungductung	0:8ede47d38d10	3965	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	3966
phungductung	0:8ede47d38d10	3967	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	3968
phungductung	0:8ede47d38d10	3969	/* Check the parameters */
phungductung	0:8ede47d38d10	3970	assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
phungductung	0:8ede47d38d10	3971
phungductung	0:8ede47d38d10	3972	/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
phungductung	0:8ede47d38d10	3973	tmpsmcr = htim->Instance->SMCR;
phungductung	0:8ede47d38d10	3974	tmpsmcr &= ~(TIM_SMCR_SMS \| TIM_SMCR_TS);
phungductung	0:8ede47d38d10	3975	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
phungductung	0:8ede47d38d10	3976	htim->Instance->SMCR = tmpsmcr;
phungductung	0:8ede47d38d10	3977
phungductung	0:8ede47d38d10	3978	switch (sClockSourceConfig->ClockSource)
phungductung	0:8ede47d38d10	3979	{
phungductung	0:8ede47d38d10	3980	case TIM_CLOCKSOURCE_INTERNAL:
phungductung	0:8ede47d38d10	3981	{
phungductung	0:8ede47d38d10	3982	assert_param(IS_TIM_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3983	/* Disable slave mode to clock the prescaler directly with the internal clock */
phungductung	0:8ede47d38d10	3984	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
phungductung	0:8ede47d38d10	3985	}
phungductung	0:8ede47d38d10	3986	break;
phungductung	0:8ede47d38d10	3987
phungductung	0:8ede47d38d10	3988	case TIM_CLOCKSOURCE_ETRMODE1:
phungductung	0:8ede47d38d10	3989	{
phungductung	0:8ede47d38d10	3990	assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	3991	assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
phungductung	0:8ede47d38d10	3992	assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
phungductung	0:8ede47d38d10	3993	assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
phungductung	0:8ede47d38d10	3994	/* Configure the ETR Clock source */
phungductung	0:8ede47d38d10	3995	TIM_ETR_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	3996	sClockSourceConfig->ClockPrescaler,
phungductung	0:8ede47d38d10	3997	sClockSourceConfig->ClockPolarity,
phungductung	0:8ede47d38d10	3998	sClockSourceConfig->ClockFilter);
phungductung	0:8ede47d38d10	3999	/* Get the TIMx SMCR register value */
phungductung	0:8ede47d38d10	4000	tmpsmcr = htim->Instance->SMCR;
phungductung	0:8ede47d38d10	4001	/* Reset the SMS and TS Bits */
phungductung	0:8ede47d38d10	4002	tmpsmcr &= ~(TIM_SMCR_SMS \| TIM_SMCR_TS);
phungductung	0:8ede47d38d10	4003	/* Select the External clock mode1 and the ETRF trigger */
phungductung	0:8ede47d38d10	4004	tmpsmcr \|= (TIM_SLAVEMODE_EXTERNAL1 \| TIM_CLOCKSOURCE_ETRMODE1);
phungductung	0:8ede47d38d10	4005	/* Write to TIMx SMCR */
phungductung	0:8ede47d38d10	4006	htim->Instance->SMCR = tmpsmcr;
phungductung	0:8ede47d38d10	4007	}
phungductung	0:8ede47d38d10	4008	break;
phungductung	0:8ede47d38d10	4009
phungductung	0:8ede47d38d10	4010	case TIM_CLOCKSOURCE_ETRMODE2:
phungductung	0:8ede47d38d10	4011	{
phungductung	0:8ede47d38d10	4012	assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4013	assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
phungductung	0:8ede47d38d10	4014	assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
phungductung	0:8ede47d38d10	4015	assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
phungductung	0:8ede47d38d10	4016
phungductung	0:8ede47d38d10	4017	/* Configure the ETR Clock source */
phungductung	0:8ede47d38d10	4018	TIM_ETR_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	4019	sClockSourceConfig->ClockPrescaler,
phungductung	0:8ede47d38d10	4020	sClockSourceConfig->ClockPolarity,
phungductung	0:8ede47d38d10	4021	sClockSourceConfig->ClockFilter);
phungductung	0:8ede47d38d10	4022	/* Enable the External clock mode2 */
phungductung	0:8ede47d38d10	4023	htim->Instance->SMCR \|= TIM_SMCR_ECE;
phungductung	0:8ede47d38d10	4024	}
phungductung	0:8ede47d38d10	4025	break;
phungductung	0:8ede47d38d10	4026
phungductung	0:8ede47d38d10	4027	case TIM_CLOCKSOURCE_TI1:
phungductung	0:8ede47d38d10	4028	{
phungductung	0:8ede47d38d10	4029	assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4030
phungductung	0:8ede47d38d10	4031	/* Check TI1 input conditioning related parameters */
phungductung	0:8ede47d38d10	4032	assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
phungductung	0:8ede47d38d10	4033	assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
phungductung	0:8ede47d38d10	4034
phungductung	0:8ede47d38d10	4035	TIM_TI1_ConfigInputStage(htim->Instance,
phungductung	0:8ede47d38d10	4036	sClockSourceConfig->ClockPolarity,
phungductung	0:8ede47d38d10	4037	sClockSourceConfig->ClockFilter);
phungductung	0:8ede47d38d10	4038	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
phungductung	0:8ede47d38d10	4039	}
phungductung	0:8ede47d38d10	4040	break;
phungductung	0:8ede47d38d10	4041	case TIM_CLOCKSOURCE_TI2:
phungductung	0:8ede47d38d10	4042	{
phungductung	0:8ede47d38d10	4043	assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4044
phungductung	0:8ede47d38d10	4045	/* Check TI1 input conditioning related parameters */
phungductung	0:8ede47d38d10	4046	assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
phungductung	0:8ede47d38d10	4047	assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
phungductung	0:8ede47d38d10	4048
phungductung	0:8ede47d38d10	4049	TIM_TI2_ConfigInputStage(htim->Instance,
phungductung	0:8ede47d38d10	4050	sClockSourceConfig->ClockPolarity,
phungductung	0:8ede47d38d10	4051	sClockSourceConfig->ClockFilter);
phungductung	0:8ede47d38d10	4052	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
phungductung	0:8ede47d38d10	4053	}
phungductung	0:8ede47d38d10	4054	break;
phungductung	0:8ede47d38d10	4055	case TIM_CLOCKSOURCE_TI1ED:
phungductung	0:8ede47d38d10	4056	{
phungductung	0:8ede47d38d10	4057	assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4058	/* Check TI1 input conditioning related parameters */
phungductung	0:8ede47d38d10	4059	assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
phungductung	0:8ede47d38d10	4060	assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
phungductung	0:8ede47d38d10	4061
phungductung	0:8ede47d38d10	4062	TIM_TI1_ConfigInputStage(htim->Instance,
phungductung	0:8ede47d38d10	4063	sClockSourceConfig->ClockPolarity,
phungductung	0:8ede47d38d10	4064	sClockSourceConfig->ClockFilter);
phungductung	0:8ede47d38d10	4065	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
phungductung	0:8ede47d38d10	4066	}
phungductung	0:8ede47d38d10	4067	break;
phungductung	0:8ede47d38d10	4068	case TIM_CLOCKSOURCE_ITR0:
phungductung	0:8ede47d38d10	4069	{
phungductung	0:8ede47d38d10	4070	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4071	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
phungductung	0:8ede47d38d10	4072	}
phungductung	0:8ede47d38d10	4073	break;
phungductung	0:8ede47d38d10	4074	case TIM_CLOCKSOURCE_ITR1:
phungductung	0:8ede47d38d10	4075	{
phungductung	0:8ede47d38d10	4076	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4077	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
phungductung	0:8ede47d38d10	4078	}
phungductung	0:8ede47d38d10	4079	break;
phungductung	0:8ede47d38d10	4080	case TIM_CLOCKSOURCE_ITR2:
phungductung	0:8ede47d38d10	4081	{
phungductung	0:8ede47d38d10	4082	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4083	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
phungductung	0:8ede47d38d10	4084	}
phungductung	0:8ede47d38d10	4085	break;
phungductung	0:8ede47d38d10	4086	case TIM_CLOCKSOURCE_ITR3:
phungductung	0:8ede47d38d10	4087	{
phungductung	0:8ede47d38d10	4088	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4089	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
phungductung	0:8ede47d38d10	4090	}
phungductung	0:8ede47d38d10	4091	break;
phungductung	0:8ede47d38d10	4092
phungductung	0:8ede47d38d10	4093	default:
phungductung	0:8ede47d38d10	4094	break;
phungductung	0:8ede47d38d10	4095	}
phungductung	0:8ede47d38d10	4096	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4097
phungductung	0:8ede47d38d10	4098	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	4099
phungductung	0:8ede47d38d10	4100	return HAL_OK;
phungductung	0:8ede47d38d10	4101	}
phungductung	0:8ede47d38d10	4102
phungductung	0:8ede47d38d10	4103	/**
phungductung	0:8ede47d38d10	4104	* @brief Selects the signal connected to the TI1 input: direct from CH1_input
phungductung	0:8ede47d38d10	4105	* or a XOR combination between CH1_input, CH2_input & CH3_input
phungductung	0:8ede47d38d10	4106	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4107	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4108	* @param TI1_Selection: Indicate whether or not channel 1 is connected to the
phungductung	0:8ede47d38d10	4109	* output of a XOR gate.
phungductung	0:8ede47d38d10	4110	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	4111	* @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
phungductung	0:8ede47d38d10	4112	* @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
phungductung	0:8ede47d38d10	4113	* pins are connected to the TI1 input (XOR combination)
phungductung	0:8ede47d38d10	4114	* @retval HAL status
phungductung	0:8ede47d38d10	4115	*/
phungductung	0:8ede47d38d10	4116	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
phungductung	0:8ede47d38d10	4117	{
phungductung	0:8ede47d38d10	4118	uint32_t tmpcr2 = 0;
phungductung	0:8ede47d38d10	4119
phungductung	0:8ede47d38d10	4120	/* Check the parameters */
phungductung	0:8ede47d38d10	4121	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4122	assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
phungductung	0:8ede47d38d10	4123
phungductung	0:8ede47d38d10	4124	/* Get the TIMx CR2 register value */
phungductung	0:8ede47d38d10	4125	tmpcr2 = htim->Instance->CR2;
phungductung	0:8ede47d38d10	4126
phungductung	0:8ede47d38d10	4127	/* Reset the TI1 selection */
phungductung	0:8ede47d38d10	4128	tmpcr2 &= ~TIM_CR2_TI1S;
phungductung	0:8ede47d38d10	4129
phungductung	0:8ede47d38d10	4130	/* Set the TI1 selection */
phungductung	0:8ede47d38d10	4131	tmpcr2 \|= TI1_Selection;
phungductung	0:8ede47d38d10	4132
phungductung	0:8ede47d38d10	4133	/* Write to TIMxCR2 */
phungductung	0:8ede47d38d10	4134	htim->Instance->CR2 = tmpcr2;
phungductung	0:8ede47d38d10	4135
phungductung	0:8ede47d38d10	4136	return HAL_OK;
phungductung	0:8ede47d38d10	4137	}
phungductung	0:8ede47d38d10	4138
phungductung	0:8ede47d38d10	4139	/**
phungductung	0:8ede47d38d10	4140	* @brief Configures the TIM in Slave mode
phungductung	0:8ede47d38d10	4141	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4142	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4143	* @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
phungductung	0:8ede47d38d10	4144	* contains the selected trigger (internal trigger input, filtered
phungductung	0:8ede47d38d10	4145	* timer input or external trigger input) and the ) and the Slave
phungductung	0:8ede47d38d10	4146	* mode (Disable, Reset, Gated, Trigger, External clock mode 1).
phungductung	0:8ede47d38d10	4147	* @retval HAL status
phungductung	0:8ede47d38d10	4148	*/
phungductung	0:8ede47d38d10	4149	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig)
phungductung	0:8ede47d38d10	4150	{
phungductung	0:8ede47d38d10	4151	uint32_t tmpsmcr = 0;
phungductung	0:8ede47d38d10	4152	uint32_t tmpccmr1 = 0;
phungductung	0:8ede47d38d10	4153	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	4154
phungductung	0:8ede47d38d10	4155	/* Check the parameters */
phungductung	0:8ede47d38d10	4156	assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4157	assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
phungductung	0:8ede47d38d10	4158	assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
phungductung	0:8ede47d38d10	4159
phungductung	0:8ede47d38d10	4160	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	4161
phungductung	0:8ede47d38d10	4162	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	4163
phungductung	0:8ede47d38d10	4164	/* Get the TIMx SMCR register value */
phungductung	0:8ede47d38d10	4165	tmpsmcr = htim->Instance->SMCR;
phungductung	0:8ede47d38d10	4166
phungductung	0:8ede47d38d10	4167	/* Reset the Trigger Selection Bits */
phungductung	0:8ede47d38d10	4168	tmpsmcr &= ~TIM_SMCR_TS;
phungductung	0:8ede47d38d10	4169	/* Set the Input Trigger source */
phungductung	0:8ede47d38d10	4170	tmpsmcr \|= sSlaveConfig->InputTrigger;
phungductung	0:8ede47d38d10	4171
phungductung	0:8ede47d38d10	4172	/* Reset the slave mode Bits */
phungductung	0:8ede47d38d10	4173	tmpsmcr &= ~TIM_SMCR_SMS;
phungductung	0:8ede47d38d10	4174	/* Set the slave mode */
phungductung	0:8ede47d38d10	4175	tmpsmcr \|= sSlaveConfig->SlaveMode;
phungductung	0:8ede47d38d10	4176
phungductung	0:8ede47d38d10	4177	/* Write to TIMx SMCR */
phungductung	0:8ede47d38d10	4178	htim->Instance->SMCR = tmpsmcr;
phungductung	0:8ede47d38d10	4179
phungductung	0:8ede47d38d10	4180	/* Configure the trigger prescaler, filter, and polarity */
phungductung	0:8ede47d38d10	4181	switch (sSlaveConfig->InputTrigger)
phungductung	0:8ede47d38d10	4182	{
phungductung	0:8ede47d38d10	4183	case TIM_TS_ETRF:
phungductung	0:8ede47d38d10	4184	{
phungductung	0:8ede47d38d10	4185	/* Check the parameters */
phungductung	0:8ede47d38d10	4186	assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4187	assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
phungductung	0:8ede47d38d10	4188	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
phungductung	0:8ede47d38d10	4189	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	4190	/* Configure the ETR Trigger source */
phungductung	0:8ede47d38d10	4191	TIM_ETR_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	4192	sSlaveConfig->TriggerPrescaler,
phungductung	0:8ede47d38d10	4193	sSlaveConfig->TriggerPolarity,
phungductung	0:8ede47d38d10	4194	sSlaveConfig->TriggerFilter);
phungductung	0:8ede47d38d10	4195	}
phungductung	0:8ede47d38d10	4196	break;
phungductung	0:8ede47d38d10	4197
phungductung	0:8ede47d38d10	4198	case TIM_TS_TI1F_ED:
phungductung	0:8ede47d38d10	4199	{
phungductung	0:8ede47d38d10	4200	/* Check the parameters */
phungductung	0:8ede47d38d10	4201	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4202	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	4203
phungductung	0:8ede47d38d10	4204	/* Disable the Channel 1: Reset the CC1E Bit */
phungductung	0:8ede47d38d10	4205	tmpccer = htim->Instance->CCER;
phungductung	0:8ede47d38d10	4206	htim->Instance->CCER &= ~TIM_CCER_CC1E;
phungductung	0:8ede47d38d10	4207	tmpccmr1 = htim->Instance->CCMR1;
phungductung	0:8ede47d38d10	4208
phungductung	0:8ede47d38d10	4209	/* Set the filter */
phungductung	0:8ede47d38d10	4210	tmpccmr1 &= ~TIM_CCMR1_IC1F;
phungductung	0:8ede47d38d10	4211	tmpccmr1 \|= ((sSlaveConfig->TriggerFilter) << 4);
phungductung	0:8ede47d38d10	4212
phungductung	0:8ede47d38d10	4213	/* Write to TIMx CCMR1 and CCER registers */
phungductung	0:8ede47d38d10	4214	htim->Instance->CCMR1 = tmpccmr1;
phungductung	0:8ede47d38d10	4215	htim->Instance->CCER = tmpccer;
phungductung	0:8ede47d38d10	4216
phungductung	0:8ede47d38d10	4217	}
phungductung	0:8ede47d38d10	4218	break;
phungductung	0:8ede47d38d10	4219
phungductung	0:8ede47d38d10	4220	case TIM_TS_TI1FP1:
phungductung	0:8ede47d38d10	4221	{
phungductung	0:8ede47d38d10	4222	/* Check the parameters */
phungductung	0:8ede47d38d10	4223	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4224	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
phungductung	0:8ede47d38d10	4225	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	4226
phungductung	0:8ede47d38d10	4227	/* Configure TI1 Filter and Polarity */
phungductung	0:8ede47d38d10	4228	TIM_TI1_ConfigInputStage(htim->Instance,
phungductung	0:8ede47d38d10	4229	sSlaveConfig->TriggerPolarity,
phungductung	0:8ede47d38d10	4230	sSlaveConfig->TriggerFilter);
phungductung	0:8ede47d38d10	4231	}
phungductung	0:8ede47d38d10	4232	break;
phungductung	0:8ede47d38d10	4233
phungductung	0:8ede47d38d10	4234	case TIM_TS_TI2FP2:
phungductung	0:8ede47d38d10	4235	{
phungductung	0:8ede47d38d10	4236	/* Check the parameters */
phungductung	0:8ede47d38d10	4237	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4238	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
phungductung	0:8ede47d38d10	4239	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	4240
phungductung	0:8ede47d38d10	4241	/* Configure TI2 Filter and Polarity */
phungductung	0:8ede47d38d10	4242	TIM_TI2_ConfigInputStage(htim->Instance,
phungductung	0:8ede47d38d10	4243	sSlaveConfig->TriggerPolarity,
phungductung	0:8ede47d38d10	4244	sSlaveConfig->TriggerFilter);
phungductung	0:8ede47d38d10	4245	}
phungductung	0:8ede47d38d10	4246	break;
phungductung	0:8ede47d38d10	4247
phungductung	0:8ede47d38d10	4248	case TIM_TS_ITR0:
phungductung	0:8ede47d38d10	4249	{
phungductung	0:8ede47d38d10	4250	/* Check the parameter */
phungductung	0:8ede47d38d10	4251	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4252	}
phungductung	0:8ede47d38d10	4253	break;
phungductung	0:8ede47d38d10	4254
phungductung	0:8ede47d38d10	4255	case TIM_TS_ITR1:
phungductung	0:8ede47d38d10	4256	{
phungductung	0:8ede47d38d10	4257	/* Check the parameter */
phungductung	0:8ede47d38d10	4258	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4259	}
phungductung	0:8ede47d38d10	4260	break;
phungductung	0:8ede47d38d10	4261
phungductung	0:8ede47d38d10	4262	case TIM_TS_ITR2:
phungductung	0:8ede47d38d10	4263	{
phungductung	0:8ede47d38d10	4264	/* Check the parameter */
phungductung	0:8ede47d38d10	4265	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4266	}
phungductung	0:8ede47d38d10	4267	break;
phungductung	0:8ede47d38d10	4268
phungductung	0:8ede47d38d10	4269	case TIM_TS_ITR3:
phungductung	0:8ede47d38d10	4270	{
phungductung	0:8ede47d38d10	4271	/* Check the parameter */
phungductung	0:8ede47d38d10	4272	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4273	}
phungductung	0:8ede47d38d10	4274	break;
phungductung	0:8ede47d38d10	4275
phungductung	0:8ede47d38d10	4276	default:
phungductung	0:8ede47d38d10	4277	break;
phungductung	0:8ede47d38d10	4278	}
phungductung	0:8ede47d38d10	4279
phungductung	0:8ede47d38d10	4280	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4281
phungductung	0:8ede47d38d10	4282	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	4283
phungductung	0:8ede47d38d10	4284	return HAL_OK;
phungductung	0:8ede47d38d10	4285	}
phungductung	0:8ede47d38d10	4286
phungductung	0:8ede47d38d10	4287	/**
phungductung	0:8ede47d38d10	4288	* @brief Configures the TIM in Slave mode in interrupt mode
phungductung	0:8ede47d38d10	4289	* @param htim: TIM handle.
phungductung	0:8ede47d38d10	4290	* @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
phungductung	0:8ede47d38d10	4291	* contains the selected trigger (internal trigger input, filtered
phungductung	0:8ede47d38d10	4292	* timer input or external trigger input) and the ) and the Slave
phungductung	0:8ede47d38d10	4293	* mode (Disable, Reset, Gated, Trigger, External clock mode 1).
phungductung	0:8ede47d38d10	4294	* @retval HAL status
phungductung	0:8ede47d38d10	4295	*/
phungductung	0:8ede47d38d10	4296	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim,
phungductung	0:8ede47d38d10	4297	TIM_SlaveConfigTypeDef * sSlaveConfig)
phungductung	0:8ede47d38d10	4298	{
phungductung	0:8ede47d38d10	4299	/* Check the parameters */
phungductung	0:8ede47d38d10	4300	assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4301	assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
phungductung	0:8ede47d38d10	4302	assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
phungductung	0:8ede47d38d10	4303
phungductung	0:8ede47d38d10	4304	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	4305
phungductung	0:8ede47d38d10	4306	htim->State = HAL_TIM_STATE_BUSY;
phungductung	0:8ede47d38d10	4307
phungductung	0:8ede47d38d10	4308	TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
phungductung	0:8ede47d38d10	4309
phungductung	0:8ede47d38d10	4310	/* Enable Trigger Interrupt */
phungductung	0:8ede47d38d10	4311	__HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER);
phungductung	0:8ede47d38d10	4312
phungductung	0:8ede47d38d10	4313	/* Disable Trigger DMA request */
phungductung	0:8ede47d38d10	4314	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
phungductung	0:8ede47d38d10	4315
phungductung	0:8ede47d38d10	4316	htim->State = HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4317
phungductung	0:8ede47d38d10	4318	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	4319
phungductung	0:8ede47d38d10	4320	return HAL_OK;
phungductung	0:8ede47d38d10	4321	}
phungductung	0:8ede47d38d10	4322
phungductung	0:8ede47d38d10	4323	/**
phungductung	0:8ede47d38d10	4324	* @brief Read the captured value from Capture Compare unit
phungductung	0:8ede47d38d10	4325	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4326	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4327	* @param Channel: TIM Channels to be enabled.
phungductung	0:8ede47d38d10	4328	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	4329	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
phungductung	0:8ede47d38d10	4330	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
phungductung	0:8ede47d38d10	4331	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
phungductung	0:8ede47d38d10	4332	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
phungductung	0:8ede47d38d10	4333	* @retval Captured value
phungductung	0:8ede47d38d10	4334	*/
phungductung	0:8ede47d38d10	4335	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
phungductung	0:8ede47d38d10	4336	{
phungductung	0:8ede47d38d10	4337	uint32_t tmpreg = 0;
phungductung	0:8ede47d38d10	4338
phungductung	0:8ede47d38d10	4339	__HAL_LOCK(htim);
phungductung	0:8ede47d38d10	4340
phungductung	0:8ede47d38d10	4341	switch (Channel)
phungductung	0:8ede47d38d10	4342	{
phungductung	0:8ede47d38d10	4343	case TIM_CHANNEL_1:
phungductung	0:8ede47d38d10	4344	{
phungductung	0:8ede47d38d10	4345	/* Check the parameters */
phungductung	0:8ede47d38d10	4346	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4347
phungductung	0:8ede47d38d10	4348	/* Return the capture 1 value */
phungductung	0:8ede47d38d10	4349	tmpreg = htim->Instance->CCR1;
phungductung	0:8ede47d38d10	4350
phungductung	0:8ede47d38d10	4351	break;
phungductung	0:8ede47d38d10	4352	}
phungductung	0:8ede47d38d10	4353	case TIM_CHANNEL_2:
phungductung	0:8ede47d38d10	4354	{
phungductung	0:8ede47d38d10	4355	/* Check the parameters */
phungductung	0:8ede47d38d10	4356	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4357
phungductung	0:8ede47d38d10	4358	/* Return the capture 2 value */
phungductung	0:8ede47d38d10	4359	tmpreg = htim->Instance->CCR2;
phungductung	0:8ede47d38d10	4360
phungductung	0:8ede47d38d10	4361	break;
phungductung	0:8ede47d38d10	4362	}
phungductung	0:8ede47d38d10	4363
phungductung	0:8ede47d38d10	4364	case TIM_CHANNEL_3:
phungductung	0:8ede47d38d10	4365	{
phungductung	0:8ede47d38d10	4366	/* Check the parameters */
phungductung	0:8ede47d38d10	4367	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4368
phungductung	0:8ede47d38d10	4369	/* Return the capture 3 value */
phungductung	0:8ede47d38d10	4370	tmpreg = htim->Instance->CCR3;
phungductung	0:8ede47d38d10	4371
phungductung	0:8ede47d38d10	4372	break;
phungductung	0:8ede47d38d10	4373	}
phungductung	0:8ede47d38d10	4374
phungductung	0:8ede47d38d10	4375	case TIM_CHANNEL_4:
phungductung	0:8ede47d38d10	4376	{
phungductung	0:8ede47d38d10	4377	/* Check the parameters */
phungductung	0:8ede47d38d10	4378	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	4379
phungductung	0:8ede47d38d10	4380	/* Return the capture 4 value */
phungductung	0:8ede47d38d10	4381	tmpreg = htim->Instance->CCR4;
phungductung	0:8ede47d38d10	4382
phungductung	0:8ede47d38d10	4383	break;
phungductung	0:8ede47d38d10	4384	}
phungductung	0:8ede47d38d10	4385
phungductung	0:8ede47d38d10	4386	default:
phungductung	0:8ede47d38d10	4387	break;
phungductung	0:8ede47d38d10	4388	}
phungductung	0:8ede47d38d10	4389
phungductung	0:8ede47d38d10	4390	__HAL_UNLOCK(htim);
phungductung	0:8ede47d38d10	4391	return tmpreg;
phungductung	0:8ede47d38d10	4392	}
phungductung	0:8ede47d38d10	4393
phungductung	0:8ede47d38d10	4394	/**
phungductung	0:8ede47d38d10	4395	* @}
phungductung	0:8ede47d38d10	4396	*/
phungductung	0:8ede47d38d10	4397
phungductung	0:8ede47d38d10	4398	/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
phungductung	0:8ede47d38d10	4399	* @brief TIM Callbacks functions
phungductung	0:8ede47d38d10	4400	*
phungductung	0:8ede47d38d10	4401	@verbatim
phungductung	0:8ede47d38d10	4402	==============================================================================
phungductung	0:8ede47d38d10	4403	##### TIM Callbacks functions #####
phungductung	0:8ede47d38d10	4404	==============================================================================
phungductung	0:8ede47d38d10	4405	[..]
phungductung	0:8ede47d38d10	4406	This section provides TIM callback functions:
phungductung	0:8ede47d38d10	4407	(+) Timer Period elapsed callback
phungductung	0:8ede47d38d10	4408	(+) Timer Output Compare callback
phungductung	0:8ede47d38d10	4409	(+) Timer Input capture callback
phungductung	0:8ede47d38d10	4410	(+) Timer Trigger callback
phungductung	0:8ede47d38d10	4411	(+) Timer Error callback
phungductung	0:8ede47d38d10	4412
phungductung	0:8ede47d38d10	4413	@endverbatim
phungductung	0:8ede47d38d10	4414	* @{
phungductung	0:8ede47d38d10	4415	*/
phungductung	0:8ede47d38d10	4416
phungductung	0:8ede47d38d10	4417	/**
phungductung	0:8ede47d38d10	4418	* @brief Period elapsed callback in non blocking mode
phungductung	0:8ede47d38d10	4419	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4420	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4421	* @retval None
phungductung	0:8ede47d38d10	4422	*/
phungductung	0:8ede47d38d10	4423	__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4424	{
phungductung	0:8ede47d38d10	4425	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	4426	UNUSED(htim);
phungductung	0:8ede47d38d10	4427
phungductung	0:8ede47d38d10	4428	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	4429	the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
phungductung	0:8ede47d38d10	4430	*/
phungductung	0:8ede47d38d10	4431
phungductung	0:8ede47d38d10	4432	}
phungductung	0:8ede47d38d10	4433	/**
phungductung	0:8ede47d38d10	4434	* @brief Output Compare callback in non blocking mode
phungductung	0:8ede47d38d10	4435	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4436	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4437	* @retval None
phungductung	0:8ede47d38d10	4438	*/
phungductung	0:8ede47d38d10	4439	__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4440	{
phungductung	0:8ede47d38d10	4441	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	4442	UNUSED(htim);
phungductung	0:8ede47d38d10	4443
phungductung	0:8ede47d38d10	4444	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	4445	the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
phungductung	0:8ede47d38d10	4446	*/
phungductung	0:8ede47d38d10	4447	}
phungductung	0:8ede47d38d10	4448	/**
phungductung	0:8ede47d38d10	4449	* @brief Input Capture callback in non blocking mode
phungductung	0:8ede47d38d10	4450	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4451	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4452	* @retval None
phungductung	0:8ede47d38d10	4453	*/
phungductung	0:8ede47d38d10	4454	__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4455	{
phungductung	0:8ede47d38d10	4456	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	4457	UNUSED(htim);
phungductung	0:8ede47d38d10	4458
phungductung	0:8ede47d38d10	4459	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	4460	the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
phungductung	0:8ede47d38d10	4461	*/
phungductung	0:8ede47d38d10	4462	}
phungductung	0:8ede47d38d10	4463
phungductung	0:8ede47d38d10	4464	/**
phungductung	0:8ede47d38d10	4465	* @brief PWM Pulse finished callback in non blocking mode
phungductung	0:8ede47d38d10	4466	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4467	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4468	* @retval None
phungductung	0:8ede47d38d10	4469	*/
phungductung	0:8ede47d38d10	4470	__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4471	{
phungductung	0:8ede47d38d10	4472	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	4473	UNUSED(htim);
phungductung	0:8ede47d38d10	4474
phungductung	0:8ede47d38d10	4475	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	4476	the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
phungductung	0:8ede47d38d10	4477	*/
phungductung	0:8ede47d38d10	4478	}
phungductung	0:8ede47d38d10	4479
phungductung	0:8ede47d38d10	4480	/**
phungductung	0:8ede47d38d10	4481	* @brief Hall Trigger detection callback in non blocking mode
phungductung	0:8ede47d38d10	4482	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4483	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4484	* @retval None
phungductung	0:8ede47d38d10	4485	*/
phungductung	0:8ede47d38d10	4486	__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4487	{
phungductung	0:8ede47d38d10	4488	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	4489	UNUSED(htim);
phungductung	0:8ede47d38d10	4490
phungductung	0:8ede47d38d10	4491	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	4492	the HAL_TIM_TriggerCallback could be implemented in the user file
phungductung	0:8ede47d38d10	4493	*/
phungductung	0:8ede47d38d10	4494	}
phungductung	0:8ede47d38d10	4495
phungductung	0:8ede47d38d10	4496	/**
phungductung	0:8ede47d38d10	4497	* @brief Timer error callback in non blocking mode
phungductung	0:8ede47d38d10	4498	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4499	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4500	* @retval None
phungductung	0:8ede47d38d10	4501	*/
phungductung	0:8ede47d38d10	4502	__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4503	{
phungductung	0:8ede47d38d10	4504	/* Prevent unused argument(s) compilation warning */
phungductung	0:8ede47d38d10	4505	UNUSED(htim);
phungductung	0:8ede47d38d10	4506
phungductung	0:8ede47d38d10	4507	/* NOTE : This function Should not be modified, when the callback is needed,
phungductung	0:8ede47d38d10	4508	the HAL_TIM_ErrorCallback could be implemented in the user file
phungductung	0:8ede47d38d10	4509	*/
phungductung	0:8ede47d38d10	4510	}
phungductung	0:8ede47d38d10	4511
phungductung	0:8ede47d38d10	4512	/**
phungductung	0:8ede47d38d10	4513	* @}
phungductung	0:8ede47d38d10	4514	*/
phungductung	0:8ede47d38d10	4515
phungductung	0:8ede47d38d10	4516	/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
phungductung	0:8ede47d38d10	4517	* @brief Peripheral State functions
phungductung	0:8ede47d38d10	4518	*
phungductung	0:8ede47d38d10	4519	@verbatim
phungductung	0:8ede47d38d10	4520	==============================================================================
phungductung	0:8ede47d38d10	4521	##### Peripheral State functions #####
phungductung	0:8ede47d38d10	4522	==============================================================================
phungductung	0:8ede47d38d10	4523	[..]
phungductung	0:8ede47d38d10	4524	This subsection permits to get in run-time the status of the peripheral
phungductung	0:8ede47d38d10	4525	and the data flow.
phungductung	0:8ede47d38d10	4526
phungductung	0:8ede47d38d10	4527	@endverbatim
phungductung	0:8ede47d38d10	4528	* @{
phungductung	0:8ede47d38d10	4529	*/
phungductung	0:8ede47d38d10	4530
phungductung	0:8ede47d38d10	4531	/**
phungductung	0:8ede47d38d10	4532	* @brief Return the TIM Base state
phungductung	0:8ede47d38d10	4533	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4534	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4535	* @retval HAL state
phungductung	0:8ede47d38d10	4536	*/
phungductung	0:8ede47d38d10	4537	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4538	{
phungductung	0:8ede47d38d10	4539	return htim->State;
phungductung	0:8ede47d38d10	4540	}
phungductung	0:8ede47d38d10	4541
phungductung	0:8ede47d38d10	4542	/**
phungductung	0:8ede47d38d10	4543	* @brief Return the TIM OC state
phungductung	0:8ede47d38d10	4544	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4545	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4546	* @retval HAL state
phungductung	0:8ede47d38d10	4547	*/
phungductung	0:8ede47d38d10	4548	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4549	{
phungductung	0:8ede47d38d10	4550	return htim->State;
phungductung	0:8ede47d38d10	4551	}
phungductung	0:8ede47d38d10	4552
phungductung	0:8ede47d38d10	4553	/**
phungductung	0:8ede47d38d10	4554	* @brief Return the TIM PWM state
phungductung	0:8ede47d38d10	4555	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4556	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4557	* @retval HAL state
phungductung	0:8ede47d38d10	4558	*/
phungductung	0:8ede47d38d10	4559	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4560	{
phungductung	0:8ede47d38d10	4561	return htim->State;
phungductung	0:8ede47d38d10	4562	}
phungductung	0:8ede47d38d10	4563
phungductung	0:8ede47d38d10	4564	/**
phungductung	0:8ede47d38d10	4565	* @brief Return the TIM Input Capture state
phungductung	0:8ede47d38d10	4566	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4567	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4568	* @retval HAL state
phungductung	0:8ede47d38d10	4569	*/
phungductung	0:8ede47d38d10	4570	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4571	{
phungductung	0:8ede47d38d10	4572	return htim->State;
phungductung	0:8ede47d38d10	4573	}
phungductung	0:8ede47d38d10	4574
phungductung	0:8ede47d38d10	4575	/**
phungductung	0:8ede47d38d10	4576	* @brief Return the TIM One Pulse Mode state
phungductung	0:8ede47d38d10	4577	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4578	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4579	* @retval HAL state
phungductung	0:8ede47d38d10	4580	*/
phungductung	0:8ede47d38d10	4581	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4582	{
phungductung	0:8ede47d38d10	4583	return htim->State;
phungductung	0:8ede47d38d10	4584	}
phungductung	0:8ede47d38d10	4585
phungductung	0:8ede47d38d10	4586	/**
phungductung	0:8ede47d38d10	4587	* @brief Return the TIM Encoder Mode state
phungductung	0:8ede47d38d10	4588	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4589	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	4590	* @retval HAL state
phungductung	0:8ede47d38d10	4591	*/
phungductung	0:8ede47d38d10	4592	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
phungductung	0:8ede47d38d10	4593	{
phungductung	0:8ede47d38d10	4594	return htim->State;
phungductung	0:8ede47d38d10	4595	}
phungductung	0:8ede47d38d10	4596
phungductung	0:8ede47d38d10	4597	/**
phungductung	0:8ede47d38d10	4598	* @}
phungductung	0:8ede47d38d10	4599	*/
phungductung	0:8ede47d38d10	4600
phungductung	0:8ede47d38d10	4601	/**
phungductung	0:8ede47d38d10	4602	* @brief TIM DMA error callback
phungductung	0:8ede47d38d10	4603	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4604	* the configuration information for the specified DMA module.
phungductung	0:8ede47d38d10	4605	* @retval None
phungductung	0:8ede47d38d10	4606	*/
phungductung	0:8ede47d38d10	4607	void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma)
phungductung	0:8ede47d38d10	4608	{
phungductung	0:8ede47d38d10	4609	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
phungductung	0:8ede47d38d10	4610
phungductung	0:8ede47d38d10	4611	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4612
phungductung	0:8ede47d38d10	4613	HAL_TIM_ErrorCallback(htim);
phungductung	0:8ede47d38d10	4614	}
phungductung	0:8ede47d38d10	4615
phungductung	0:8ede47d38d10	4616	/**
phungductung	0:8ede47d38d10	4617	* @brief TIM DMA Delay Pulse complete callback.
phungductung	0:8ede47d38d10	4618	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4619	* the configuration information for the specified DMA module.
phungductung	0:8ede47d38d10	4620	* @retval None
phungductung	0:8ede47d38d10	4621	*/
phungductung	0:8ede47d38d10	4622	void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
phungductung	0:8ede47d38d10	4623	{
phungductung	0:8ede47d38d10	4624	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
phungductung	0:8ede47d38d10	4625
phungductung	0:8ede47d38d10	4626	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4627
phungductung	0:8ede47d38d10	4628	if (hdma == htim->hdma[TIM_DMA_ID_CC1])
phungductung	0:8ede47d38d10	4629	{
phungductung	0:8ede47d38d10	4630	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
phungductung	0:8ede47d38d10	4631	}
phungductung	0:8ede47d38d10	4632	else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
phungductung	0:8ede47d38d10	4633	{
phungductung	0:8ede47d38d10	4634	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
phungductung	0:8ede47d38d10	4635	}
phungductung	0:8ede47d38d10	4636	else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
phungductung	0:8ede47d38d10	4637	{
phungductung	0:8ede47d38d10	4638	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
phungductung	0:8ede47d38d10	4639	}
phungductung	0:8ede47d38d10	4640	else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
phungductung	0:8ede47d38d10	4641	{
phungductung	0:8ede47d38d10	4642	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
phungductung	0:8ede47d38d10	4643	}
phungductung	0:8ede47d38d10	4644
phungductung	0:8ede47d38d10	4645	HAL_TIM_PWM_PulseFinishedCallback(htim);
phungductung	0:8ede47d38d10	4646
phungductung	0:8ede47d38d10	4647	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
phungductung	0:8ede47d38d10	4648	}
phungductung	0:8ede47d38d10	4649	/**
phungductung	0:8ede47d38d10	4650	* @brief TIM DMA Capture complete callback.
phungductung	0:8ede47d38d10	4651	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4652	* the configuration information for the specified DMA module.
phungductung	0:8ede47d38d10	4653	* @retval None
phungductung	0:8ede47d38d10	4654	*/
phungductung	0:8ede47d38d10	4655	void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
phungductung	0:8ede47d38d10	4656	{
phungductung	0:8ede47d38d10	4657	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
phungductung	0:8ede47d38d10	4658
phungductung	0:8ede47d38d10	4659	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4660
phungductung	0:8ede47d38d10	4661	if (hdma == htim->hdma[TIM_DMA_ID_CC1])
phungductung	0:8ede47d38d10	4662	{
phungductung	0:8ede47d38d10	4663	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
phungductung	0:8ede47d38d10	4664	}
phungductung	0:8ede47d38d10	4665	else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
phungductung	0:8ede47d38d10	4666	{
phungductung	0:8ede47d38d10	4667	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
phungductung	0:8ede47d38d10	4668	}
phungductung	0:8ede47d38d10	4669	else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
phungductung	0:8ede47d38d10	4670	{
phungductung	0:8ede47d38d10	4671	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
phungductung	0:8ede47d38d10	4672	}
phungductung	0:8ede47d38d10	4673	else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
phungductung	0:8ede47d38d10	4674	{
phungductung	0:8ede47d38d10	4675	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
phungductung	0:8ede47d38d10	4676	}
phungductung	0:8ede47d38d10	4677
phungductung	0:8ede47d38d10	4678	HAL_TIM_IC_CaptureCallback(htim);
phungductung	0:8ede47d38d10	4679
phungductung	0:8ede47d38d10	4680	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
phungductung	0:8ede47d38d10	4681
phungductung	0:8ede47d38d10	4682	}
phungductung	0:8ede47d38d10	4683
phungductung	0:8ede47d38d10	4684	/**
phungductung	0:8ede47d38d10	4685	* @brief TIM DMA Period Elapse complete callback.
phungductung	0:8ede47d38d10	4686	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4687	* the configuration information for the specified DMA module.
phungductung	0:8ede47d38d10	4688	* @retval None
phungductung	0:8ede47d38d10	4689	*/
phungductung	0:8ede47d38d10	4690	static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
phungductung	0:8ede47d38d10	4691	{
phungductung	0:8ede47d38d10	4692	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
phungductung	0:8ede47d38d10	4693
phungductung	0:8ede47d38d10	4694	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4695
phungductung	0:8ede47d38d10	4696	HAL_TIM_PeriodElapsedCallback(htim);
phungductung	0:8ede47d38d10	4697	}
phungductung	0:8ede47d38d10	4698
phungductung	0:8ede47d38d10	4699	/**
phungductung	0:8ede47d38d10	4700	* @brief TIM DMA Trigger callback.
phungductung	0:8ede47d38d10	4701	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	4702	* the configuration information for the specified DMA module.
phungductung	0:8ede47d38d10	4703	* @retval None
phungductung	0:8ede47d38d10	4704	*/
phungductung	0:8ede47d38d10	4705	static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
phungductung	0:8ede47d38d10	4706	{
phungductung	0:8ede47d38d10	4707	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
phungductung	0:8ede47d38d10	4708
phungductung	0:8ede47d38d10	4709	htim->State= HAL_TIM_STATE_READY;
phungductung	0:8ede47d38d10	4710
phungductung	0:8ede47d38d10	4711	HAL_TIM_TriggerCallback(htim);
phungductung	0:8ede47d38d10	4712	}
phungductung	0:8ede47d38d10	4713
phungductung	0:8ede47d38d10	4714	/**
phungductung	0:8ede47d38d10	4715	* @brief Time Base configuration
phungductung	0:8ede47d38d10	4716	* @param TIMx: TIM peripheral
phungductung	0:8ede47d38d10	4717	* @param Structure: pointer on TIM Time Base required parameters
phungductung	0:8ede47d38d10	4718	* @retval None
phungductung	0:8ede47d38d10	4719	*/
phungductung	0:8ede47d38d10	4720	void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure)
phungductung	0:8ede47d38d10	4721	{
phungductung	0:8ede47d38d10	4722	uint32_t tmpcr1 = 0;
phungductung	0:8ede47d38d10	4723	tmpcr1 = TIMx->CR1;
phungductung	0:8ede47d38d10	4724
phungductung	0:8ede47d38d10	4725	/* Set TIM Time Base Unit parameters ---------------------------------------*/
phungductung	0:8ede47d38d10	4726	if(IS_TIM_CC3_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	4727	{
phungductung	0:8ede47d38d10	4728	/* Select the Counter Mode */
phungductung	0:8ede47d38d10	4729	tmpcr1 &= ~(TIM_CR1_DIR \| TIM_CR1_CMS);
phungductung	0:8ede47d38d10	4730	tmpcr1 \|= Structure->CounterMode;
phungductung	0:8ede47d38d10	4731	}
phungductung	0:8ede47d38d10	4732
phungductung	0:8ede47d38d10	4733	if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	4734	{
phungductung	0:8ede47d38d10	4735	/* Set the clock division */
phungductung	0:8ede47d38d10	4736	tmpcr1 &= ~TIM_CR1_CKD;
phungductung	0:8ede47d38d10	4737	tmpcr1 \|= (uint32_t)Structure->ClockDivision;
phungductung	0:8ede47d38d10	4738	}
phungductung	0:8ede47d38d10	4739
phungductung	0:8ede47d38d10	4740	TIMx->CR1 = tmpcr1;
phungductung	0:8ede47d38d10	4741
phungductung	0:8ede47d38d10	4742	/* Set the Auto-reload value */
phungductung	0:8ede47d38d10	4743	TIMx->ARR = (uint32_t)Structure->Period ;
phungductung	0:8ede47d38d10	4744
phungductung	0:8ede47d38d10	4745	/* Set the Prescaler value */
phungductung	0:8ede47d38d10	4746	TIMx->PSC = (uint32_t)Structure->Prescaler;
phungductung	0:8ede47d38d10	4747
phungductung	0:8ede47d38d10	4748	if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	4749	{
phungductung	0:8ede47d38d10	4750	/* Set the Repetition Counter value */
phungductung	0:8ede47d38d10	4751	TIMx->RCR = Structure->RepetitionCounter;
phungductung	0:8ede47d38d10	4752	}
phungductung	0:8ede47d38d10	4753
phungductung	0:8ede47d38d10	4754	/* Generate an update event to reload the Prescaler
phungductung	0:8ede47d38d10	4755	and the repetition counter(only for TIM1 and TIM8) value immediately */
phungductung	0:8ede47d38d10	4756	TIMx->EGR = TIM_EGR_UG;
phungductung	0:8ede47d38d10	4757	}
phungductung	0:8ede47d38d10	4758
phungductung	0:8ede47d38d10	4759	/**
phungductung	0:8ede47d38d10	4760	* @brief Time Output Compare 1 configuration
phungductung	0:8ede47d38d10	4761	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	4762	* @param OC_Config: The output configuration structure
phungductung	0:8ede47d38d10	4763	* @retval None
phungductung	0:8ede47d38d10	4764	*/
phungductung	0:8ede47d38d10	4765	void TIM_OC1_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
phungductung	0:8ede47d38d10	4766	{
phungductung	0:8ede47d38d10	4767	uint32_t tmpccmrx = 0;
phungductung	0:8ede47d38d10	4768	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	4769	uint32_t tmpcr2 = 0;
phungductung	0:8ede47d38d10	4770
phungductung	0:8ede47d38d10	4771	/* Disable the Channel 1: Reset the CC1E Bit */
phungductung	0:8ede47d38d10	4772	TIMx->CCER &= ~TIM_CCER_CC1E;
phungductung	0:8ede47d38d10	4773
phungductung	0:8ede47d38d10	4774	/* Get the TIMx CCER register value */
phungductung	0:8ede47d38d10	4775	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	4776	/* Get the TIMx CR2 register value */
phungductung	0:8ede47d38d10	4777	tmpcr2 = TIMx->CR2;
phungductung	0:8ede47d38d10	4778
phungductung	0:8ede47d38d10	4779	/* Get the TIMx CCMR1 register value */
phungductung	0:8ede47d38d10	4780	tmpccmrx = TIMx->CCMR1;
phungductung	0:8ede47d38d10	4781
phungductung	0:8ede47d38d10	4782	/* Reset the Output Compare Mode Bits */
phungductung	0:8ede47d38d10	4783	tmpccmrx &= ~TIM_CCMR1_OC1M;
phungductung	0:8ede47d38d10	4784	tmpccmrx &= ~TIM_CCMR1_CC1S;
phungductung	0:8ede47d38d10	4785	/* Select the Output Compare Mode */
phungductung	0:8ede47d38d10	4786	tmpccmrx \|= OC_Config->OCMode;
phungductung	0:8ede47d38d10	4787
phungductung	0:8ede47d38d10	4788	/* Reset the Output Polarity level */
phungductung	0:8ede47d38d10	4789	tmpccer &= ~TIM_CCER_CC1P;
phungductung	0:8ede47d38d10	4790	/* Set the Output Compare Polarity */
phungductung	0:8ede47d38d10	4791	tmpccer \|= OC_Config->OCPolarity;
phungductung	0:8ede47d38d10	4792
phungductung	0:8ede47d38d10	4793
phungductung	0:8ede47d38d10	4794	if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	4795	{
phungductung	0:8ede47d38d10	4796	/* Reset the Output N Polarity level */
phungductung	0:8ede47d38d10	4797	tmpccer &= ~TIM_CCER_CC1NP;
phungductung	0:8ede47d38d10	4798	/* Set the Output N Polarity */
phungductung	0:8ede47d38d10	4799	tmpccer \|= OC_Config->OCNPolarity;
phungductung	0:8ede47d38d10	4800	/* Reset the Output N State */
phungductung	0:8ede47d38d10	4801	tmpccer &= ~TIM_CCER_CC1NE;
phungductung	0:8ede47d38d10	4802
phungductung	0:8ede47d38d10	4803	/* Reset the Output Compare and Output Compare N IDLE State */
phungductung	0:8ede47d38d10	4804	tmpcr2 &= ~TIM_CR2_OIS1;
phungductung	0:8ede47d38d10	4805	tmpcr2 &= ~TIM_CR2_OIS1N;
phungductung	0:8ede47d38d10	4806	/* Set the Output Idle state */
phungductung	0:8ede47d38d10	4807	tmpcr2 \|= OC_Config->OCIdleState;
phungductung	0:8ede47d38d10	4808	/* Set the Output N Idle state */
phungductung	0:8ede47d38d10	4809	tmpcr2 \|= OC_Config->OCNIdleState;
phungductung	0:8ede47d38d10	4810	}
phungductung	0:8ede47d38d10	4811	/* Write to TIMx CR2 */
phungductung	0:8ede47d38d10	4812	TIMx->CR2 = tmpcr2;
phungductung	0:8ede47d38d10	4813
phungductung	0:8ede47d38d10	4814	/* Write to TIMx CCMR1 */
phungductung	0:8ede47d38d10	4815	TIMx->CCMR1 = tmpccmrx;
phungductung	0:8ede47d38d10	4816
phungductung	0:8ede47d38d10	4817	/* Set the Capture Compare Register value */
phungductung	0:8ede47d38d10	4818	TIMx->CCR1 = OC_Config->Pulse;
phungductung	0:8ede47d38d10	4819
phungductung	0:8ede47d38d10	4820	/* Write to TIMx CCER */
phungductung	0:8ede47d38d10	4821	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	4822	}
phungductung	0:8ede47d38d10	4823
phungductung	0:8ede47d38d10	4824	/**
phungductung	0:8ede47d38d10	4825	* @brief Time Output Compare 2 configuration
phungductung	0:8ede47d38d10	4826	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	4827	* @param OC_Config: The output configuration structure
phungductung	0:8ede47d38d10	4828	* @retval None
phungductung	0:8ede47d38d10	4829	*/
phungductung	0:8ede47d38d10	4830	void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
phungductung	0:8ede47d38d10	4831	{
phungductung	0:8ede47d38d10	4832	uint32_t tmpccmrx = 0;
phungductung	0:8ede47d38d10	4833	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	4834	uint32_t tmpcr2 = 0;
phungductung	0:8ede47d38d10	4835
phungductung	0:8ede47d38d10	4836	/* Disable the Channel 2: Reset the CC2E Bit */
phungductung	0:8ede47d38d10	4837	TIMx->CCER &= ~TIM_CCER_CC2E;
phungductung	0:8ede47d38d10	4838
phungductung	0:8ede47d38d10	4839	/* Get the TIMx CCER register value */
phungductung	0:8ede47d38d10	4840	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	4841	/* Get the TIMx CR2 register value */
phungductung	0:8ede47d38d10	4842	tmpcr2 = TIMx->CR2;
phungductung	0:8ede47d38d10	4843
phungductung	0:8ede47d38d10	4844	/* Get the TIMx CCMR1 register value */
phungductung	0:8ede47d38d10	4845	tmpccmrx = TIMx->CCMR1;
phungductung	0:8ede47d38d10	4846
phungductung	0:8ede47d38d10	4847	/* Reset the Output Compare mode and Capture/Compare selection Bits */
phungductung	0:8ede47d38d10	4848	tmpccmrx &= ~TIM_CCMR1_OC2M;
phungductung	0:8ede47d38d10	4849	tmpccmrx &= ~TIM_CCMR1_CC2S;
phungductung	0:8ede47d38d10	4850
phungductung	0:8ede47d38d10	4851	/* Select the Output Compare Mode */
phungductung	0:8ede47d38d10	4852	tmpccmrx \|= (OC_Config->OCMode << 8);
phungductung	0:8ede47d38d10	4853
phungductung	0:8ede47d38d10	4854	/* Reset the Output Polarity level */
phungductung	0:8ede47d38d10	4855	tmpccer &= ~TIM_CCER_CC2P;
phungductung	0:8ede47d38d10	4856	/* Set the Output Compare Polarity */
phungductung	0:8ede47d38d10	4857	tmpccer \|= (OC_Config->OCPolarity << 4);
phungductung	0:8ede47d38d10	4858
phungductung	0:8ede47d38d10	4859	if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	4860	{
phungductung	0:8ede47d38d10	4861	assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
phungductung	0:8ede47d38d10	4862
phungductung	0:8ede47d38d10	4863	/* Reset the Output N Polarity level */
phungductung	0:8ede47d38d10	4864	tmpccer &= ~TIM_CCER_CC2NP;
phungductung	0:8ede47d38d10	4865	/* Set the Output N Polarity */
phungductung	0:8ede47d38d10	4866	tmpccer \|= (OC_Config->OCNPolarity << 4);
phungductung	0:8ede47d38d10	4867	/* Reset the Output N State */
phungductung	0:8ede47d38d10	4868	tmpccer &= ~TIM_CCER_CC2NE;
phungductung	0:8ede47d38d10	4869
phungductung	0:8ede47d38d10	4870	/* Reset the Output Compare and Output Compare N IDLE State */
phungductung	0:8ede47d38d10	4871	tmpcr2 &= ~TIM_CR2_OIS2;
phungductung	0:8ede47d38d10	4872	tmpcr2 &= ~TIM_CR2_OIS2N;
phungductung	0:8ede47d38d10	4873	/* Set the Output Idle state */
phungductung	0:8ede47d38d10	4874	tmpcr2 \|= (OC_Config->OCIdleState << 2);
phungductung	0:8ede47d38d10	4875	/* Set the Output N Idle state */
phungductung	0:8ede47d38d10	4876	tmpcr2 \|= (OC_Config->OCNIdleState << 2);
phungductung	0:8ede47d38d10	4877	}
phungductung	0:8ede47d38d10	4878	/* Write to TIMx CR2 */
phungductung	0:8ede47d38d10	4879	TIMx->CR2 = tmpcr2;
phungductung	0:8ede47d38d10	4880
phungductung	0:8ede47d38d10	4881	/* Write to TIMx CCMR1 */
phungductung	0:8ede47d38d10	4882	TIMx->CCMR1 = tmpccmrx;
phungductung	0:8ede47d38d10	4883
phungductung	0:8ede47d38d10	4884	/* Set the Capture Compare Register value */
phungductung	0:8ede47d38d10	4885	TIMx->CCR2 = OC_Config->Pulse;
phungductung	0:8ede47d38d10	4886
phungductung	0:8ede47d38d10	4887	/* Write to TIMx CCER */
phungductung	0:8ede47d38d10	4888	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	4889	}
phungductung	0:8ede47d38d10	4890
phungductung	0:8ede47d38d10	4891	/**
phungductung	0:8ede47d38d10	4892	* @brief Time Output Compare 3 configuration
phungductung	0:8ede47d38d10	4893	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	4894	* @param OC_Config: The output configuration structure
phungductung	0:8ede47d38d10	4895	* @retval None
phungductung	0:8ede47d38d10	4896	*/
phungductung	0:8ede47d38d10	4897	void TIM_OC3_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
phungductung	0:8ede47d38d10	4898	{
phungductung	0:8ede47d38d10	4899	uint32_t tmpccmrx = 0;
phungductung	0:8ede47d38d10	4900	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	4901	uint32_t tmpcr2 = 0;
phungductung	0:8ede47d38d10	4902
phungductung	0:8ede47d38d10	4903	/* Disable the Channel 3: Reset the CC2E Bit */
phungductung	0:8ede47d38d10	4904	TIMx->CCER &= ~TIM_CCER_CC3E;
phungductung	0:8ede47d38d10	4905
phungductung	0:8ede47d38d10	4906	/* Get the TIMx CCER register value */
phungductung	0:8ede47d38d10	4907	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	4908	/* Get the TIMx CR2 register value */
phungductung	0:8ede47d38d10	4909	tmpcr2 = TIMx->CR2;
phungductung	0:8ede47d38d10	4910
phungductung	0:8ede47d38d10	4911	/* Get the TIMx CCMR2 register value */
phungductung	0:8ede47d38d10	4912	tmpccmrx = TIMx->CCMR2;
phungductung	0:8ede47d38d10	4913
phungductung	0:8ede47d38d10	4914	/* Reset the Output Compare mode and Capture/Compare selection Bits */
phungductung	0:8ede47d38d10	4915	tmpccmrx &= ~TIM_CCMR2_OC3M;
phungductung	0:8ede47d38d10	4916	tmpccmrx &= ~TIM_CCMR2_CC3S;
phungductung	0:8ede47d38d10	4917	/* Select the Output Compare Mode */
phungductung	0:8ede47d38d10	4918	tmpccmrx \|= OC_Config->OCMode;
phungductung	0:8ede47d38d10	4919
phungductung	0:8ede47d38d10	4920	/* Reset the Output Polarity level */
phungductung	0:8ede47d38d10	4921	tmpccer &= ~TIM_CCER_CC3P;
phungductung	0:8ede47d38d10	4922	/* Set the Output Compare Polarity */
phungductung	0:8ede47d38d10	4923	tmpccer \|= (OC_Config->OCPolarity << 8);
phungductung	0:8ede47d38d10	4924
phungductung	0:8ede47d38d10	4925	if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	4926	{
phungductung	0:8ede47d38d10	4927	assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
phungductung	0:8ede47d38d10	4928
phungductung	0:8ede47d38d10	4929	/* Reset the Output N Polarity level */
phungductung	0:8ede47d38d10	4930	tmpccer &= ~TIM_CCER_CC3NP;
phungductung	0:8ede47d38d10	4931	/* Set the Output N Polarity */
phungductung	0:8ede47d38d10	4932	tmpccer \|= (OC_Config->OCNPolarity << 8);
phungductung	0:8ede47d38d10	4933	/* Reset the Output N State */
phungductung	0:8ede47d38d10	4934	tmpccer &= ~TIM_CCER_CC3NE;
phungductung	0:8ede47d38d10	4935
phungductung	0:8ede47d38d10	4936	/* Reset the Output Compare and Output Compare N IDLE State */
phungductung	0:8ede47d38d10	4937	tmpcr2 &= ~TIM_CR2_OIS3;
phungductung	0:8ede47d38d10	4938	tmpcr2 &= ~TIM_CR2_OIS3N;
phungductung	0:8ede47d38d10	4939	/* Set the Output Idle state */
phungductung	0:8ede47d38d10	4940	tmpcr2 \|= (OC_Config->OCIdleState << 4);
phungductung	0:8ede47d38d10	4941	/* Set the Output N Idle state */
phungductung	0:8ede47d38d10	4942	tmpcr2 \|= (OC_Config->OCNIdleState << 4);
phungductung	0:8ede47d38d10	4943	}
phungductung	0:8ede47d38d10	4944	/* Write to TIMx CR2 */
phungductung	0:8ede47d38d10	4945	TIMx->CR2 = tmpcr2;
phungductung	0:8ede47d38d10	4946
phungductung	0:8ede47d38d10	4947	/* Write to TIMx CCMR2 */
phungductung	0:8ede47d38d10	4948	TIMx->CCMR2 = tmpccmrx;
phungductung	0:8ede47d38d10	4949
phungductung	0:8ede47d38d10	4950	/* Set the Capture Compare Register value */
phungductung	0:8ede47d38d10	4951	TIMx->CCR3 = OC_Config->Pulse;
phungductung	0:8ede47d38d10	4952
phungductung	0:8ede47d38d10	4953	/* Write to TIMx CCER */
phungductung	0:8ede47d38d10	4954	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	4955	}
phungductung	0:8ede47d38d10	4956
phungductung	0:8ede47d38d10	4957	/**
phungductung	0:8ede47d38d10	4958	* @brief Time Output Compare 4 configuration
phungductung	0:8ede47d38d10	4959	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	4960	* @param OC_Config: The output configuration structure
phungductung	0:8ede47d38d10	4961	* @retval None
phungductung	0:8ede47d38d10	4962	*/
phungductung	0:8ede47d38d10	4963	void TIM_OC4_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
phungductung	0:8ede47d38d10	4964	{
phungductung	0:8ede47d38d10	4965	uint32_t tmpccmrx = 0;
phungductung	0:8ede47d38d10	4966	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	4967	uint32_t tmpcr2 = 0;
phungductung	0:8ede47d38d10	4968
phungductung	0:8ede47d38d10	4969	/* Disable the Channel 4: Reset the CC4E Bit */
phungductung	0:8ede47d38d10	4970	TIMx->CCER &= ~TIM_CCER_CC4E;
phungductung	0:8ede47d38d10	4971
phungductung	0:8ede47d38d10	4972	/* Get the TIMx CCER register value */
phungductung	0:8ede47d38d10	4973	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	4974	/* Get the TIMx CR2 register value */
phungductung	0:8ede47d38d10	4975	tmpcr2 = TIMx->CR2;
phungductung	0:8ede47d38d10	4976
phungductung	0:8ede47d38d10	4977	/* Get the TIMx CCMR2 register value */
phungductung	0:8ede47d38d10	4978	tmpccmrx = TIMx->CCMR2;
phungductung	0:8ede47d38d10	4979
phungductung	0:8ede47d38d10	4980	/* Reset the Output Compare mode and Capture/Compare selection Bits */
phungductung	0:8ede47d38d10	4981	tmpccmrx &= ~TIM_CCMR2_OC4M;
phungductung	0:8ede47d38d10	4982	tmpccmrx &= ~TIM_CCMR2_CC4S;
phungductung	0:8ede47d38d10	4983
phungductung	0:8ede47d38d10	4984	/* Select the Output Compare Mode */
phungductung	0:8ede47d38d10	4985	tmpccmrx \|= (OC_Config->OCMode << 8);
phungductung	0:8ede47d38d10	4986
phungductung	0:8ede47d38d10	4987	/* Reset the Output Polarity level */
phungductung	0:8ede47d38d10	4988	tmpccer &= ~TIM_CCER_CC4P;
phungductung	0:8ede47d38d10	4989	/* Set the Output Compare Polarity */
phungductung	0:8ede47d38d10	4990	tmpccer \|= (OC_Config->OCPolarity << 12);
phungductung	0:8ede47d38d10	4991
phungductung	0:8ede47d38d10	4992	/if((TIMx == TIM1) \|\| (TIMx == TIM8))/
phungductung	0:8ede47d38d10	4993	if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	4994	{
phungductung	0:8ede47d38d10	4995	assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
phungductung	0:8ede47d38d10	4996	/* Reset the Output Compare IDLE State */
phungductung	0:8ede47d38d10	4997	tmpcr2 &= ~TIM_CR2_OIS4;
phungductung	0:8ede47d38d10	4998	/* Set the Output Idle state */
phungductung	0:8ede47d38d10	4999	tmpcr2 \|= (OC_Config->OCIdleState << 6);
phungductung	0:8ede47d38d10	5000	}
phungductung	0:8ede47d38d10	5001	/* Write to TIMx CR2 */
phungductung	0:8ede47d38d10	5002	TIMx->CR2 = tmpcr2;
phungductung	0:8ede47d38d10	5003
phungductung	0:8ede47d38d10	5004	/* Write to TIMx CCMR2 */
phungductung	0:8ede47d38d10	5005	TIMx->CCMR2 = tmpccmrx;
phungductung	0:8ede47d38d10	5006
phungductung	0:8ede47d38d10	5007	/* Set the Capture Compare Register value */
phungductung	0:8ede47d38d10	5008	TIMx->CCR4 = OC_Config->Pulse;
phungductung	0:8ede47d38d10	5009
phungductung	0:8ede47d38d10	5010	/* Write to TIMx CCER */
phungductung	0:8ede47d38d10	5011	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	5012	}
phungductung	0:8ede47d38d10	5013
phungductung	0:8ede47d38d10	5014	/**
phungductung	0:8ede47d38d10	5015	* @brief Time Output Compare 4 configuration
phungductung	0:8ede47d38d10	5016	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
phungductung	0:8ede47d38d10	5017	* the configuration information for TIM module.
phungductung	0:8ede47d38d10	5018	* @param sSlaveConfig: The slave configuration structure
phungductung	0:8ede47d38d10	5019	* @retval None
phungductung	0:8ede47d38d10	5020	*/
phungductung	0:8ede47d38d10	5021	static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
phungductung	0:8ede47d38d10	5022	TIM_SlaveConfigTypeDef * sSlaveConfig)
phungductung	0:8ede47d38d10	5023	{
phungductung	0:8ede47d38d10	5024	uint32_t tmpsmcr = 0;
phungductung	0:8ede47d38d10	5025	uint32_t tmpccmr1 = 0;
phungductung	0:8ede47d38d10	5026	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	5027
phungductung	0:8ede47d38d10	5028	/* Get the TIMx SMCR register value */
phungductung	0:8ede47d38d10	5029	tmpsmcr = htim->Instance->SMCR;
phungductung	0:8ede47d38d10	5030
phungductung	0:8ede47d38d10	5031	/* Reset the Trigger Selection Bits */
phungductung	0:8ede47d38d10	5032	tmpsmcr &= ~TIM_SMCR_TS;
phungductung	0:8ede47d38d10	5033	/* Set the Input Trigger source */
phungductung	0:8ede47d38d10	5034	tmpsmcr \|= sSlaveConfig->InputTrigger;
phungductung	0:8ede47d38d10	5035
phungductung	0:8ede47d38d10	5036	/* Reset the slave mode Bits */
phungductung	0:8ede47d38d10	5037	tmpsmcr &= ~TIM_SMCR_SMS;
phungductung	0:8ede47d38d10	5038	/* Set the slave mode */
phungductung	0:8ede47d38d10	5039	tmpsmcr \|= sSlaveConfig->SlaveMode;
phungductung	0:8ede47d38d10	5040
phungductung	0:8ede47d38d10	5041	/* Write to TIMx SMCR */
phungductung	0:8ede47d38d10	5042	htim->Instance->SMCR = tmpsmcr;
phungductung	0:8ede47d38d10	5043
phungductung	0:8ede47d38d10	5044	/* Configure the trigger prescaler, filter, and polarity */
phungductung	0:8ede47d38d10	5045	switch (sSlaveConfig->InputTrigger)
phungductung	0:8ede47d38d10	5046	{
phungductung	0:8ede47d38d10	5047	case TIM_TS_ETRF:
phungductung	0:8ede47d38d10	5048	{
phungductung	0:8ede47d38d10	5049	/* Check the parameters */
phungductung	0:8ede47d38d10	5050	assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5051	assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
phungductung	0:8ede47d38d10	5052	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
phungductung	0:8ede47d38d10	5053	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	5054	/* Configure the ETR Trigger source */
phungductung	0:8ede47d38d10	5055	TIM_ETR_SetConfig(htim->Instance,
phungductung	0:8ede47d38d10	5056	sSlaveConfig->TriggerPrescaler,
phungductung	0:8ede47d38d10	5057	sSlaveConfig->TriggerPolarity,
phungductung	0:8ede47d38d10	5058	sSlaveConfig->TriggerFilter);
phungductung	0:8ede47d38d10	5059	}
phungductung	0:8ede47d38d10	5060	break;
phungductung	0:8ede47d38d10	5061
phungductung	0:8ede47d38d10	5062	case TIM_TS_TI1F_ED:
phungductung	0:8ede47d38d10	5063	{
phungductung	0:8ede47d38d10	5064	/* Check the parameters */
phungductung	0:8ede47d38d10	5065	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5066	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
phungductung	0:8ede47d38d10	5067	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	5068
phungductung	0:8ede47d38d10	5069	/* Disable the Channel 1: Reset the CC1E Bit */
phungductung	0:8ede47d38d10	5070	tmpccer = htim->Instance->CCER;
phungductung	0:8ede47d38d10	5071	htim->Instance->CCER &= ~TIM_CCER_CC1E;
phungductung	0:8ede47d38d10	5072	tmpccmr1 = htim->Instance->CCMR1;
phungductung	0:8ede47d38d10	5073
phungductung	0:8ede47d38d10	5074	/* Set the filter */
phungductung	0:8ede47d38d10	5075	tmpccmr1 &= ~TIM_CCMR1_IC1F;
phungductung	0:8ede47d38d10	5076	tmpccmr1 \|= ((sSlaveConfig->TriggerFilter) << 4);
phungductung	0:8ede47d38d10	5077
phungductung	0:8ede47d38d10	5078	/* Write to TIMx CCMR1 and CCER registers */
phungductung	0:8ede47d38d10	5079	htim->Instance->CCMR1 = tmpccmr1;
phungductung	0:8ede47d38d10	5080	htim->Instance->CCER = tmpccer;
phungductung	0:8ede47d38d10	5081
phungductung	0:8ede47d38d10	5082	}
phungductung	0:8ede47d38d10	5083	break;
phungductung	0:8ede47d38d10	5084
phungductung	0:8ede47d38d10	5085	case TIM_TS_TI1FP1:
phungductung	0:8ede47d38d10	5086	{
phungductung	0:8ede47d38d10	5087	/* Check the parameters */
phungductung	0:8ede47d38d10	5088	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5089	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
phungductung	0:8ede47d38d10	5090	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	5091
phungductung	0:8ede47d38d10	5092	/* Configure TI1 Filter and Polarity */
phungductung	0:8ede47d38d10	5093	TIM_TI1_ConfigInputStage(htim->Instance,
phungductung	0:8ede47d38d10	5094	sSlaveConfig->TriggerPolarity,
phungductung	0:8ede47d38d10	5095	sSlaveConfig->TriggerFilter);
phungductung	0:8ede47d38d10	5096	}
phungductung	0:8ede47d38d10	5097	break;
phungductung	0:8ede47d38d10	5098
phungductung	0:8ede47d38d10	5099	case TIM_TS_TI2FP2:
phungductung	0:8ede47d38d10	5100	{
phungductung	0:8ede47d38d10	5101	/* Check the parameters */
phungductung	0:8ede47d38d10	5102	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5103	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
phungductung	0:8ede47d38d10	5104	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
phungductung	0:8ede47d38d10	5105
phungductung	0:8ede47d38d10	5106	/* Configure TI2 Filter and Polarity */
phungductung	0:8ede47d38d10	5107	TIM_TI2_ConfigInputStage(htim->Instance,
phungductung	0:8ede47d38d10	5108	sSlaveConfig->TriggerPolarity,
phungductung	0:8ede47d38d10	5109	sSlaveConfig->TriggerFilter);
phungductung	0:8ede47d38d10	5110	}
phungductung	0:8ede47d38d10	5111	break;
phungductung	0:8ede47d38d10	5112
phungductung	0:8ede47d38d10	5113	case TIM_TS_ITR0:
phungductung	0:8ede47d38d10	5114	{
phungductung	0:8ede47d38d10	5115	/* Check the parameter */
phungductung	0:8ede47d38d10	5116	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5117	}
phungductung	0:8ede47d38d10	5118	break;
phungductung	0:8ede47d38d10	5119
phungductung	0:8ede47d38d10	5120	case TIM_TS_ITR1:
phungductung	0:8ede47d38d10	5121	{
phungductung	0:8ede47d38d10	5122	/* Check the parameter */
phungductung	0:8ede47d38d10	5123	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5124	}
phungductung	0:8ede47d38d10	5125	break;
phungductung	0:8ede47d38d10	5126
phungductung	0:8ede47d38d10	5127	case TIM_TS_ITR2:
phungductung	0:8ede47d38d10	5128	{
phungductung	0:8ede47d38d10	5129	/* Check the parameter */
phungductung	0:8ede47d38d10	5130	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5131	}
phungductung	0:8ede47d38d10	5132	break;
phungductung	0:8ede47d38d10	5133
phungductung	0:8ede47d38d10	5134	case TIM_TS_ITR3:
phungductung	0:8ede47d38d10	5135	{
phungductung	0:8ede47d38d10	5136	/* Check the parameter */
phungductung	0:8ede47d38d10	5137	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
phungductung	0:8ede47d38d10	5138	}
phungductung	0:8ede47d38d10	5139	break;
phungductung	0:8ede47d38d10	5140
phungductung	0:8ede47d38d10	5141	default:
phungductung	0:8ede47d38d10	5142	break;
phungductung	0:8ede47d38d10	5143	}
phungductung	0:8ede47d38d10	5144	}
phungductung	0:8ede47d38d10	5145
phungductung	0:8ede47d38d10	5146	/**
phungductung	0:8ede47d38d10	5147	* @brief Configure the TI1 as Input.
phungductung	0:8ede47d38d10	5148	* @param TIMx to select the TIM peripheral.
phungductung	0:8ede47d38d10	5149	* @param TIM_ICPolarity : The Input Polarity.
phungductung	0:8ede47d38d10	5150	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5151	* @arg TIM_ICPolarity_Rising
phungductung	0:8ede47d38d10	5152	* @arg TIM_ICPolarity_Falling
phungductung	0:8ede47d38d10	5153	* @arg TIM_ICPolarity_BothEdge
phungductung	0:8ede47d38d10	5154	* @param TIM_ICSelection: specifies the input to be used.
phungductung	0:8ede47d38d10	5155	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5156	* @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
phungductung	0:8ede47d38d10	5157	* @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
phungductung	0:8ede47d38d10	5158	* @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
phungductung	0:8ede47d38d10	5159	* @param TIM_ICFilter: Specifies the Input Capture Filter.
phungductung	0:8ede47d38d10	5160	* This parameter must be a value between 0x00 and 0x0F.
phungductung	0:8ede47d38d10	5161	* @retval None
phungductung	0:8ede47d38d10	5162	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1
phungductung	0:8ede47d38d10	5163	* (on channel2 path) is used as the input signal. Therefore CCMR1 must be
phungductung	0:8ede47d38d10	5164	* protected against un-initialized filter and polarity values.
phungductung	0:8ede47d38d10	5165	*/
phungductung	0:8ede47d38d10	5166	void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
phungductung	0:8ede47d38d10	5167	uint32_t TIM_ICFilter)
phungductung	0:8ede47d38d10	5168	{
phungductung	0:8ede47d38d10	5169	uint32_t tmpccmr1 = 0;
phungductung	0:8ede47d38d10	5170	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	5171
phungductung	0:8ede47d38d10	5172	/* Disable the Channel 1: Reset the CC1E Bit */
phungductung	0:8ede47d38d10	5173	TIMx->CCER &= ~TIM_CCER_CC1E;
phungductung	0:8ede47d38d10	5174	tmpccmr1 = TIMx->CCMR1;
phungductung	0:8ede47d38d10	5175	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	5176
phungductung	0:8ede47d38d10	5177	/* Select the Input */
phungductung	0:8ede47d38d10	5178	if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
phungductung	0:8ede47d38d10	5179	{
phungductung	0:8ede47d38d10	5180	tmpccmr1 &= ~TIM_CCMR1_CC1S;
phungductung	0:8ede47d38d10	5181	tmpccmr1 \|= TIM_ICSelection;
phungductung	0:8ede47d38d10	5182	}
phungductung	0:8ede47d38d10	5183	else
phungductung	0:8ede47d38d10	5184	{
phungductung	0:8ede47d38d10	5185	tmpccmr1 \|= TIM_CCMR1_CC1S_0;
phungductung	0:8ede47d38d10	5186	}
phungductung	0:8ede47d38d10	5187
phungductung	0:8ede47d38d10	5188	/* Set the filter */
phungductung	0:8ede47d38d10	5189	tmpccmr1 &= ~TIM_CCMR1_IC1F;
phungductung	0:8ede47d38d10	5190	tmpccmr1 \|= ((TIM_ICFilter << 4) & TIM_CCMR1_IC1F);
phungductung	0:8ede47d38d10	5191
phungductung	0:8ede47d38d10	5192	/* Select the Polarity and set the CC1E Bit */
phungductung	0:8ede47d38d10	5193	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC1NP);
phungductung	0:8ede47d38d10	5194	tmpccer \|= (TIM_ICPolarity & (TIM_CCER_CC1P \| TIM_CCER_CC1NP));
phungductung	0:8ede47d38d10	5195
phungductung	0:8ede47d38d10	5196	/* Write to TIMx CCMR1 and CCER registers */
phungductung	0:8ede47d38d10	5197	TIMx->CCMR1 = tmpccmr1;
phungductung	0:8ede47d38d10	5198	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	5199	}
phungductung	0:8ede47d38d10	5200
phungductung	0:8ede47d38d10	5201	/**
phungductung	0:8ede47d38d10	5202	* @brief Configure the Polarity and Filter for TI1.
phungductung	0:8ede47d38d10	5203	* @param TIMx to select the TIM peripheral.
phungductung	0:8ede47d38d10	5204	* @param TIM_ICPolarity : The Input Polarity.
phungductung	0:8ede47d38d10	5205	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5206	* @arg TIM_ICPolarity_Rising
phungductung	0:8ede47d38d10	5207	* @arg TIM_ICPolarity_Falling
phungductung	0:8ede47d38d10	5208	* @arg TIM_ICPolarity_BothEdge
phungductung	0:8ede47d38d10	5209	* @param TIM_ICFilter: Specifies the Input Capture Filter.
phungductung	0:8ede47d38d10	5210	* This parameter must be a value between 0x00 and 0x0F.
phungductung	0:8ede47d38d10	5211	* @retval None
phungductung	0:8ede47d38d10	5212	*/
phungductung	0:8ede47d38d10	5213	static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
phungductung	0:8ede47d38d10	5214	{
phungductung	0:8ede47d38d10	5215	uint32_t tmpccmr1 = 0;
phungductung	0:8ede47d38d10	5216	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	5217
phungductung	0:8ede47d38d10	5218	/* Disable the Channel 1: Reset the CC1E Bit */
phungductung	0:8ede47d38d10	5219	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	5220	TIMx->CCER &= ~TIM_CCER_CC1E;
phungductung	0:8ede47d38d10	5221	tmpccmr1 = TIMx->CCMR1;
phungductung	0:8ede47d38d10	5222
phungductung	0:8ede47d38d10	5223	/* Set the filter */
phungductung	0:8ede47d38d10	5224	tmpccmr1 &= ~TIM_CCMR1_IC1F;
phungductung	0:8ede47d38d10	5225	tmpccmr1 \|= (TIM_ICFilter << 4);
phungductung	0:8ede47d38d10	5226
phungductung	0:8ede47d38d10	5227	/* Select the Polarity and set the CC1E Bit */
phungductung	0:8ede47d38d10	5228	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC1NP);
phungductung	0:8ede47d38d10	5229	tmpccer \|= TIM_ICPolarity;
phungductung	0:8ede47d38d10	5230
phungductung	0:8ede47d38d10	5231	/* Write to TIMx CCMR1 and CCER registers */
phungductung	0:8ede47d38d10	5232	TIMx->CCMR1 = tmpccmr1;
phungductung	0:8ede47d38d10	5233	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	5234	}
phungductung	0:8ede47d38d10	5235
phungductung	0:8ede47d38d10	5236	/**
phungductung	0:8ede47d38d10	5237	* @brief Configure the TI2 as Input.
phungductung	0:8ede47d38d10	5238	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	5239	* @param TIM_ICPolarity : The Input Polarity.
phungductung	0:8ede47d38d10	5240	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5241	* @arg TIM_ICPolarity_Rising
phungductung	0:8ede47d38d10	5242	* @arg TIM_ICPolarity_Falling
phungductung	0:8ede47d38d10	5243	* @arg TIM_ICPolarity_BothEdge
phungductung	0:8ede47d38d10	5244	* @param TIM_ICSelection: specifies the input to be used.
phungductung	0:8ede47d38d10	5245	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5246	* @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
phungductung	0:8ede47d38d10	5247	* @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
phungductung	0:8ede47d38d10	5248	* @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
phungductung	0:8ede47d38d10	5249	* @param TIM_ICFilter: Specifies the Input Capture Filter.
phungductung	0:8ede47d38d10	5250	* This parameter must be a value between 0x00 and 0x0F.
phungductung	0:8ede47d38d10	5251	* @retval None
phungductung	0:8ede47d38d10	5252	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2
phungductung	0:8ede47d38d10	5253	* (on channel1 path) is used as the input signal. Therefore CCMR1 must be
phungductung	0:8ede47d38d10	5254	* protected against un-initialized filter and polarity values.
phungductung	0:8ede47d38d10	5255	*/
phungductung	0:8ede47d38d10	5256	static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
phungductung	0:8ede47d38d10	5257	uint32_t TIM_ICFilter)
phungductung	0:8ede47d38d10	5258	{
phungductung	0:8ede47d38d10	5259	uint32_t tmpccmr1 = 0;
phungductung	0:8ede47d38d10	5260	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	5261
phungductung	0:8ede47d38d10	5262	/* Disable the Channel 2: Reset the CC2E Bit */
phungductung	0:8ede47d38d10	5263	TIMx->CCER &= ~TIM_CCER_CC2E;
phungductung	0:8ede47d38d10	5264	tmpccmr1 = TIMx->CCMR1;
phungductung	0:8ede47d38d10	5265	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	5266
phungductung	0:8ede47d38d10	5267	/* Select the Input */
phungductung	0:8ede47d38d10	5268	tmpccmr1 &= ~TIM_CCMR1_CC2S;
phungductung	0:8ede47d38d10	5269	tmpccmr1 \|= (TIM_ICSelection << 8);
phungductung	0:8ede47d38d10	5270
phungductung	0:8ede47d38d10	5271	/* Set the filter */
phungductung	0:8ede47d38d10	5272	tmpccmr1 &= ~TIM_CCMR1_IC2F;
phungductung	0:8ede47d38d10	5273	tmpccmr1 \|= ((TIM_ICFilter << 12) & TIM_CCMR1_IC2F);
phungductung	0:8ede47d38d10	5274
phungductung	0:8ede47d38d10	5275	/* Select the Polarity and set the CC2E Bit */
phungductung	0:8ede47d38d10	5276	tmpccer &= ~(TIM_CCER_CC2P \| TIM_CCER_CC2NP);
phungductung	0:8ede47d38d10	5277	tmpccer \|= ((TIM_ICPolarity << 4) & (TIM_CCER_CC2P \| TIM_CCER_CC2NP));
phungductung	0:8ede47d38d10	5278
phungductung	0:8ede47d38d10	5279	/* Write to TIMx CCMR1 and CCER registers */
phungductung	0:8ede47d38d10	5280	TIMx->CCMR1 = tmpccmr1 ;
phungductung	0:8ede47d38d10	5281	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	5282	}
phungductung	0:8ede47d38d10	5283
phungductung	0:8ede47d38d10	5284	/**
phungductung	0:8ede47d38d10	5285	* @brief Configure the Polarity and Filter for TI2.
phungductung	0:8ede47d38d10	5286	* @param TIMx to select the TIM peripheral.
phungductung	0:8ede47d38d10	5287	* @param TIM_ICPolarity : The Input Polarity.
phungductung	0:8ede47d38d10	5288	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5289	* @arg TIM_ICPolarity_Rising
phungductung	0:8ede47d38d10	5290	* @arg TIM_ICPolarity_Falling
phungductung	0:8ede47d38d10	5291	* @arg TIM_ICPolarity_BothEdge
phungductung	0:8ede47d38d10	5292	* @param TIM_ICFilter: Specifies the Input Capture Filter.
phungductung	0:8ede47d38d10	5293	* This parameter must be a value between 0x00 and 0x0F.
phungductung	0:8ede47d38d10	5294	* @retval None
phungductung	0:8ede47d38d10	5295	*/
phungductung	0:8ede47d38d10	5296	static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
phungductung	0:8ede47d38d10	5297	{
phungductung	0:8ede47d38d10	5298	uint32_t tmpccmr1 = 0;
phungductung	0:8ede47d38d10	5299	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	5300
phungductung	0:8ede47d38d10	5301	/* Disable the Channel 2: Reset the CC2E Bit */
phungductung	0:8ede47d38d10	5302	TIMx->CCER &= ~TIM_CCER_CC2E;
phungductung	0:8ede47d38d10	5303	tmpccmr1 = TIMx->CCMR1;
phungductung	0:8ede47d38d10	5304	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	5305
phungductung	0:8ede47d38d10	5306	/* Set the filter */
phungductung	0:8ede47d38d10	5307	tmpccmr1 &= ~TIM_CCMR1_IC2F;
phungductung	0:8ede47d38d10	5308	tmpccmr1 \|= (TIM_ICFilter << 12);
phungductung	0:8ede47d38d10	5309
phungductung	0:8ede47d38d10	5310	/* Select the Polarity and set the CC2E Bit */
phungductung	0:8ede47d38d10	5311	tmpccer &= ~(TIM_CCER_CC2P \| TIM_CCER_CC2NP);
phungductung	0:8ede47d38d10	5312	tmpccer \|= (TIM_ICPolarity << 4);
phungductung	0:8ede47d38d10	5313
phungductung	0:8ede47d38d10	5314	/* Write to TIMx CCMR1 and CCER registers */
phungductung	0:8ede47d38d10	5315	TIMx->CCMR1 = tmpccmr1 ;
phungductung	0:8ede47d38d10	5316	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	5317	}
phungductung	0:8ede47d38d10	5318
phungductung	0:8ede47d38d10	5319	/**
phungductung	0:8ede47d38d10	5320	* @brief Configure the TI3 as Input.
phungductung	0:8ede47d38d10	5321	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	5322	* @param TIM_ICPolarity : The Input Polarity.
phungductung	0:8ede47d38d10	5323	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5324	* @arg TIM_ICPolarity_Rising
phungductung	0:8ede47d38d10	5325	* @arg TIM_ICPolarity_Falling
phungductung	0:8ede47d38d10	5326	* @arg TIM_ICPolarity_BothEdge
phungductung	0:8ede47d38d10	5327	* @param TIM_ICSelection: specifies the input to be used.
phungductung	0:8ede47d38d10	5328	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5329	* @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
phungductung	0:8ede47d38d10	5330	* @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
phungductung	0:8ede47d38d10	5331	* @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
phungductung	0:8ede47d38d10	5332	* @param TIM_ICFilter: Specifies the Input Capture Filter.
phungductung	0:8ede47d38d10	5333	* This parameter must be a value between 0x00 and 0x0F.
phungductung	0:8ede47d38d10	5334	* @retval None
phungductung	0:8ede47d38d10	5335	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4
phungductung	0:8ede47d38d10	5336	* (on channel1 path) is used as the input signal. Therefore CCMR2 must be
phungductung	0:8ede47d38d10	5337	* protected against un-initialized filter and polarity values.
phungductung	0:8ede47d38d10	5338	*/
phungductung	0:8ede47d38d10	5339	static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
phungductung	0:8ede47d38d10	5340	uint32_t TIM_ICFilter)
phungductung	0:8ede47d38d10	5341	{
phungductung	0:8ede47d38d10	5342	uint32_t tmpccmr2 = 0;
phungductung	0:8ede47d38d10	5343	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	5344
phungductung	0:8ede47d38d10	5345	/* Disable the Channel 3: Reset the CC3E Bit */
phungductung	0:8ede47d38d10	5346	TIMx->CCER &= ~TIM_CCER_CC3E;
phungductung	0:8ede47d38d10	5347	tmpccmr2 = TIMx->CCMR2;
phungductung	0:8ede47d38d10	5348	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	5349
phungductung	0:8ede47d38d10	5350	/* Select the Input */
phungductung	0:8ede47d38d10	5351	tmpccmr2 &= ~TIM_CCMR2_CC3S;
phungductung	0:8ede47d38d10	5352	tmpccmr2 \|= TIM_ICSelection;
phungductung	0:8ede47d38d10	5353
phungductung	0:8ede47d38d10	5354	/* Set the filter */
phungductung	0:8ede47d38d10	5355	tmpccmr2 &= ~TIM_CCMR2_IC3F;
phungductung	0:8ede47d38d10	5356	tmpccmr2 \|= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F);
phungductung	0:8ede47d38d10	5357
phungductung	0:8ede47d38d10	5358	/* Select the Polarity and set the CC3E Bit */
phungductung	0:8ede47d38d10	5359	tmpccer &= ~(TIM_CCER_CC3P \| TIM_CCER_CC3NP);
phungductung	0:8ede47d38d10	5360	tmpccer \|= ((TIM_ICPolarity << 8) & (TIM_CCER_CC3P \| TIM_CCER_CC3NP));
phungductung	0:8ede47d38d10	5361
phungductung	0:8ede47d38d10	5362	/* Write to TIMx CCMR2 and CCER registers */
phungductung	0:8ede47d38d10	5363	TIMx->CCMR2 = tmpccmr2;
phungductung	0:8ede47d38d10	5364	TIMx->CCER = tmpccer;
phungductung	0:8ede47d38d10	5365	}
phungductung	0:8ede47d38d10	5366
phungductung	0:8ede47d38d10	5367	/**
phungductung	0:8ede47d38d10	5368	* @brief Configure the TI4 as Input.
phungductung	0:8ede47d38d10	5369	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	5370	* @param TIM_ICPolarity : The Input Polarity.
phungductung	0:8ede47d38d10	5371	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5372	* @arg TIM_ICPolarity_Rising
phungductung	0:8ede47d38d10	5373	* @arg TIM_ICPolarity_Falling
phungductung	0:8ede47d38d10	5374	* @arg TIM_ICPolarity_BothEdge
phungductung	0:8ede47d38d10	5375	* @param TIM_ICSelection: specifies the input to be used.
phungductung	0:8ede47d38d10	5376	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5377	* @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
phungductung	0:8ede47d38d10	5378	* @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
phungductung	0:8ede47d38d10	5379	* @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
phungductung	0:8ede47d38d10	5380	* @param TIM_ICFilter: Specifies the Input Capture Filter.
phungductung	0:8ede47d38d10	5381	* This parameter must be a value between 0x00 and 0x0F.
phungductung	0:8ede47d38d10	5382	* @retval None
phungductung	0:8ede47d38d10	5383	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3
phungductung	0:8ede47d38d10	5384	* (on channel1 path) is used as the input signal. Therefore CCMR2 must be
phungductung	0:8ede47d38d10	5385	* protected against un-initialized filter and polarity values.
phungductung	0:8ede47d38d10	5386	*/
phungductung	0:8ede47d38d10	5387	static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
phungductung	0:8ede47d38d10	5388	uint32_t TIM_ICFilter)
phungductung	0:8ede47d38d10	5389	{
phungductung	0:8ede47d38d10	5390	uint32_t tmpccmr2 = 0;
phungductung	0:8ede47d38d10	5391	uint32_t tmpccer = 0;
phungductung	0:8ede47d38d10	5392
phungductung	0:8ede47d38d10	5393	/* Disable the Channel 4: Reset the CC4E Bit */
phungductung	0:8ede47d38d10	5394	TIMx->CCER &= ~TIM_CCER_CC4E;
phungductung	0:8ede47d38d10	5395	tmpccmr2 = TIMx->CCMR2;
phungductung	0:8ede47d38d10	5396	tmpccer = TIMx->CCER;
phungductung	0:8ede47d38d10	5397
phungductung	0:8ede47d38d10	5398	/* Select the Input */
phungductung	0:8ede47d38d10	5399	tmpccmr2 &= ~TIM_CCMR2_CC4S;
phungductung	0:8ede47d38d10	5400	tmpccmr2 \|= (TIM_ICSelection << 8);
phungductung	0:8ede47d38d10	5401
phungductung	0:8ede47d38d10	5402	/* Set the filter */
phungductung	0:8ede47d38d10	5403	tmpccmr2 &= ~TIM_CCMR2_IC4F;
phungductung	0:8ede47d38d10	5404	tmpccmr2 \|= ((TIM_ICFilter << 12) & TIM_CCMR2_IC4F);
phungductung	0:8ede47d38d10	5405
phungductung	0:8ede47d38d10	5406	/* Select the Polarity and set the CC4E Bit */
phungductung	0:8ede47d38d10	5407	tmpccer &= ~(TIM_CCER_CC4P \| TIM_CCER_CC4NP);
phungductung	0:8ede47d38d10	5408	tmpccer \|= ((TIM_ICPolarity << 12) & (TIM_CCER_CC4P \| TIM_CCER_CC4NP));
phungductung	0:8ede47d38d10	5409
phungductung	0:8ede47d38d10	5410	/* Write to TIMx CCMR2 and CCER registers */
phungductung	0:8ede47d38d10	5411	TIMx->CCMR2 = tmpccmr2;
phungductung	0:8ede47d38d10	5412	TIMx->CCER = tmpccer ;
phungductung	0:8ede47d38d10	5413	}
phungductung	0:8ede47d38d10	5414
phungductung	0:8ede47d38d10	5415	/**
phungductung	0:8ede47d38d10	5416	* @brief Selects the Input Trigger source
phungductung	0:8ede47d38d10	5417	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	5418	* @param TIM_ITRx: The Input Trigger source.
phungductung	0:8ede47d38d10	5419	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5420	* @arg TIM_TS_ITR0: Internal Trigger 0
phungductung	0:8ede47d38d10	5421	* @arg TIM_TS_ITR1: Internal Trigger 1
phungductung	0:8ede47d38d10	5422	* @arg TIM_TS_ITR2: Internal Trigger 2
phungductung	0:8ede47d38d10	5423	* @arg TIM_TS_ITR3: Internal Trigger 3
phungductung	0:8ede47d38d10	5424	* @arg TIM_TS_TI1F_ED: TI1 Edge Detector
phungductung	0:8ede47d38d10	5425	* @arg TIM_TS_TI1FP1: Filtered Timer Input 1
phungductung	0:8ede47d38d10	5426	* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
phungductung	0:8ede47d38d10	5427	* @arg TIM_TS_ETRF: External Trigger input
phungductung	0:8ede47d38d10	5428	* @retval None
phungductung	0:8ede47d38d10	5429	*/
phungductung	0:8ede47d38d10	5430	static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t TIM_ITRx)
phungductung	0:8ede47d38d10	5431	{
phungductung	0:8ede47d38d10	5432	uint32_t tmpsmcr = 0;
phungductung	0:8ede47d38d10	5433
phungductung	0:8ede47d38d10	5434	/* Get the TIMx SMCR register value */
phungductung	0:8ede47d38d10	5435	tmpsmcr = TIMx->SMCR;
phungductung	0:8ede47d38d10	5436	/* Reset the TS Bits */
phungductung	0:8ede47d38d10	5437	tmpsmcr &= ~TIM_SMCR_TS;
phungductung	0:8ede47d38d10	5438	/* Set the Input Trigger source and the slave mode*/
phungductung	0:8ede47d38d10	5439	tmpsmcr \|= TIM_ITRx \| TIM_SLAVEMODE_EXTERNAL1;
phungductung	0:8ede47d38d10	5440	/* Write to TIMx SMCR */
phungductung	0:8ede47d38d10	5441	TIMx->SMCR = tmpsmcr;
phungductung	0:8ede47d38d10	5442	}
phungductung	0:8ede47d38d10	5443
phungductung	0:8ede47d38d10	5444	/**
phungductung	0:8ede47d38d10	5445	* @brief Configures the TIMx External Trigger (ETR).
phungductung	0:8ede47d38d10	5446	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	5447	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
phungductung	0:8ede47d38d10	5448	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5449	* @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF.
phungductung	0:8ede47d38d10	5450	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
phungductung	0:8ede47d38d10	5451	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
phungductung	0:8ede47d38d10	5452	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
phungductung	0:8ede47d38d10	5453	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
phungductung	0:8ede47d38d10	5454	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5455	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
phungductung	0:8ede47d38d10	5456	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
phungductung	0:8ede47d38d10	5457	* @param ExtTRGFilter: External Trigger Filter.
phungductung	0:8ede47d38d10	5458	* This parameter must be a value between 0x00 and 0x0F
phungductung	0:8ede47d38d10	5459	* @retval None
phungductung	0:8ede47d38d10	5460	*/
phungductung	0:8ede47d38d10	5461	void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
phungductung	0:8ede47d38d10	5462	uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
phungductung	0:8ede47d38d10	5463	{
phungductung	0:8ede47d38d10	5464	uint32_t tmpsmcr = 0;
phungductung	0:8ede47d38d10	5465
phungductung	0:8ede47d38d10	5466	tmpsmcr = TIMx->SMCR;
phungductung	0:8ede47d38d10	5467
phungductung	0:8ede47d38d10	5468	/* Reset the ETR Bits */
phungductung	0:8ede47d38d10	5469	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
phungductung	0:8ede47d38d10	5470
phungductung	0:8ede47d38d10	5471	/* Set the Prescaler, the Filter value and the Polarity */
phungductung	0:8ede47d38d10	5472	tmpsmcr \|= (uint32_t)(TIM_ExtTRGPrescaler \| (TIM_ExtTRGPolarity \| (ExtTRGFilter << 8)));
phungductung	0:8ede47d38d10	5473
phungductung	0:8ede47d38d10	5474	/* Write to TIMx SMCR */
phungductung	0:8ede47d38d10	5475	TIMx->SMCR = tmpsmcr;
phungductung	0:8ede47d38d10	5476	}
phungductung	0:8ede47d38d10	5477
phungductung	0:8ede47d38d10	5478	/**
phungductung	0:8ede47d38d10	5479	* @brief Enables or disables the TIM Capture Compare Channel x.
phungductung	0:8ede47d38d10	5480	* @param TIMx to select the TIM peripheral
phungductung	0:8ede47d38d10	5481	* @param Channel: specifies the TIM Channel
phungductung	0:8ede47d38d10	5482	* This parameter can be one of the following values:
phungductung	0:8ede47d38d10	5483	* @arg TIM_Channel_1: TIM Channel 1
phungductung	0:8ede47d38d10	5484	* @arg TIM_Channel_2: TIM Channel 2
phungductung	0:8ede47d38d10	5485	* @arg TIM_Channel_3: TIM Channel 3
phungductung	0:8ede47d38d10	5486	* @arg TIM_Channel_4: TIM Channel 4
phungductung	0:8ede47d38d10	5487	* @param ChannelState: specifies the TIM Channel CCxE bit new state.
phungductung	0:8ede47d38d10	5488	* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable.
phungductung	0:8ede47d38d10	5489	* @retval None
phungductung	0:8ede47d38d10	5490	*/
phungductung	0:8ede47d38d10	5491	void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
phungductung	0:8ede47d38d10	5492	{
phungductung	0:8ede47d38d10	5493	uint32_t tmp = 0;
phungductung	0:8ede47d38d10	5494
phungductung	0:8ede47d38d10	5495	/* Check the parameters */
phungductung	0:8ede47d38d10	5496	assert_param(IS_TIM_CC1_INSTANCE(TIMx));
phungductung	0:8ede47d38d10	5497	assert_param(IS_TIM_CHANNELS(Channel));
phungductung	0:8ede47d38d10	5498
phungductung	0:8ede47d38d10	5499	tmp = TIM_CCER_CC1E << Channel;
phungductung	0:8ede47d38d10	5500
phungductung	0:8ede47d38d10	5501	/* Reset the CCxE Bit */
phungductung	0:8ede47d38d10	5502	TIMx->CCER &= ~tmp;
phungductung	0:8ede47d38d10	5503
phungductung	0:8ede47d38d10	5504	/* Set or reset the CCxE Bit */
phungductung	0:8ede47d38d10	5505	TIMx->CCER \|= (uint32_t)(ChannelState << Channel);
phungductung	0:8ede47d38d10	5506	}
phungductung	0:8ede47d38d10	5507
phungductung	0:8ede47d38d10	5508
phungductung	0:8ede47d38d10	5509	/**
phungductung	0:8ede47d38d10	5510	* @}
phungductung	0:8ede47d38d10	5511	*/
phungductung	0:8ede47d38d10	5512
phungductung	0:8ede47d38d10	5513	#endif /* HAL_TIM_MODULE_ENABLED */
phungductung	0:8ede47d38d10	5514	/**
phungductung	0:8ede47d38d10	5515	* @}
phungductung	0:8ede47d38d10	5516	*/
phungductung	0:8ede47d38d10	5517
phungductung	0:8ede47d38d10	5518	/**
phungductung	0:8ede47d38d10	5519	* @}
phungductung	0:8ede47d38d10	5520	*/
phungductung	0:8ede47d38d10	5521	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	04 Jun 2019
Imports:	17
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	3
Followers:	1

SRC_STM32F7/targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_tim.c@0:8ede47d38d10, 2019-06-04 (annotated)

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