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SRC_STM32F7/targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_sram.h@0:8ede47d38d10, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:37:21 2019 +0000
Revision:
0:8ede47d38d10
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phungductung 0:8ede47d38d10 1 /**
phungductung 0:8ede47d38d10 2 ******************************************************************************
phungductung 0:8ede47d38d10 3 * @file stm32f7xx_hal_sram.h
phungductung 0:8ede47d38d10 4 * @author MCD Application Team
phungductung 0:8ede47d38d10 5 * @version V1.0.4
phungductung 0:8ede47d38d10 6 * @date 09-December-2015
phungductung 0:8ede47d38d10 7 * @brief Header file of SRAM HAL module.
phungductung 0:8ede47d38d10 8 ******************************************************************************
phungductung 0:8ede47d38d10 9 * @attention
phungductung 0:8ede47d38d10 10 *
phungductung 0:8ede47d38d10 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:8ede47d38d10 12 *
phungductung 0:8ede47d38d10 13 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:8ede47d38d10 14 * are permitted provided that the following conditions are met:
phungductung 0:8ede47d38d10 15 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:8ede47d38d10 16 * this list of conditions and the following disclaimer.
phungductung 0:8ede47d38d10 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:8ede47d38d10 18 * this list of conditions and the following disclaimer in the documentation
phungductung 0:8ede47d38d10 19 * and/or other materials provided with the distribution.
phungductung 0:8ede47d38d10 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:8ede47d38d10 21 * may be used to endorse or promote products derived from this software
phungductung 0:8ede47d38d10 22 * without specific prior written permission.
phungductung 0:8ede47d38d10 23 *
phungductung 0:8ede47d38d10 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:8ede47d38d10 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:8ede47d38d10 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:8ede47d38d10 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:8ede47d38d10 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:8ede47d38d10 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:8ede47d38d10 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:8ede47d38d10 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:8ede47d38d10 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:8ede47d38d10 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:8ede47d38d10 34 *
phungductung 0:8ede47d38d10 35 ******************************************************************************
phungductung 0:8ede47d38d10 36 */
phungductung 0:8ede47d38d10 37
phungductung 0:8ede47d38d10 38 /* Define to prevent recursive inclusion -------------------------------------*/
phungductung 0:8ede47d38d10 39 #ifndef __STM32F7xx_HAL_SRAM_H
phungductung 0:8ede47d38d10 40 #define __STM32F7xx_HAL_SRAM_H
phungductung 0:8ede47d38d10 41
phungductung 0:8ede47d38d10 42 #ifdef __cplusplus
phungductung 0:8ede47d38d10 43 extern "C" {
phungductung 0:8ede47d38d10 44 #endif
phungductung 0:8ede47d38d10 45
phungductung 0:8ede47d38d10 46 /* Includes ------------------------------------------------------------------*/
phungductung 0:8ede47d38d10 47 #include "stm32f7xx_ll_fmc.h"
phungductung 0:8ede47d38d10 48
phungductung 0:8ede47d38d10 49 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:8ede47d38d10 50 * @{
phungductung 0:8ede47d38d10 51 */
phungductung 0:8ede47d38d10 52 /** @addtogroup SRAM
phungductung 0:8ede47d38d10 53 * @{
phungductung 0:8ede47d38d10 54 */
phungductung 0:8ede47d38d10 55
phungductung 0:8ede47d38d10 56 /* Exported typedef ----------------------------------------------------------*/
phungductung 0:8ede47d38d10 57
phungductung 0:8ede47d38d10 58 /** @defgroup SRAM_Exported_Types SRAM Exported Types
phungductung 0:8ede47d38d10 59 * @{
phungductung 0:8ede47d38d10 60 */
phungductung 0:8ede47d38d10 61 /**
phungductung 0:8ede47d38d10 62 * @brief HAL SRAM State structures definition
phungductung 0:8ede47d38d10 63 */
phungductung 0:8ede47d38d10 64 typedef enum
phungductung 0:8ede47d38d10 65 {
phungductung 0:8ede47d38d10 66 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
phungductung 0:8ede47d38d10 67 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
phungductung 0:8ede47d38d10 68 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
phungductung 0:8ede47d38d10 69 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
phungductung 0:8ede47d38d10 70 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
phungductung 0:8ede47d38d10 71
phungductung 0:8ede47d38d10 72 }HAL_SRAM_StateTypeDef;
phungductung 0:8ede47d38d10 73
phungductung 0:8ede47d38d10 74 /**
phungductung 0:8ede47d38d10 75 * @brief SRAM handle Structure definition
phungductung 0:8ede47d38d10 76 */
phungductung 0:8ede47d38d10 77 typedef struct
phungductung 0:8ede47d38d10 78 {
phungductung 0:8ede47d38d10 79 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
phungductung 0:8ede47d38d10 80
phungductung 0:8ede47d38d10 81 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
phungductung 0:8ede47d38d10 82
phungductung 0:8ede47d38d10 83 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
phungductung 0:8ede47d38d10 84
phungductung 0:8ede47d38d10 85 HAL_LockTypeDef Lock; /*!< SRAM locking object */
phungductung 0:8ede47d38d10 86
phungductung 0:8ede47d38d10 87 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
phungductung 0:8ede47d38d10 88
phungductung 0:8ede47d38d10 89 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
phungductung 0:8ede47d38d10 90
phungductung 0:8ede47d38d10 91 }SRAM_HandleTypeDef;
phungductung 0:8ede47d38d10 92
phungductung 0:8ede47d38d10 93 /**
phungductung 0:8ede47d38d10 94 * @}
phungductung 0:8ede47d38d10 95 */
phungductung 0:8ede47d38d10 96
phungductung 0:8ede47d38d10 97 /* Exported constants --------------------------------------------------------*/
phungductung 0:8ede47d38d10 98 /* Exported macro ------------------------------------------------------------*/
phungductung 0:8ede47d38d10 99
phungductung 0:8ede47d38d10 100 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
phungductung 0:8ede47d38d10 101 * @{
phungductung 0:8ede47d38d10 102 */
phungductung 0:8ede47d38d10 103
phungductung 0:8ede47d38d10 104 /** @brief Reset SRAM handle state
phungductung 0:8ede47d38d10 105 * @param __HANDLE__: SRAM handle
phungductung 0:8ede47d38d10 106 * @retval None
phungductung 0:8ede47d38d10 107 */
phungductung 0:8ede47d38d10 108 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
phungductung 0:8ede47d38d10 109
phungductung 0:8ede47d38d10 110 /**
phungductung 0:8ede47d38d10 111 * @}
phungductung 0:8ede47d38d10 112 */
phungductung 0:8ede47d38d10 113
phungductung 0:8ede47d38d10 114 /* Exported functions --------------------------------------------------------*/
phungductung 0:8ede47d38d10 115 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
phungductung 0:8ede47d38d10 116 * @{
phungductung 0:8ede47d38d10 117 */
phungductung 0:8ede47d38d10 118
phungductung 0:8ede47d38d10 119 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
phungductung 0:8ede47d38d10 120 * @{
phungductung 0:8ede47d38d10 121 */
phungductung 0:8ede47d38d10 122
phungductung 0:8ede47d38d10 123 /* Initialization/de-initialization functions ********************************/
phungductung 0:8ede47d38d10 124 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
phungductung 0:8ede47d38d10 125 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
phungductung 0:8ede47d38d10 126 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
phungductung 0:8ede47d38d10 127 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
phungductung 0:8ede47d38d10 128
phungductung 0:8ede47d38d10 129 /**
phungductung 0:8ede47d38d10 130 * @}
phungductung 0:8ede47d38d10 131 */
phungductung 0:8ede47d38d10 132
phungductung 0:8ede47d38d10 133 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
phungductung 0:8ede47d38d10 134 * @{
phungductung 0:8ede47d38d10 135 */
phungductung 0:8ede47d38d10 136
phungductung 0:8ede47d38d10 137 /* I/O operation functions ***************************************************/
phungductung 0:8ede47d38d10 138 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 139 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 140 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 141 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 142 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 143 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 144 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 145 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
phungductung 0:8ede47d38d10 146
phungductung 0:8ede47d38d10 147 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
phungductung 0:8ede47d38d10 148 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
phungductung 0:8ede47d38d10 149
phungductung 0:8ede47d38d10 150 /**
phungductung 0:8ede47d38d10 151 * @}
phungductung 0:8ede47d38d10 152 */
phungductung 0:8ede47d38d10 153
phungductung 0:8ede47d38d10 154 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
phungductung 0:8ede47d38d10 155 * @{
phungductung 0:8ede47d38d10 156 */
phungductung 0:8ede47d38d10 157
phungductung 0:8ede47d38d10 158 /* SRAM Control functions ****************************************************/
phungductung 0:8ede47d38d10 159 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
phungductung 0:8ede47d38d10 160 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
phungductung 0:8ede47d38d10 161
phungductung 0:8ede47d38d10 162 /**
phungductung 0:8ede47d38d10 163 * @}
phungductung 0:8ede47d38d10 164 */
phungductung 0:8ede47d38d10 165
phungductung 0:8ede47d38d10 166 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
phungductung 0:8ede47d38d10 167 * @{
phungductung 0:8ede47d38d10 168 */
phungductung 0:8ede47d38d10 169
phungductung 0:8ede47d38d10 170 /* SRAM State functions ******************************************************/
phungductung 0:8ede47d38d10 171 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
phungductung 0:8ede47d38d10 172
phungductung 0:8ede47d38d10 173 /**
phungductung 0:8ede47d38d10 174 * @}
phungductung 0:8ede47d38d10 175 */
phungductung 0:8ede47d38d10 176
phungductung 0:8ede47d38d10 177 /**
phungductung 0:8ede47d38d10 178 * @}
phungductung 0:8ede47d38d10 179 */
phungductung 0:8ede47d38d10 180
phungductung 0:8ede47d38d10 181 /**
phungductung 0:8ede47d38d10 182 * @}
phungductung 0:8ede47d38d10 183 */
phungductung 0:8ede47d38d10 184
phungductung 0:8ede47d38d10 185 /**
phungductung 0:8ede47d38d10 186 * @}
phungductung 0:8ede47d38d10 187 */
phungductung 0:8ede47d38d10 188
phungductung 0:8ede47d38d10 189 #ifdef __cplusplus
phungductung 0:8ede47d38d10 190 }
phungductung 0:8ede47d38d10 191 #endif
phungductung 0:8ede47d38d10 192
phungductung 0:8ede47d38d10 193 #endif /* __STM32F7xx_HAL_SRAM_H */
phungductung 0:8ede47d38d10 194
phungductung 0:8ede47d38d10 195 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/