PHung Tung / DISCO-F746_WAV_PLAYER

SPKT

Dependencies:   F746_GUI SD_PlayerSkeleton F746_SAI_IO

SRC_STM32F7/targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_nor.c@0:8ede47d38d10, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:37:21 2019 +0000
Revision:
0:8ede47d38d10
SPKT

Who changed what in which revision?

UserRevisionLine numberNew contents of line
phungductung 0:8ede47d38d10 1 /**
phungductung 0:8ede47d38d10 2 ******************************************************************************
phungductung 0:8ede47d38d10 3 * @file stm32f7xx_hal_nor.c
phungductung 0:8ede47d38d10 4 * @author MCD Application Team
phungductung 0:8ede47d38d10 5 * @version V1.0.4
phungductung 0:8ede47d38d10 6 * @date 09-December-2015
phungductung 0:8ede47d38d10 7 * @brief NOR HAL module driver.
phungductung 0:8ede47d38d10 8 * This file provides a generic firmware to drive NOR memories mounted
phungductung 0:8ede47d38d10 9 * as external device.
phungductung 0:8ede47d38d10 10 *
phungductung 0:8ede47d38d10 11 @verbatim
phungductung 0:8ede47d38d10 12 ==============================================================================
phungductung 0:8ede47d38d10 13 ##### How to use this driver #####
phungductung 0:8ede47d38d10 14 ==============================================================================
phungductung 0:8ede47d38d10 15 [..]
phungductung 0:8ede47d38d10 16 This driver is a generic layered driver which contains a set of APIs used to
phungductung 0:8ede47d38d10 17 control NOR flash memories. It uses the FMC layer functions to interface
phungductung 0:8ede47d38d10 18 with NOR devices. This driver is used as follows:
phungductung 0:8ede47d38d10 19
phungductung 0:8ede47d38d10 20 (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()
phungductung 0:8ede47d38d10 21 with control and timing parameters for both normal and extended mode.
phungductung 0:8ede47d38d10 22
phungductung 0:8ede47d38d10 23 (+) Read NOR flash memory manufacturer code and device IDs using the function
phungductung 0:8ede47d38d10 24 HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef
phungductung 0:8ede47d38d10 25 structure declared by the function caller.
phungductung 0:8ede47d38d10 26
phungductung 0:8ede47d38d10 27 (+) Access NOR flash memory by read/write data unit operations using the functions
phungductung 0:8ede47d38d10 28 HAL_NOR_Read(), HAL_NOR_Program().
phungductung 0:8ede47d38d10 29
phungductung 0:8ede47d38d10 30 (+) Perform NOR flash erase block/chip operations using the functions
phungductung 0:8ede47d38d10 31 HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().
phungductung 0:8ede47d38d10 32
phungductung 0:8ede47d38d10 33 (+) Read the NOR flash CFI (common flash interface) IDs using the function
phungductung 0:8ede47d38d10 34 HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef
phungductung 0:8ede47d38d10 35 structure declared by the function caller.
phungductung 0:8ede47d38d10 36
phungductung 0:8ede47d38d10 37 (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/
phungductung 0:8ede47d38d10 38 HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation
phungductung 0:8ede47d38d10 39
phungductung 0:8ede47d38d10 40 (+) You can monitor the NOR device HAL state by calling the function
phungductung 0:8ede47d38d10 41 HAL_NOR_GetState()
phungductung 0:8ede47d38d10 42 [..]
phungductung 0:8ede47d38d10 43 (@) This driver is a set of generic APIs which handle standard NOR flash operations.
phungductung 0:8ede47d38d10 44 If a NOR flash device contains different operations and/or implementations,
phungductung 0:8ede47d38d10 45 it should be implemented separately.
phungductung 0:8ede47d38d10 46
phungductung 0:8ede47d38d10 47 *** NOR HAL driver macros list ***
phungductung 0:8ede47d38d10 48 =============================================
phungductung 0:8ede47d38d10 49 [..]
phungductung 0:8ede47d38d10 50 Below the list of most used macros in NOR HAL driver.
phungductung 0:8ede47d38d10 51
phungductung 0:8ede47d38d10 52 (+) NOR_WRITE : NOR memory write data to specified address
phungductung 0:8ede47d38d10 53
phungductung 0:8ede47d38d10 54 @endverbatim
phungductung 0:8ede47d38d10 55 ******************************************************************************
phungductung 0:8ede47d38d10 56 * @attention
phungductung 0:8ede47d38d10 57 *
phungductung 0:8ede47d38d10 58 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:8ede47d38d10 59 *
phungductung 0:8ede47d38d10 60 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:8ede47d38d10 61 * are permitted provided that the following conditions are met:
phungductung 0:8ede47d38d10 62 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:8ede47d38d10 63 * this list of conditions and the following disclaimer.
phungductung 0:8ede47d38d10 64 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:8ede47d38d10 65 * this list of conditions and the following disclaimer in the documentation
phungductung 0:8ede47d38d10 66 * and/or other materials provided with the distribution.
phungductung 0:8ede47d38d10 67 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:8ede47d38d10 68 * may be used to endorse or promote products derived from this software
phungductung 0:8ede47d38d10 69 * without specific prior written permission.
phungductung 0:8ede47d38d10 70 *
phungductung 0:8ede47d38d10 71 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:8ede47d38d10 72 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:8ede47d38d10 73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:8ede47d38d10 74 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:8ede47d38d10 75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:8ede47d38d10 76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:8ede47d38d10 77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:8ede47d38d10 78 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:8ede47d38d10 79 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:8ede47d38d10 80 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:8ede47d38d10 81 *
phungductung 0:8ede47d38d10 82 ******************************************************************************
phungductung 0:8ede47d38d10 83 */
phungductung 0:8ede47d38d10 84
phungductung 0:8ede47d38d10 85 /* Includes ------------------------------------------------------------------*/
phungductung 0:8ede47d38d10 86 #include "stm32f7xx_hal.h"
phungductung 0:8ede47d38d10 87
phungductung 0:8ede47d38d10 88 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:8ede47d38d10 89 * @{
phungductung 0:8ede47d38d10 90 */
phungductung 0:8ede47d38d10 91
phungductung 0:8ede47d38d10 92 /** @defgroup NOR NOR
phungductung 0:8ede47d38d10 93 * @brief NOR driver modules
phungductung 0:8ede47d38d10 94 * @{
phungductung 0:8ede47d38d10 95 */
phungductung 0:8ede47d38d10 96 #ifdef HAL_NOR_MODULE_ENABLED
phungductung 0:8ede47d38d10 97
phungductung 0:8ede47d38d10 98 /* Private typedef -----------------------------------------------------------*/
phungductung 0:8ede47d38d10 99 /* Private define ------------------------------------------------------------*/
phungductung 0:8ede47d38d10 100
phungductung 0:8ede47d38d10 101 /** @defgroup NOR_Private_Defines NOR Private Defines
phungductung 0:8ede47d38d10 102 * @{
phungductung 0:8ede47d38d10 103 */
phungductung 0:8ede47d38d10 104
phungductung 0:8ede47d38d10 105 /* Constants to define address to set to write a command */
phungductung 0:8ede47d38d10 106 #define NOR_CMD_ADDRESS_FIRST (uint16_t)0x0555
phungductung 0:8ede47d38d10 107 #define NOR_CMD_ADDRESS_FIRST_CFI (uint16_t)0x0055
phungductung 0:8ede47d38d10 108 #define NOR_CMD_ADDRESS_SECOND (uint16_t)0x02AA
phungductung 0:8ede47d38d10 109 #define NOR_CMD_ADDRESS_THIRD (uint16_t)0x0555
phungductung 0:8ede47d38d10 110 #define NOR_CMD_ADDRESS_FOURTH (uint16_t)0x0555
phungductung 0:8ede47d38d10 111 #define NOR_CMD_ADDRESS_FIFTH (uint16_t)0x02AA
phungductung 0:8ede47d38d10 112 #define NOR_CMD_ADDRESS_SIXTH (uint16_t)0x0555
phungductung 0:8ede47d38d10 113
phungductung 0:8ede47d38d10 114 /* Constants to define data to program a command */
phungductung 0:8ede47d38d10 115 #define NOR_CMD_DATA_READ_RESET (uint16_t)0x00F0
phungductung 0:8ede47d38d10 116 #define NOR_CMD_DATA_FIRST (uint16_t)0x00AA
phungductung 0:8ede47d38d10 117 #define NOR_CMD_DATA_SECOND (uint16_t)0x0055
phungductung 0:8ede47d38d10 118 #define NOR_CMD_DATA_AUTO_SELECT (uint16_t)0x0090
phungductung 0:8ede47d38d10 119 #define NOR_CMD_DATA_PROGRAM (uint16_t)0x00A0
phungductung 0:8ede47d38d10 120 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD (uint16_t)0x0080
phungductung 0:8ede47d38d10 121 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH (uint16_t)0x00AA
phungductung 0:8ede47d38d10 122 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH (uint16_t)0x0055
phungductung 0:8ede47d38d10 123 #define NOR_CMD_DATA_CHIP_ERASE (uint16_t)0x0010
phungductung 0:8ede47d38d10 124 #define NOR_CMD_DATA_CFI (uint16_t)0x0098
phungductung 0:8ede47d38d10 125
phungductung 0:8ede47d38d10 126 #define NOR_CMD_DATA_BUFFER_AND_PROG (uint8_t)0x25
phungductung 0:8ede47d38d10 127 #define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM (uint8_t)0x29
phungductung 0:8ede47d38d10 128 #define NOR_CMD_DATA_BLOCK_ERASE (uint8_t)0x30
phungductung 0:8ede47d38d10 129
phungductung 0:8ede47d38d10 130 /* Mask on NOR STATUS REGISTER */
phungductung 0:8ede47d38d10 131 #define NOR_MASK_STATUS_DQ5 (uint16_t)0x0020
phungductung 0:8ede47d38d10 132 #define NOR_MASK_STATUS_DQ6 (uint16_t)0x0040
phungductung 0:8ede47d38d10 133
phungductung 0:8ede47d38d10 134 /**
phungductung 0:8ede47d38d10 135 * @}
phungductung 0:8ede47d38d10 136 */
phungductung 0:8ede47d38d10 137
phungductung 0:8ede47d38d10 138 /* Private macro -------------------------------------------------------------*/
phungductung 0:8ede47d38d10 139 /* Private variables ---------------------------------------------------------*/
phungductung 0:8ede47d38d10 140 /* Private functions ---------------------------------------------------------*/
phungductung 0:8ede47d38d10 141 /* Exported functions --------------------------------------------------------*/
phungductung 0:8ede47d38d10 142 /** @defgroup NOR_Exported_Functions NOR Exported Functions
phungductung 0:8ede47d38d10 143 * @{
phungductung 0:8ede47d38d10 144 */
phungductung 0:8ede47d38d10 145
phungductung 0:8ede47d38d10 146 /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
phungductung 0:8ede47d38d10 147 * @brief Initialization and Configuration functions
phungductung 0:8ede47d38d10 148 *
phungductung 0:8ede47d38d10 149 @verbatim
phungductung 0:8ede47d38d10 150 ==============================================================================
phungductung 0:8ede47d38d10 151 ##### NOR Initialization and de_initialization functions #####
phungductung 0:8ede47d38d10 152 ==============================================================================
phungductung 0:8ede47d38d10 153 [..]
phungductung 0:8ede47d38d10 154 This section provides functions allowing to initialize/de-initialize
phungductung 0:8ede47d38d10 155 the NOR memory
phungductung 0:8ede47d38d10 156
phungductung 0:8ede47d38d10 157 @endverbatim
phungductung 0:8ede47d38d10 158 * @{
phungductung 0:8ede47d38d10 159 */
phungductung 0:8ede47d38d10 160
phungductung 0:8ede47d38d10 161 /**
phungductung 0:8ede47d38d10 162 * @brief Perform the NOR memory Initialization sequence
phungductung 0:8ede47d38d10 163 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 164 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 165 * @param Timing: pointer to NOR control timing structure
phungductung 0:8ede47d38d10 166 * @param ExtTiming: pointer to NOR extended mode timing structure
phungductung 0:8ede47d38d10 167 * @retval HAL status
phungductung 0:8ede47d38d10 168 */
phungductung 0:8ede47d38d10 169 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
phungductung 0:8ede47d38d10 170 {
phungductung 0:8ede47d38d10 171 /* Check the NOR handle parameter */
phungductung 0:8ede47d38d10 172 if(hnor == NULL)
phungductung 0:8ede47d38d10 173 {
phungductung 0:8ede47d38d10 174 return HAL_ERROR;
phungductung 0:8ede47d38d10 175 }
phungductung 0:8ede47d38d10 176
phungductung 0:8ede47d38d10 177 if(hnor->State == HAL_NOR_STATE_RESET)
phungductung 0:8ede47d38d10 178 {
phungductung 0:8ede47d38d10 179 /* Allocate lock resource and initialize it */
phungductung 0:8ede47d38d10 180 hnor->Lock = HAL_UNLOCKED;
phungductung 0:8ede47d38d10 181 /* Initialize the low level hardware (MSP) */
phungductung 0:8ede47d38d10 182 HAL_NOR_MspInit(hnor);
phungductung 0:8ede47d38d10 183 }
phungductung 0:8ede47d38d10 184
phungductung 0:8ede47d38d10 185 /* Initialize NOR control Interface */
phungductung 0:8ede47d38d10 186 FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
phungductung 0:8ede47d38d10 187
phungductung 0:8ede47d38d10 188 /* Initialize NOR timing Interface */
phungductung 0:8ede47d38d10 189 FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
phungductung 0:8ede47d38d10 190
phungductung 0:8ede47d38d10 191 /* Initialize NOR extended mode timing Interface */
phungductung 0:8ede47d38d10 192 FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
phungductung 0:8ede47d38d10 193
phungductung 0:8ede47d38d10 194 /* Enable the NORSRAM device */
phungductung 0:8ede47d38d10 195 __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
phungductung 0:8ede47d38d10 196
phungductung 0:8ede47d38d10 197 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 198 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 199
phungductung 0:8ede47d38d10 200 return HAL_OK;
phungductung 0:8ede47d38d10 201 }
phungductung 0:8ede47d38d10 202
phungductung 0:8ede47d38d10 203 /**
phungductung 0:8ede47d38d10 204 * @brief Perform NOR memory De-Initialization sequence
phungductung 0:8ede47d38d10 205 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 206 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 207 * @retval HAL status
phungductung 0:8ede47d38d10 208 */
phungductung 0:8ede47d38d10 209 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
phungductung 0:8ede47d38d10 210 {
phungductung 0:8ede47d38d10 211 /* De-Initialize the low level hardware (MSP) */
phungductung 0:8ede47d38d10 212 HAL_NOR_MspDeInit(hnor);
phungductung 0:8ede47d38d10 213
phungductung 0:8ede47d38d10 214 /* Configure the NOR registers with their reset values */
phungductung 0:8ede47d38d10 215 FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
phungductung 0:8ede47d38d10 216
phungductung 0:8ede47d38d10 217 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 218 hnor->State = HAL_NOR_STATE_RESET;
phungductung 0:8ede47d38d10 219
phungductung 0:8ede47d38d10 220 /* Release Lock */
phungductung 0:8ede47d38d10 221 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 222
phungductung 0:8ede47d38d10 223 return HAL_OK;
phungductung 0:8ede47d38d10 224 }
phungductung 0:8ede47d38d10 225
phungductung 0:8ede47d38d10 226 /**
phungductung 0:8ede47d38d10 227 * @brief NOR MSP Init
phungductung 0:8ede47d38d10 228 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 229 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 230 * @retval None
phungductung 0:8ede47d38d10 231 */
phungductung 0:8ede47d38d10 232 __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
phungductung 0:8ede47d38d10 233 {
phungductung 0:8ede47d38d10 234 /* Prevent unused argument(s) compilation warning */
phungductung 0:8ede47d38d10 235 UNUSED(hnor);
phungductung 0:8ede47d38d10 236
phungductung 0:8ede47d38d10 237 /* NOTE : This function Should not be modified, when the callback is needed,
phungductung 0:8ede47d38d10 238 the HAL_NOR_MspInit could be implemented in the user file
phungductung 0:8ede47d38d10 239 */
phungductung 0:8ede47d38d10 240 }
phungductung 0:8ede47d38d10 241
phungductung 0:8ede47d38d10 242 /**
phungductung 0:8ede47d38d10 243 * @brief NOR MSP DeInit
phungductung 0:8ede47d38d10 244 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 245 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 246 * @retval None
phungductung 0:8ede47d38d10 247 */
phungductung 0:8ede47d38d10 248 __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
phungductung 0:8ede47d38d10 249 {
phungductung 0:8ede47d38d10 250 /* Prevent unused argument(s) compilation warning */
phungductung 0:8ede47d38d10 251 UNUSED(hnor);
phungductung 0:8ede47d38d10 252
phungductung 0:8ede47d38d10 253 /* NOTE : This function Should not be modified, when the callback is needed,
phungductung 0:8ede47d38d10 254 the HAL_NOR_MspDeInit could be implemented in the user file
phungductung 0:8ede47d38d10 255 */
phungductung 0:8ede47d38d10 256 }
phungductung 0:8ede47d38d10 257
phungductung 0:8ede47d38d10 258 /**
phungductung 0:8ede47d38d10 259 * @brief NOR MSP Wait for Ready/Busy signal
phungductung 0:8ede47d38d10 260 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 261 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 262 * @param Timeout: Maximum timeout value
phungductung 0:8ede47d38d10 263 * @retval None
phungductung 0:8ede47d38d10 264 */
phungductung 0:8ede47d38d10 265 __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
phungductung 0:8ede47d38d10 266 {
phungductung 0:8ede47d38d10 267 /* Prevent unused argument(s) compilation warning */
phungductung 0:8ede47d38d10 268 UNUSED(hnor);
phungductung 0:8ede47d38d10 269 UNUSED(Timeout);
phungductung 0:8ede47d38d10 270
phungductung 0:8ede47d38d10 271 /* NOTE : This function Should not be modified, when the callback is needed,
phungductung 0:8ede47d38d10 272 the HAL_NOR_MspWait could be implemented in the user file
phungductung 0:8ede47d38d10 273 */
phungductung 0:8ede47d38d10 274 }
phungductung 0:8ede47d38d10 275
phungductung 0:8ede47d38d10 276 /**
phungductung 0:8ede47d38d10 277 * @}
phungductung 0:8ede47d38d10 278 */
phungductung 0:8ede47d38d10 279
phungductung 0:8ede47d38d10 280 /** @defgroup NOR_Exported_Functions_Group2 Input and Output functions
phungductung 0:8ede47d38d10 281 * @brief Input Output and memory control functions
phungductung 0:8ede47d38d10 282 *
phungductung 0:8ede47d38d10 283 @verbatim
phungductung 0:8ede47d38d10 284 ==============================================================================
phungductung 0:8ede47d38d10 285 ##### NOR Input and Output functions #####
phungductung 0:8ede47d38d10 286 ==============================================================================
phungductung 0:8ede47d38d10 287 [..]
phungductung 0:8ede47d38d10 288 This section provides functions allowing to use and control the NOR memory
phungductung 0:8ede47d38d10 289
phungductung 0:8ede47d38d10 290 @endverbatim
phungductung 0:8ede47d38d10 291 * @{
phungductung 0:8ede47d38d10 292 */
phungductung 0:8ede47d38d10 293
phungductung 0:8ede47d38d10 294 /**
phungductung 0:8ede47d38d10 295 * @brief Read NOR flash IDs
phungductung 0:8ede47d38d10 296 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 297 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 298 * @param pNOR_ID : pointer to NOR ID structure
phungductung 0:8ede47d38d10 299 * @retval HAL status
phungductung 0:8ede47d38d10 300 */
phungductung 0:8ede47d38d10 301 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
phungductung 0:8ede47d38d10 302 {
phungductung 0:8ede47d38d10 303 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 304
phungductung 0:8ede47d38d10 305 /* Process Locked */
phungductung 0:8ede47d38d10 306 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 307
phungductung 0:8ede47d38d10 308 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 309 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 310 {
phungductung 0:8ede47d38d10 311 return HAL_BUSY;
phungductung 0:8ede47d38d10 312 }
phungductung 0:8ede47d38d10 313
phungductung 0:8ede47d38d10 314 /* Select the NOR device address */
phungductung 0:8ede47d38d10 315 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 316 {
phungductung 0:8ede47d38d10 317 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 318 }
phungductung 0:8ede47d38d10 319 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 320 {
phungductung 0:8ede47d38d10 321 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 322 }
phungductung 0:8ede47d38d10 323 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 324 {
phungductung 0:8ede47d38d10 325 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 326 }
phungductung 0:8ede47d38d10 327 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 328 {
phungductung 0:8ede47d38d10 329 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 330 }
phungductung 0:8ede47d38d10 331
phungductung 0:8ede47d38d10 332 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 333 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 334
phungductung 0:8ede47d38d10 335 /* Send read ID command */
phungductung 0:8ede47d38d10 336 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
phungductung 0:8ede47d38d10 337 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
phungductung 0:8ede47d38d10 338 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
phungductung 0:8ede47d38d10 339
phungductung 0:8ede47d38d10 340 /* Read the NOR IDs */
phungductung 0:8ede47d38d10 341 pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, MC_ADDRESS);
phungductung 0:8ede47d38d10 342 pNOR_ID->Device_Code1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE1_ADDR);
phungductung 0:8ede47d38d10 343 pNOR_ID->Device_Code2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE2_ADDR);
phungductung 0:8ede47d38d10 344 pNOR_ID->Device_Code3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE3_ADDR);
phungductung 0:8ede47d38d10 345
phungductung 0:8ede47d38d10 346 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 347 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 348
phungductung 0:8ede47d38d10 349 /* Process unlocked */
phungductung 0:8ede47d38d10 350 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 351
phungductung 0:8ede47d38d10 352 return HAL_OK;
phungductung 0:8ede47d38d10 353 }
phungductung 0:8ede47d38d10 354
phungductung 0:8ede47d38d10 355 /**
phungductung 0:8ede47d38d10 356 * @brief Returns the NOR memory to Read mode.
phungductung 0:8ede47d38d10 357 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 358 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 359 * @retval HAL status
phungductung 0:8ede47d38d10 360 */
phungductung 0:8ede47d38d10 361 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
phungductung 0:8ede47d38d10 362 {
phungductung 0:8ede47d38d10 363 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 364
phungductung 0:8ede47d38d10 365 /* Process Locked */
phungductung 0:8ede47d38d10 366 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 367
phungductung 0:8ede47d38d10 368 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 369 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 370 {
phungductung 0:8ede47d38d10 371 return HAL_BUSY;
phungductung 0:8ede47d38d10 372 }
phungductung 0:8ede47d38d10 373
phungductung 0:8ede47d38d10 374 /* Select the NOR device address */
phungductung 0:8ede47d38d10 375 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 376 {
phungductung 0:8ede47d38d10 377 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 378 }
phungductung 0:8ede47d38d10 379 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 380 {
phungductung 0:8ede47d38d10 381 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 382 }
phungductung 0:8ede47d38d10 383 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 384 {
phungductung 0:8ede47d38d10 385 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 386 }
phungductung 0:8ede47d38d10 387 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 388 {
phungductung 0:8ede47d38d10 389 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 390 }
phungductung 0:8ede47d38d10 391
phungductung 0:8ede47d38d10 392 NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);
phungductung 0:8ede47d38d10 393
phungductung 0:8ede47d38d10 394 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 395 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 396
phungductung 0:8ede47d38d10 397 /* Process unlocked */
phungductung 0:8ede47d38d10 398 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 399
phungductung 0:8ede47d38d10 400 return HAL_OK;
phungductung 0:8ede47d38d10 401 }
phungductung 0:8ede47d38d10 402
phungductung 0:8ede47d38d10 403 /**
phungductung 0:8ede47d38d10 404 * @brief Read data from NOR memory
phungductung 0:8ede47d38d10 405 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 406 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 407 * @param pAddress: pointer to Device address
phungductung 0:8ede47d38d10 408 * @param pData : pointer to read data
phungductung 0:8ede47d38d10 409 * @retval HAL status
phungductung 0:8ede47d38d10 410 */
phungductung 0:8ede47d38d10 411 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
phungductung 0:8ede47d38d10 412 {
phungductung 0:8ede47d38d10 413 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 414
phungductung 0:8ede47d38d10 415 /* Process Locked */
phungductung 0:8ede47d38d10 416 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 417
phungductung 0:8ede47d38d10 418 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 419 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 420 {
phungductung 0:8ede47d38d10 421 return HAL_BUSY;
phungductung 0:8ede47d38d10 422 }
phungductung 0:8ede47d38d10 423
phungductung 0:8ede47d38d10 424 /* Select the NOR device address */
phungductung 0:8ede47d38d10 425 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 426 {
phungductung 0:8ede47d38d10 427 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 428 }
phungductung 0:8ede47d38d10 429 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 430 {
phungductung 0:8ede47d38d10 431 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 432 }
phungductung 0:8ede47d38d10 433 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 434 {
phungductung 0:8ede47d38d10 435 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 436 }
phungductung 0:8ede47d38d10 437 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 438 {
phungductung 0:8ede47d38d10 439 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 440 }
phungductung 0:8ede47d38d10 441
phungductung 0:8ede47d38d10 442 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 443 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 444
phungductung 0:8ede47d38d10 445 /* Send read data command */
phungductung 0:8ede47d38d10 446 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
phungductung 0:8ede47d38d10 447 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
phungductung 0:8ede47d38d10 448 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
phungductung 0:8ede47d38d10 449
phungductung 0:8ede47d38d10 450 /* Read the data */
phungductung 0:8ede47d38d10 451 *pData = *(__IO uint32_t *)(uint32_t)pAddress;
phungductung 0:8ede47d38d10 452
phungductung 0:8ede47d38d10 453 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 454 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 455
phungductung 0:8ede47d38d10 456 /* Process unlocked */
phungductung 0:8ede47d38d10 457 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 458
phungductung 0:8ede47d38d10 459 return HAL_OK;
phungductung 0:8ede47d38d10 460 }
phungductung 0:8ede47d38d10 461
phungductung 0:8ede47d38d10 462 /**
phungductung 0:8ede47d38d10 463 * @brief Program data to NOR memory
phungductung 0:8ede47d38d10 464 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 465 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 466 * @param pAddress: Device address
phungductung 0:8ede47d38d10 467 * @param pData : pointer to the data to write
phungductung 0:8ede47d38d10 468 * @retval HAL status
phungductung 0:8ede47d38d10 469 */
phungductung 0:8ede47d38d10 470 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
phungductung 0:8ede47d38d10 471 {
phungductung 0:8ede47d38d10 472 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 473
phungductung 0:8ede47d38d10 474 /* Process Locked */
phungductung 0:8ede47d38d10 475 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 476
phungductung 0:8ede47d38d10 477 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 478 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 479 {
phungductung 0:8ede47d38d10 480 return HAL_BUSY;
phungductung 0:8ede47d38d10 481 }
phungductung 0:8ede47d38d10 482
phungductung 0:8ede47d38d10 483 /* Select the NOR device address */
phungductung 0:8ede47d38d10 484 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 485 {
phungductung 0:8ede47d38d10 486 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 487 }
phungductung 0:8ede47d38d10 488 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 489 {
phungductung 0:8ede47d38d10 490 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 491 }
phungductung 0:8ede47d38d10 492 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 493 {
phungductung 0:8ede47d38d10 494 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 495 }
phungductung 0:8ede47d38d10 496 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 497 {
phungductung 0:8ede47d38d10 498 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 499 }
phungductung 0:8ede47d38d10 500
phungductung 0:8ede47d38d10 501 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 502 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 503
phungductung 0:8ede47d38d10 504 /* Send program data command */
phungductung 0:8ede47d38d10 505 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
phungductung 0:8ede47d38d10 506 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
phungductung 0:8ede47d38d10 507 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
phungductung 0:8ede47d38d10 508
phungductung 0:8ede47d38d10 509 /* Write the data */
phungductung 0:8ede47d38d10 510 NOR_WRITE(pAddress, *pData);
phungductung 0:8ede47d38d10 511
phungductung 0:8ede47d38d10 512 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 513 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 514
phungductung 0:8ede47d38d10 515 /* Process unlocked */
phungductung 0:8ede47d38d10 516 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 517
phungductung 0:8ede47d38d10 518 return HAL_OK;
phungductung 0:8ede47d38d10 519 }
phungductung 0:8ede47d38d10 520
phungductung 0:8ede47d38d10 521 /**
phungductung 0:8ede47d38d10 522 * @brief Reads a half-word buffer from the NOR memory.
phungductung 0:8ede47d38d10 523 * @param hnor: pointer to the NOR handle
phungductung 0:8ede47d38d10 524 * @param uwAddress: NOR memory internal address to read from.
phungductung 0:8ede47d38d10 525 * @param pData: pointer to the buffer that receives the data read from the
phungductung 0:8ede47d38d10 526 * NOR memory.
phungductung 0:8ede47d38d10 527 * @param uwBufferSize : number of Half word to read.
phungductung 0:8ede47d38d10 528 * @retval HAL status
phungductung 0:8ede47d38d10 529 */
phungductung 0:8ede47d38d10 530 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
phungductung 0:8ede47d38d10 531 {
phungductung 0:8ede47d38d10 532 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 533
phungductung 0:8ede47d38d10 534 /* Process Locked */
phungductung 0:8ede47d38d10 535 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 536
phungductung 0:8ede47d38d10 537 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 538 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 539 {
phungductung 0:8ede47d38d10 540 return HAL_BUSY;
phungductung 0:8ede47d38d10 541 }
phungductung 0:8ede47d38d10 542
phungductung 0:8ede47d38d10 543 /* Select the NOR device address */
phungductung 0:8ede47d38d10 544 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 545 {
phungductung 0:8ede47d38d10 546 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 547 }
phungductung 0:8ede47d38d10 548 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 549 {
phungductung 0:8ede47d38d10 550 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 551 }
phungductung 0:8ede47d38d10 552 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 553 {
phungductung 0:8ede47d38d10 554 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 555 }
phungductung 0:8ede47d38d10 556 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 557 {
phungductung 0:8ede47d38d10 558 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 559 }
phungductung 0:8ede47d38d10 560
phungductung 0:8ede47d38d10 561 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 562 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 563
phungductung 0:8ede47d38d10 564 /* Send read data command */
phungductung 0:8ede47d38d10 565 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
phungductung 0:8ede47d38d10 566 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
phungductung 0:8ede47d38d10 567 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
phungductung 0:8ede47d38d10 568
phungductung 0:8ede47d38d10 569 /* Read buffer */
phungductung 0:8ede47d38d10 570 while( uwBufferSize > 0)
phungductung 0:8ede47d38d10 571 {
phungductung 0:8ede47d38d10 572 *pData++ = *(__IO uint16_t *)uwAddress;
phungductung 0:8ede47d38d10 573 uwAddress += 2;
phungductung 0:8ede47d38d10 574 uwBufferSize--;
phungductung 0:8ede47d38d10 575 }
phungductung 0:8ede47d38d10 576
phungductung 0:8ede47d38d10 577 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 578 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 579
phungductung 0:8ede47d38d10 580 /* Process unlocked */
phungductung 0:8ede47d38d10 581 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 582
phungductung 0:8ede47d38d10 583 return HAL_OK;
phungductung 0:8ede47d38d10 584 }
phungductung 0:8ede47d38d10 585
phungductung 0:8ede47d38d10 586 /**
phungductung 0:8ede47d38d10 587 * @brief Writes a half-word buffer to the NOR memory. This function must be used
phungductung 0:8ede47d38d10 588 only with S29GL128P NOR memory.
phungductung 0:8ede47d38d10 589 * @param hnor: pointer to the NOR handle
phungductung 0:8ede47d38d10 590 * @param uwAddress: NOR memory internal start write address
phungductung 0:8ede47d38d10 591 * @param pData: pointer to source data buffer.
phungductung 0:8ede47d38d10 592 * @param uwBufferSize: Size of the buffer to write
phungductung 0:8ede47d38d10 593 * @retval HAL status
phungductung 0:8ede47d38d10 594 */
phungductung 0:8ede47d38d10 595 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
phungductung 0:8ede47d38d10 596 {
phungductung 0:8ede47d38d10 597 uint16_t * p_currentaddress = (uint16_t *)NULL;
phungductung 0:8ede47d38d10 598 uint16_t * p_endaddress = (uint16_t *)NULL;
phungductung 0:8ede47d38d10 599 uint32_t lastloadedaddress = 0, deviceaddress = 0;
phungductung 0:8ede47d38d10 600
phungductung 0:8ede47d38d10 601 /* Process Locked */
phungductung 0:8ede47d38d10 602 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 603
phungductung 0:8ede47d38d10 604 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 605 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 606 {
phungductung 0:8ede47d38d10 607 return HAL_BUSY;
phungductung 0:8ede47d38d10 608 }
phungductung 0:8ede47d38d10 609
phungductung 0:8ede47d38d10 610 /* Select the NOR device address */
phungductung 0:8ede47d38d10 611 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 612 {
phungductung 0:8ede47d38d10 613 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 614 }
phungductung 0:8ede47d38d10 615 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 616 {
phungductung 0:8ede47d38d10 617 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 618 }
phungductung 0:8ede47d38d10 619 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 620 {
phungductung 0:8ede47d38d10 621 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 622 }
phungductung 0:8ede47d38d10 623 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 624 {
phungductung 0:8ede47d38d10 625 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 626 }
phungductung 0:8ede47d38d10 627
phungductung 0:8ede47d38d10 628 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 629 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 630
phungductung 0:8ede47d38d10 631 /* Initialize variables */
phungductung 0:8ede47d38d10 632 p_currentaddress = (uint16_t*)((uint32_t)(uwAddress));
phungductung 0:8ede47d38d10 633 p_endaddress = p_currentaddress + (uwBufferSize-1);
phungductung 0:8ede47d38d10 634 lastloadedaddress = (uint32_t)(uwAddress);
phungductung 0:8ede47d38d10 635
phungductung 0:8ede47d38d10 636 /* Issue unlock command sequence */
phungductung 0:8ede47d38d10 637 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
phungductung 0:8ede47d38d10 638 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
phungductung 0:8ede47d38d10 639
phungductung 0:8ede47d38d10 640 /* Write Buffer Load Command */
phungductung 0:8ede47d38d10 641 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
phungductung 0:8ede47d38d10 642 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, uwAddress), (uwBufferSize - 1));
phungductung 0:8ede47d38d10 643
phungductung 0:8ede47d38d10 644 /* Load Data into NOR Buffer */
phungductung 0:8ede47d38d10 645 while(p_currentaddress <= p_endaddress)
phungductung 0:8ede47d38d10 646 {
phungductung 0:8ede47d38d10 647 /* Store last loaded address & data value (for polling) */
phungductung 0:8ede47d38d10 648 lastloadedaddress = (uint32_t)p_currentaddress;
phungductung 0:8ede47d38d10 649
phungductung 0:8ede47d38d10 650 NOR_WRITE(p_currentaddress, *pData++);
phungductung 0:8ede47d38d10 651
phungductung 0:8ede47d38d10 652 p_currentaddress ++;
phungductung 0:8ede47d38d10 653 }
phungductung 0:8ede47d38d10 654
phungductung 0:8ede47d38d10 655 NOR_WRITE((uint32_t)(lastloadedaddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM);
phungductung 0:8ede47d38d10 656
phungductung 0:8ede47d38d10 657 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 658 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 659
phungductung 0:8ede47d38d10 660 /* Process unlocked */
phungductung 0:8ede47d38d10 661 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 662
phungductung 0:8ede47d38d10 663 return HAL_OK;
phungductung 0:8ede47d38d10 664
phungductung 0:8ede47d38d10 665 }
phungductung 0:8ede47d38d10 666
phungductung 0:8ede47d38d10 667 /**
phungductung 0:8ede47d38d10 668 * @brief Erase the specified block of the NOR memory
phungductung 0:8ede47d38d10 669 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 670 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 671 * @param BlockAddress : Block to erase address
phungductung 0:8ede47d38d10 672 * @param Address: Device address
phungductung 0:8ede47d38d10 673 * @retval HAL status
phungductung 0:8ede47d38d10 674 */
phungductung 0:8ede47d38d10 675 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
phungductung 0:8ede47d38d10 676 {
phungductung 0:8ede47d38d10 677 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 678
phungductung 0:8ede47d38d10 679 /* Process Locked */
phungductung 0:8ede47d38d10 680 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 681
phungductung 0:8ede47d38d10 682 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 683 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 684 {
phungductung 0:8ede47d38d10 685 return HAL_BUSY;
phungductung 0:8ede47d38d10 686 }
phungductung 0:8ede47d38d10 687
phungductung 0:8ede47d38d10 688 /* Select the NOR device address */
phungductung 0:8ede47d38d10 689 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 690 {
phungductung 0:8ede47d38d10 691 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 692 }
phungductung 0:8ede47d38d10 693 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 694 {
phungductung 0:8ede47d38d10 695 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 696 }
phungductung 0:8ede47d38d10 697 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 698 {
phungductung 0:8ede47d38d10 699 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 700 }
phungductung 0:8ede47d38d10 701 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 702 {
phungductung 0:8ede47d38d10 703 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 704 }
phungductung 0:8ede47d38d10 705
phungductung 0:8ede47d38d10 706 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 707 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 708
phungductung 0:8ede47d38d10 709 /* Send block erase command sequence */
phungductung 0:8ede47d38d10 710 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
phungductung 0:8ede47d38d10 711 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
phungductung 0:8ede47d38d10 712 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
phungductung 0:8ede47d38d10 713 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
phungductung 0:8ede47d38d10 714 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
phungductung 0:8ede47d38d10 715 NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
phungductung 0:8ede47d38d10 716
phungductung 0:8ede47d38d10 717 /* Check the NOR memory status and update the controller state */
phungductung 0:8ede47d38d10 718 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 719
phungductung 0:8ede47d38d10 720 /* Process unlocked */
phungductung 0:8ede47d38d10 721 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 722
phungductung 0:8ede47d38d10 723 return HAL_OK;
phungductung 0:8ede47d38d10 724
phungductung 0:8ede47d38d10 725 }
phungductung 0:8ede47d38d10 726
phungductung 0:8ede47d38d10 727 /**
phungductung 0:8ede47d38d10 728 * @brief Erase the entire NOR chip.
phungductung 0:8ede47d38d10 729 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 730 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 731 * @param Address : Device address
phungductung 0:8ede47d38d10 732 * @retval HAL status
phungductung 0:8ede47d38d10 733 */
phungductung 0:8ede47d38d10 734 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
phungductung 0:8ede47d38d10 735 {
phungductung 0:8ede47d38d10 736 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 737
phungductung 0:8ede47d38d10 738 /* Process Locked */
phungductung 0:8ede47d38d10 739 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 740
phungductung 0:8ede47d38d10 741 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 742 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 743 {
phungductung 0:8ede47d38d10 744 return HAL_BUSY;
phungductung 0:8ede47d38d10 745 }
phungductung 0:8ede47d38d10 746
phungductung 0:8ede47d38d10 747 /* Select the NOR device address */
phungductung 0:8ede47d38d10 748 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 749 {
phungductung 0:8ede47d38d10 750 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 751 }
phungductung 0:8ede47d38d10 752 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 753 {
phungductung 0:8ede47d38d10 754 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 755 }
phungductung 0:8ede47d38d10 756 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 757 {
phungductung 0:8ede47d38d10 758 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 759 }
phungductung 0:8ede47d38d10 760 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 761 {
phungductung 0:8ede47d38d10 762 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 763 }
phungductung 0:8ede47d38d10 764
phungductung 0:8ede47d38d10 765 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 766 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 767
phungductung 0:8ede47d38d10 768 /* Send NOR chip erase command sequence */
phungductung 0:8ede47d38d10 769 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
phungductung 0:8ede47d38d10 770 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
phungductung 0:8ede47d38d10 771 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
phungductung 0:8ede47d38d10 772 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
phungductung 0:8ede47d38d10 773 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
phungductung 0:8ede47d38d10 774 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
phungductung 0:8ede47d38d10 775
phungductung 0:8ede47d38d10 776 /* Check the NOR memory status and update the controller state */
phungductung 0:8ede47d38d10 777 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 778
phungductung 0:8ede47d38d10 779 /* Process unlocked */
phungductung 0:8ede47d38d10 780 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 781
phungductung 0:8ede47d38d10 782 return HAL_OK;
phungductung 0:8ede47d38d10 783 }
phungductung 0:8ede47d38d10 784
phungductung 0:8ede47d38d10 785 /**
phungductung 0:8ede47d38d10 786 * @brief Read NOR flash CFI IDs
phungductung 0:8ede47d38d10 787 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 788 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 789 * @param pNOR_CFI : pointer to NOR CFI IDs structure
phungductung 0:8ede47d38d10 790 * @retval HAL status
phungductung 0:8ede47d38d10 791 */
phungductung 0:8ede47d38d10 792 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
phungductung 0:8ede47d38d10 793 {
phungductung 0:8ede47d38d10 794 uint32_t deviceaddress = 0;
phungductung 0:8ede47d38d10 795
phungductung 0:8ede47d38d10 796 /* Process Locked */
phungductung 0:8ede47d38d10 797 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 798
phungductung 0:8ede47d38d10 799 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 800 if(hnor->State == HAL_NOR_STATE_BUSY)
phungductung 0:8ede47d38d10 801 {
phungductung 0:8ede47d38d10 802 return HAL_BUSY;
phungductung 0:8ede47d38d10 803 }
phungductung 0:8ede47d38d10 804
phungductung 0:8ede47d38d10 805 /* Select the NOR device address */
phungductung 0:8ede47d38d10 806 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
phungductung 0:8ede47d38d10 807 {
phungductung 0:8ede47d38d10 808 deviceaddress = NOR_MEMORY_ADRESS1;
phungductung 0:8ede47d38d10 809 }
phungductung 0:8ede47d38d10 810 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
phungductung 0:8ede47d38d10 811 {
phungductung 0:8ede47d38d10 812 deviceaddress = NOR_MEMORY_ADRESS2;
phungductung 0:8ede47d38d10 813 }
phungductung 0:8ede47d38d10 814 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
phungductung 0:8ede47d38d10 815 {
phungductung 0:8ede47d38d10 816 deviceaddress = NOR_MEMORY_ADRESS3;
phungductung 0:8ede47d38d10 817 }
phungductung 0:8ede47d38d10 818 else /* FMC_NORSRAM_BANK4 */
phungductung 0:8ede47d38d10 819 {
phungductung 0:8ede47d38d10 820 deviceaddress = NOR_MEMORY_ADRESS4;
phungductung 0:8ede47d38d10 821 }
phungductung 0:8ede47d38d10 822
phungductung 0:8ede47d38d10 823 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 824 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 825
phungductung 0:8ede47d38d10 826 /* Send read CFI query command */
phungductung 0:8ede47d38d10 827 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
phungductung 0:8ede47d38d10 828
phungductung 0:8ede47d38d10 829 /* read the NOR CFI information */
phungductung 0:8ede47d38d10 830 pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI1_ADDRESS);
phungductung 0:8ede47d38d10 831 pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI2_ADDRESS);
phungductung 0:8ede47d38d10 832 pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI3_ADDRESS);
phungductung 0:8ede47d38d10 833 pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI4_ADDRESS);
phungductung 0:8ede47d38d10 834
phungductung 0:8ede47d38d10 835 /* Check the NOR controller state */
phungductung 0:8ede47d38d10 836 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 837
phungductung 0:8ede47d38d10 838 /* Process unlocked */
phungductung 0:8ede47d38d10 839 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 840
phungductung 0:8ede47d38d10 841 return HAL_OK;
phungductung 0:8ede47d38d10 842 }
phungductung 0:8ede47d38d10 843
phungductung 0:8ede47d38d10 844 /**
phungductung 0:8ede47d38d10 845 * @}
phungductung 0:8ede47d38d10 846 */
phungductung 0:8ede47d38d10 847
phungductung 0:8ede47d38d10 848 /** @defgroup NOR_Exported_Functions_Group3 NOR Control functions
phungductung 0:8ede47d38d10 849 * @brief management functions
phungductung 0:8ede47d38d10 850 *
phungductung 0:8ede47d38d10 851 @verbatim
phungductung 0:8ede47d38d10 852 ==============================================================================
phungductung 0:8ede47d38d10 853 ##### NOR Control functions #####
phungductung 0:8ede47d38d10 854 ==============================================================================
phungductung 0:8ede47d38d10 855 [..]
phungductung 0:8ede47d38d10 856 This subsection provides a set of functions allowing to control dynamically
phungductung 0:8ede47d38d10 857 the NOR interface.
phungductung 0:8ede47d38d10 858
phungductung 0:8ede47d38d10 859 @endverbatim
phungductung 0:8ede47d38d10 860 * @{
phungductung 0:8ede47d38d10 861 */
phungductung 0:8ede47d38d10 862
phungductung 0:8ede47d38d10 863 /**
phungductung 0:8ede47d38d10 864 * @brief Enables dynamically NOR write operation.
phungductung 0:8ede47d38d10 865 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 866 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 867 * @retval HAL status
phungductung 0:8ede47d38d10 868 */
phungductung 0:8ede47d38d10 869 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
phungductung 0:8ede47d38d10 870 {
phungductung 0:8ede47d38d10 871 /* Process Locked */
phungductung 0:8ede47d38d10 872 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 873
phungductung 0:8ede47d38d10 874 /* Enable write operation */
phungductung 0:8ede47d38d10 875 FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank);
phungductung 0:8ede47d38d10 876
phungductung 0:8ede47d38d10 877 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 878 hnor->State = HAL_NOR_STATE_READY;
phungductung 0:8ede47d38d10 879
phungductung 0:8ede47d38d10 880 /* Process unlocked */
phungductung 0:8ede47d38d10 881 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 882
phungductung 0:8ede47d38d10 883 return HAL_OK;
phungductung 0:8ede47d38d10 884 }
phungductung 0:8ede47d38d10 885
phungductung 0:8ede47d38d10 886 /**
phungductung 0:8ede47d38d10 887 * @brief Disables dynamically NOR write operation.
phungductung 0:8ede47d38d10 888 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 889 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 890 * @retval HAL status
phungductung 0:8ede47d38d10 891 */
phungductung 0:8ede47d38d10 892 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
phungductung 0:8ede47d38d10 893 {
phungductung 0:8ede47d38d10 894 /* Process Locked */
phungductung 0:8ede47d38d10 895 __HAL_LOCK(hnor);
phungductung 0:8ede47d38d10 896
phungductung 0:8ede47d38d10 897 /* Update the SRAM controller state */
phungductung 0:8ede47d38d10 898 hnor->State = HAL_NOR_STATE_BUSY;
phungductung 0:8ede47d38d10 899
phungductung 0:8ede47d38d10 900 /* Disable write operation */
phungductung 0:8ede47d38d10 901 FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
phungductung 0:8ede47d38d10 902
phungductung 0:8ede47d38d10 903 /* Update the NOR controller state */
phungductung 0:8ede47d38d10 904 hnor->State = HAL_NOR_STATE_PROTECTED;
phungductung 0:8ede47d38d10 905
phungductung 0:8ede47d38d10 906 /* Process unlocked */
phungductung 0:8ede47d38d10 907 __HAL_UNLOCK(hnor);
phungductung 0:8ede47d38d10 908
phungductung 0:8ede47d38d10 909 return HAL_OK;
phungductung 0:8ede47d38d10 910 }
phungductung 0:8ede47d38d10 911
phungductung 0:8ede47d38d10 912 /**
phungductung 0:8ede47d38d10 913 * @}
phungductung 0:8ede47d38d10 914 */
phungductung 0:8ede47d38d10 915
phungductung 0:8ede47d38d10 916 /** @defgroup NOR_Exported_Functions_Group4 NOR State functions
phungductung 0:8ede47d38d10 917 * @brief Peripheral State functions
phungductung 0:8ede47d38d10 918 *
phungductung 0:8ede47d38d10 919 @verbatim
phungductung 0:8ede47d38d10 920 ==============================================================================
phungductung 0:8ede47d38d10 921 ##### NOR State functions #####
phungductung 0:8ede47d38d10 922 ==============================================================================
phungductung 0:8ede47d38d10 923 [..]
phungductung 0:8ede47d38d10 924 This subsection permits to get in run-time the status of the NOR controller
phungductung 0:8ede47d38d10 925 and the data flow.
phungductung 0:8ede47d38d10 926
phungductung 0:8ede47d38d10 927 @endverbatim
phungductung 0:8ede47d38d10 928 * @{
phungductung 0:8ede47d38d10 929 */
phungductung 0:8ede47d38d10 930
phungductung 0:8ede47d38d10 931 /**
phungductung 0:8ede47d38d10 932 * @brief return the NOR controller state
phungductung 0:8ede47d38d10 933 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 934 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 935 * @retval NOR controller state
phungductung 0:8ede47d38d10 936 */
phungductung 0:8ede47d38d10 937 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
phungductung 0:8ede47d38d10 938 {
phungductung 0:8ede47d38d10 939 return hnor->State;
phungductung 0:8ede47d38d10 940 }
phungductung 0:8ede47d38d10 941
phungductung 0:8ede47d38d10 942 /**
phungductung 0:8ede47d38d10 943 * @brief Returns the NOR operation status.
phungductung 0:8ede47d38d10 944 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 945 * the configuration information for NOR module.
phungductung 0:8ede47d38d10 946 * @param Address: Device address
phungductung 0:8ede47d38d10 947 * @param Timeout: NOR programming Timeout
phungductung 0:8ede47d38d10 948 * @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
phungductung 0:8ede47d38d10 949 * or HAL_NOR_STATUS_TIMEOUT
phungductung 0:8ede47d38d10 950 */
phungductung 0:8ede47d38d10 951 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout)
phungductung 0:8ede47d38d10 952 {
phungductung 0:8ede47d38d10 953 HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING;
phungductung 0:8ede47d38d10 954 uint16_t tmpSR1 = 0, tmpSR2 = 0;
phungductung 0:8ede47d38d10 955 uint32_t tickstart = 0;
phungductung 0:8ede47d38d10 956
phungductung 0:8ede47d38d10 957 /* Poll on NOR memory Ready/Busy signal ------------------------------------*/
phungductung 0:8ede47d38d10 958 HAL_NOR_MspWait(hnor, Timeout);
phungductung 0:8ede47d38d10 959
phungductung 0:8ede47d38d10 960 /* Get the NOR memory operation status -------------------------------------*/
phungductung 0:8ede47d38d10 961
phungductung 0:8ede47d38d10 962 /* Get tick */
phungductung 0:8ede47d38d10 963 tickstart = HAL_GetTick();
phungductung 0:8ede47d38d10 964 while((status != HAL_NOR_STATUS_SUCCESS ) && (status != HAL_NOR_STATUS_TIMEOUT))
phungductung 0:8ede47d38d10 965 {
phungductung 0:8ede47d38d10 966 /* Check for the Timeout */
phungductung 0:8ede47d38d10 967 if(Timeout != HAL_MAX_DELAY)
phungductung 0:8ede47d38d10 968 {
phungductung 0:8ede47d38d10 969 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
phungductung 0:8ede47d38d10 970 {
phungductung 0:8ede47d38d10 971 status = HAL_NOR_STATUS_TIMEOUT;
phungductung 0:8ede47d38d10 972 }
phungductung 0:8ede47d38d10 973 }
phungductung 0:8ede47d38d10 974
phungductung 0:8ede47d38d10 975 /* Read NOR status register (DQ6 and DQ5) */
phungductung 0:8ede47d38d10 976 tmpSR1 = *(__IO uint16_t *)Address;
phungductung 0:8ede47d38d10 977 tmpSR2 = *(__IO uint16_t *)Address;
phungductung 0:8ede47d38d10 978
phungductung 0:8ede47d38d10 979 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
phungductung 0:8ede47d38d10 980 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
phungductung 0:8ede47d38d10 981 {
phungductung 0:8ede47d38d10 982 return HAL_NOR_STATUS_SUCCESS ;
phungductung 0:8ede47d38d10 983 }
phungductung 0:8ede47d38d10 984
phungductung 0:8ede47d38d10 985 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
phungductung 0:8ede47d38d10 986 {
phungductung 0:8ede47d38d10 987 status = HAL_NOR_STATUS_ONGOING;
phungductung 0:8ede47d38d10 988 }
phungductung 0:8ede47d38d10 989
phungductung 0:8ede47d38d10 990 tmpSR1 = *(__IO uint16_t *)Address;
phungductung 0:8ede47d38d10 991 tmpSR2 = *(__IO uint16_t *)Address;
phungductung 0:8ede47d38d10 992
phungductung 0:8ede47d38d10 993 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
phungductung 0:8ede47d38d10 994 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
phungductung 0:8ede47d38d10 995 {
phungductung 0:8ede47d38d10 996 return HAL_NOR_STATUS_SUCCESS;
phungductung 0:8ede47d38d10 997 }
phungductung 0:8ede47d38d10 998 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
phungductung 0:8ede47d38d10 999 {
phungductung 0:8ede47d38d10 1000 return HAL_NOR_STATUS_ERROR;
phungductung 0:8ede47d38d10 1001 }
phungductung 0:8ede47d38d10 1002 }
phungductung 0:8ede47d38d10 1003
phungductung 0:8ede47d38d10 1004 /* Return the operation status */
phungductung 0:8ede47d38d10 1005 return status;
phungductung 0:8ede47d38d10 1006 }
phungductung 0:8ede47d38d10 1007
phungductung 0:8ede47d38d10 1008 /**
phungductung 0:8ede47d38d10 1009 * @}
phungductung 0:8ede47d38d10 1010 */
phungductung 0:8ede47d38d10 1011
phungductung 0:8ede47d38d10 1012 /**
phungductung 0:8ede47d38d10 1013 * @}
phungductung 0:8ede47d38d10 1014 */
phungductung 0:8ede47d38d10 1015 #endif /* HAL_NOR_MODULE_ENABLED */
phungductung 0:8ede47d38d10 1016 /**
phungductung 0:8ede47d38d10 1017 * @}
phungductung 0:8ede47d38d10 1018 */
phungductung 0:8ede47d38d10 1019
phungductung 0:8ede47d38d10 1020 /**
phungductung 0:8ede47d38d10 1021 * @}
phungductung 0:8ede47d38d10 1022 */
phungductung 0:8ede47d38d10 1023
phungductung 0:8ede47d38d10 1024 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/