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Dependencies: F746_GUI SD_PlayerSkeleton F746_SAI_IO
SRC_STM32F7/targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_i2s.c@0:8ede47d38d10, 2019-06-04 (annotated)
- Committer:
- phungductung
- Date:
- Tue Jun 04 21:37:21 2019 +0000
- Revision:
- 0:8ede47d38d10
SPKT
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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phungductung | 0:8ede47d38d10 | 1 | /** |
phungductung | 0:8ede47d38d10 | 2 | ****************************************************************************** |
phungductung | 0:8ede47d38d10 | 3 | * @file stm32f7xx_hal_i2s.c |
phungductung | 0:8ede47d38d10 | 4 | * @author MCD Application Team |
phungductung | 0:8ede47d38d10 | 5 | * @version V1.0.4 |
phungductung | 0:8ede47d38d10 | 6 | * @date 09-December-2015 |
phungductung | 0:8ede47d38d10 | 7 | * @brief I2S HAL module driver. |
phungductung | 0:8ede47d38d10 | 8 | * This file provides firmware functions to manage the following |
phungductung | 0:8ede47d38d10 | 9 | * functionalities of the Integrated Interchip Sound (I2S) peripheral: |
phungductung | 0:8ede47d38d10 | 10 | * + Initialization and de-initialization functions |
phungductung | 0:8ede47d38d10 | 11 | * + IO operation functions |
phungductung | 0:8ede47d38d10 | 12 | * + Peripheral State and Errors functions |
phungductung | 0:8ede47d38d10 | 13 | @verbatim |
phungductung | 0:8ede47d38d10 | 14 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 15 | ##### How to use this driver ##### |
phungductung | 0:8ede47d38d10 | 16 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 17 | [..] |
phungductung | 0:8ede47d38d10 | 18 | The I2S HAL driver can be used as follows: |
phungductung | 0:8ede47d38d10 | 19 | |
phungductung | 0:8ede47d38d10 | 20 | (#) Declare a I2S_HandleTypeDef handle structure. |
phungductung | 0:8ede47d38d10 | 21 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API: |
phungductung | 0:8ede47d38d10 | 22 | (##) Enable the SPIx interface clock. |
phungductung | 0:8ede47d38d10 | 23 | (##) I2S pins configuration: |
phungductung | 0:8ede47d38d10 | 24 | (+++) Enable the clock for the I2S GPIOs. |
phungductung | 0:8ede47d38d10 | 25 | (+++) Configure these I2S pins as alternate function pull-up. |
phungductung | 0:8ede47d38d10 | 26 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT() |
phungductung | 0:8ede47d38d10 | 27 | and HAL_I2S_Receive_IT() APIs). |
phungductung | 0:8ede47d38d10 | 28 | (+++) Configure the I2Sx interrupt priority. |
phungductung | 0:8ede47d38d10 | 29 | (+++) Enable the NVIC I2S IRQ handle. |
phungductung | 0:8ede47d38d10 | 30 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA() |
phungductung | 0:8ede47d38d10 | 31 | and HAL_I2S_Receive_DMA() APIs: |
phungductung | 0:8ede47d38d10 | 32 | (+++) Declare a DMA handle structure for the Tx/Rx channel. |
phungductung | 0:8ede47d38d10 | 33 | (+++) Enable the DMAx interface clock. |
phungductung | 0:8ede47d38d10 | 34 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
phungductung | 0:8ede47d38d10 | 35 | (+++) Configure the DMA Tx/Rx Channel. |
phungductung | 0:8ede47d38d10 | 36 | (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle. |
phungductung | 0:8ede47d38d10 | 37 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the |
phungductung | 0:8ede47d38d10 | 38 | DMA Tx/Rx Channel. |
phungductung | 0:8ede47d38d10 | 39 | |
phungductung | 0:8ede47d38d10 | 40 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity |
phungductung | 0:8ede47d38d10 | 41 | using HAL_I2S_Init() function. |
phungductung | 0:8ede47d38d10 | 42 | |
phungductung | 0:8ede47d38d10 | 43 | -@- The specific I2S interrupts (Transmission complete interrupt, |
phungductung | 0:8ede47d38d10 | 44 | RXNE interrupt and Error Interrupts) will be managed using the macros |
phungductung | 0:8ede47d38d10 | 45 | __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process. |
phungductung | 0:8ede47d38d10 | 46 | -@- Make sure that either: |
phungductung | 0:8ede47d38d10 | 47 | (+@) I2S clock is configured based on SYSCLK or |
phungductung | 0:8ede47d38d10 | 48 | (+@) External clock source is configured after setting correctly |
phungductung | 0:8ede47d38d10 | 49 | the define constant EXTERNAL_CLOCK_VALUE in the stm32f3xx_hal_conf.h file. |
phungductung | 0:8ede47d38d10 | 50 | |
phungductung | 0:8ede47d38d10 | 51 | (#) Three mode of operations are available within this driver : |
phungductung | 0:8ede47d38d10 | 52 | |
phungductung | 0:8ede47d38d10 | 53 | *** Polling mode IO operation *** |
phungductung | 0:8ede47d38d10 | 54 | ================================= |
phungductung | 0:8ede47d38d10 | 55 | [..] |
phungductung | 0:8ede47d38d10 | 56 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() |
phungductung | 0:8ede47d38d10 | 57 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive() |
phungductung | 0:8ede47d38d10 | 58 | |
phungductung | 0:8ede47d38d10 | 59 | *** Interrupt mode IO operation *** |
phungductung | 0:8ede47d38d10 | 60 | =================================== |
phungductung | 0:8ede47d38d10 | 61 | [..] |
phungductung | 0:8ede47d38d10 | 62 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() |
phungductung | 0:8ede47d38d10 | 63 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 64 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
phungductung | 0:8ede47d38d10 | 65 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 66 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
phungductung | 0:8ede47d38d10 | 67 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() |
phungductung | 0:8ede47d38d10 | 68 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 69 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
phungductung | 0:8ede47d38d10 | 70 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 71 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
phungductung | 0:8ede47d38d10 | 72 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
phungductung | 0:8ede47d38d10 | 73 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
phungductung | 0:8ede47d38d10 | 74 | |
phungductung | 0:8ede47d38d10 | 75 | *** DMA mode IO operation *** |
phungductung | 0:8ede47d38d10 | 76 | ============================== |
phungductung | 0:8ede47d38d10 | 77 | [..] |
phungductung | 0:8ede47d38d10 | 78 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() |
phungductung | 0:8ede47d38d10 | 79 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 80 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
phungductung | 0:8ede47d38d10 | 81 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 82 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
phungductung | 0:8ede47d38d10 | 83 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() |
phungductung | 0:8ede47d38d10 | 84 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 85 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
phungductung | 0:8ede47d38d10 | 86 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
phungductung | 0:8ede47d38d10 | 87 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
phungductung | 0:8ede47d38d10 | 88 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
phungductung | 0:8ede47d38d10 | 89 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
phungductung | 0:8ede47d38d10 | 90 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
phungductung | 0:8ede47d38d10 | 91 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
phungductung | 0:8ede47d38d10 | 92 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
phungductung | 0:8ede47d38d10 | 93 | |
phungductung | 0:8ede47d38d10 | 94 | *** I2S HAL driver macros list *** |
phungductung | 0:8ede47d38d10 | 95 | ============================================= |
phungductung | 0:8ede47d38d10 | 96 | [..] |
phungductung | 0:8ede47d38d10 | 97 | Below the list of most used macros in I2S HAL driver. |
phungductung | 0:8ede47d38d10 | 98 | |
phungductung | 0:8ede47d38d10 | 99 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) |
phungductung | 0:8ede47d38d10 | 100 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode) |
phungductung | 0:8ede47d38d10 | 101 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts |
phungductung | 0:8ede47d38d10 | 102 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts |
phungductung | 0:8ede47d38d10 | 103 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not |
phungductung | 0:8ede47d38d10 | 104 | |
phungductung | 0:8ede47d38d10 | 105 | [..] |
phungductung | 0:8ede47d38d10 | 106 | (@) You can refer to the I2S HAL driver header file for more useful macros |
phungductung | 0:8ede47d38d10 | 107 | |
phungductung | 0:8ede47d38d10 | 108 | @endverbatim |
phungductung | 0:8ede47d38d10 | 109 | ****************************************************************************** |
phungductung | 0:8ede47d38d10 | 110 | * @attention |
phungductung | 0:8ede47d38d10 | 111 | * |
phungductung | 0:8ede47d38d10 | 112 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
phungductung | 0:8ede47d38d10 | 113 | * |
phungductung | 0:8ede47d38d10 | 114 | * Redistribution and use in source and binary forms, with or without modification, |
phungductung | 0:8ede47d38d10 | 115 | * are permitted provided that the following conditions are met: |
phungductung | 0:8ede47d38d10 | 116 | * 1. Redistributions of source code must retain the above copyright notice, |
phungductung | 0:8ede47d38d10 | 117 | * this list of conditions and the following disclaimer. |
phungductung | 0:8ede47d38d10 | 118 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
phungductung | 0:8ede47d38d10 | 119 | * this list of conditions and the following disclaimer in the documentation |
phungductung | 0:8ede47d38d10 | 120 | * and/or other materials provided with the distribution. |
phungductung | 0:8ede47d38d10 | 121 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
phungductung | 0:8ede47d38d10 | 122 | * may be used to endorse or promote products derived from this software |
phungductung | 0:8ede47d38d10 | 123 | * without specific prior written permission. |
phungductung | 0:8ede47d38d10 | 124 | * |
phungductung | 0:8ede47d38d10 | 125 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
phungductung | 0:8ede47d38d10 | 126 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
phungductung | 0:8ede47d38d10 | 127 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
phungductung | 0:8ede47d38d10 | 128 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
phungductung | 0:8ede47d38d10 | 129 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
phungductung | 0:8ede47d38d10 | 130 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
phungductung | 0:8ede47d38d10 | 131 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
phungductung | 0:8ede47d38d10 | 132 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
phungductung | 0:8ede47d38d10 | 133 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
phungductung | 0:8ede47d38d10 | 134 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
phungductung | 0:8ede47d38d10 | 135 | * |
phungductung | 0:8ede47d38d10 | 136 | ****************************************************************************** |
phungductung | 0:8ede47d38d10 | 137 | */ |
phungductung | 0:8ede47d38d10 | 138 | |
phungductung | 0:8ede47d38d10 | 139 | /* Includes ------------------------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 140 | #include "stm32f7xx_hal.h" |
phungductung | 0:8ede47d38d10 | 141 | |
phungductung | 0:8ede47d38d10 | 142 | /** @addtogroup STM32F7xx_HAL_Driver |
phungductung | 0:8ede47d38d10 | 143 | * @{ |
phungductung | 0:8ede47d38d10 | 144 | */ |
phungductung | 0:8ede47d38d10 | 145 | |
phungductung | 0:8ede47d38d10 | 146 | /** @defgroup I2S I2S |
phungductung | 0:8ede47d38d10 | 147 | * @brief I2S HAL module driver |
phungductung | 0:8ede47d38d10 | 148 | * @{ |
phungductung | 0:8ede47d38d10 | 149 | */ |
phungductung | 0:8ede47d38d10 | 150 | |
phungductung | 0:8ede47d38d10 | 151 | #ifdef HAL_I2S_MODULE_ENABLED |
phungductung | 0:8ede47d38d10 | 152 | |
phungductung | 0:8ede47d38d10 | 153 | /* Private typedef -----------------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 154 | /* Private define ------------------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 155 | /* Private macro -------------------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 156 | /* Private variables ---------------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 157 | /* Private function prototypes -----------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 158 | /** @defgroup I2S_Private_Functions I2S Private Functions |
phungductung | 0:8ede47d38d10 | 159 | * @{ |
phungductung | 0:8ede47d38d10 | 160 | */ |
phungductung | 0:8ede47d38d10 | 161 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma); |
phungductung | 0:8ede47d38d10 | 162 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
phungductung | 0:8ede47d38d10 | 163 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma); |
phungductung | 0:8ede47d38d10 | 164 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
phungductung | 0:8ede47d38d10 | 165 | static void I2S_DMAError(DMA_HandleTypeDef *hdma); |
phungductung | 0:8ede47d38d10 | 166 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s); |
phungductung | 0:8ede47d38d10 | 167 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s); |
phungductung | 0:8ede47d38d10 | 168 | static uint32_t I2S_GetClockFreq(I2S_HandleTypeDef *hi2s); |
phungductung | 0:8ede47d38d10 | 169 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout); |
phungductung | 0:8ede47d38d10 | 170 | /** |
phungductung | 0:8ede47d38d10 | 171 | * @} |
phungductung | 0:8ede47d38d10 | 172 | */ |
phungductung | 0:8ede47d38d10 | 173 | |
phungductung | 0:8ede47d38d10 | 174 | /* Exported functions ---------------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 175 | |
phungductung | 0:8ede47d38d10 | 176 | /** @defgroup I2S_Exported_Functions I2S Exported Functions |
phungductung | 0:8ede47d38d10 | 177 | * @{ |
phungductung | 0:8ede47d38d10 | 178 | */ |
phungductung | 0:8ede47d38d10 | 179 | |
phungductung | 0:8ede47d38d10 | 180 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions |
phungductung | 0:8ede47d38d10 | 181 | * @brief Initialization and Configuration functions |
phungductung | 0:8ede47d38d10 | 182 | * |
phungductung | 0:8ede47d38d10 | 183 | @verbatim |
phungductung | 0:8ede47d38d10 | 184 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 185 | ##### Initialization and de-initialization functions ##### |
phungductung | 0:8ede47d38d10 | 186 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 187 | [..] This subsection provides a set of functions allowing to initialize and |
phungductung | 0:8ede47d38d10 | 188 | de-initialize the I2Sx peripheral in simplex mode: |
phungductung | 0:8ede47d38d10 | 189 | |
phungductung | 0:8ede47d38d10 | 190 | (+) User must Implement HAL_I2S_MspInit() function in which he configures |
phungductung | 0:8ede47d38d10 | 191 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
phungductung | 0:8ede47d38d10 | 192 | |
phungductung | 0:8ede47d38d10 | 193 | (+) Call the function HAL_I2S_Init() to configure the selected device with |
phungductung | 0:8ede47d38d10 | 194 | the selected configuration: |
phungductung | 0:8ede47d38d10 | 195 | (++) Mode |
phungductung | 0:8ede47d38d10 | 196 | (++) Standard |
phungductung | 0:8ede47d38d10 | 197 | (++) Data Format |
phungductung | 0:8ede47d38d10 | 198 | (++) MCLK Output |
phungductung | 0:8ede47d38d10 | 199 | (++) Audio frequency |
phungductung | 0:8ede47d38d10 | 200 | (++) Polarity |
phungductung | 0:8ede47d38d10 | 201 | (++) Full duplex mode |
phungductung | 0:8ede47d38d10 | 202 | |
phungductung | 0:8ede47d38d10 | 203 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration |
phungductung | 0:8ede47d38d10 | 204 | of the selected I2Sx peripheral. |
phungductung | 0:8ede47d38d10 | 205 | @endverbatim |
phungductung | 0:8ede47d38d10 | 206 | * @{ |
phungductung | 0:8ede47d38d10 | 207 | */ |
phungductung | 0:8ede47d38d10 | 208 | |
phungductung | 0:8ede47d38d10 | 209 | /** |
phungductung | 0:8ede47d38d10 | 210 | * @brief Initializes the I2S according to the specified parameters |
phungductung | 0:8ede47d38d10 | 211 | * in the I2S_InitTypeDef and create the associated handle. |
phungductung | 0:8ede47d38d10 | 212 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 213 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 214 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 215 | */ |
phungductung | 0:8ede47d38d10 | 216 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 217 | { |
phungductung | 0:8ede47d38d10 | 218 | uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; |
phungductung | 0:8ede47d38d10 | 219 | uint32_t tmp = 0, i2sclk = 0; |
phungductung | 0:8ede47d38d10 | 220 | |
phungductung | 0:8ede47d38d10 | 221 | /* Check the I2S handle allocation */ |
phungductung | 0:8ede47d38d10 | 222 | if(hi2s == NULL) |
phungductung | 0:8ede47d38d10 | 223 | { |
phungductung | 0:8ede47d38d10 | 224 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 225 | } |
phungductung | 0:8ede47d38d10 | 226 | |
phungductung | 0:8ede47d38d10 | 227 | /* Check the parameters */ |
phungductung | 0:8ede47d38d10 | 228 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance)); |
phungductung | 0:8ede47d38d10 | 229 | assert_param(IS_I2S_MODE(hi2s->Init.Mode)); |
phungductung | 0:8ede47d38d10 | 230 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard)); |
phungductung | 0:8ede47d38d10 | 231 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat)); |
phungductung | 0:8ede47d38d10 | 232 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput)); |
phungductung | 0:8ede47d38d10 | 233 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq)); |
phungductung | 0:8ede47d38d10 | 234 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL)); |
phungductung | 0:8ede47d38d10 | 235 | assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource)); |
phungductung | 0:8ede47d38d10 | 236 | |
phungductung | 0:8ede47d38d10 | 237 | if(hi2s->State == HAL_I2S_STATE_RESET) |
phungductung | 0:8ede47d38d10 | 238 | { |
phungductung | 0:8ede47d38d10 | 239 | /* Allocate lock resource and initialize it */ |
phungductung | 0:8ede47d38d10 | 240 | hi2s->Lock = HAL_UNLOCKED; |
phungductung | 0:8ede47d38d10 | 241 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
phungductung | 0:8ede47d38d10 | 242 | HAL_I2S_MspInit(hi2s); |
phungductung | 0:8ede47d38d10 | 243 | } |
phungductung | 0:8ede47d38d10 | 244 | |
phungductung | 0:8ede47d38d10 | 245 | hi2s->State = HAL_I2S_STATE_BUSY; |
phungductung | 0:8ede47d38d10 | 246 | |
phungductung | 0:8ede47d38d10 | 247 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ |
phungductung | 0:8ede47d38d10 | 248 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
phungductung | 0:8ede47d38d10 | 249 | hi2s->Instance->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \ |
phungductung | 0:8ede47d38d10 | 250 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \ |
phungductung | 0:8ede47d38d10 | 251 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD); |
phungductung | 0:8ede47d38d10 | 252 | hi2s->Instance->I2SPR = 0x0002; |
phungductung | 0:8ede47d38d10 | 253 | |
phungductung | 0:8ede47d38d10 | 254 | /* Get the I2SCFGR register value */ |
phungductung | 0:8ede47d38d10 | 255 | tmpreg = hi2s->Instance->I2SCFGR; |
phungductung | 0:8ede47d38d10 | 256 | |
phungductung | 0:8ede47d38d10 | 257 | /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ |
phungductung | 0:8ede47d38d10 | 258 | if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT) |
phungductung | 0:8ede47d38d10 | 259 | { |
phungductung | 0:8ede47d38d10 | 260 | i2sodd = (uint16_t)0; |
phungductung | 0:8ede47d38d10 | 261 | i2sdiv = (uint16_t)2; |
phungductung | 0:8ede47d38d10 | 262 | } |
phungductung | 0:8ede47d38d10 | 263 | /* If the requested audio frequency is not the default, compute the prescaler */ |
phungductung | 0:8ede47d38d10 | 264 | else |
phungductung | 0:8ede47d38d10 | 265 | { |
phungductung | 0:8ede47d38d10 | 266 | /* Check the frame length (For the Prescaler computing) *******************/ |
phungductung | 0:8ede47d38d10 | 267 | if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B) |
phungductung | 0:8ede47d38d10 | 268 | { |
phungductung | 0:8ede47d38d10 | 269 | /* Packet length is 16 bits */ |
phungductung | 0:8ede47d38d10 | 270 | packetlength = 1; |
phungductung | 0:8ede47d38d10 | 271 | } |
phungductung | 0:8ede47d38d10 | 272 | else |
phungductung | 0:8ede47d38d10 | 273 | { |
phungductung | 0:8ede47d38d10 | 274 | /* Packet length is 32 bits */ |
phungductung | 0:8ede47d38d10 | 275 | packetlength = 2; |
phungductung | 0:8ede47d38d10 | 276 | } |
phungductung | 0:8ede47d38d10 | 277 | |
phungductung | 0:8ede47d38d10 | 278 | /* Get I2S source Clock frequency ****************************************/ |
phungductung | 0:8ede47d38d10 | 279 | |
phungductung | 0:8ede47d38d10 | 280 | /* If an external I2S clock has to be used, the specific define should be set |
phungductung | 0:8ede47d38d10 | 281 | in the project configuration or in the stm32f3xx_conf.h file */ |
phungductung | 0:8ede47d38d10 | 282 | if(hi2s->Init.ClockSource == I2S_CLOCK_EXTERNAL) |
phungductung | 0:8ede47d38d10 | 283 | { |
phungductung | 0:8ede47d38d10 | 284 | /* Set the I2S clock to the external clock value */ |
phungductung | 0:8ede47d38d10 | 285 | i2sclk = EXTERNAL_CLOCK_VALUE; |
phungductung | 0:8ede47d38d10 | 286 | } |
phungductung | 0:8ede47d38d10 | 287 | else |
phungductung | 0:8ede47d38d10 | 288 | { |
phungductung | 0:8ede47d38d10 | 289 | /* Get the I2S source clock value */ |
phungductung | 0:8ede47d38d10 | 290 | i2sclk = I2S_GetClockFreq(hi2s); |
phungductung | 0:8ede47d38d10 | 291 | } |
phungductung | 0:8ede47d38d10 | 292 | |
phungductung | 0:8ede47d38d10 | 293 | /* Compute the Real divider depending on the MCLK output state, with a floating point */ |
phungductung | 0:8ede47d38d10 | 294 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
phungductung | 0:8ede47d38d10 | 295 | { |
phungductung | 0:8ede47d38d10 | 296 | /* MCLK output is enabled */ |
phungductung | 0:8ede47d38d10 | 297 | tmp = (uint16_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5); |
phungductung | 0:8ede47d38d10 | 298 | } |
phungductung | 0:8ede47d38d10 | 299 | else |
phungductung | 0:8ede47d38d10 | 300 | { |
phungductung | 0:8ede47d38d10 | 301 | /* MCLK output is disabled */ |
phungductung | 0:8ede47d38d10 | 302 | tmp = (uint16_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5); |
phungductung | 0:8ede47d38d10 | 303 | } |
phungductung | 0:8ede47d38d10 | 304 | |
phungductung | 0:8ede47d38d10 | 305 | /* Remove the flatting point */ |
phungductung | 0:8ede47d38d10 | 306 | tmp = tmp / 10; |
phungductung | 0:8ede47d38d10 | 307 | |
phungductung | 0:8ede47d38d10 | 308 | /* Check the parity of the divider */ |
phungductung | 0:8ede47d38d10 | 309 | i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); |
phungductung | 0:8ede47d38d10 | 310 | |
phungductung | 0:8ede47d38d10 | 311 | /* Compute the i2sdiv prescaler */ |
phungductung | 0:8ede47d38d10 | 312 | i2sdiv = (uint16_t)((tmp - i2sodd) / 2); |
phungductung | 0:8ede47d38d10 | 313 | |
phungductung | 0:8ede47d38d10 | 314 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
phungductung | 0:8ede47d38d10 | 315 | i2sodd = (uint16_t) (i2sodd << 8); |
phungductung | 0:8ede47d38d10 | 316 | } |
phungductung | 0:8ede47d38d10 | 317 | |
phungductung | 0:8ede47d38d10 | 318 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
phungductung | 0:8ede47d38d10 | 319 | if((i2sdiv < 2) || (i2sdiv > 0xFF)) |
phungductung | 0:8ede47d38d10 | 320 | { |
phungductung | 0:8ede47d38d10 | 321 | /* Set the default values */ |
phungductung | 0:8ede47d38d10 | 322 | i2sdiv = 2; |
phungductung | 0:8ede47d38d10 | 323 | i2sodd = 0; |
phungductung | 0:8ede47d38d10 | 324 | } |
phungductung | 0:8ede47d38d10 | 325 | |
phungductung | 0:8ede47d38d10 | 326 | /* Write to SPIx I2SPR register the computed value */ |
phungductung | 0:8ede47d38d10 | 327 | hi2s->Instance->I2SPR = (uint16_t)((uint16_t)i2sdiv | (uint16_t)(i2sodd | (uint16_t)hi2s->Init.MCLKOutput)); |
phungductung | 0:8ede47d38d10 | 328 | |
phungductung | 0:8ede47d38d10 | 329 | /* Configure the I2S with the I2S_InitStruct values */ |
phungductung | 0:8ede47d38d10 | 330 | tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(hi2s->Init.Mode | \ |
phungductung | 0:8ede47d38d10 | 331 | (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \ |
phungductung | 0:8ede47d38d10 | 332 | (uint16_t)hi2s->Init.CPOL)))); |
phungductung | 0:8ede47d38d10 | 333 | |
phungductung | 0:8ede47d38d10 | 334 | /* Write to SPIx I2SCFGR */ |
phungductung | 0:8ede47d38d10 | 335 | hi2s->Instance->I2SCFGR = tmpreg; |
phungductung | 0:8ede47d38d10 | 336 | |
phungductung | 0:8ede47d38d10 | 337 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 338 | hi2s->State= HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 339 | |
phungductung | 0:8ede47d38d10 | 340 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 341 | } |
phungductung | 0:8ede47d38d10 | 342 | |
phungductung | 0:8ede47d38d10 | 343 | /** |
phungductung | 0:8ede47d38d10 | 344 | * @brief DeInitializes the I2S peripheral |
phungductung | 0:8ede47d38d10 | 345 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 346 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 347 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 348 | */ |
phungductung | 0:8ede47d38d10 | 349 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 350 | { |
phungductung | 0:8ede47d38d10 | 351 | /* Check the I2S handle allocation */ |
phungductung | 0:8ede47d38d10 | 352 | if(hi2s == NULL) |
phungductung | 0:8ede47d38d10 | 353 | { |
phungductung | 0:8ede47d38d10 | 354 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 355 | } |
phungductung | 0:8ede47d38d10 | 356 | |
phungductung | 0:8ede47d38d10 | 357 | /* Check the parameters */ |
phungductung | 0:8ede47d38d10 | 358 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance)); |
phungductung | 0:8ede47d38d10 | 359 | |
phungductung | 0:8ede47d38d10 | 360 | hi2s->State = HAL_I2S_STATE_BUSY; |
phungductung | 0:8ede47d38d10 | 361 | |
phungductung | 0:8ede47d38d10 | 362 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
phungductung | 0:8ede47d38d10 | 363 | HAL_I2S_MspDeInit(hi2s); |
phungductung | 0:8ede47d38d10 | 364 | |
phungductung | 0:8ede47d38d10 | 365 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 366 | hi2s->State = HAL_I2S_STATE_RESET; |
phungductung | 0:8ede47d38d10 | 367 | |
phungductung | 0:8ede47d38d10 | 368 | /* Release Lock */ |
phungductung | 0:8ede47d38d10 | 369 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 370 | |
phungductung | 0:8ede47d38d10 | 371 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 372 | } |
phungductung | 0:8ede47d38d10 | 373 | |
phungductung | 0:8ede47d38d10 | 374 | /** |
phungductung | 0:8ede47d38d10 | 375 | * @brief I2S MSP Init |
phungductung | 0:8ede47d38d10 | 376 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 377 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 378 | * @retval None |
phungductung | 0:8ede47d38d10 | 379 | */ |
phungductung | 0:8ede47d38d10 | 380 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 381 | { |
phungductung | 0:8ede47d38d10 | 382 | /* Prevent unused argument(s) compilation warning */ |
phungductung | 0:8ede47d38d10 | 383 | UNUSED(hi2s); |
phungductung | 0:8ede47d38d10 | 384 | |
phungductung | 0:8ede47d38d10 | 385 | /* NOTE : This function Should not be modified, when the callback is needed, |
phungductung | 0:8ede47d38d10 | 386 | the HAL_I2S_MspInit could be implemented in the user file |
phungductung | 0:8ede47d38d10 | 387 | */ |
phungductung | 0:8ede47d38d10 | 388 | } |
phungductung | 0:8ede47d38d10 | 389 | |
phungductung | 0:8ede47d38d10 | 390 | /** |
phungductung | 0:8ede47d38d10 | 391 | * @brief I2S MSP DeInit |
phungductung | 0:8ede47d38d10 | 392 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 393 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 394 | * @retval None |
phungductung | 0:8ede47d38d10 | 395 | */ |
phungductung | 0:8ede47d38d10 | 396 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 397 | { |
phungductung | 0:8ede47d38d10 | 398 | /* Prevent unused argument(s) compilation warning */ |
phungductung | 0:8ede47d38d10 | 399 | UNUSED(hi2s); |
phungductung | 0:8ede47d38d10 | 400 | |
phungductung | 0:8ede47d38d10 | 401 | /* NOTE : This function Should not be modified, when the callback is needed, |
phungductung | 0:8ede47d38d10 | 402 | the HAL_I2S_MspDeInit could be implemented in the user file |
phungductung | 0:8ede47d38d10 | 403 | */ |
phungductung | 0:8ede47d38d10 | 404 | } |
phungductung | 0:8ede47d38d10 | 405 | |
phungductung | 0:8ede47d38d10 | 406 | /** |
phungductung | 0:8ede47d38d10 | 407 | * @} |
phungductung | 0:8ede47d38d10 | 408 | */ |
phungductung | 0:8ede47d38d10 | 409 | |
phungductung | 0:8ede47d38d10 | 410 | /** @defgroup I2S_Exported_Functions_Group2 Input and Output operation functions |
phungductung | 0:8ede47d38d10 | 411 | * @brief Data transfers functions |
phungductung | 0:8ede47d38d10 | 412 | * |
phungductung | 0:8ede47d38d10 | 413 | @verbatim |
phungductung | 0:8ede47d38d10 | 414 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 415 | ##### IO operation functions ##### |
phungductung | 0:8ede47d38d10 | 416 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 417 | [..] |
phungductung | 0:8ede47d38d10 | 418 | This subsection provides a set of functions allowing to manage the I2S data |
phungductung | 0:8ede47d38d10 | 419 | transfers. |
phungductung | 0:8ede47d38d10 | 420 | |
phungductung | 0:8ede47d38d10 | 421 | (#) There are two modes of transfer: |
phungductung | 0:8ede47d38d10 | 422 | (++) Blocking mode : The communication is performed in the polling mode. |
phungductung | 0:8ede47d38d10 | 423 | The status of all data processing is returned by the same function |
phungductung | 0:8ede47d38d10 | 424 | after finishing transfer. |
phungductung | 0:8ede47d38d10 | 425 | (++) No-Blocking mode : The communication is performed using Interrupts |
phungductung | 0:8ede47d38d10 | 426 | or DMA. These functions return the status of the transfer startup. |
phungductung | 0:8ede47d38d10 | 427 | The end of the data processing will be indicated through the |
phungductung | 0:8ede47d38d10 | 428 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
phungductung | 0:8ede47d38d10 | 429 | using DMA mode. |
phungductung | 0:8ede47d38d10 | 430 | |
phungductung | 0:8ede47d38d10 | 431 | (#) Blocking mode functions are : |
phungductung | 0:8ede47d38d10 | 432 | (++) HAL_I2S_Transmit() |
phungductung | 0:8ede47d38d10 | 433 | (++) HAL_I2S_Receive() |
phungductung | 0:8ede47d38d10 | 434 | |
phungductung | 0:8ede47d38d10 | 435 | (#) No-Blocking mode functions with Interrupt are : |
phungductung | 0:8ede47d38d10 | 436 | (++) HAL_I2S_Transmit_IT() |
phungductung | 0:8ede47d38d10 | 437 | (++) HAL_I2S_Receive_IT() |
phungductung | 0:8ede47d38d10 | 438 | |
phungductung | 0:8ede47d38d10 | 439 | (#) No-Blocking mode functions with DMA are : |
phungductung | 0:8ede47d38d10 | 440 | (++) HAL_I2S_Transmit_DMA() |
phungductung | 0:8ede47d38d10 | 441 | (++) HAL_I2S_Receive_DMA() |
phungductung | 0:8ede47d38d10 | 442 | |
phungductung | 0:8ede47d38d10 | 443 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
phungductung | 0:8ede47d38d10 | 444 | (++) HAL_I2S_TxCpltCallback() |
phungductung | 0:8ede47d38d10 | 445 | (++) HAL_I2S_RxCpltCallback() |
phungductung | 0:8ede47d38d10 | 446 | (++) HAL_I2S_ErrorCallback() |
phungductung | 0:8ede47d38d10 | 447 | |
phungductung | 0:8ede47d38d10 | 448 | @endverbatim |
phungductung | 0:8ede47d38d10 | 449 | * @{ |
phungductung | 0:8ede47d38d10 | 450 | */ |
phungductung | 0:8ede47d38d10 | 451 | |
phungductung | 0:8ede47d38d10 | 452 | /** |
phungductung | 0:8ede47d38d10 | 453 | * @brief Transmit an amount of data in blocking mode |
phungductung | 0:8ede47d38d10 | 454 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 455 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 456 | * @param pData: a 16-bit pointer to data buffer. |
phungductung | 0:8ede47d38d10 | 457 | * @param Size: number of data sample to be sent: |
phungductung | 0:8ede47d38d10 | 458 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
phungductung | 0:8ede47d38d10 | 459 | * configuration phase, the Size parameter means the number of 16-bit data length |
phungductung | 0:8ede47d38d10 | 460 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
phungductung | 0:8ede47d38d10 | 461 | * the Size parameter means the number of 16-bit data length. |
phungductung | 0:8ede47d38d10 | 462 | * @param Timeout: Timeout duration |
phungductung | 0:8ede47d38d10 | 463 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
phungductung | 0:8ede47d38d10 | 464 | * between Master and Slave(example: audio streaming). |
phungductung | 0:8ede47d38d10 | 465 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 466 | */ |
phungductung | 0:8ede47d38d10 | 467 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
phungductung | 0:8ede47d38d10 | 468 | { |
phungductung | 0:8ede47d38d10 | 469 | if((pData == NULL ) || (Size == 0)) |
phungductung | 0:8ede47d38d10 | 470 | { |
phungductung | 0:8ede47d38d10 | 471 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 472 | } |
phungductung | 0:8ede47d38d10 | 473 | |
phungductung | 0:8ede47d38d10 | 474 | if(hi2s->State == HAL_I2S_STATE_READY) |
phungductung | 0:8ede47d38d10 | 475 | { |
phungductung | 0:8ede47d38d10 | 476 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
phungductung | 0:8ede47d38d10 | 477 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
phungductung | 0:8ede47d38d10 | 478 | { |
phungductung | 0:8ede47d38d10 | 479 | hi2s->TxXferSize = (Size << 1); |
phungductung | 0:8ede47d38d10 | 480 | hi2s->TxXferCount = (Size << 1); |
phungductung | 0:8ede47d38d10 | 481 | } |
phungductung | 0:8ede47d38d10 | 482 | else |
phungductung | 0:8ede47d38d10 | 483 | { |
phungductung | 0:8ede47d38d10 | 484 | hi2s->TxXferSize = Size; |
phungductung | 0:8ede47d38d10 | 485 | hi2s->TxXferCount = Size; |
phungductung | 0:8ede47d38d10 | 486 | } |
phungductung | 0:8ede47d38d10 | 487 | |
phungductung | 0:8ede47d38d10 | 488 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 489 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 490 | |
phungductung | 0:8ede47d38d10 | 491 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 492 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
phungductung | 0:8ede47d38d10 | 493 | |
phungductung | 0:8ede47d38d10 | 494 | /* Check if the I2S is already enabled */ |
phungductung | 0:8ede47d38d10 | 495 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
phungductung | 0:8ede47d38d10 | 496 | { |
phungductung | 0:8ede47d38d10 | 497 | /* Enable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 498 | __HAL_I2S_ENABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 499 | } |
phungductung | 0:8ede47d38d10 | 500 | |
phungductung | 0:8ede47d38d10 | 501 | while(hi2s->TxXferCount > 0) |
phungductung | 0:8ede47d38d10 | 502 | { |
phungductung | 0:8ede47d38d10 | 503 | hi2s->Instance->DR = (*pData++); |
phungductung | 0:8ede47d38d10 | 504 | hi2s->TxXferCount--; |
phungductung | 0:8ede47d38d10 | 505 | /* Wait until TXE flag is set */ |
phungductung | 0:8ede47d38d10 | 506 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK) |
phungductung | 0:8ede47d38d10 | 507 | { |
phungductung | 0:8ede47d38d10 | 508 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 509 | hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 510 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 511 | return HAL_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 512 | } |
phungductung | 0:8ede47d38d10 | 513 | |
phungductung | 0:8ede47d38d10 | 514 | /* Check if an underrun occurs */ |
phungductung | 0:8ede47d38d10 | 515 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET) |
phungductung | 0:8ede47d38d10 | 516 | { |
phungductung | 0:8ede47d38d10 | 517 | /* Set the I2S State ready */ |
phungductung | 0:8ede47d38d10 | 518 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 519 | |
phungductung | 0:8ede47d38d10 | 520 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 521 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 522 | |
phungductung | 0:8ede47d38d10 | 523 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 524 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
phungductung | 0:8ede47d38d10 | 525 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 526 | |
phungductung | 0:8ede47d38d10 | 527 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 528 | } |
phungductung | 0:8ede47d38d10 | 529 | } |
phungductung | 0:8ede47d38d10 | 530 | |
phungductung | 0:8ede47d38d10 | 531 | /* Check if Slave mode is selected */ |
phungductung | 0:8ede47d38d10 | 532 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX)) |
phungductung | 0:8ede47d38d10 | 533 | { |
phungductung | 0:8ede47d38d10 | 534 | /* Wait until Busy flag is reset */ |
phungductung | 0:8ede47d38d10 | 535 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK) |
phungductung | 0:8ede47d38d10 | 536 | { |
phungductung | 0:8ede47d38d10 | 537 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 538 | hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 539 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 540 | return HAL_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 541 | } |
phungductung | 0:8ede47d38d10 | 542 | } |
phungductung | 0:8ede47d38d10 | 543 | |
phungductung | 0:8ede47d38d10 | 544 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 545 | |
phungductung | 0:8ede47d38d10 | 546 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 547 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 548 | |
phungductung | 0:8ede47d38d10 | 549 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 550 | } |
phungductung | 0:8ede47d38d10 | 551 | else |
phungductung | 0:8ede47d38d10 | 552 | { |
phungductung | 0:8ede47d38d10 | 553 | return HAL_BUSY; |
phungductung | 0:8ede47d38d10 | 554 | } |
phungductung | 0:8ede47d38d10 | 555 | } |
phungductung | 0:8ede47d38d10 | 556 | |
phungductung | 0:8ede47d38d10 | 557 | /** |
phungductung | 0:8ede47d38d10 | 558 | * @brief Receive an amount of data in blocking mode |
phungductung | 0:8ede47d38d10 | 559 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 560 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 561 | * @param pData: a 16-bit pointer to data buffer. |
phungductung | 0:8ede47d38d10 | 562 | * @param Size: number of data sample to be sent: |
phungductung | 0:8ede47d38d10 | 563 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
phungductung | 0:8ede47d38d10 | 564 | * configuration phase, the Size parameter means the number of 16-bit data length |
phungductung | 0:8ede47d38d10 | 565 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
phungductung | 0:8ede47d38d10 | 566 | * the Size parameter means the number of 16-bit data length. |
phungductung | 0:8ede47d38d10 | 567 | * @param Timeout: Timeout duration |
phungductung | 0:8ede47d38d10 | 568 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
phungductung | 0:8ede47d38d10 | 569 | * between Master and Slave(example: audio streaming). |
phungductung | 0:8ede47d38d10 | 570 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate |
phungductung | 0:8ede47d38d10 | 571 | * in continuous way and as the I2S is not disabled at the end of the I2S transaction. |
phungductung | 0:8ede47d38d10 | 572 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 573 | */ |
phungductung | 0:8ede47d38d10 | 574 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
phungductung | 0:8ede47d38d10 | 575 | { |
phungductung | 0:8ede47d38d10 | 576 | if((pData == NULL ) || (Size == 0)) |
phungductung | 0:8ede47d38d10 | 577 | { |
phungductung | 0:8ede47d38d10 | 578 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 579 | } |
phungductung | 0:8ede47d38d10 | 580 | |
phungductung | 0:8ede47d38d10 | 581 | if(hi2s->State == HAL_I2S_STATE_READY) |
phungductung | 0:8ede47d38d10 | 582 | { |
phungductung | 0:8ede47d38d10 | 583 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
phungductung | 0:8ede47d38d10 | 584 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
phungductung | 0:8ede47d38d10 | 585 | { |
phungductung | 0:8ede47d38d10 | 586 | hi2s->RxXferSize = (Size << 1); |
phungductung | 0:8ede47d38d10 | 587 | hi2s->RxXferCount = (Size << 1); |
phungductung | 0:8ede47d38d10 | 588 | } |
phungductung | 0:8ede47d38d10 | 589 | else |
phungductung | 0:8ede47d38d10 | 590 | { |
phungductung | 0:8ede47d38d10 | 591 | hi2s->RxXferSize = Size; |
phungductung | 0:8ede47d38d10 | 592 | hi2s->RxXferCount = Size; |
phungductung | 0:8ede47d38d10 | 593 | } |
phungductung | 0:8ede47d38d10 | 594 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 595 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 596 | |
phungductung | 0:8ede47d38d10 | 597 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 598 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
phungductung | 0:8ede47d38d10 | 599 | |
phungductung | 0:8ede47d38d10 | 600 | /* Check if the I2S is already enabled */ |
phungductung | 0:8ede47d38d10 | 601 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
phungductung | 0:8ede47d38d10 | 602 | { |
phungductung | 0:8ede47d38d10 | 603 | /* Enable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 604 | __HAL_I2S_ENABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 605 | } |
phungductung | 0:8ede47d38d10 | 606 | |
phungductung | 0:8ede47d38d10 | 607 | /* Check if Master Receiver mode is selected */ |
phungductung | 0:8ede47d38d10 | 608 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
phungductung | 0:8ede47d38d10 | 609 | { |
phungductung | 0:8ede47d38d10 | 610 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
phungductung | 0:8ede47d38d10 | 611 | access to the SPI_SR register. */ |
phungductung | 0:8ede47d38d10 | 612 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
phungductung | 0:8ede47d38d10 | 613 | } |
phungductung | 0:8ede47d38d10 | 614 | |
phungductung | 0:8ede47d38d10 | 615 | /* Receive data */ |
phungductung | 0:8ede47d38d10 | 616 | while(hi2s->RxXferCount > 0) |
phungductung | 0:8ede47d38d10 | 617 | { |
phungductung | 0:8ede47d38d10 | 618 | /* Wait until RXNE flag is set */ |
phungductung | 0:8ede47d38d10 | 619 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK) |
phungductung | 0:8ede47d38d10 | 620 | { |
phungductung | 0:8ede47d38d10 | 621 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 622 | hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 623 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 624 | return HAL_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 625 | } |
phungductung | 0:8ede47d38d10 | 626 | |
phungductung | 0:8ede47d38d10 | 627 | /* Check if an overrun occurs */ |
phungductung | 0:8ede47d38d10 | 628 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET) |
phungductung | 0:8ede47d38d10 | 629 | { |
phungductung | 0:8ede47d38d10 | 630 | /* Set the I2S State ready */ |
phungductung | 0:8ede47d38d10 | 631 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 632 | |
phungductung | 0:8ede47d38d10 | 633 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 634 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 635 | |
phungductung | 0:8ede47d38d10 | 636 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 637 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
phungductung | 0:8ede47d38d10 | 638 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 639 | |
phungductung | 0:8ede47d38d10 | 640 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 641 | } |
phungductung | 0:8ede47d38d10 | 642 | |
phungductung | 0:8ede47d38d10 | 643 | (*pData++) = hi2s->Instance->DR; |
phungductung | 0:8ede47d38d10 | 644 | hi2s->RxXferCount--; |
phungductung | 0:8ede47d38d10 | 645 | } |
phungductung | 0:8ede47d38d10 | 646 | |
phungductung | 0:8ede47d38d10 | 647 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 648 | |
phungductung | 0:8ede47d38d10 | 649 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 650 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 651 | |
phungductung | 0:8ede47d38d10 | 652 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 653 | } |
phungductung | 0:8ede47d38d10 | 654 | else |
phungductung | 0:8ede47d38d10 | 655 | { |
phungductung | 0:8ede47d38d10 | 656 | return HAL_BUSY; |
phungductung | 0:8ede47d38d10 | 657 | } |
phungductung | 0:8ede47d38d10 | 658 | } |
phungductung | 0:8ede47d38d10 | 659 | |
phungductung | 0:8ede47d38d10 | 660 | /** |
phungductung | 0:8ede47d38d10 | 661 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
phungductung | 0:8ede47d38d10 | 662 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 663 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 664 | * @param pData: a 16-bit pointer to data buffer. |
phungductung | 0:8ede47d38d10 | 665 | * @param Size: number of data sample to be sent: |
phungductung | 0:8ede47d38d10 | 666 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
phungductung | 0:8ede47d38d10 | 667 | * configuration phase, the Size parameter means the number of 16-bit data length |
phungductung | 0:8ede47d38d10 | 668 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
phungductung | 0:8ede47d38d10 | 669 | * the Size parameter means the number of 16-bit data length. |
phungductung | 0:8ede47d38d10 | 670 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
phungductung | 0:8ede47d38d10 | 671 | * between Master and Slave(example: audio streaming). |
phungductung | 0:8ede47d38d10 | 672 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 673 | */ |
phungductung | 0:8ede47d38d10 | 674 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
phungductung | 0:8ede47d38d10 | 675 | { |
phungductung | 0:8ede47d38d10 | 676 | if(hi2s->State == HAL_I2S_STATE_READY) |
phungductung | 0:8ede47d38d10 | 677 | { |
phungductung | 0:8ede47d38d10 | 678 | if((pData == NULL) || (Size == 0)) |
phungductung | 0:8ede47d38d10 | 679 | { |
phungductung | 0:8ede47d38d10 | 680 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 681 | } |
phungductung | 0:8ede47d38d10 | 682 | |
phungductung | 0:8ede47d38d10 | 683 | hi2s->pTxBuffPtr = pData; |
phungductung | 0:8ede47d38d10 | 684 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
phungductung | 0:8ede47d38d10 | 685 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
phungductung | 0:8ede47d38d10 | 686 | { |
phungductung | 0:8ede47d38d10 | 687 | hi2s->TxXferSize = (Size << 1); |
phungductung | 0:8ede47d38d10 | 688 | hi2s->TxXferCount = (Size << 1); |
phungductung | 0:8ede47d38d10 | 689 | } |
phungductung | 0:8ede47d38d10 | 690 | else |
phungductung | 0:8ede47d38d10 | 691 | { |
phungductung | 0:8ede47d38d10 | 692 | hi2s->TxXferSize = Size; |
phungductung | 0:8ede47d38d10 | 693 | hi2s->TxXferCount = Size; |
phungductung | 0:8ede47d38d10 | 694 | } |
phungductung | 0:8ede47d38d10 | 695 | |
phungductung | 0:8ede47d38d10 | 696 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 697 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 698 | |
phungductung | 0:8ede47d38d10 | 699 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 700 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
phungductung | 0:8ede47d38d10 | 701 | |
phungductung | 0:8ede47d38d10 | 702 | /* Enable TXE and ERR interrupt */ |
phungductung | 0:8ede47d38d10 | 703 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
phungductung | 0:8ede47d38d10 | 704 | |
phungductung | 0:8ede47d38d10 | 705 | /* Check if the I2S is already enabled */ |
phungductung | 0:8ede47d38d10 | 706 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
phungductung | 0:8ede47d38d10 | 707 | { |
phungductung | 0:8ede47d38d10 | 708 | /* Enable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 709 | __HAL_I2S_ENABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 710 | } |
phungductung | 0:8ede47d38d10 | 711 | |
phungductung | 0:8ede47d38d10 | 712 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 713 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 714 | |
phungductung | 0:8ede47d38d10 | 715 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 716 | } |
phungductung | 0:8ede47d38d10 | 717 | else |
phungductung | 0:8ede47d38d10 | 718 | { |
phungductung | 0:8ede47d38d10 | 719 | return HAL_BUSY; |
phungductung | 0:8ede47d38d10 | 720 | } |
phungductung | 0:8ede47d38d10 | 721 | } |
phungductung | 0:8ede47d38d10 | 722 | |
phungductung | 0:8ede47d38d10 | 723 | /** |
phungductung | 0:8ede47d38d10 | 724 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
phungductung | 0:8ede47d38d10 | 725 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 726 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 727 | * @param pData: a 16-bit pointer to the Receive data buffer. |
phungductung | 0:8ede47d38d10 | 728 | * @param Size: number of data sample to be sent: |
phungductung | 0:8ede47d38d10 | 729 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
phungductung | 0:8ede47d38d10 | 730 | * configuration phase, the Size parameter means the number of 16-bit data length |
phungductung | 0:8ede47d38d10 | 731 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
phungductung | 0:8ede47d38d10 | 732 | * the Size parameter means the number of 16-bit data length. |
phungductung | 0:8ede47d38d10 | 733 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
phungductung | 0:8ede47d38d10 | 734 | * between Master and Slave(example: audio streaming). |
phungductung | 0:8ede47d38d10 | 735 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation |
phungductung | 0:8ede47d38d10 | 736 | * between Master and Slave otherwise the I2S interrupt should be optimized. |
phungductung | 0:8ede47d38d10 | 737 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 738 | */ |
phungductung | 0:8ede47d38d10 | 739 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
phungductung | 0:8ede47d38d10 | 740 | { |
phungductung | 0:8ede47d38d10 | 741 | if(hi2s->State == HAL_I2S_STATE_READY) |
phungductung | 0:8ede47d38d10 | 742 | { |
phungductung | 0:8ede47d38d10 | 743 | if((pData == NULL) || (Size == 0)) |
phungductung | 0:8ede47d38d10 | 744 | { |
phungductung | 0:8ede47d38d10 | 745 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 746 | } |
phungductung | 0:8ede47d38d10 | 747 | |
phungductung | 0:8ede47d38d10 | 748 | hi2s->pRxBuffPtr = pData; |
phungductung | 0:8ede47d38d10 | 749 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
phungductung | 0:8ede47d38d10 | 750 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
phungductung | 0:8ede47d38d10 | 751 | { |
phungductung | 0:8ede47d38d10 | 752 | hi2s->RxXferSize = (Size << 1); |
phungductung | 0:8ede47d38d10 | 753 | hi2s->RxXferCount = (Size << 1); |
phungductung | 0:8ede47d38d10 | 754 | } |
phungductung | 0:8ede47d38d10 | 755 | else |
phungductung | 0:8ede47d38d10 | 756 | { |
phungductung | 0:8ede47d38d10 | 757 | hi2s->RxXferSize = Size; |
phungductung | 0:8ede47d38d10 | 758 | hi2s->RxXferCount = Size; |
phungductung | 0:8ede47d38d10 | 759 | } |
phungductung | 0:8ede47d38d10 | 760 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 761 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 762 | |
phungductung | 0:8ede47d38d10 | 763 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 764 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
phungductung | 0:8ede47d38d10 | 765 | |
phungductung | 0:8ede47d38d10 | 766 | /* Enable TXE and ERR interrupt */ |
phungductung | 0:8ede47d38d10 | 767 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
phungductung | 0:8ede47d38d10 | 768 | |
phungductung | 0:8ede47d38d10 | 769 | /* Check if the I2S is already enabled */ |
phungductung | 0:8ede47d38d10 | 770 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
phungductung | 0:8ede47d38d10 | 771 | { |
phungductung | 0:8ede47d38d10 | 772 | /* Enable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 773 | __HAL_I2S_ENABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 774 | } |
phungductung | 0:8ede47d38d10 | 775 | |
phungductung | 0:8ede47d38d10 | 776 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 777 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 778 | |
phungductung | 0:8ede47d38d10 | 779 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 780 | } |
phungductung | 0:8ede47d38d10 | 781 | else |
phungductung | 0:8ede47d38d10 | 782 | { |
phungductung | 0:8ede47d38d10 | 783 | return HAL_BUSY; |
phungductung | 0:8ede47d38d10 | 784 | } |
phungductung | 0:8ede47d38d10 | 785 | } |
phungductung | 0:8ede47d38d10 | 786 | |
phungductung | 0:8ede47d38d10 | 787 | /** |
phungductung | 0:8ede47d38d10 | 788 | * @brief Transmit an amount of data in non-blocking mode with DMA |
phungductung | 0:8ede47d38d10 | 789 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 790 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 791 | * @param pData: a 16-bit pointer to the Transmit data buffer. |
phungductung | 0:8ede47d38d10 | 792 | * @param Size: number of data sample to be sent: |
phungductung | 0:8ede47d38d10 | 793 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
phungductung | 0:8ede47d38d10 | 794 | * configuration phase, the Size parameter means the number of 16-bit data length |
phungductung | 0:8ede47d38d10 | 795 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
phungductung | 0:8ede47d38d10 | 796 | * the Size parameter means the number of 16-bit data length. |
phungductung | 0:8ede47d38d10 | 797 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
phungductung | 0:8ede47d38d10 | 798 | * between Master and Slave(example: audio streaming). |
phungductung | 0:8ede47d38d10 | 799 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 800 | */ |
phungductung | 0:8ede47d38d10 | 801 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
phungductung | 0:8ede47d38d10 | 802 | { |
phungductung | 0:8ede47d38d10 | 803 | uint32_t *tmp; |
phungductung | 0:8ede47d38d10 | 804 | |
phungductung | 0:8ede47d38d10 | 805 | if((pData == NULL) || (Size == 0)) |
phungductung | 0:8ede47d38d10 | 806 | { |
phungductung | 0:8ede47d38d10 | 807 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 808 | } |
phungductung | 0:8ede47d38d10 | 809 | |
phungductung | 0:8ede47d38d10 | 810 | if(hi2s->State == HAL_I2S_STATE_READY) |
phungductung | 0:8ede47d38d10 | 811 | { |
phungductung | 0:8ede47d38d10 | 812 | hi2s->pTxBuffPtr = pData; |
phungductung | 0:8ede47d38d10 | 813 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
phungductung | 0:8ede47d38d10 | 814 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
phungductung | 0:8ede47d38d10 | 815 | { |
phungductung | 0:8ede47d38d10 | 816 | hi2s->TxXferSize = (Size << 1); |
phungductung | 0:8ede47d38d10 | 817 | hi2s->TxXferCount = (Size << 1); |
phungductung | 0:8ede47d38d10 | 818 | } |
phungductung | 0:8ede47d38d10 | 819 | else |
phungductung | 0:8ede47d38d10 | 820 | { |
phungductung | 0:8ede47d38d10 | 821 | hi2s->TxXferSize = Size; |
phungductung | 0:8ede47d38d10 | 822 | hi2s->TxXferCount = Size; |
phungductung | 0:8ede47d38d10 | 823 | } |
phungductung | 0:8ede47d38d10 | 824 | |
phungductung | 0:8ede47d38d10 | 825 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 826 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 827 | |
phungductung | 0:8ede47d38d10 | 828 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 829 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
phungductung | 0:8ede47d38d10 | 830 | |
phungductung | 0:8ede47d38d10 | 831 | /* Set the I2S Tx DMA Half transfer complete callback */ |
phungductung | 0:8ede47d38d10 | 832 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt; |
phungductung | 0:8ede47d38d10 | 833 | |
phungductung | 0:8ede47d38d10 | 834 | /* Set the I2S TxDMA transfer complete callback */ |
phungductung | 0:8ede47d38d10 | 835 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt; |
phungductung | 0:8ede47d38d10 | 836 | |
phungductung | 0:8ede47d38d10 | 837 | /* Set the DMA error callback */ |
phungductung | 0:8ede47d38d10 | 838 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError; |
phungductung | 0:8ede47d38d10 | 839 | |
phungductung | 0:8ede47d38d10 | 840 | /* Enable the Tx DMA Channel */ |
phungductung | 0:8ede47d38d10 | 841 | tmp = (uint32_t*)&pData; |
phungductung | 0:8ede47d38d10 | 842 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
phungductung | 0:8ede47d38d10 | 843 | |
phungductung | 0:8ede47d38d10 | 844 | /* Check if the I2S is already enabled */ |
phungductung | 0:8ede47d38d10 | 845 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
phungductung | 0:8ede47d38d10 | 846 | { |
phungductung | 0:8ede47d38d10 | 847 | /* Enable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 848 | __HAL_I2S_ENABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 849 | } |
phungductung | 0:8ede47d38d10 | 850 | |
phungductung | 0:8ede47d38d10 | 851 | /* Enable Tx DMA Request */ |
phungductung | 0:8ede47d38d10 | 852 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN; |
phungductung | 0:8ede47d38d10 | 853 | |
phungductung | 0:8ede47d38d10 | 854 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 855 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 856 | |
phungductung | 0:8ede47d38d10 | 857 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 858 | } |
phungductung | 0:8ede47d38d10 | 859 | else |
phungductung | 0:8ede47d38d10 | 860 | { |
phungductung | 0:8ede47d38d10 | 861 | return HAL_BUSY; |
phungductung | 0:8ede47d38d10 | 862 | } |
phungductung | 0:8ede47d38d10 | 863 | } |
phungductung | 0:8ede47d38d10 | 864 | |
phungductung | 0:8ede47d38d10 | 865 | /** |
phungductung | 0:8ede47d38d10 | 866 | * @brief Receive an amount of data in non-blocking mode with DMA |
phungductung | 0:8ede47d38d10 | 867 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 868 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 869 | * @param pData: a 16-bit pointer to the Receive data buffer. |
phungductung | 0:8ede47d38d10 | 870 | * @param Size: number of data sample to be sent: |
phungductung | 0:8ede47d38d10 | 871 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
phungductung | 0:8ede47d38d10 | 872 | * configuration phase, the Size parameter means the number of 16-bit data length |
phungductung | 0:8ede47d38d10 | 873 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
phungductung | 0:8ede47d38d10 | 874 | * the Size parameter means the number of 16-bit data length. |
phungductung | 0:8ede47d38d10 | 875 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
phungductung | 0:8ede47d38d10 | 876 | * between Master and Slave(example: audio streaming). |
phungductung | 0:8ede47d38d10 | 877 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 878 | */ |
phungductung | 0:8ede47d38d10 | 879 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
phungductung | 0:8ede47d38d10 | 880 | { |
phungductung | 0:8ede47d38d10 | 881 | uint32_t *tmp; |
phungductung | 0:8ede47d38d10 | 882 | |
phungductung | 0:8ede47d38d10 | 883 | if((pData == NULL) || (Size == 0)) |
phungductung | 0:8ede47d38d10 | 884 | { |
phungductung | 0:8ede47d38d10 | 885 | return HAL_ERROR; |
phungductung | 0:8ede47d38d10 | 886 | } |
phungductung | 0:8ede47d38d10 | 887 | |
phungductung | 0:8ede47d38d10 | 888 | if(hi2s->State == HAL_I2S_STATE_READY) |
phungductung | 0:8ede47d38d10 | 889 | { |
phungductung | 0:8ede47d38d10 | 890 | hi2s->pRxBuffPtr = pData; |
phungductung | 0:8ede47d38d10 | 891 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
phungductung | 0:8ede47d38d10 | 892 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
phungductung | 0:8ede47d38d10 | 893 | { |
phungductung | 0:8ede47d38d10 | 894 | hi2s->RxXferSize = (Size << 1); |
phungductung | 0:8ede47d38d10 | 895 | hi2s->RxXferCount = (Size << 1); |
phungductung | 0:8ede47d38d10 | 896 | } |
phungductung | 0:8ede47d38d10 | 897 | else |
phungductung | 0:8ede47d38d10 | 898 | { |
phungductung | 0:8ede47d38d10 | 899 | hi2s->RxXferSize = Size; |
phungductung | 0:8ede47d38d10 | 900 | hi2s->RxXferCount = Size; |
phungductung | 0:8ede47d38d10 | 901 | } |
phungductung | 0:8ede47d38d10 | 902 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 903 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 904 | |
phungductung | 0:8ede47d38d10 | 905 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
phungductung | 0:8ede47d38d10 | 906 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
phungductung | 0:8ede47d38d10 | 907 | |
phungductung | 0:8ede47d38d10 | 908 | /* Set the I2S Rx DMA Half transfer complete callback */ |
phungductung | 0:8ede47d38d10 | 909 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt; |
phungductung | 0:8ede47d38d10 | 910 | |
phungductung | 0:8ede47d38d10 | 911 | /* Set the I2S Rx DMA transfer complete callback */ |
phungductung | 0:8ede47d38d10 | 912 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt; |
phungductung | 0:8ede47d38d10 | 913 | |
phungductung | 0:8ede47d38d10 | 914 | /* Set the DMA error callback */ |
phungductung | 0:8ede47d38d10 | 915 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError; |
phungductung | 0:8ede47d38d10 | 916 | |
phungductung | 0:8ede47d38d10 | 917 | /* Check if Master Receiver mode is selected */ |
phungductung | 0:8ede47d38d10 | 918 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
phungductung | 0:8ede47d38d10 | 919 | { |
phungductung | 0:8ede47d38d10 | 920 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read |
phungductung | 0:8ede47d38d10 | 921 | access to the SPI_SR register. */ |
phungductung | 0:8ede47d38d10 | 922 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
phungductung | 0:8ede47d38d10 | 923 | } |
phungductung | 0:8ede47d38d10 | 924 | |
phungductung | 0:8ede47d38d10 | 925 | /* Enable the Rx DMA Channel */ |
phungductung | 0:8ede47d38d10 | 926 | tmp = (uint32_t*)&pData; |
phungductung | 0:8ede47d38d10 | 927 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize); |
phungductung | 0:8ede47d38d10 | 928 | |
phungductung | 0:8ede47d38d10 | 929 | /* Check if the I2S is already enabled */ |
phungductung | 0:8ede47d38d10 | 930 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
phungductung | 0:8ede47d38d10 | 931 | { |
phungductung | 0:8ede47d38d10 | 932 | /* Enable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 933 | __HAL_I2S_ENABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 934 | } |
phungductung | 0:8ede47d38d10 | 935 | |
phungductung | 0:8ede47d38d10 | 936 | /* Enable Rx DMA Request */ |
phungductung | 0:8ede47d38d10 | 937 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN; |
phungductung | 0:8ede47d38d10 | 938 | |
phungductung | 0:8ede47d38d10 | 939 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 940 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 941 | |
phungductung | 0:8ede47d38d10 | 942 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 943 | } |
phungductung | 0:8ede47d38d10 | 944 | else |
phungductung | 0:8ede47d38d10 | 945 | { |
phungductung | 0:8ede47d38d10 | 946 | return HAL_BUSY; |
phungductung | 0:8ede47d38d10 | 947 | } |
phungductung | 0:8ede47d38d10 | 948 | } |
phungductung | 0:8ede47d38d10 | 949 | |
phungductung | 0:8ede47d38d10 | 950 | /** |
phungductung | 0:8ede47d38d10 | 951 | * @brief Pauses the audio stream playing from the Media. |
phungductung | 0:8ede47d38d10 | 952 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 953 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 954 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 955 | */ |
phungductung | 0:8ede47d38d10 | 956 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 957 | { |
phungductung | 0:8ede47d38d10 | 958 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 959 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 960 | |
phungductung | 0:8ede47d38d10 | 961 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
phungductung | 0:8ede47d38d10 | 962 | { |
phungductung | 0:8ede47d38d10 | 963 | /* Disable the I2S DMA Tx request */ |
phungductung | 0:8ede47d38d10 | 964 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
phungductung | 0:8ede47d38d10 | 965 | } |
phungductung | 0:8ede47d38d10 | 966 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
phungductung | 0:8ede47d38d10 | 967 | { |
phungductung | 0:8ede47d38d10 | 968 | /* Disable the I2S DMA Rx request */ |
phungductung | 0:8ede47d38d10 | 969 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
phungductung | 0:8ede47d38d10 | 970 | } |
phungductung | 0:8ede47d38d10 | 971 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
phungductung | 0:8ede47d38d10 | 972 | { |
phungductung | 0:8ede47d38d10 | 973 | if((hi2s->Init.Mode == I2S_MODE_SLAVE_TX)||(hi2s->Init.Mode == I2S_MODE_MASTER_TX)) |
phungductung | 0:8ede47d38d10 | 974 | { |
phungductung | 0:8ede47d38d10 | 975 | /* Disable the I2S DMA Tx request */ |
phungductung | 0:8ede47d38d10 | 976 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
phungductung | 0:8ede47d38d10 | 977 | } |
phungductung | 0:8ede47d38d10 | 978 | else |
phungductung | 0:8ede47d38d10 | 979 | { |
phungductung | 0:8ede47d38d10 | 980 | /* Disable the I2S DMA Rx request */ |
phungductung | 0:8ede47d38d10 | 981 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
phungductung | 0:8ede47d38d10 | 982 | } |
phungductung | 0:8ede47d38d10 | 983 | } |
phungductung | 0:8ede47d38d10 | 984 | |
phungductung | 0:8ede47d38d10 | 985 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 986 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 987 | |
phungductung | 0:8ede47d38d10 | 988 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 989 | } |
phungductung | 0:8ede47d38d10 | 990 | |
phungductung | 0:8ede47d38d10 | 991 | /** |
phungductung | 0:8ede47d38d10 | 992 | * @brief Resumes the audio stream playing from the Media. |
phungductung | 0:8ede47d38d10 | 993 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 994 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 995 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 996 | */ |
phungductung | 0:8ede47d38d10 | 997 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 998 | { |
phungductung | 0:8ede47d38d10 | 999 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 1000 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 1001 | |
phungductung | 0:8ede47d38d10 | 1002 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
phungductung | 0:8ede47d38d10 | 1003 | { |
phungductung | 0:8ede47d38d10 | 1004 | /* Enable the I2S DMA Tx request */ |
phungductung | 0:8ede47d38d10 | 1005 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
phungductung | 0:8ede47d38d10 | 1006 | } |
phungductung | 0:8ede47d38d10 | 1007 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
phungductung | 0:8ede47d38d10 | 1008 | { |
phungductung | 0:8ede47d38d10 | 1009 | /* Enable the I2S DMA Rx request */ |
phungductung | 0:8ede47d38d10 | 1010 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
phungductung | 0:8ede47d38d10 | 1011 | } |
phungductung | 0:8ede47d38d10 | 1012 | |
phungductung | 0:8ede47d38d10 | 1013 | /* If the I2S peripheral is still not enabled, enable it */ |
phungductung | 0:8ede47d38d10 | 1014 | if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
phungductung | 0:8ede47d38d10 | 1015 | { |
phungductung | 0:8ede47d38d10 | 1016 | /* Enable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 1017 | __HAL_I2S_ENABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 1018 | } |
phungductung | 0:8ede47d38d10 | 1019 | |
phungductung | 0:8ede47d38d10 | 1020 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 1021 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 1022 | |
phungductung | 0:8ede47d38d10 | 1023 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 1024 | } |
phungductung | 0:8ede47d38d10 | 1025 | |
phungductung | 0:8ede47d38d10 | 1026 | /** |
phungductung | 0:8ede47d38d10 | 1027 | * @brief Stops the audio stream playing from the Media. |
phungductung | 0:8ede47d38d10 | 1028 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1029 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1030 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 1031 | */ |
phungductung | 0:8ede47d38d10 | 1032 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1033 | { |
phungductung | 0:8ede47d38d10 | 1034 | /* Process Locked */ |
phungductung | 0:8ede47d38d10 | 1035 | __HAL_LOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 1036 | |
phungductung | 0:8ede47d38d10 | 1037 | /* Disable the I2S Tx/Rx DMA requests */ |
phungductung | 0:8ede47d38d10 | 1038 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
phungductung | 0:8ede47d38d10 | 1039 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
phungductung | 0:8ede47d38d10 | 1040 | |
phungductung | 0:8ede47d38d10 | 1041 | /* Abort the I2S DMA Channel tx */ |
phungductung | 0:8ede47d38d10 | 1042 | if(hi2s->hdmatx != NULL) |
phungductung | 0:8ede47d38d10 | 1043 | { |
phungductung | 0:8ede47d38d10 | 1044 | /* Disable the I2S DMA channel */ |
phungductung | 0:8ede47d38d10 | 1045 | __HAL_DMA_DISABLE(hi2s->hdmatx); |
phungductung | 0:8ede47d38d10 | 1046 | HAL_DMA_Abort(hi2s->hdmatx); |
phungductung | 0:8ede47d38d10 | 1047 | } |
phungductung | 0:8ede47d38d10 | 1048 | /* Abort the I2S DMA Channel rx */ |
phungductung | 0:8ede47d38d10 | 1049 | if(hi2s->hdmarx != NULL) |
phungductung | 0:8ede47d38d10 | 1050 | { |
phungductung | 0:8ede47d38d10 | 1051 | /* Disable the I2S DMA channel */ |
phungductung | 0:8ede47d38d10 | 1052 | __HAL_DMA_DISABLE(hi2s->hdmarx); |
phungductung | 0:8ede47d38d10 | 1053 | HAL_DMA_Abort(hi2s->hdmarx); |
phungductung | 0:8ede47d38d10 | 1054 | } |
phungductung | 0:8ede47d38d10 | 1055 | |
phungductung | 0:8ede47d38d10 | 1056 | /* Disable I2S peripheral */ |
phungductung | 0:8ede47d38d10 | 1057 | __HAL_I2S_DISABLE(hi2s); |
phungductung | 0:8ede47d38d10 | 1058 | |
phungductung | 0:8ede47d38d10 | 1059 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1060 | |
phungductung | 0:8ede47d38d10 | 1061 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 1062 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 1063 | |
phungductung | 0:8ede47d38d10 | 1064 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 1065 | } |
phungductung | 0:8ede47d38d10 | 1066 | |
phungductung | 0:8ede47d38d10 | 1067 | /** |
phungductung | 0:8ede47d38d10 | 1068 | * @brief This function handles I2S interrupt request. |
phungductung | 0:8ede47d38d10 | 1069 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1070 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1071 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 1072 | */ |
phungductung | 0:8ede47d38d10 | 1073 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1074 | { |
phungductung | 0:8ede47d38d10 | 1075 | __IO uint32_t i2ssr = hi2s->Instance->SR; |
phungductung | 0:8ede47d38d10 | 1076 | |
phungductung | 0:8ede47d38d10 | 1077 | if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
phungductung | 0:8ede47d38d10 | 1078 | { |
phungductung | 0:8ede47d38d10 | 1079 | /* I2S in mode Receiver ----------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 1080 | if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) |
phungductung | 0:8ede47d38d10 | 1081 | { |
phungductung | 0:8ede47d38d10 | 1082 | I2S_Receive_IT(hi2s); |
phungductung | 0:8ede47d38d10 | 1083 | } |
phungductung | 0:8ede47d38d10 | 1084 | |
phungductung | 0:8ede47d38d10 | 1085 | /* I2S Overrun error interrupt occurred -------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 1086 | if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
phungductung | 0:8ede47d38d10 | 1087 | { |
phungductung | 0:8ede47d38d10 | 1088 | /* Disable RXNE and ERR interrupt */ |
phungductung | 0:8ede47d38d10 | 1089 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
phungductung | 0:8ede47d38d10 | 1090 | |
phungductung | 0:8ede47d38d10 | 1091 | /* Set the I2S State ready */ |
phungductung | 0:8ede47d38d10 | 1092 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1093 | |
phungductung | 0:8ede47d38d10 | 1094 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 1095 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
phungductung | 0:8ede47d38d10 | 1096 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1097 | } |
phungductung | 0:8ede47d38d10 | 1098 | } |
phungductung | 0:8ede47d38d10 | 1099 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
phungductung | 0:8ede47d38d10 | 1100 | { |
phungductung | 0:8ede47d38d10 | 1101 | /* I2S in mode Transmitter ---------------------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 1102 | if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) |
phungductung | 0:8ede47d38d10 | 1103 | { |
phungductung | 0:8ede47d38d10 | 1104 | I2S_Transmit_IT(hi2s); |
phungductung | 0:8ede47d38d10 | 1105 | } |
phungductung | 0:8ede47d38d10 | 1106 | |
phungductung | 0:8ede47d38d10 | 1107 | /* I2S Underrun error interrupt occurred ------------------------------------*/ |
phungductung | 0:8ede47d38d10 | 1108 | if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
phungductung | 0:8ede47d38d10 | 1109 | { |
phungductung | 0:8ede47d38d10 | 1110 | /* Disable TXE and ERR interrupt */ |
phungductung | 0:8ede47d38d10 | 1111 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
phungductung | 0:8ede47d38d10 | 1112 | |
phungductung | 0:8ede47d38d10 | 1113 | /* Set the I2S State ready */ |
phungductung | 0:8ede47d38d10 | 1114 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1115 | |
phungductung | 0:8ede47d38d10 | 1116 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 1117 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
phungductung | 0:8ede47d38d10 | 1118 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1119 | } |
phungductung | 0:8ede47d38d10 | 1120 | } |
phungductung | 0:8ede47d38d10 | 1121 | } |
phungductung | 0:8ede47d38d10 | 1122 | |
phungductung | 0:8ede47d38d10 | 1123 | /** |
phungductung | 0:8ede47d38d10 | 1124 | * @} |
phungductung | 0:8ede47d38d10 | 1125 | */ |
phungductung | 0:8ede47d38d10 | 1126 | |
phungductung | 0:8ede47d38d10 | 1127 | /** |
phungductung | 0:8ede47d38d10 | 1128 | * @} |
phungductung | 0:8ede47d38d10 | 1129 | */ |
phungductung | 0:8ede47d38d10 | 1130 | |
phungductung | 0:8ede47d38d10 | 1131 | /** @addtogroup I2S_Private_Functions I2S Private Functions |
phungductung | 0:8ede47d38d10 | 1132 | * @{ |
phungductung | 0:8ede47d38d10 | 1133 | */ |
phungductung | 0:8ede47d38d10 | 1134 | /** |
phungductung | 0:8ede47d38d10 | 1135 | * @brief This function handles I2S Communication Timeout. |
phungductung | 0:8ede47d38d10 | 1136 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1137 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1138 | * @param Flag: Flag checked |
phungductung | 0:8ede47d38d10 | 1139 | * @param State: Value of the flag expected |
phungductung | 0:8ede47d38d10 | 1140 | * @param Timeout: Duration of the timeout |
phungductung | 0:8ede47d38d10 | 1141 | * @retval HAL status |
phungductung | 0:8ede47d38d10 | 1142 | */ |
phungductung | 0:8ede47d38d10 | 1143 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, |
phungductung | 0:8ede47d38d10 | 1144 | uint32_t State, uint32_t Timeout) |
phungductung | 0:8ede47d38d10 | 1145 | { |
phungductung | 0:8ede47d38d10 | 1146 | uint32_t tickstart = 0; |
phungductung | 0:8ede47d38d10 | 1147 | |
phungductung | 0:8ede47d38d10 | 1148 | /* Get tick */ |
phungductung | 0:8ede47d38d10 | 1149 | tickstart = HAL_GetTick(); |
phungductung | 0:8ede47d38d10 | 1150 | |
phungductung | 0:8ede47d38d10 | 1151 | /* Wait until flag is set */ |
phungductung | 0:8ede47d38d10 | 1152 | if(State == RESET) |
phungductung | 0:8ede47d38d10 | 1153 | { |
phungductung | 0:8ede47d38d10 | 1154 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET) |
phungductung | 0:8ede47d38d10 | 1155 | { |
phungductung | 0:8ede47d38d10 | 1156 | if(Timeout != HAL_MAX_DELAY) |
phungductung | 0:8ede47d38d10 | 1157 | { |
phungductung | 0:8ede47d38d10 | 1158 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
phungductung | 0:8ede47d38d10 | 1159 | { |
phungductung | 0:8ede47d38d10 | 1160 | /* Set the I2S State ready */ |
phungductung | 0:8ede47d38d10 | 1161 | hi2s->State= HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1162 | |
phungductung | 0:8ede47d38d10 | 1163 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 1164 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 1165 | |
phungductung | 0:8ede47d38d10 | 1166 | return HAL_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 1167 | } |
phungductung | 0:8ede47d38d10 | 1168 | } |
phungductung | 0:8ede47d38d10 | 1169 | } |
phungductung | 0:8ede47d38d10 | 1170 | } |
phungductung | 0:8ede47d38d10 | 1171 | else |
phungductung | 0:8ede47d38d10 | 1172 | { |
phungductung | 0:8ede47d38d10 | 1173 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET) |
phungductung | 0:8ede47d38d10 | 1174 | { |
phungductung | 0:8ede47d38d10 | 1175 | if(Timeout != HAL_MAX_DELAY) |
phungductung | 0:8ede47d38d10 | 1176 | { |
phungductung | 0:8ede47d38d10 | 1177 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
phungductung | 0:8ede47d38d10 | 1178 | { |
phungductung | 0:8ede47d38d10 | 1179 | /* Set the I2S State ready */ |
phungductung | 0:8ede47d38d10 | 1180 | hi2s->State= HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1181 | |
phungductung | 0:8ede47d38d10 | 1182 | /* Process Unlocked */ |
phungductung | 0:8ede47d38d10 | 1183 | __HAL_UNLOCK(hi2s); |
phungductung | 0:8ede47d38d10 | 1184 | |
phungductung | 0:8ede47d38d10 | 1185 | return HAL_TIMEOUT; |
phungductung | 0:8ede47d38d10 | 1186 | } |
phungductung | 0:8ede47d38d10 | 1187 | } |
phungductung | 0:8ede47d38d10 | 1188 | } |
phungductung | 0:8ede47d38d10 | 1189 | } |
phungductung | 0:8ede47d38d10 | 1190 | return HAL_OK; |
phungductung | 0:8ede47d38d10 | 1191 | } |
phungductung | 0:8ede47d38d10 | 1192 | /** |
phungductung | 0:8ede47d38d10 | 1193 | * @} |
phungductung | 0:8ede47d38d10 | 1194 | */ |
phungductung | 0:8ede47d38d10 | 1195 | |
phungductung | 0:8ede47d38d10 | 1196 | /** @addtogroup I2S_Exported_Functions I2S Exported Functions |
phungductung | 0:8ede47d38d10 | 1197 | * @{ |
phungductung | 0:8ede47d38d10 | 1198 | */ |
phungductung | 0:8ede47d38d10 | 1199 | |
phungductung | 0:8ede47d38d10 | 1200 | /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions |
phungductung | 0:8ede47d38d10 | 1201 | * @{ |
phungductung | 0:8ede47d38d10 | 1202 | */ |
phungductung | 0:8ede47d38d10 | 1203 | /** |
phungductung | 0:8ede47d38d10 | 1204 | * @brief Tx Transfer Half completed callbacks |
phungductung | 0:8ede47d38d10 | 1205 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1206 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1207 | * @retval None |
phungductung | 0:8ede47d38d10 | 1208 | */ |
phungductung | 0:8ede47d38d10 | 1209 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1210 | { |
phungductung | 0:8ede47d38d10 | 1211 | /* Prevent unused argument(s) compilation warning */ |
phungductung | 0:8ede47d38d10 | 1212 | UNUSED(hi2s); |
phungductung | 0:8ede47d38d10 | 1213 | |
phungductung | 0:8ede47d38d10 | 1214 | /* NOTE : This function Should not be modified, when the callback is needed, |
phungductung | 0:8ede47d38d10 | 1215 | the HAL_I2S_TxHalfCpltCallback could be implemented in the user file |
phungductung | 0:8ede47d38d10 | 1216 | */ |
phungductung | 0:8ede47d38d10 | 1217 | } |
phungductung | 0:8ede47d38d10 | 1218 | |
phungductung | 0:8ede47d38d10 | 1219 | /** |
phungductung | 0:8ede47d38d10 | 1220 | * @brief Tx Transfer completed callbacks |
phungductung | 0:8ede47d38d10 | 1221 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1222 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1223 | * @retval None |
phungductung | 0:8ede47d38d10 | 1224 | */ |
phungductung | 0:8ede47d38d10 | 1225 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1226 | { |
phungductung | 0:8ede47d38d10 | 1227 | /* Prevent unused argument(s) compilation warning */ |
phungductung | 0:8ede47d38d10 | 1228 | UNUSED(hi2s); |
phungductung | 0:8ede47d38d10 | 1229 | |
phungductung | 0:8ede47d38d10 | 1230 | /* NOTE : This function Should not be modified, when the callback is needed, |
phungductung | 0:8ede47d38d10 | 1231 | the HAL_I2S_TxCpltCallback could be implemented in the user file |
phungductung | 0:8ede47d38d10 | 1232 | */ |
phungductung | 0:8ede47d38d10 | 1233 | } |
phungductung | 0:8ede47d38d10 | 1234 | |
phungductung | 0:8ede47d38d10 | 1235 | /** |
phungductung | 0:8ede47d38d10 | 1236 | * @brief Rx Transfer half completed callbacks |
phungductung | 0:8ede47d38d10 | 1237 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1238 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1239 | * @retval None |
phungductung | 0:8ede47d38d10 | 1240 | */ |
phungductung | 0:8ede47d38d10 | 1241 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1242 | { |
phungductung | 0:8ede47d38d10 | 1243 | /* Prevent unused argument(s) compilation warning */ |
phungductung | 0:8ede47d38d10 | 1244 | UNUSED(hi2s); |
phungductung | 0:8ede47d38d10 | 1245 | |
phungductung | 0:8ede47d38d10 | 1246 | /* NOTE : This function Should not be modified, when the callback is needed, |
phungductung | 0:8ede47d38d10 | 1247 | the HAL_I2S_RxCpltCallback could be implemented in the user file |
phungductung | 0:8ede47d38d10 | 1248 | */ |
phungductung | 0:8ede47d38d10 | 1249 | } |
phungductung | 0:8ede47d38d10 | 1250 | |
phungductung | 0:8ede47d38d10 | 1251 | /** |
phungductung | 0:8ede47d38d10 | 1252 | * @brief Rx Transfer completed callbacks |
phungductung | 0:8ede47d38d10 | 1253 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1254 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1255 | * @retval None |
phungductung | 0:8ede47d38d10 | 1256 | */ |
phungductung | 0:8ede47d38d10 | 1257 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1258 | { |
phungductung | 0:8ede47d38d10 | 1259 | /* Prevent unused argument(s) compilation warning */ |
phungductung | 0:8ede47d38d10 | 1260 | UNUSED(hi2s); |
phungductung | 0:8ede47d38d10 | 1261 | |
phungductung | 0:8ede47d38d10 | 1262 | /* NOTE : This function Should not be modified, when the callback is needed, |
phungductung | 0:8ede47d38d10 | 1263 | the HAL_I2S_RxCpltCallback could be implemented in the user file |
phungductung | 0:8ede47d38d10 | 1264 | */ |
phungductung | 0:8ede47d38d10 | 1265 | } |
phungductung | 0:8ede47d38d10 | 1266 | |
phungductung | 0:8ede47d38d10 | 1267 | /** |
phungductung | 0:8ede47d38d10 | 1268 | * @brief I2S error callbacks |
phungductung | 0:8ede47d38d10 | 1269 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1270 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1271 | * @retval None |
phungductung | 0:8ede47d38d10 | 1272 | */ |
phungductung | 0:8ede47d38d10 | 1273 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1274 | { |
phungductung | 0:8ede47d38d10 | 1275 | /* Prevent unused argument(s) compilation warning */ |
phungductung | 0:8ede47d38d10 | 1276 | UNUSED(hi2s); |
phungductung | 0:8ede47d38d10 | 1277 | |
phungductung | 0:8ede47d38d10 | 1278 | /* NOTE : This function Should not be modified, when the callback is needed, |
phungductung | 0:8ede47d38d10 | 1279 | the HAL_I2S_ErrorCallback could be implemented in the user file |
phungductung | 0:8ede47d38d10 | 1280 | */ |
phungductung | 0:8ede47d38d10 | 1281 | } |
phungductung | 0:8ede47d38d10 | 1282 | |
phungductung | 0:8ede47d38d10 | 1283 | /** |
phungductung | 0:8ede47d38d10 | 1284 | * @} |
phungductung | 0:8ede47d38d10 | 1285 | */ |
phungductung | 0:8ede47d38d10 | 1286 | |
phungductung | 0:8ede47d38d10 | 1287 | /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions |
phungductung | 0:8ede47d38d10 | 1288 | * @brief Peripheral State functions |
phungductung | 0:8ede47d38d10 | 1289 | * |
phungductung | 0:8ede47d38d10 | 1290 | @verbatim |
phungductung | 0:8ede47d38d10 | 1291 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 1292 | ##### Peripheral State and Errors functions ##### |
phungductung | 0:8ede47d38d10 | 1293 | =============================================================================== |
phungductung | 0:8ede47d38d10 | 1294 | [..] |
phungductung | 0:8ede47d38d10 | 1295 | This subsection permits to get in run-time the status of the peripheral |
phungductung | 0:8ede47d38d10 | 1296 | and the data flow. |
phungductung | 0:8ede47d38d10 | 1297 | |
phungductung | 0:8ede47d38d10 | 1298 | @endverbatim |
phungductung | 0:8ede47d38d10 | 1299 | * @{ |
phungductung | 0:8ede47d38d10 | 1300 | */ |
phungductung | 0:8ede47d38d10 | 1301 | |
phungductung | 0:8ede47d38d10 | 1302 | /** |
phungductung | 0:8ede47d38d10 | 1303 | * @brief Return the I2S state |
phungductung | 0:8ede47d38d10 | 1304 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1305 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1306 | * @retval HAL state |
phungductung | 0:8ede47d38d10 | 1307 | */ |
phungductung | 0:8ede47d38d10 | 1308 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1309 | { |
phungductung | 0:8ede47d38d10 | 1310 | return hi2s->State; |
phungductung | 0:8ede47d38d10 | 1311 | } |
phungductung | 0:8ede47d38d10 | 1312 | |
phungductung | 0:8ede47d38d10 | 1313 | /** |
phungductung | 0:8ede47d38d10 | 1314 | * @brief Return the I2S error code |
phungductung | 0:8ede47d38d10 | 1315 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1316 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1317 | * @retval I2S Error Code |
phungductung | 0:8ede47d38d10 | 1318 | */ |
phungductung | 0:8ede47d38d10 | 1319 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1320 | { |
phungductung | 0:8ede47d38d10 | 1321 | return hi2s->ErrorCode; |
phungductung | 0:8ede47d38d10 | 1322 | } |
phungductung | 0:8ede47d38d10 | 1323 | /** |
phungductung | 0:8ede47d38d10 | 1324 | * @} |
phungductung | 0:8ede47d38d10 | 1325 | */ |
phungductung | 0:8ede47d38d10 | 1326 | |
phungductung | 0:8ede47d38d10 | 1327 | /** |
phungductung | 0:8ede47d38d10 | 1328 | * @} |
phungductung | 0:8ede47d38d10 | 1329 | */ |
phungductung | 0:8ede47d38d10 | 1330 | |
phungductung | 0:8ede47d38d10 | 1331 | /** |
phungductung | 0:8ede47d38d10 | 1332 | * @brief Get I2S Input Clock based on I2S source clock selection |
phungductung | 0:8ede47d38d10 | 1333 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1334 | * the configuration information for I2S module. |
phungductung | 0:8ede47d38d10 | 1335 | * @retval I2S Clock Input |
phungductung | 0:8ede47d38d10 | 1336 | */ |
phungductung | 0:8ede47d38d10 | 1337 | static uint32_t I2S_GetClockFreq(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1338 | { |
phungductung | 0:8ede47d38d10 | 1339 | uint32_t tmpreg = 0; |
phungductung | 0:8ede47d38d10 | 1340 | /* This variable used to store the VCO Input (value in Hz) */ |
phungductung | 0:8ede47d38d10 | 1341 | uint32_t vcoinput = 0; |
phungductung | 0:8ede47d38d10 | 1342 | /* This variable used to store the I2S_CK_x (value in Hz) */ |
phungductung | 0:8ede47d38d10 | 1343 | uint32_t i2sclocksource = 0; |
phungductung | 0:8ede47d38d10 | 1344 | |
phungductung | 0:8ede47d38d10 | 1345 | /* Configure I2S Clock based on I2S source clock selection */ |
phungductung | 0:8ede47d38d10 | 1346 | |
phungductung | 0:8ede47d38d10 | 1347 | /* I2S_CLK_x : I2S Block Clock configuration for different clock sources selected */ |
phungductung | 0:8ede47d38d10 | 1348 | switch(hi2s->Init.ClockSource) |
phungductung | 0:8ede47d38d10 | 1349 | { |
phungductung | 0:8ede47d38d10 | 1350 | case I2S_CLOCK_SYSCLK : |
phungductung | 0:8ede47d38d10 | 1351 | { |
phungductung | 0:8ede47d38d10 | 1352 | /* Configure the PLLI2S division factor */ |
phungductung | 0:8ede47d38d10 | 1353 | /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */ |
phungductung | 0:8ede47d38d10 | 1354 | if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI) |
phungductung | 0:8ede47d38d10 | 1355 | { |
phungductung | 0:8ede47d38d10 | 1356 | /* In Case the PLL Source is HSI (Internal Clock) */ |
phungductung | 0:8ede47d38d10 | 1357 | vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)); |
phungductung | 0:8ede47d38d10 | 1358 | } |
phungductung | 0:8ede47d38d10 | 1359 | else |
phungductung | 0:8ede47d38d10 | 1360 | { |
phungductung | 0:8ede47d38d10 | 1361 | /* In Case the PLL Source is HSE (External Clock) */ |
phungductung | 0:8ede47d38d10 | 1362 | vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM))); |
phungductung | 0:8ede47d38d10 | 1363 | } |
phungductung | 0:8ede47d38d10 | 1364 | |
phungductung | 0:8ede47d38d10 | 1365 | /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */ |
phungductung | 0:8ede47d38d10 | 1366 | /* I2S_CLK(first level) = PLLI2S_VCO Output/PLLI2SR */ |
phungductung | 0:8ede47d38d10 | 1367 | tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28; |
phungductung | 0:8ede47d38d10 | 1368 | i2sclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg); |
phungductung | 0:8ede47d38d10 | 1369 | |
phungductung | 0:8ede47d38d10 | 1370 | break; |
phungductung | 0:8ede47d38d10 | 1371 | } |
phungductung | 0:8ede47d38d10 | 1372 | case I2S_CLOCK_EXTERNAL : |
phungductung | 0:8ede47d38d10 | 1373 | { |
phungductung | 0:8ede47d38d10 | 1374 | i2sclocksource = EXTERNAL_CLOCK_VALUE; |
phungductung | 0:8ede47d38d10 | 1375 | break; |
phungductung | 0:8ede47d38d10 | 1376 | } |
phungductung | 0:8ede47d38d10 | 1377 | default : |
phungductung | 0:8ede47d38d10 | 1378 | { |
phungductung | 0:8ede47d38d10 | 1379 | break; |
phungductung | 0:8ede47d38d10 | 1380 | } |
phungductung | 0:8ede47d38d10 | 1381 | } |
phungductung | 0:8ede47d38d10 | 1382 | |
phungductung | 0:8ede47d38d10 | 1383 | /* the return result is the value of I2S clock */ |
phungductung | 0:8ede47d38d10 | 1384 | return i2sclocksource; |
phungductung | 0:8ede47d38d10 | 1385 | } |
phungductung | 0:8ede47d38d10 | 1386 | |
phungductung | 0:8ede47d38d10 | 1387 | /** @addtogroup I2S_Private_Functions I2S Private Functions |
phungductung | 0:8ede47d38d10 | 1388 | * @{ |
phungductung | 0:8ede47d38d10 | 1389 | */ |
phungductung | 0:8ede47d38d10 | 1390 | /** |
phungductung | 0:8ede47d38d10 | 1391 | * @brief DMA I2S transmit process complete callback |
phungductung | 0:8ede47d38d10 | 1392 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1393 | * the configuration information for the specified DMA module. |
phungductung | 0:8ede47d38d10 | 1394 | * @retval None |
phungductung | 0:8ede47d38d10 | 1395 | */ |
phungductung | 0:8ede47d38d10 | 1396 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma) |
phungductung | 0:8ede47d38d10 | 1397 | { |
phungductung | 0:8ede47d38d10 | 1398 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
phungductung | 0:8ede47d38d10 | 1399 | |
phungductung | 0:8ede47d38d10 | 1400 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0) |
phungductung | 0:8ede47d38d10 | 1401 | { |
phungductung | 0:8ede47d38d10 | 1402 | hi2s->TxXferCount = 0; |
phungductung | 0:8ede47d38d10 | 1403 | |
phungductung | 0:8ede47d38d10 | 1404 | /* Disable Tx DMA Request */ |
phungductung | 0:8ede47d38d10 | 1405 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
phungductung | 0:8ede47d38d10 | 1406 | |
phungductung | 0:8ede47d38d10 | 1407 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
phungductung | 0:8ede47d38d10 | 1408 | { |
phungductung | 0:8ede47d38d10 | 1409 | if(hi2s->RxXferCount == 0) |
phungductung | 0:8ede47d38d10 | 1410 | { |
phungductung | 0:8ede47d38d10 | 1411 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1412 | } |
phungductung | 0:8ede47d38d10 | 1413 | } |
phungductung | 0:8ede47d38d10 | 1414 | else |
phungductung | 0:8ede47d38d10 | 1415 | { |
phungductung | 0:8ede47d38d10 | 1416 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1417 | } |
phungductung | 0:8ede47d38d10 | 1418 | } |
phungductung | 0:8ede47d38d10 | 1419 | HAL_I2S_TxCpltCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1420 | } |
phungductung | 0:8ede47d38d10 | 1421 | |
phungductung | 0:8ede47d38d10 | 1422 | /** |
phungductung | 0:8ede47d38d10 | 1423 | * @brief DMA I2S transmit process half complete callback |
phungductung | 0:8ede47d38d10 | 1424 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1425 | * the configuration information for the specified DMA module. |
phungductung | 0:8ede47d38d10 | 1426 | * @retval None |
phungductung | 0:8ede47d38d10 | 1427 | */ |
phungductung | 0:8ede47d38d10 | 1428 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
phungductung | 0:8ede47d38d10 | 1429 | { |
phungductung | 0:8ede47d38d10 | 1430 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
phungductung | 0:8ede47d38d10 | 1431 | |
phungductung | 0:8ede47d38d10 | 1432 | HAL_I2S_TxHalfCpltCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1433 | } |
phungductung | 0:8ede47d38d10 | 1434 | |
phungductung | 0:8ede47d38d10 | 1435 | /** |
phungductung | 0:8ede47d38d10 | 1436 | * @brief DMA I2S receive process complete callback |
phungductung | 0:8ede47d38d10 | 1437 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1438 | * the configuration information for the specified DMA module. |
phungductung | 0:8ede47d38d10 | 1439 | * @retval None |
phungductung | 0:8ede47d38d10 | 1440 | */ |
phungductung | 0:8ede47d38d10 | 1441 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma) |
phungductung | 0:8ede47d38d10 | 1442 | { |
phungductung | 0:8ede47d38d10 | 1443 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
phungductung | 0:8ede47d38d10 | 1444 | |
phungductung | 0:8ede47d38d10 | 1445 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0) |
phungductung | 0:8ede47d38d10 | 1446 | { |
phungductung | 0:8ede47d38d10 | 1447 | /* Disable Rx DMA Request */ |
phungductung | 0:8ede47d38d10 | 1448 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
phungductung | 0:8ede47d38d10 | 1449 | |
phungductung | 0:8ede47d38d10 | 1450 | hi2s->RxXferCount = 0; |
phungductung | 0:8ede47d38d10 | 1451 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
phungductung | 0:8ede47d38d10 | 1452 | { |
phungductung | 0:8ede47d38d10 | 1453 | if(hi2s->TxXferCount == 0) |
phungductung | 0:8ede47d38d10 | 1454 | { |
phungductung | 0:8ede47d38d10 | 1455 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1456 | } |
phungductung | 0:8ede47d38d10 | 1457 | } |
phungductung | 0:8ede47d38d10 | 1458 | else |
phungductung | 0:8ede47d38d10 | 1459 | { |
phungductung | 0:8ede47d38d10 | 1460 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1461 | } |
phungductung | 0:8ede47d38d10 | 1462 | } |
phungductung | 0:8ede47d38d10 | 1463 | HAL_I2S_RxCpltCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1464 | } |
phungductung | 0:8ede47d38d10 | 1465 | |
phungductung | 0:8ede47d38d10 | 1466 | /** |
phungductung | 0:8ede47d38d10 | 1467 | * @brief DMA I2S receive process half complete callback |
phungductung | 0:8ede47d38d10 | 1468 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1469 | * the configuration information for the specified DMA module. |
phungductung | 0:8ede47d38d10 | 1470 | * @retval None |
phungductung | 0:8ede47d38d10 | 1471 | */ |
phungductung | 0:8ede47d38d10 | 1472 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
phungductung | 0:8ede47d38d10 | 1473 | { |
phungductung | 0:8ede47d38d10 | 1474 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
phungductung | 0:8ede47d38d10 | 1475 | |
phungductung | 0:8ede47d38d10 | 1476 | HAL_I2S_RxHalfCpltCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1477 | } |
phungductung | 0:8ede47d38d10 | 1478 | |
phungductung | 0:8ede47d38d10 | 1479 | /** |
phungductung | 0:8ede47d38d10 | 1480 | * @brief DMA I2S communication error callback |
phungductung | 0:8ede47d38d10 | 1481 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1482 | * the configuration information for the specified DMA module. |
phungductung | 0:8ede47d38d10 | 1483 | * @retval None |
phungductung | 0:8ede47d38d10 | 1484 | */ |
phungductung | 0:8ede47d38d10 | 1485 | static void I2S_DMAError(DMA_HandleTypeDef *hdma) |
phungductung | 0:8ede47d38d10 | 1486 | { |
phungductung | 0:8ede47d38d10 | 1487 | I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
phungductung | 0:8ede47d38d10 | 1488 | |
phungductung | 0:8ede47d38d10 | 1489 | /* Disable Rx and Tx DMA Request */ |
phungductung | 0:8ede47d38d10 | 1490 | hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
phungductung | 0:8ede47d38d10 | 1491 | hi2s->TxXferCount = 0; |
phungductung | 0:8ede47d38d10 | 1492 | hi2s->RxXferCount = 0; |
phungductung | 0:8ede47d38d10 | 1493 | |
phungductung | 0:8ede47d38d10 | 1494 | hi2s->State= HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1495 | |
phungductung | 0:8ede47d38d10 | 1496 | /* Set the error code and execute error callback*/ |
phungductung | 0:8ede47d38d10 | 1497 | hi2s->ErrorCode |= HAL_I2S_ERROR_DMA; |
phungductung | 0:8ede47d38d10 | 1498 | HAL_I2S_ErrorCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1499 | } |
phungductung | 0:8ede47d38d10 | 1500 | |
phungductung | 0:8ede47d38d10 | 1501 | /** |
phungductung | 0:8ede47d38d10 | 1502 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
phungductung | 0:8ede47d38d10 | 1503 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
phungductung | 0:8ede47d38d10 | 1504 | * the configuration information for I2S module |
phungductung | 0:8ede47d38d10 | 1505 | * @retval None |
phungductung | 0:8ede47d38d10 | 1506 | */ |
phungductung | 0:8ede47d38d10 | 1507 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1508 | { |
phungductung | 0:8ede47d38d10 | 1509 | /* Transmit data */ |
phungductung | 0:8ede47d38d10 | 1510 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
phungductung | 0:8ede47d38d10 | 1511 | hi2s->TxXferCount--; |
phungductung | 0:8ede47d38d10 | 1512 | |
phungductung | 0:8ede47d38d10 | 1513 | if(hi2s->TxXferCount == 0) |
phungductung | 0:8ede47d38d10 | 1514 | { |
phungductung | 0:8ede47d38d10 | 1515 | /* Disable TXE and ERR interrupt */ |
phungductung | 0:8ede47d38d10 | 1516 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
phungductung | 0:8ede47d38d10 | 1517 | |
phungductung | 0:8ede47d38d10 | 1518 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1519 | HAL_I2S_TxCpltCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1520 | } |
phungductung | 0:8ede47d38d10 | 1521 | } |
phungductung | 0:8ede47d38d10 | 1522 | |
phungductung | 0:8ede47d38d10 | 1523 | /** |
phungductung | 0:8ede47d38d10 | 1524 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
phungductung | 0:8ede47d38d10 | 1525 | * @param hi2s: I2S handle |
phungductung | 0:8ede47d38d10 | 1526 | * @retval None |
phungductung | 0:8ede47d38d10 | 1527 | */ |
phungductung | 0:8ede47d38d10 | 1528 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s) |
phungductung | 0:8ede47d38d10 | 1529 | { |
phungductung | 0:8ede47d38d10 | 1530 | /* Receive data */ |
phungductung | 0:8ede47d38d10 | 1531 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
phungductung | 0:8ede47d38d10 | 1532 | hi2s->RxXferCount--; |
phungductung | 0:8ede47d38d10 | 1533 | |
phungductung | 0:8ede47d38d10 | 1534 | if(hi2s->RxXferCount == 0) |
phungductung | 0:8ede47d38d10 | 1535 | { |
phungductung | 0:8ede47d38d10 | 1536 | /* Disable RXNE and ERR interrupt */ |
phungductung | 0:8ede47d38d10 | 1537 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
phungductung | 0:8ede47d38d10 | 1538 | |
phungductung | 0:8ede47d38d10 | 1539 | hi2s->State = HAL_I2S_STATE_READY; |
phungductung | 0:8ede47d38d10 | 1540 | HAL_I2S_RxCpltCallback(hi2s); |
phungductung | 0:8ede47d38d10 | 1541 | } |
phungductung | 0:8ede47d38d10 | 1542 | } |
phungductung | 0:8ede47d38d10 | 1543 | /** |
phungductung | 0:8ede47d38d10 | 1544 | * @} |
phungductung | 0:8ede47d38d10 | 1545 | */ |
phungductung | 0:8ede47d38d10 | 1546 | |
phungductung | 0:8ede47d38d10 | 1547 | #endif /* HAL_I2S_MODULE_ENABLED */ |
phungductung | 0:8ede47d38d10 | 1548 | /** |
phungductung | 0:8ede47d38d10 | 1549 | * @} |
phungductung | 0:8ede47d38d10 | 1550 | */ |
phungductung | 0:8ede47d38d10 | 1551 | |
phungductung | 0:8ede47d38d10 | 1552 | /** |
phungductung | 0:8ede47d38d10 | 1553 | * @} |
phungductung | 0:8ede47d38d10 | 1554 | */ |
phungductung | 0:8ede47d38d10 | 1555 | |
phungductung | 0:8ede47d38d10 | 1556 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |