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Dependencies:   F746_GUI SD_PlayerSkeleton F746_SAI_IO

Committer:
phungductung
Date:
Tue Jun 04 21:37:21 2019 +0000
Revision:
0:8ede47d38d10
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phungductung 0:8ede47d38d10 1 /**
phungductung 0:8ede47d38d10 2 ******************************************************************************
phungductung 0:8ede47d38d10 3 * @file stm32f7xx_hal_dma_ex.c
phungductung 0:8ede47d38d10 4 * @author MCD Application Team
phungductung 0:8ede47d38d10 5 * @version V1.0.4
phungductung 0:8ede47d38d10 6 * @date 09-December-2015
phungductung 0:8ede47d38d10 7 * @brief DMA Extension HAL module driver
phungductung 0:8ede47d38d10 8 * This file provides firmware functions to manage the following
phungductung 0:8ede47d38d10 9 * functionalities of the DMA Extension peripheral:
phungductung 0:8ede47d38d10 10 * + Extended features functions
phungductung 0:8ede47d38d10 11 *
phungductung 0:8ede47d38d10 12 @verbatim
phungductung 0:8ede47d38d10 13 ==============================================================================
phungductung 0:8ede47d38d10 14 ##### How to use this driver #####
phungductung 0:8ede47d38d10 15 ==============================================================================
phungductung 0:8ede47d38d10 16 [..]
phungductung 0:8ede47d38d10 17 The DMA Extension HAL driver can be used as follows:
phungductung 0:8ede47d38d10 18 (+) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
phungductung 0:8ede47d38d10 19 for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
phungductung 0:8ede47d38d10 20
phungductung 0:8ede47d38d10 21 -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
phungductung 0:8ede47d38d10 22 -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
phungductung 0:8ede47d38d10 23 -@- In Multi (Double) buffer mode, it is possible to update the base address for
phungductung 0:8ede47d38d10 24 the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
phungductung 0:8ede47d38d10 25
phungductung 0:8ede47d38d10 26 @endverbatim
phungductung 0:8ede47d38d10 27 ******************************************************************************
phungductung 0:8ede47d38d10 28 * @attention
phungductung 0:8ede47d38d10 29 *
phungductung 0:8ede47d38d10 30 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:8ede47d38d10 31 *
phungductung 0:8ede47d38d10 32 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:8ede47d38d10 33 * are permitted provided that the following conditions are met:
phungductung 0:8ede47d38d10 34 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:8ede47d38d10 35 * this list of conditions and the following disclaimer.
phungductung 0:8ede47d38d10 36 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:8ede47d38d10 37 * this list of conditions and the following disclaimer in the documentation
phungductung 0:8ede47d38d10 38 * and/or other materials provided with the distribution.
phungductung 0:8ede47d38d10 39 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:8ede47d38d10 40 * may be used to endorse or promote products derived from this software
phungductung 0:8ede47d38d10 41 * without specific prior written permission.
phungductung 0:8ede47d38d10 42 *
phungductung 0:8ede47d38d10 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:8ede47d38d10 44 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:8ede47d38d10 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:8ede47d38d10 46 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:8ede47d38d10 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:8ede47d38d10 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:8ede47d38d10 49 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:8ede47d38d10 50 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:8ede47d38d10 51 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:8ede47d38d10 52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:8ede47d38d10 53 *
phungductung 0:8ede47d38d10 54 ******************************************************************************
phungductung 0:8ede47d38d10 55 */
phungductung 0:8ede47d38d10 56
phungductung 0:8ede47d38d10 57 /* Includes ------------------------------------------------------------------*/
phungductung 0:8ede47d38d10 58 #include "stm32f7xx_hal.h"
phungductung 0:8ede47d38d10 59
phungductung 0:8ede47d38d10 60 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:8ede47d38d10 61 * @{
phungductung 0:8ede47d38d10 62 */
phungductung 0:8ede47d38d10 63
phungductung 0:8ede47d38d10 64 /** @defgroup DMAEx DMAEx
phungductung 0:8ede47d38d10 65 * @brief DMA Extended HAL module driver
phungductung 0:8ede47d38d10 66 * @{
phungductung 0:8ede47d38d10 67 */
phungductung 0:8ede47d38d10 68
phungductung 0:8ede47d38d10 69 #ifdef HAL_DMA_MODULE_ENABLED
phungductung 0:8ede47d38d10 70
phungductung 0:8ede47d38d10 71 /* Private types -------------------------------------------------------------*/
phungductung 0:8ede47d38d10 72 /* Private variables ---------------------------------------------------------*/
phungductung 0:8ede47d38d10 73 /* Private Constants ---------------------------------------------------------*/
phungductung 0:8ede47d38d10 74 /* Private macros ------------------------------------------------------------*/
phungductung 0:8ede47d38d10 75 /* Private functions ---------------------------------------------------------*/
phungductung 0:8ede47d38d10 76 /** @addtogroup DMAEx_Private_Functions
phungductung 0:8ede47d38d10 77 * @{
phungductung 0:8ede47d38d10 78 */
phungductung 0:8ede47d38d10 79
phungductung 0:8ede47d38d10 80 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
phungductung 0:8ede47d38d10 81
phungductung 0:8ede47d38d10 82 /**
phungductung 0:8ede47d38d10 83 * @brief Set the DMA Transfer parameter.
phungductung 0:8ede47d38d10 84 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 85 * the configuration information for the specified DMA Stream.
phungductung 0:8ede47d38d10 86 * @param SrcAddress: The source memory Buffer address
phungductung 0:8ede47d38d10 87 * @param DstAddress: The destination memory Buffer address
phungductung 0:8ede47d38d10 88 * @param DataLength: The length of data to be transferred from source to destination
phungductung 0:8ede47d38d10 89 * @retval HAL status
phungductung 0:8ede47d38d10 90 */
phungductung 0:8ede47d38d10 91 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
phungductung 0:8ede47d38d10 92 {
phungductung 0:8ede47d38d10 93 /* Configure DMA Stream data length */
phungductung 0:8ede47d38d10 94 hdma->Instance->NDTR = DataLength;
phungductung 0:8ede47d38d10 95
phungductung 0:8ede47d38d10 96 /* Peripheral to Memory */
phungductung 0:8ede47d38d10 97 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
phungductung 0:8ede47d38d10 98 {
phungductung 0:8ede47d38d10 99 /* Configure DMA Stream destination address */
phungductung 0:8ede47d38d10 100 hdma->Instance->PAR = DstAddress;
phungductung 0:8ede47d38d10 101
phungductung 0:8ede47d38d10 102 /* Configure DMA Stream source address */
phungductung 0:8ede47d38d10 103 hdma->Instance->M0AR = SrcAddress;
phungductung 0:8ede47d38d10 104 }
phungductung 0:8ede47d38d10 105 /* Memory to Peripheral */
phungductung 0:8ede47d38d10 106 else
phungductung 0:8ede47d38d10 107 {
phungductung 0:8ede47d38d10 108 /* Configure DMA Stream source address */
phungductung 0:8ede47d38d10 109 hdma->Instance->PAR = SrcAddress;
phungductung 0:8ede47d38d10 110
phungductung 0:8ede47d38d10 111 /* Configure DMA Stream destination address */
phungductung 0:8ede47d38d10 112 hdma->Instance->M0AR = DstAddress;
phungductung 0:8ede47d38d10 113 }
phungductung 0:8ede47d38d10 114 }
phungductung 0:8ede47d38d10 115
phungductung 0:8ede47d38d10 116 /**
phungductung 0:8ede47d38d10 117 * @}
phungductung 0:8ede47d38d10 118 */
phungductung 0:8ede47d38d10 119
phungductung 0:8ede47d38d10 120 /* Exported functions ---------------------------------------------------------*/
phungductung 0:8ede47d38d10 121
phungductung 0:8ede47d38d10 122 /** @addtogroup DMAEx_Exported_Functions
phungductung 0:8ede47d38d10 123 * @{
phungductung 0:8ede47d38d10 124 */
phungductung 0:8ede47d38d10 125
phungductung 0:8ede47d38d10 126
phungductung 0:8ede47d38d10 127 /** @addtogroup DMAEx_Exported_Functions_Group1
phungductung 0:8ede47d38d10 128 *
phungductung 0:8ede47d38d10 129 @verbatim
phungductung 0:8ede47d38d10 130 ===============================================================================
phungductung 0:8ede47d38d10 131 ##### Extended features functions #####
phungductung 0:8ede47d38d10 132 ===============================================================================
phungductung 0:8ede47d38d10 133 [..] This section provides functions allowing to:
phungductung 0:8ede47d38d10 134 (+) Configure the source, destination address and data length and
phungductung 0:8ede47d38d10 135 Start MultiBuffer DMA transfer
phungductung 0:8ede47d38d10 136 (+) Configure the source, destination address and data length and
phungductung 0:8ede47d38d10 137 Start MultiBuffer DMA transfer with interrupt
phungductung 0:8ede47d38d10 138 (+) Change on the fly the memory0 or memory1 address.
phungductung 0:8ede47d38d10 139
phungductung 0:8ede47d38d10 140 @endverbatim
phungductung 0:8ede47d38d10 141 * @{
phungductung 0:8ede47d38d10 142 */
phungductung 0:8ede47d38d10 143
phungductung 0:8ede47d38d10 144
phungductung 0:8ede47d38d10 145 /**
phungductung 0:8ede47d38d10 146 * @brief Starts the multi_buffer DMA Transfer.
phungductung 0:8ede47d38d10 147 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 148 * the configuration information for the specified DMA Stream.
phungductung 0:8ede47d38d10 149 * @param SrcAddress: The source memory Buffer address
phungductung 0:8ede47d38d10 150 * @param DstAddress: The destination memory Buffer address
phungductung 0:8ede47d38d10 151 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
phungductung 0:8ede47d38d10 152 * @param DataLength: The length of data to be transferred from source to destination
phungductung 0:8ede47d38d10 153 * @retval HAL status
phungductung 0:8ede47d38d10 154 */
phungductung 0:8ede47d38d10 155 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
phungductung 0:8ede47d38d10 156 {
phungductung 0:8ede47d38d10 157 /* Process Locked */
phungductung 0:8ede47d38d10 158 __HAL_LOCK(hdma);
phungductung 0:8ede47d38d10 159
phungductung 0:8ede47d38d10 160 /* Current memory buffer used is Memory 0 */
phungductung 0:8ede47d38d10 161 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
phungductung 0:8ede47d38d10 162 {
phungductung 0:8ede47d38d10 163 hdma->State = HAL_DMA_STATE_BUSY_MEM0;
phungductung 0:8ede47d38d10 164 }
phungductung 0:8ede47d38d10 165 /* Current memory buffer used is Memory 1 */
phungductung 0:8ede47d38d10 166 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
phungductung 0:8ede47d38d10 167 {
phungductung 0:8ede47d38d10 168 hdma->State = HAL_DMA_STATE_BUSY_MEM1;
phungductung 0:8ede47d38d10 169 }
phungductung 0:8ede47d38d10 170
phungductung 0:8ede47d38d10 171 /* Check the parameters */
phungductung 0:8ede47d38d10 172 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
phungductung 0:8ede47d38d10 173
phungductung 0:8ede47d38d10 174 /* Disable the peripheral */
phungductung 0:8ede47d38d10 175 __HAL_DMA_DISABLE(hdma);
phungductung 0:8ede47d38d10 176
phungductung 0:8ede47d38d10 177 /* Enable the double buffer mode */
phungductung 0:8ede47d38d10 178 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
phungductung 0:8ede47d38d10 179
phungductung 0:8ede47d38d10 180 /* Configure DMA Stream destination address */
phungductung 0:8ede47d38d10 181 hdma->Instance->M1AR = SecondMemAddress;
phungductung 0:8ede47d38d10 182
phungductung 0:8ede47d38d10 183 /* Configure the source, destination address and the data length */
phungductung 0:8ede47d38d10 184 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
phungductung 0:8ede47d38d10 185
phungductung 0:8ede47d38d10 186 /* Enable the peripheral */
phungductung 0:8ede47d38d10 187 __HAL_DMA_ENABLE(hdma);
phungductung 0:8ede47d38d10 188
phungductung 0:8ede47d38d10 189 return HAL_OK;
phungductung 0:8ede47d38d10 190 }
phungductung 0:8ede47d38d10 191
phungductung 0:8ede47d38d10 192 /**
phungductung 0:8ede47d38d10 193 * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
phungductung 0:8ede47d38d10 194 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 195 * the configuration information for the specified DMA Stream.
phungductung 0:8ede47d38d10 196 * @param SrcAddress: The source memory Buffer address
phungductung 0:8ede47d38d10 197 * @param DstAddress: The destination memory Buffer address
phungductung 0:8ede47d38d10 198 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
phungductung 0:8ede47d38d10 199 * @param DataLength: The length of data to be transferred from source to destination
phungductung 0:8ede47d38d10 200 * @retval HAL status
phungductung 0:8ede47d38d10 201 */
phungductung 0:8ede47d38d10 202 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
phungductung 0:8ede47d38d10 203 {
phungductung 0:8ede47d38d10 204 /* Process Locked */
phungductung 0:8ede47d38d10 205 __HAL_LOCK(hdma);
phungductung 0:8ede47d38d10 206
phungductung 0:8ede47d38d10 207 /* Current memory buffer used is Memory 0 */
phungductung 0:8ede47d38d10 208 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
phungductung 0:8ede47d38d10 209 {
phungductung 0:8ede47d38d10 210 hdma->State = HAL_DMA_STATE_BUSY_MEM0;
phungductung 0:8ede47d38d10 211 }
phungductung 0:8ede47d38d10 212 /* Current memory buffer used is Memory 1 */
phungductung 0:8ede47d38d10 213 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
phungductung 0:8ede47d38d10 214 {
phungductung 0:8ede47d38d10 215 hdma->State = HAL_DMA_STATE_BUSY_MEM1;
phungductung 0:8ede47d38d10 216 }
phungductung 0:8ede47d38d10 217
phungductung 0:8ede47d38d10 218 /* Check the parameters */
phungductung 0:8ede47d38d10 219 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
phungductung 0:8ede47d38d10 220
phungductung 0:8ede47d38d10 221 /* Disable the peripheral */
phungductung 0:8ede47d38d10 222 __HAL_DMA_DISABLE(hdma);
phungductung 0:8ede47d38d10 223
phungductung 0:8ede47d38d10 224 /* Enable the Double buffer mode */
phungductung 0:8ede47d38d10 225 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
phungductung 0:8ede47d38d10 226
phungductung 0:8ede47d38d10 227 /* Configure DMA Stream destination address */
phungductung 0:8ede47d38d10 228 hdma->Instance->M1AR = SecondMemAddress;
phungductung 0:8ede47d38d10 229
phungductung 0:8ede47d38d10 230 /* Configure the source, destination address and the data length */
phungductung 0:8ede47d38d10 231 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
phungductung 0:8ede47d38d10 232
phungductung 0:8ede47d38d10 233 /* Enable the transfer complete interrupt */
phungductung 0:8ede47d38d10 234 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
phungductung 0:8ede47d38d10 235
phungductung 0:8ede47d38d10 236 /* Enable the Half transfer interrupt */
phungductung 0:8ede47d38d10 237 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
phungductung 0:8ede47d38d10 238
phungductung 0:8ede47d38d10 239 /* Enable the transfer Error interrupt */
phungductung 0:8ede47d38d10 240 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
phungductung 0:8ede47d38d10 241
phungductung 0:8ede47d38d10 242 /* Enable the fifo Error interrupt */
phungductung 0:8ede47d38d10 243 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_FE);
phungductung 0:8ede47d38d10 244
phungductung 0:8ede47d38d10 245 /* Enable the direct mode Error interrupt */
phungductung 0:8ede47d38d10 246 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_DME);
phungductung 0:8ede47d38d10 247
phungductung 0:8ede47d38d10 248 /* Enable the peripheral */
phungductung 0:8ede47d38d10 249 __HAL_DMA_ENABLE(hdma);
phungductung 0:8ede47d38d10 250
phungductung 0:8ede47d38d10 251 return HAL_OK;
phungductung 0:8ede47d38d10 252 }
phungductung 0:8ede47d38d10 253
phungductung 0:8ede47d38d10 254 /**
phungductung 0:8ede47d38d10 255 * @brief Change the memory0 or memory1 address on the fly.
phungductung 0:8ede47d38d10 256 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:8ede47d38d10 257 * the configuration information for the specified DMA Stream.
phungductung 0:8ede47d38d10 258 * @param Address: The new address
phungductung 0:8ede47d38d10 259 * @param memory: the memory to be changed, This parameter can be one of
phungductung 0:8ede47d38d10 260 * the following values:
phungductung 0:8ede47d38d10 261 * MEMORY0 /
phungductung 0:8ede47d38d10 262 * MEMORY1
phungductung 0:8ede47d38d10 263 * @note The MEMORY0 address can be changed only when the current transfer use
phungductung 0:8ede47d38d10 264 * MEMORY1 and the MEMORY1 address can be changed only when the current
phungductung 0:8ede47d38d10 265 * transfer use MEMORY0.
phungductung 0:8ede47d38d10 266 * @retval HAL status
phungductung 0:8ede47d38d10 267 */
phungductung 0:8ede47d38d10 268 HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
phungductung 0:8ede47d38d10 269 {
phungductung 0:8ede47d38d10 270 if(memory == MEMORY0)
phungductung 0:8ede47d38d10 271 {
phungductung 0:8ede47d38d10 272 /* change the memory0 address */
phungductung 0:8ede47d38d10 273 hdma->Instance->M0AR = Address;
phungductung 0:8ede47d38d10 274 }
phungductung 0:8ede47d38d10 275 else
phungductung 0:8ede47d38d10 276 {
phungductung 0:8ede47d38d10 277 /* change the memory1 address */
phungductung 0:8ede47d38d10 278 hdma->Instance->M1AR = Address;
phungductung 0:8ede47d38d10 279 }
phungductung 0:8ede47d38d10 280
phungductung 0:8ede47d38d10 281 return HAL_OK;
phungductung 0:8ede47d38d10 282 }
phungductung 0:8ede47d38d10 283
phungductung 0:8ede47d38d10 284 /**
phungductung 0:8ede47d38d10 285 * @}
phungductung 0:8ede47d38d10 286 */
phungductung 0:8ede47d38d10 287
phungductung 0:8ede47d38d10 288 /**
phungductung 0:8ede47d38d10 289 * @}
phungductung 0:8ede47d38d10 290 */
phungductung 0:8ede47d38d10 291
phungductung 0:8ede47d38d10 292 #endif /* HAL_DMA_MODULE_ENABLED */
phungductung 0:8ede47d38d10 293 /**
phungductung 0:8ede47d38d10 294 * @}
phungductung 0:8ede47d38d10 295 */
phungductung 0:8ede47d38d10 296
phungductung 0:8ede47d38d10 297 /**
phungductung 0:8ede47d38d10 298 * @}
phungductung 0:8ede47d38d10 299 */
phungductung 0:8ede47d38d10 300
phungductung 0:8ede47d38d10 301 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/