#ifndef CYGONCE_PKGCONF_HAL_ARM_AT91SAM9261_H
#define CYGONCE_PKGCONF_HAL_ARM_AT91SAM9261_H
/*
 * File <pkgconf/hal_arm_at91sam9261.h>
 *
 * This file is generated automatically by the configuration
 * system. It should not be edited. Any changes to this file
 * may be overwritten.
 */

#define HAL_PLATFORM_CPU    "ARM9261EK"
#define HAL_PLATFORM_BOARD  "Atmel (SAM9261EK)"
#define HAL_PLATFORM_EXTRA  ""
#define CYGHWR_HAL_ARM_AT91SAM9261 sam9261
#define CYGHWR_HAL_ARM_AT91SAM9261_sam9261
#define CYGNUM_HAL_RTC_CONSTANTS 1
#define CYGNUM_HAL_RTC_NUMERATOR 1000000000
#define CYGNUM_HAL_RTC_NUMERATOR_1000000000
#define CYGNUM_HAL_RTC_DENOMINATOR 1000
#define CYGNUM_HAL_RTC_DENOMINATOR_1000
#define CYGNUM_HAL_RTC_PERIOD 6247
#define CYGNUM_HAL_RTC_PERIOD_6247
#define CYGNUM_HAL_ARM_AT91SAM9261_CLOCK_OSC_MAIN 18432000
#define CYGNUM_HAL_ARM_AT91SAM9261_CLOCK_OSC_MAIN_18432000
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLA_DIVIDER 13
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLA_DIVIDER_13
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLA_MULTIPLIER 141
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLA_MULTIPLIER_141
#define CYGNUM_HAL_ARM_AT91SAM9261_CPU_CLOCK_SPEED 199916307
#define CYGNUM_HAL_ARM_AT91SAM9261_CPU_CLOCK_SPEED_199916307
#define CYGNUM_HAL_ARM_AT91SAM9261_MASTER_CLOCK_DIVISION 2
#define CYGNUM_HAL_ARM_AT91SAM9261_MASTER_CLOCK_DIVISION_2
#define CYGNUM_HAL_ARM_AT91SAM9261_CLOCK_SPEED 99958153
#define CYGNUM_HAL_ARM_AT91SAM9261_CLOCK_SPEED_99958153
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLB_DIVIDER 14
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLB_DIVIDER_14
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLB_MULTIPLIER 73
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLB_MULTIPLIER_73
#define CYGNUM_HAL_ARM_AT91SAM9261_USB_CLOCK_DIVISION 2
#define CYGNUM_HAL_ARM_AT91SAM9261_USB_CLOCK_DIVISION_2
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLB_CLOCK 96109714
#define CYGNUM_HAL_ARM_AT91SAM9261_PLLB_CLOCK_96109714
#define CYGNUM_HAL_ARM_AT91SAM9261_USB_CLOCK_SPEED 48054857
#define CYGNUM_HAL_ARM_AT91SAM9261_USB_CLOCK_SPEED_48054857
#define CYGNUM_HAL_ARM_AT91SAM9261_SLOW_CLOCK 32768
#define CYGNUM_HAL_ARM_AT91SAM9261_SLOW_CLOCK_32768
#define CYGINT_HAL_ARM_AT91_SERIAL_DBG_HW 0
#define CYGINT_HAL_ARM_AT91_SERIAL_DBG_HW_0
#define CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS 2
#define CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS_2
#define CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL 0
#define CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_0
#define CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL 0
#define CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_0
#define CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD 115200
#define CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD_115200
#define CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD 115200
#define CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD_115200
#define CYGBLD_GLOBAL_OPTIONS 1
#define CYG_HAL_ARM_AT91SAM9261_MMU 1

#endif
