Suga koubou / Mbed 2 deprecated SPIRAM_23LC1024_DMA

SPI RAM 23LC1024 (Microchip) with DMA

Dependencies:   mbed

Fork of SPIRAM_23LC1024 by Suga koubou

MODDMA/SETUP.cpp@2:a3e0f7f37ac9, 2012-12-05 (annotated)

Committer:
okini3939
Date:
Wed Dec 05 07:56:09 2012 +0000
Revision:
2:a3e0f7f37ac9
DMX

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 2:a3e0f7f37ac9 1 /*
okini3939 2:a3e0f7f37ac9 2 Copyright (c) 2010 Andy Kirkham
okini3939 2:a3e0f7f37ac9 3
okini3939 2:a3e0f7f37ac9 4 Permission is hereby granted, free of charge, to any person obtaining a copy
okini3939 2:a3e0f7f37ac9 5 of this software and associated documentation files (the "Software"), to deal
okini3939 2:a3e0f7f37ac9 6 in the Software without restriction, including without limitation the rights
okini3939 2:a3e0f7f37ac9 7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
okini3939 2:a3e0f7f37ac9 8 copies of the Software, and to permit persons to whom the Software is
okini3939 2:a3e0f7f37ac9 9 furnished to do so, subject to the following conditions:
okini3939 2:a3e0f7f37ac9 10
okini3939 2:a3e0f7f37ac9 11 The above copyright notice and this permission notice shall be included in
okini3939 2:a3e0f7f37ac9 12 all copies or substantial portions of the Software.
okini3939 2:a3e0f7f37ac9 13
okini3939 2:a3e0f7f37ac9 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
okini3939 2:a3e0f7f37ac9 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
okini3939 2:a3e0f7f37ac9 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
okini3939 2:a3e0f7f37ac9 17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
okini3939 2:a3e0f7f37ac9 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
okini3939 2:a3e0f7f37ac9 19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
okini3939 2:a3e0f7f37ac9 20 THE SOFTWARE.
okini3939 2:a3e0f7f37ac9 21 */
okini3939 2:a3e0f7f37ac9 22
okini3939 2:a3e0f7f37ac9 23 #include "MODDMA.h"
okini3939 2:a3e0f7f37ac9 24
okini3939 2:a3e0f7f37ac9 25 namespace AjK {
okini3939 2:a3e0f7f37ac9 26
okini3939 2:a3e0f7f37ac9 27 uint32_t
okini3939 2:a3e0f7f37ac9 28 MODDMA::Setup(MODDMA_Config *config)
okini3939 2:a3e0f7f37ac9 29 {
okini3939 2:a3e0f7f37ac9 30 LPC_GPDMACH_TypeDef *pChannel = (LPC_GPDMACH_TypeDef *)Channel_p( config->channelNum() );
okini3939 2:a3e0f7f37ac9 31
okini3939 2:a3e0f7f37ac9 32 setups[config->channelNum() & 0x7] = config;
okini3939 2:a3e0f7f37ac9 33
okini3939 2:a3e0f7f37ac9 34 // Reset the Interrupt status
okini3939 2:a3e0f7f37ac9 35 LPC_GPDMA->DMACIntTCClear = IntTCClear_Ch( config->channelNum() );
okini3939 2:a3e0f7f37ac9 36 LPC_GPDMA->DMACIntErrClr = IntErrClr_Ch ( config->channelNum() );
okini3939 2:a3e0f7f37ac9 37
okini3939 2:a3e0f7f37ac9 38 // Clear DMA configure
okini3939 2:a3e0f7f37ac9 39 pChannel->DMACCControl = 0x00;
okini3939 2:a3e0f7f37ac9 40 pChannel->DMACCConfig = 0x00;
okini3939 2:a3e0f7f37ac9 41
okini3939 2:a3e0f7f37ac9 42 // Assign Linker List Item value
okini3939 2:a3e0f7f37ac9 43 pChannel->DMACCLLI = config->dmaLLI();
okini3939 2:a3e0f7f37ac9 44
okini3939 2:a3e0f7f37ac9 45 // Set value to Channel Control Registers
okini3939 2:a3e0f7f37ac9 46 switch (config->transferType()) {
okini3939 2:a3e0f7f37ac9 47
okini3939 2:a3e0f7f37ac9 48 // Memory to memory
okini3939 2:a3e0f7f37ac9 49 case m2m:
okini3939 2:a3e0f7f37ac9 50 // Assign physical source and destination address
okini3939 2:a3e0f7f37ac9 51 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 2:a3e0f7f37ac9 52 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 2:a3e0f7f37ac9 53 pChannel->DMACCControl
okini3939 2:a3e0f7f37ac9 54 = CxControl_TransferSize(config->transferSize())
okini3939 2:a3e0f7f37ac9 55 | CxControl_SBSize(_32)
okini3939 2:a3e0f7f37ac9 56 | CxControl_DBSize(_32)
okini3939 2:a3e0f7f37ac9 57 | CxControl_SWidth(config->transferWidth())
okini3939 2:a3e0f7f37ac9 58 | CxControl_DWidth(config->transferWidth())
okini3939 2:a3e0f7f37ac9 59 | CxControl_SI()
okini3939 2:a3e0f7f37ac9 60 | CxControl_DI()
okini3939 2:a3e0f7f37ac9 61 | CxControl_I();
okini3939 2:a3e0f7f37ac9 62 break;
okini3939 2:a3e0f7f37ac9 63
okini3939 2:a3e0f7f37ac9 64 // Memory to peripheral
okini3939 2:a3e0f7f37ac9 65 case m2p:
okini3939 2:a3e0f7f37ac9 66 // Assign physical source
okini3939 2:a3e0f7f37ac9 67 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 2:a3e0f7f37ac9 68 // Assign peripheral destination address
okini3939 2:a3e0f7f37ac9 69 pChannel->DMACCDestAddr = (uint32_t)LUTPerAddr(config->dstConn());
okini3939 2:a3e0f7f37ac9 70 pChannel->DMACCControl
okini3939 2:a3e0f7f37ac9 71 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 2:a3e0f7f37ac9 72 | CxControl_SBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 2:a3e0f7f37ac9 73 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 2:a3e0f7f37ac9 74 | CxControl_SWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 2:a3e0f7f37ac9 75 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 2:a3e0f7f37ac9 76 | CxControl_SI()
okini3939 2:a3e0f7f37ac9 77 | CxControl_I();
okini3939 2:a3e0f7f37ac9 78 break;
okini3939 2:a3e0f7f37ac9 79
okini3939 2:a3e0f7f37ac9 80 // Peripheral to memory
okini3939 2:a3e0f7f37ac9 81 case p2m:
okini3939 2:a3e0f7f37ac9 82 // Assign peripheral source address
okini3939 2:a3e0f7f37ac9 83 pChannel->DMACCSrcAddr = (uint32_t)LUTPerAddr(config->srcConn());
okini3939 2:a3e0f7f37ac9 84 // Assign memory destination address
okini3939 2:a3e0f7f37ac9 85 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 2:a3e0f7f37ac9 86 pChannel->DMACCControl
okini3939 2:a3e0f7f37ac9 87 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 2:a3e0f7f37ac9 88 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 2:a3e0f7f37ac9 89 | CxControl_DBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 2:a3e0f7f37ac9 90 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 2:a3e0f7f37ac9 91 | CxControl_DWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 2:a3e0f7f37ac9 92 | CxControl_DI()
okini3939 2:a3e0f7f37ac9 93 | CxControl_I();
okini3939 2:a3e0f7f37ac9 94 break;
okini3939 2:a3e0f7f37ac9 95
okini3939 2:a3e0f7f37ac9 96 // Peripheral to peripheral
okini3939 2:a3e0f7f37ac9 97 case p2p:
okini3939 2:a3e0f7f37ac9 98 // Assign peripheral source address
okini3939 2:a3e0f7f37ac9 99 pChannel->DMACCSrcAddr = (uint32_t)LUTPerAddr(config->srcConn());
okini3939 2:a3e0f7f37ac9 100 // Assign peripheral destination address
okini3939 2:a3e0f7f37ac9 101 pChannel->DMACCDestAddr = (uint32_t)LUTPerAddr(config->dstConn());
okini3939 2:a3e0f7f37ac9 102 pChannel->DMACCControl
okini3939 2:a3e0f7f37ac9 103 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 2:a3e0f7f37ac9 104 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 2:a3e0f7f37ac9 105 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 2:a3e0f7f37ac9 106 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 2:a3e0f7f37ac9 107 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 2:a3e0f7f37ac9 108 | CxControl_I();
okini3939 2:a3e0f7f37ac9 109 break;
okini3939 2:a3e0f7f37ac9 110
okini3939 2:a3e0f7f37ac9 111 // GPIO to memory
okini3939 2:a3e0f7f37ac9 112 case g2m:
okini3939 2:a3e0f7f37ac9 113 // Assign GPIO source address
okini3939 2:a3e0f7f37ac9 114 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 2:a3e0f7f37ac9 115 // Assign memory destination address
okini3939 2:a3e0f7f37ac9 116 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 2:a3e0f7f37ac9 117 pChannel->DMACCControl
okini3939 2:a3e0f7f37ac9 118 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 2:a3e0f7f37ac9 119 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 2:a3e0f7f37ac9 120 | CxControl_DBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 2:a3e0f7f37ac9 121 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 2:a3e0f7f37ac9 122 | CxControl_DWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 2:a3e0f7f37ac9 123 | CxControl_DI()
okini3939 2:a3e0f7f37ac9 124 | CxControl_I();
okini3939 2:a3e0f7f37ac9 125 break;
okini3939 2:a3e0f7f37ac9 126
okini3939 2:a3e0f7f37ac9 127 // Memory to GPIO
okini3939 2:a3e0f7f37ac9 128 case m2g:
okini3939 2:a3e0f7f37ac9 129 // Assign physical source
okini3939 2:a3e0f7f37ac9 130 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 2:a3e0f7f37ac9 131 // Assign peripheral destination address
okini3939 2:a3e0f7f37ac9 132 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 2:a3e0f7f37ac9 133 pChannel->DMACCControl
okini3939 2:a3e0f7f37ac9 134 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 2:a3e0f7f37ac9 135 | CxControl_SBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 2:a3e0f7f37ac9 136 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 2:a3e0f7f37ac9 137 | CxControl_SWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 2:a3e0f7f37ac9 138 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 2:a3e0f7f37ac9 139 | CxControl_SI()
okini3939 2:a3e0f7f37ac9 140 | CxControl_I();
okini3939 2:a3e0f7f37ac9 141 break;
okini3939 2:a3e0f7f37ac9 142
okini3939 2:a3e0f7f37ac9 143 // Do not support any more transfer type, return ERROR
okini3939 2:a3e0f7f37ac9 144 default:
okini3939 2:a3e0f7f37ac9 145 return 0;
okini3939 2:a3e0f7f37ac9 146 }
okini3939 2:a3e0f7f37ac9 147 /*
okini3939 2:a3e0f7f37ac9 148 // Re-Configure DMA Request Select for source peripheral
okini3939 2:a3e0f7f37ac9 149 if (config->srcConn() > 15) {
okini3939 2:a3e0f7f37ac9 150 LPC_SC->RESERVED9 |= (1 << (config->srcConn() - 16));
okini3939 2:a3e0f7f37ac9 151 }
okini3939 2:a3e0f7f37ac9 152 else {
okini3939 2:a3e0f7f37ac9 153 LPC_SC->RESERVED9 &= ~(1 << (config->srcConn() - 8));
okini3939 2:a3e0f7f37ac9 154 }
okini3939 2:a3e0f7f37ac9 155
okini3939 2:a3e0f7f37ac9 156 // Re-Configure DMA Request Select for destination peripheral
okini3939 2:a3e0f7f37ac9 157 if (config->dstConn() > 15) {
okini3939 2:a3e0f7f37ac9 158 LPC_SC->RESERVED9 |= (1 << (config->dstConn() - 16));
okini3939 2:a3e0f7f37ac9 159 }
okini3939 2:a3e0f7f37ac9 160 else {
okini3939 2:a3e0f7f37ac9 161 LPC_SC->RESERVED9 &= ~(1 << (config->dstConn() - 8));
okini3939 2:a3e0f7f37ac9 162 }
okini3939 2:a3e0f7f37ac9 163 */
okini3939 2:a3e0f7f37ac9 164 // Enable DMA channels, little endian
okini3939 2:a3e0f7f37ac9 165 LPC_GPDMA->DMACConfig = _E;
okini3939 2:a3e0f7f37ac9 166 while (!(LPC_GPDMA->DMACConfig & _E));
okini3939 2:a3e0f7f37ac9 167
okini3939 2:a3e0f7f37ac9 168 // Calculate absolute value for Connection number
okini3939 2:a3e0f7f37ac9 169 uint32_t tmp1 = config->srcConn(); tmp1 = ((tmp1 > 15) ? (tmp1 - 8) : tmp1);
okini3939 2:a3e0f7f37ac9 170 uint32_t tmp2 = config->dstConn(); tmp2 = ((tmp2 > 15) ? (tmp2 - 8) : tmp2);
okini3939 2:a3e0f7f37ac9 171
okini3939 2:a3e0f7f37ac9 172 if (config->dmacSync()) {
okini3939 2:a3e0f7f37ac9 173 uint32_t tmp3 = config->dmacSync(); tmp3 = ((tmp3 > 15) ? (tmp3 - 8) : tmp3);
okini3939 2:a3e0f7f37ac9 174 LPC_GPDMA->DMACSync |= Sync_Src( tmp3 );
okini3939 2:a3e0f7f37ac9 175 }
okini3939 2:a3e0f7f37ac9 176
okini3939 2:a3e0f7f37ac9 177 uint32_t tfer_type = (uint32_t)config->transferType();
okini3939 2:a3e0f7f37ac9 178 if (tfer_type == g2m || tfer_type == m2g) {
okini3939 2:a3e0f7f37ac9 179 tfer_type -= 2; // Adjust psuedo transferType to a real transferType.
okini3939 2:a3e0f7f37ac9 180 }
okini3939 2:a3e0f7f37ac9 181
okini3939 2:a3e0f7f37ac9 182 // Configure DMA Channel, enable Error Counter and Terminate counter
okini3939 2:a3e0f7f37ac9 183 pChannel->DMACCConfig
okini3939 2:a3e0f7f37ac9 184 = CxConfig_IE()
okini3939 2:a3e0f7f37ac9 185 | CxConfig_ITC()
okini3939 2:a3e0f7f37ac9 186 | CxConfig_TransferType(tfer_type)
okini3939 2:a3e0f7f37ac9 187 | CxConfig_SrcPeripheral(tmp1)
okini3939 2:a3e0f7f37ac9 188 | CxConfig_DestPeripheral(tmp2);
okini3939 2:a3e0f7f37ac9 189
okini3939 2:a3e0f7f37ac9 190 return pChannel->DMACCControl;
okini3939 2:a3e0f7f37ac9 191 }
okini3939 2:a3e0f7f37ac9 192
okini3939 2:a3e0f7f37ac9 193 }; // namespace AjK ends
okini3939 2:a3e0f7f37ac9 194