Suga koubou / Mbed 2 deprecated DeepSleep-m0

deep sleep and wake-up. GPIO group interrupt, start logic sample see: http://mbed.org/users/okini3939/notebook/low-power-m0/

Dependencies:   mbed

main.cpp@2:5412d5b8242c, 2013-06-10 (annotated)

Committer:
okini3939
Date:
Mon Jun 10 02:13:58 2013 +0000
Revision:
2:5412d5b8242c
Parent:
1:d676ec86101e 
fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 0:ae90ac40c518 1 #include "mbed.h"
okini3939 0:ae90ac40c518 2
okini3939 2:5412d5b8242c 3 DigitalOut led1(LED1), led2(LED2), led3(LED3), led4(LED4);
okini3939 0:ae90ac40c518 4
okini3939 2:5412d5b8242c 5 Serial pc(USBTX, USBRX);
okini3939 1:d676ec86101e 6
okini3939 1:d676ec86101e 7 extern "C"
okini3939 1:d676ec86101e 8 void GINT1_IRQHandler(void) {
okini3939 1:d676ec86101e 9 LPC_GPIO_GROUP_INT1->CTRL |= (1<<0);
okini3939 1:d676ec86101e 10 NVIC_ClearPendingIRQ(GINT0_IRQn);
okini3939 1:d676ec86101e 11 }
okini3939 1:d676ec86101e 12
okini3939 0:ae90ac40c518 13 void initStartLogic (unsigned int p0, unsigned int p1) {
okini3939 0:ae90ac40c518 14 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<24);
okini3939 0:ae90ac40c518 15 LPC_GPIO_GROUP_INT1->PORT_POL[0] = 0;
okini3939 0:ae90ac40c518 16 LPC_GPIO_GROUP_INT1->PORT_POL[1] = 0;
okini3939 0:ae90ac40c518 17 LPC_GPIO_GROUP_INT1->PORT_ENA[0] = p0;
okini3939 0:ae90ac40c518 18 LPC_GPIO_GROUP_INT1->PORT_ENA[1] = p1;
okini3939 0:ae90ac40c518 19 LPC_GPIO_GROUP_INT1->CTRL = 0; // Edge, OR, INT
okini3939 0:ae90ac40c518 20
okini3939 0:ae90ac40c518 21 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
okini3939 0:ae90ac40c518 22
okini3939 0:ae90ac40c518 23 LPC_SYSCON->STARTERP1 = (1<<21); // start logic GROUP1
okini3939 0:ae90ac40c518 24 NVIC_ClearPendingIRQ(GINT1_IRQn);
okini3939 0:ae90ac40c518 25 NVIC_EnableIRQ(GINT1_IRQn);
okini3939 0:ae90ac40c518 26 }
okini3939 0:ae90ac40c518 27
okini3939 0:ae90ac40c518 28 unsigned int setSystemMainClock(unsigned short S) {
okini3939 0:ae90ac40c518 29 LPC_SYSCON->MAINCLKSEL = S; /* Select PLL Clock Output */
okini3939 0:ae90ac40c518 30 LPC_SYSCON->MAINCLKUEN = 0x01; /* Update MCLK Clock Source */
okini3939 0:ae90ac40c518 31 LPC_SYSCON->MAINCLKUEN = 0x00; /* Toggle Update Register */
okini3939 0:ae90ac40c518 32 LPC_SYSCON->MAINCLKUEN = 0x01;
okini3939 0:ae90ac40c518 33 while (!(LPC_SYSCON->MAINCLKUEN & 0x01)); /* Wait Until Updated */
okini3939 0:ae90ac40c518 34
okini3939 0:ae90ac40c518 35 SystemCoreClockUpdate();
okini3939 0:ae90ac40c518 36 return SystemCoreClock;
okini3939 0:ae90ac40c518 37 }
okini3939 0:ae90ac40c518 38
okini3939 0:ae90ac40c518 39 unsigned int setSystemFrequency(unsigned short M, unsigned short P) {
okini3939 0:ae90ac40c518 40 LPC_SYSCON->SYSPLLCTRL = ((P & 0x03)<<5) | (M & 0x1f);
okini3939 0:ae90ac40c518 41 while (!(LPC_SYSCON->SYSPLLSTAT & 0x01)); // Wait Until PLL Locked
okini3939 0:ae90ac40c518 42 SystemCoreClockUpdate();
okini3939 0:ae90ac40c518 43 return SystemCoreClock;
okini3939 0:ae90ac40c518 44 }
okini3939 0:ae90ac40c518 45
okini3939 2:5412d5b8242c 46 void PowerDown () {
okini3939 2:5412d5b8242c 47 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
okini3939 2:5412d5b8242c 48 LPC_PMU->PCON = (2<<0);
okini3939 2:5412d5b8242c 49 SCB->SCR |= (1<<2);
okini3939 2:5412d5b8242c 50 __WFI();
okini3939 2:5412d5b8242c 51 }
okini3939 2:5412d5b8242c 52
okini3939 0:ae90ac40c518 53 void DeepSleep () {
okini3939 2:5412d5b8242c 54 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
okini3939 2:5412d5b8242c 55 LPC_PMU->PCON = (1<<0);
okini3939 0:ae90ac40c518 56 SCB->SCR |= (1<<2);
okini3939 0:ae90ac40c518 57 __WFI();
okini3939 0:ae90ac40c518 58 }
okini3939 0:ae90ac40c518 59
okini3939 0:ae90ac40c518 60 void Sleep () {
okini3939 2:5412d5b8242c 61 LPC_PMU->PCON = 0;
okini3939 1:d676ec86101e 62 SCB->SCR &= ~(1<<2);
okini3939 0:ae90ac40c518 63 __WFI();
okini3939 0:ae90ac40c518 64 }
okini3939 0:ae90ac40c518 65
okini3939 0:ae90ac40c518 66 int main() {
okini3939 0:ae90ac40c518 67 int i;
okini3939 0:ae90ac40c518 68
okini3939 0:ae90ac40c518 69 // setSystemFrequency(3, 1); // M, P, 48MHz
okini3939 2:5412d5b8242c 70 // setSystemFrequency(1, 2); // M, P, 24MHz
okini3939 2:5412d5b8242c 71
okini3939 2:5412d5b8242c 72 LPC_GPIO->SET[1] = (1<<26);
okini3939 2:5412d5b8242c 73 LPC_GPIO->DIR[1] |= (1<<26);
okini3939 0:ae90ac40c518 74
okini3939 0:ae90ac40c518 75 pc.baud(9600);
okini3939 0:ae90ac40c518 76 pc.printf("low power\r\n");
okini3939 0:ae90ac40c518 77
okini3939 0:ae90ac40c518 78 for (i = 0; i < 6; i ++) {
okini3939 2:5412d5b8242c 79 led1 = !led1;
okini3939 2:5412d5b8242c 80 wait(0.2);
okini3939 0:ae90ac40c518 81 }
okini3939 0:ae90ac40c518 82
okini3939 2:5412d5b8242c 83 initStartLogic((1<<22)|(1<<1), 0); // p20(P0.22), ISP(P0.1)
okini3939 0:ae90ac40c518 84
okini3939 1:d676ec86101e 85 for (;;) {
okini3939 1:d676ec86101e 86
okini3939 1:d676ec86101e 87 pc.printf("enter sleep\r\n");
okini3939 1:d676ec86101e 88 wait_ms(10);
okini3939 0:ae90ac40c518 89
okini3939 2:5412d5b8242c 90 setSystemMainClock(0); // IRC clock
okini3939 2:5412d5b8242c 91 LPC_GPIO->CLR[1] = (1<<26);
okini3939 2:5412d5b8242c 92 // Sleep();
okini3939 2:5412d5b8242c 93 // DeepSleep();
okini3939 2:5412d5b8242c 94 PowerDown();
okini3939 0:ae90ac40c518 95
okini3939 2:5412d5b8242c 96 LPC_GPIO->SET[1] = (1<<26);
okini3939 2:5412d5b8242c 97 setSystemMainClock(3); // PLL clock
okini3939 0:ae90ac40c518 98
okini3939 1:d676ec86101e 99 pc.printf("wake up\r\n");
okini3939 1:d676ec86101e 100 for (i = 0; i < 6; i ++) {
okini3939 2:5412d5b8242c 101 led1 = !led1;
okini3939 2:5412d5b8242c 102 wait(0.2);
okini3939 1:d676ec86101e 103 }
okini3939 1:d676ec86101e 104
okini3939 2:5412d5b8242c 105 for (;;);
okini3939 2:5412d5b8242c 106
okini3939 0:ae90ac40c518 107 }
okini3939 0:ae90ac40c518 108 }