LPC8xx Internal Analog Comparator library
LPC8xx Internal Analog Comparator library
LPC800シリーズ(LPC812, LPC824等)に内蔵されているコンパレーター(比較器)を使うライブラリです。
使い方
初期化
ACMP acmp(vp, vn, hys, lad);
- vp = コンパレーター正入力(ACMP::LADDER / ACMP_I1~3 / BANDGAP)
- vn = コンパレーター負入力(ACMP::LADDER / ACMP_I1~3 / BANDGAP)
- hys = ヒステリシス選択(ACMP::NONE / HYS5mV / HYS10mV / HYS20mV)
- lad = 電圧ラダー選択(0~31)
コンパレーター入力に使えるピンは決まっています。(スイッチマトリクスで変更できません)
(LPC81x/82x) ACMP_I1=P0.0 / ACMP_I2=P0.1 / (LPC82x) ACMP_I3=P0.14 / ACMP_I4=P0.23
読み取り
acmp.read();
- 返り値
- 1: vp > vn
- 0: vp < vn
割込み
acmp.rise(*func);
- vp > vn を検出した時 func を呼び出す
acmp.fall(*func);
- vp < vn を検出した時 func を呼び出す
Sample
Import programACMP_sample
LPC8xx Internal Analog Comparator
ACMP.cpp@0:6ad2528ba3cc, 2015-11-16 (annotated)
- Committer:
- okini3939
- Date:
- Mon Nov 16 03:45:24 2015 +0000
- Revision:
- 0:6ad2528ba3cc
1st build
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
okini3939 | 0:6ad2528ba3cc | 1 | /** |
okini3939 | 0:6ad2528ba3cc | 2 | * LPC8xx Internal Analog Comparator library for mbed |
okini3939 | 0:6ad2528ba3cc | 3 | * Copyright (c) 2015 Suga |
okini3939 | 0:6ad2528ba3cc | 4 | * Released under the MIT License: http://mbed.org/license/mit |
okini3939 | 0:6ad2528ba3cc | 5 | */ |
okini3939 | 0:6ad2528ba3cc | 6 | /** @file |
okini3939 | 0:6ad2528ba3cc | 7 | * @brief LPC8xx Internal Analog Comparator library for mbed |
okini3939 | 0:6ad2528ba3cc | 8 | */ |
okini3939 | 0:6ad2528ba3cc | 9 | |
okini3939 | 0:6ad2528ba3cc | 10 | #include "ACMP.h" |
okini3939 | 0:6ad2528ba3cc | 11 | |
okini3939 | 0:6ad2528ba3cc | 12 | ACMP *ACMP::_acmp; |
okini3939 | 0:6ad2528ba3cc | 13 | |
okini3939 | 0:6ad2528ba3cc | 14 | ACMP::ACMP (VSEL vp, VSEL vn, HYS hys, int lad) { |
okini3939 | 0:6ad2528ba3cc | 15 | |
okini3939 | 0:6ad2528ba3cc | 16 | _acmp = this; |
okini3939 | 0:6ad2528ba3cc | 17 | |
okini3939 | 0:6ad2528ba3cc | 18 | LPC_SYSCON->PDRUNCFG &= ~(1<<3); // Enable power to BOD block |
okini3939 | 0:6ad2528ba3cc | 19 | LPC_SYSCON->PDRUNCFG &= ~(1<<15); // Enable power to CMP block |
okini3939 | 0:6ad2528ba3cc | 20 | LPC_SYSCON->SYSAHBCLKCTRL |= (1<<19); // Enable clock to CMP block |
okini3939 | 0:6ad2528ba3cc | 21 | LPC_SYSCON->PRESETCTRL &= ~(1<<12); // reset CMP |
okini3939 | 0:6ad2528ba3cc | 22 | LPC_SYSCON->PRESETCTRL |= (1<<12); |
okini3939 | 0:6ad2528ba3cc | 23 | |
okini3939 | 0:6ad2528ba3cc | 24 | if (vp == ACMP_I1 || vn == ACMP_I1) { |
okini3939 | 0:6ad2528ba3cc | 25 | LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7)|(1<<6); // enable clock for SWM, GPIO |
okini3939 | 0:6ad2528ba3cc | 26 | LPC_IOCON->PIO0_0 &= ~(3<<3); // no pull up/down |
okini3939 | 0:6ad2528ba3cc | 27 | LPC_GPIO_PORT->DIR0 &= ~(1<<0); // configure GPIO as input |
okini3939 | 0:6ad2528ba3cc | 28 | LPC_SWM->PINENABLE0 &= ~(1<<0); // P0.0 is ACMP_I1 |
okini3939 | 0:6ad2528ba3cc | 29 | |
okini3939 | 0:6ad2528ba3cc | 30 | } |
okini3939 | 0:6ad2528ba3cc | 31 | if (vp == ACMP_I2 || vn == ACMP_I2) { |
okini3939 | 0:6ad2528ba3cc | 32 | LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7)|(1<<6); // enable clock for SWM, GPIO |
okini3939 | 0:6ad2528ba3cc | 33 | LPC_IOCON->PIO0_1 &= ~(3<<3); // no pull up/down |
okini3939 | 0:6ad2528ba3cc | 34 | LPC_GPIO_PORT->DIR0 &= ~(1<<1); // configure GPIO as input |
okini3939 | 0:6ad2528ba3cc | 35 | LPC_SWM->PINENABLE0 &= ~(1<<1); // P0.1 is ACMP_I2 |
okini3939 | 0:6ad2528ba3cc | 36 | } |
okini3939 | 0:6ad2528ba3cc | 37 | #if defined(TARGET_LPC82X) |
okini3939 | 0:6ad2528ba3cc | 38 | if (vp == ACMP_I3 || vn == ACMP_I3) { |
okini3939 | 0:6ad2528ba3cc | 39 | LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7)|(1<<6); // enable clock for SWM, GPIO |
okini3939 | 0:6ad2528ba3cc | 40 | LPC_IOCON->PIO0_14 &= ~(3<<3); // no pull up/down |
okini3939 | 0:6ad2528ba3cc | 41 | LPC_GPIO_PORT->DIR0 &= ~(1<<14); // configure GPIO as input |
okini3939 | 0:6ad2528ba3cc | 42 | LPC_SWM->PINENABLE0 &= ~(1<<2); // P0.14 is ACMP_I3 |
okini3939 | 0:6ad2528ba3cc | 43 | } |
okini3939 | 0:6ad2528ba3cc | 44 | if (vp == ACMP_I4 || vn == ACMP_I4) { |
okini3939 | 0:6ad2528ba3cc | 45 | LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7)|(1<<6); // enable clock for SWM, GPIO |
okini3939 | 0:6ad2528ba3cc | 46 | LPC_IOCON->PIO0_23 &= ~(3<<3); // no pull up/down |
okini3939 | 0:6ad2528ba3cc | 47 | LPC_GPIO_PORT->DIR0 &= ~(1<<23); // configure GPIO as input |
okini3939 | 0:6ad2528ba3cc | 48 | LPC_SWM->PINENABLE0 &= ~(1<<3); // P0.23 is ACMP_I4 |
okini3939 | 0:6ad2528ba3cc | 49 | } |
okini3939 | 0:6ad2528ba3cc | 50 | #endif |
okini3939 | 0:6ad2528ba3cc | 51 | if (lad >= 0) { |
okini3939 | 0:6ad2528ba3cc | 52 | LPC_CMP->LAD = ((lad & 0x1f) << 1) | (1<<0); // Vref=VDD |
okini3939 | 0:6ad2528ba3cc | 53 | } |
okini3939 | 0:6ad2528ba3cc | 54 | |
okini3939 | 0:6ad2528ba3cc | 55 | LPC_CMP->CTRL = (hys << 25) | (vn << 11)| (vp << 8) | (2 << 3); // Both edges |
okini3939 | 0:6ad2528ba3cc | 56 | |
okini3939 | 0:6ad2528ba3cc | 57 | LPC_CMP->CTRL |= (1<<20); // EDGECLR |
okini3939 | 0:6ad2528ba3cc | 58 | LPC_CMP->CTRL &= ~(1<<20); // EDGECLR |
okini3939 | 0:6ad2528ba3cc | 59 | NVIC_EnableIRQ(CMP_IRQn); |
okini3939 | 0:6ad2528ba3cc | 60 | } |
okini3939 | 0:6ad2528ba3cc | 61 | |
okini3939 | 0:6ad2528ba3cc | 62 | extern "C" |
okini3939 | 0:6ad2528ba3cc | 63 | void CMP_IRQHandler (void) { |
okini3939 | 0:6ad2528ba3cc | 64 | ACMP::_acmp->isrAcmp(); |
okini3939 | 0:6ad2528ba3cc | 65 | } |
okini3939 | 0:6ad2528ba3cc | 66 | |
okini3939 | 0:6ad2528ba3cc | 67 | void ACMP::isrAcmp () { |
okini3939 | 0:6ad2528ba3cc | 68 | if (read()) { |
okini3939 | 0:6ad2528ba3cc | 69 | _rise.call(); |
okini3939 | 0:6ad2528ba3cc | 70 | } else { |
okini3939 | 0:6ad2528ba3cc | 71 | _fall.call(); |
okini3939 | 0:6ad2528ba3cc | 72 | } |
okini3939 | 0:6ad2528ba3cc | 73 | LPC_CMP->CTRL |= (1<<20); // EDGECLR |
okini3939 | 0:6ad2528ba3cc | 74 | LPC_CMP->CTRL &= ~(1<<20); // EDGECLR |
okini3939 | 0:6ad2528ba3cc | 75 | } |
okini3939 | 0:6ad2528ba3cc | 76 | |
okini3939 | 0:6ad2528ba3cc | 77 | int ACMP::read () { |
okini3939 | 0:6ad2528ba3cc | 78 | return LPC_CMP->CTRL & (1<<21) ? 1 : 0; |
okini3939 | 0:6ad2528ba3cc | 79 | } |