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ADC_input.cpp
00001 /**---------------------------------------------------------------------------- 00002 * 00003 * \file frequency_detector.cpp 00004 -- -- 00005 -- ECEN 5803 Mastering Embedded System Architecture -- 00006 -- Project 1 Module 4 -- 00007 -- Microcontroller Firmware -- 00008 -- frequency_detector.cpp -- 00009 -- -- 00010 ------------------------------------------------------------------------------- 00011 -- 00012 -- Designed for: University of Colorado at Boulder 00013 -- 00014 -- 00015 -- Designed by: Tim Scherr 00016 -- Revised by: Naved Maududi and Bryan Cisneros 00017 -- 00018 -- Version: 2.1 00019 -- Date of current revision: 2017-09-25 00020 -- Target Microcontroller: Freescale MKL25ZVMT4 00021 -- Tools used: ARM mbed compiler 00022 -- ARM mbed SDK 00023 -- Freescale FRDM-KL25Z Freedom Board 00024 -- 00025 -- 00026 Functional Description: 00027 This file contains code that takes in quasi-sine wave ADC inputs from the flow meter 00028 From the ADC inputs, it calculates the frequency of that sine wave. The frequency is 00029 important in determining the flow rate and velocity for the flowmeter that are outputed 00030 to the display. 00031 -- 00032 -- Copyright (c) 2015 Tim Scherr All rights reserved. 00033 */ 00034 00035 00036 #include "shared.h" 00037 00038 00039 PinName const ch0 = PTB0; // channel 0 (PTB0) to A/D pin VREFL 00040 PinName const ch1 = PTB1; // channel 1 (PTB1) to J10_4 a virtual vortex frequency input, 00041 PinName const ch2 = PTB2; // channel 2 (PTB2) to an actual internal TempSensor 00042 00043 #define ADC0_CFG1 (ADC0->CFG1) 00044 #define ADC0_CFG2 (ADC0->CFG2) 00045 #define ADC0_SC1A (ADC0->SC1[0]) // ADC0 to SC1A 00046 #define ADC0_SC3 (ADC0->SC3) 00047 #define ADC0_SC2 (ADC0->SC2) 00048 #define SIM_SCGC6 (SIM->SCGC6) 00049 #define CHANNEL_0 (0U) 00050 #define CHANNEL_1 (1U) 00051 #define CHANNEL_2 (2U) 00052 00053 uint16_t ADC_vortex_frequency_input = 0; 00054 uint16_t Vrefl = 0; 00055 int Vtemp = 0; 00056 uint16_t counter_frequency_data = 0; 00057 00058 const uint16_t frequency_data[1000] = { 00059 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 0xD196, 0xD79E, 0xDD4D, 0xE29F, 00060 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 00061 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 0xC495, 0xBDA9, 00062 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 0x6803, 0x602A, 0x5871, 0x50E0, 00063 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 00064 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 00065 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 0x5871, 0x602A, 0x6803, 0x6FF4, 00066 0x77F6, 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 0xD196, 0xD79E, 00067 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 00068 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 00069 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 0x6803, 0x602A, 00070 0x5871, 0x50E0, 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 00071 0x08FD, 0x0643, 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 0x08FD, 0x0C2E, 00072 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 0x5871, 0x602A, 00073 0x6803, 0x6FF4, 0x77F6, 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 00074 0xD196, 0xD79E, 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 00075 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 00076 0xD196, 0xCB3B, 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 00077 0x6803, 0x602A, 0x5871, 0x50E0, 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 00078 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 00079 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 00080 0x5871, 0x602A, 0x6803, 0x6FF4, 0x77F6, 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 00081 0xC495, 0xCB3B, 0xD196, 0xD79E, 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 00082 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 00083 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 00084 0x77F6, 0x6FF4, 0x6803, 0x602A, 0x5871, 0x50E0, 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 00085 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 00086 0x0405, 0x0643, 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 00087 0x497F, 0x50E0, 0x5871, 0x602A, 0x6803, 0x6FF4, 0x77F6, 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 00088 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 0xD196, 0xD79E, 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 00089 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 00090 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 00091 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 0x6803, 0x602A, 0x5871, 0x50E0, 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 00092 0x22B1, 0x1D5F, 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 00093 0x0102, 0x0244, 0x0405, 0x0643, 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 00094 0x3B69, 0x4255, 0x497F, 0x50E0, 0x5871, 0x602A, 0x6803, 0x6FF4, 0x77F6, 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 00095 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 0xD196, 0xD79E, 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 0xF029, 0xF3D0, 00096 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 00097 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 00098 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 0x6803, 0x602A, 0x5871, 0x50E0, 0x497F, 0x4255, 0x3B69, 0x34C3, 00099 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 0x0405, 0x0244, 0x0102, 0x0040, 00100 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 0x22B1, 0x2860, 00101 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 0x5871, 0x602A, 0x6803, 0x6FF4, 0x77F6, 0x7FFF, 0x8808, 0x900A, 00102 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 0xD196, 0xD79E, 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 00103 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 00104 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 00105 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 0x6803, 0x602A, 0x5871, 0x50E0, 0x497F, 0x4255, 00106 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 0x0405, 0x0244, 00107 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 00108 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 0x5871, 0x602A, 0x6803, 0x6FF4, 0x77F6, 0x7FFF, 00109 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 0xD196, 0xD79E, 0xDD4D, 0xE29F, 00110 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 00111 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 0xC495, 0xBDA9, 00112 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 0x6803, 0x602A, 0x5871, 0x50E0, 00113 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 00114 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 00115 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 0x5871, 0x602A, 0x6803, 0x6FF4, 00116 0x77F6, 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 0xD196, 0xD79E, 00117 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 0xFFFF, 0xFFBE, 00118 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 0xD196, 0xCB3B, 00119 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 0x6803, 0x602A, 00120 0x5871, 0x50E0, 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 0x0FD5, 0x0C2E, 00121 0x08FD, 0x0643, 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 0x08FD, 0x0C2E, 00122 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 0x5871, 0x602A, 00123 0x6803, 0x6FF4, 0x77F6, 0x7FFF, 0x8808, 0x900A, 0x97FB, 0x9FD4, 0xA78D, 0xAF1E, 0xB67F, 0xBDA9, 0xC495, 0xCB3B, 00124 0xD196, 0xD79E, 0xDD4D, 0xE29F, 0xE78C, 0xEC12, 0xF029, 0xF3D0, 0xF701, 0xF9BB, 0xFBF9, 0xFDBA, 0xFEFC, 0xFFBE, 00125 0xFFFF, 0xFFBE, 0xFEFC, 0xFDBA, 0xFBF9, 0xF9BB, 0xF701, 0xF3D0, 0xF029, 0xEC12, 0xE78C, 0xE29F, 0xDD4D, 0xD79E, 00126 0xD196, 0xCB3B, 0xC495, 0xBDA9, 0xB67F, 0xAF1E, 0xA78D, 0x9FD4, 0x97FB, 0x900A, 0x8808, 0x7FFF, 0x77F6, 0x6FF4, 00127 0x6803, 0x602A, 0x5871, 0x50E0, 0x497F, 0x4255, 0x3B69, 0x34C3, 0x2E68, 0x2860, 0x22B1, 0x1D5F, 0x1872, 0x13EC, 00128 0x0FD5, 0x0C2E, 0x08FD, 0x0643, 0x0405, 0x0244, 0x0102, 0x0040, 0x0000, 0x0040, 0x0102, 0x0244, 0x0405, 0x0643, 00129 0x08FD, 0x0C2E, 0x0FD5, 0x13EC, 0x1872, 0x1D5F, 0x22B1, 0x2860, 0x2E68, 0x34C3, 0x3B69, 0x4255, 0x497F, 0x50E0, 00130 0x5871, 0x602A, 0x6803, 0x6FF4, 0x77F6}; 00131 00132 AnalogIn Vref_low(ch0); 00133 00134 AnalogIn vortex_frequency(ch1); 00135 00136 AnalogIn TempSensor(ch2); 00137 00138 00139 void adc_calibration(void){ 00140 00141 // Enable clocks 00142 SIM_SCGC6 |= SIM_SCGC6_ADC0_MASK; // ADC 0 clock 00143 00144 // Configure ADC 00145 ADC0_CFG1 = 0; // Reset register 00146 00147 00148 00149 ADC0_CFG1 |= (ADC_CFG1_MODE(0)| // 8 bit mode 00150 ADC_CFG1_ADICLK(0)| // Input Bus Clock for calibration 00151 ADC_CFG1_ADIV(3)); // Long time sample configuration 00152 00153 ADC0_CFG1 = 0 & ADC_CFG1_ADLPC_MASK; // normal power configuration 00154 ADC0_CFG1 = 1 & ADC_CFG1_ADLSMP_MASK; // Long time sample configuration 00155 00156 00157 ADC0_CFG2 = 0 & ADC_CFG2_ADHSC_MASK; // 1 High-speed conversion sequence, 0 for normal coversion, zero as sampling is 10 usec, bus clock is good enought 00158 ADC0_CFG2 = 0 & ADC_CFG2_ADLSTS_MASK; // Default longest sample time; 20 extra ADCK cycles; 24 ADCK cycles total. 00159 ADC0_CFG2 = 0 & ADC_CFG2_ADACKEN_MASK; // Asynchronous clock output disabled; Asynchronous clock is enabled only if selected by ADICLK and a conversion is active. low power configuration 00160 00161 00162 00163 ADC0_SC3 = 1 & ADC_SC3_AVGE_MASK; // 1 High-speed conversion sequence, for calibration 00164 ADC0_SC3 = 3 & ADC_SC3_AVGS_MASK; // Average of 32 samples, for calibration purposes 00165 ADC0_SC3 = 1 & ADC_SC3_CAL_MASK; // set to 1 for calibration of the ADC prior to completing conversions 00166 00167 uint16_t PG_calibration = 0; //Initialize or clear a 16-bit variable in RAM. 00168 uint16_t MG_calibration = 0; //Initialize or clear a 16-bit variable in RAM. 00169 00170 PG_calibration = (ADC0->CLP0)+(ADC0->CLP1)+(ADC0->CLP2)+(ADC0->CLP3)+(ADC0->CLP4)+(ADC0->CLPS); // Add the plus-side calibration results to the variable 00171 PG_calibration = PG_calibration/2; // Divide the variable by two 00172 PG_calibration = (PG_calibration & 0xFF00); //Set the MSB of the variable. 00173 ADC0->PG = (ADC0->CLP0)+PG_calibration; //Store the value in the plus-side gain calibration register PG. 00174 00175 MG_calibration = (ADC0->CLM0)+(ADC0->CLM1)+(ADC0->CLM2)+(ADC0->CLM3)+(ADC0->CLM4)+(ADC0->CLMS); // Add the minus-side calibration results to the variable 00176 MG_calibration = MG_calibration/2; //Divide the variable by two 00177 MG_calibration = (MG_calibration & 0xFF00); //Set the MSB of the variable. 00178 ADC0->MG = (ADC0->CLM0)+MG_calibration; //Store the value in the plus-side gain calibration register MG. 00179 // END OF CALIBRATION 00180 } 00181 00182 00183 00184 00185 void read_ADC(uint8_t channel) 00186 { 00187 if (channel==CHANNEL_0){ 00188 // Enable clocks 00189 SIM_SCGC6 |= SIM_SCGC6_ADC0_MASK; // ADC 0 clock 00190 00191 // Configure ADC 00192 ADC0_CFG1 = 0; // Reset register 00193 00194 ADC0_CFG1 |= (ADC_CFG1_MODE(0)| // 8 bit mode 00195 ADC_CFG1_ADICLK(0)| // Input Bus Clock (20-25 MHz out of reset (FEI mode)) 00196 ADC_CFG1_ADIV(0)); // Clock divide by 1 00197 ADC0_CFG1 = 0 & ADC_CFG1_ADLPC_MASK; // normal power configuration 00198 ADC0_CFG1 = 1 & ADC_CFG1_ADLSMP_MASK; // Long time sample configuration 00199 00200 ADC0_CFG2 = 0 & ADC_CFG2_ADHSC_MASK; // 1 High-speed conversion sequence, 0 for normal coversion, zero as sampling is 10 usec, bus clock is good enought 00201 ADC0_CFG2 = 0 & ADC_CFG2_ADLSTS_MASK; // Default longest sample time; 20 extra ADCK cycles; 24 ADCK cycles total. 00202 ADC0_CFG2 = 0 & ADC_CFG2_ADACKEN_MASK; // Asynchronous clock output disabled; Asynchronous clock is enabled only if selected by ADICLK and a conversion is active. low power configuration 00203 00204 00205 ADC0_SC3 = 0 & ADC_SC3_ADCO_MASK; // set to 1 for continuious conversion, 0 for only 1 set of conversions 00206 00207 ADC0_SC1A = 13 & ADC_SC1_ADCH_MASK; // ADC0_SE8 that is connected to PTB0 00208 ADC0_SC1A = 0& ADC_SC1_DIFF_MASK; //0 Single-ended conversions and input channels are selected. 00209 00210 Vrefl = (Vref_low.read_u16()); 00211 00212 } else if (channel==CHANNEL_1){ 00213 00214 // Enable clocks 00215 SIM_SCGC6 |= SIM_SCGC6_ADC0_MASK; // ADC 0 clock 00216 00217 // Configure ADC 00218 ADC0_CFG1 = 0; // Reset register 00219 00220 ADC0_CFG1 |= (ADC_CFG1_MODE(3)| // 8 bit mode 00221 ADC_CFG1_ADICLK(0)| // Input Bus Clock (20-25 MHz out of reset (FEI mode)) 00222 ADC_CFG1_ADIV(0)); // Clock divide by 1 00223 ADC0_CFG1 = 0 & ADC_CFG1_ADLPC_MASK; // normal power configuration 00224 ADC0_CFG1 = 1 & ADC_CFG1_ADLSMP_MASK; // Long time sample configuration 00225 00226 00227 ADC0_CFG2 = 0 & ADC_CFG2_ADHSC_MASK; // 1 High-speed conversion sequence, 0 for normal coversion, zero as sampling is 10 usec, bus clock is good enought 00228 ADC0_CFG2 = 0 & ADC_CFG2_ADLSTS_MASK; // Default longest sample time; 20 extra ADCK cycles; 24 ADCK cycles total. 00229 ADC0_CFG2 = 0 & ADC_CFG2_ADACKEN_MASK; // Asynchronous clock output disabled; Asynchronous clock is enabled only if selected by ADICLK and a conversion is active. low power configuration 00230 00231 00232 ADC0_SC3 = 1 & ADC_SC3_ADCO_MASK; // set to 1 for continuious conversion, 0 for only 1 set of conversions 00233 00234 ADC0_SC1A = 14 & ADC_SC1_ADCH_MASK; // ADC0_SE9 that is connected to PTB1 00235 ADC0_SC1A = 0 & ADC_SC1_DIFF_MASK; //0 Single-ended conversions and input channels are selected. 00236 00237 if (counter_frequency_data<999) 00238 { 00239 ADC_vortex_frequency_input = (vortex_frequency.read_u16()) + frequency_data[counter_frequency_data]; 00240 counter_frequency_data++; 00241 } 00242 else 00243 { 00244 counter_frequency_data = 0; 00245 ADC_vortex_frequency_input = (vortex_frequency.read_u16()) + frequency_data[counter_frequency_data]; 00246 } 00247 00248 } else 00249 { 00250 // Enable clocks 00251 SIM_SCGC6 |= SIM_SCGC6_ADC0_MASK; // ADC 0 clock 00252 00253 // Configure ADC 00254 ADC0_CFG1 = 0; // Reset register 00255 00256 ADC0_CFG1 |= (ADC_CFG1_MODE(3)| // 8 bit mode 00257 ADC_CFG1_ADICLK(0)| // Input Bus Clock (20-25 MHz out of reset (FEI mode)) 00258 ADC_CFG1_ADIV(0)); // Clock divide by 1 00259 ADC0_CFG1 = 0 & ADC_CFG1_ADLPC_MASK; // normal power configuration 00260 ADC0_CFG1 = 1 & ADC_CFG1_ADLSMP_MASK; // Long time sample configuration 00261 00262 00263 ADC0_CFG2 = 0 & ADC_CFG2_ADHSC_MASK; // 1 High-speed conversion sequence, 0 for normal coversion, zero as sampling is 10 usec, bus clock is good enought 00264 ADC0_CFG2 = 0 & ADC_CFG2_ADLSTS_MASK; // Default longest sample time; 20 extra ADCK cycles; 24 ADCK cycles total. 00265 ADC0_CFG2 = 0 & ADC_CFG2_ADACKEN_MASK; // Asynchronous clock output disabled; Asynchronous clock is enabled only if selected by ADICLK and a conversion is active. low power configuration 00266 00267 00268 ADC0_SC3 = 1 & ADC_SC3_ADCO_MASK; // set to 1 for continuious conversion, 0 for only 1 set of conversions 00269 00270 PMC->REGSC = (1 & PMC_REGSC_BGBE_MASK); // NEED to be set for meseauring temperature sensor 00271 ADC0_SC1A = 26 & ADC_SC1_ADCH_MASK; // temperature sensor (reading in value from internal sensor) V 00272 ADC0_SC1A = 1 & ADC_SC1_DIFF_MASK; //0 Single-ended conversions and input channels are selected. 00273 while(!(ADC0_SC1A & ADC_SC1_COCO_MASK)); // Run until the conversion is complete 00274 00275 00276 Vtemp = (TempSensor.read_u16()); 00277 //Vtemp = ADC0-> R[0]; 00278 } 00279 00280 00281 } 00282 00283
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