Nikolai Trushnikov / Mbed 2 deprecated Chromatograph_Mobile

test

Dependencies:   ad5422_arduino mbed LT1446 ADS1248-1 LM35-1 Flash FT813 PGA280_ADS1259

PerifConfig.h@7:c364201bc3ed, 2020-09-01 (annotated)

Committer:
nikmaos
Date:
Tue Sep 01 10:52:34 2020 +0000
Revision:
7:c364201bc3ed
Parent:
6:cfe7cb0bdb1a 
1.09.2020;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vitlog 1:5d28312892aa 1 #ifndef PERIFCONFIG_H
vitlog 1:5d28312892aa 2 #define PERIFCONFIG_H
vitlog 1:5d28312892aa 3 /*Это перенос с языка Си для PIC32 максимально безболезненно*/
vitlog 1:5d28312892aa 4 #include "mbed.h"
vitlog 1:5d28312892aa 5
vitlog 1:5d28312892aa 6 #ifdef __cplusplus
vitlog 1:5d28312892aa 7 extern "C" {
vitlog 1:5d28312892aa 8 #endif
vitlog 1:5d28312892aa 9
vitlog 1:5d28312892aa 10 /*Моё начало*/
vitlog 1:5d28312892aa 11 #define SYS_FREQ (180000000L)
vitlog 1:5d28312892aa 12 /*настройки для UART1*/
vitlog 1:5d28312892aa 13 #define BAUD 115200 //бодрейт
vitlog 1:5d28312892aa 14 #define MYUBRG SYS_FREQ/16/BAUD-1
vitlog 1:5d28312892aa 15 /*Конец*/
vitlog 1:5d28312892aa 16
vitlog 1:5d28312892aa 17 /*Переименование выводов SPI*/
vitlog 1:5d28312892aa 18 #define MOSI1 mosi1 //MOSI настройка вывода SPI1 на выход (на всякий случай)
vitlog 1:5d28312892aa 19 #define MISO1 miso2 //MISO
vitlog 1:5d28312892aa 20 #define SCK1 sck1 //SCK
vitlog 1:5d28312892aa 21 /*Конец*/
vitlog 1:5d28312892aa 22
vitlog 1:5d28312892aa 23 /*Период таймера*/
vitlog 1:5d28312892aa 24 #define PER 0.04 //с
vitlog 1:5d28312892aa 25 #define PERREG SYS_FREQ/8*PER-1 //25 fps
vitlog 1:5d28312892aa 26 #define PER2 0.00001 //10 мкс
vitlog 1:5d28312892aa 27 #define PERREG2 SYS_FREQ/8*PER2-1 // fps
vitlog 1:5d28312892aa 28 /*Конец*/
vitlog 1:5d28312892aa 29
vitlog 1:5d28312892aa 30 #ifndef CS
vitlog 1:5d28312892aa 31 #define CS Cs //чипселект
vitlog 1:5d28312892aa 32 #endif
vitlog 1:5d28312892aa 33
vitlog 1:5d28312892aa 34 #define EN1 En1 //включить что-то
vitlog 1:5d28312892aa 35
vitlog 1:5d28312892aa 36 #define ADR0 Adr0
vitlog 1:5d28312892aa 37 #define ADR1 Adr1
vitlog 1:5d28312892aa 38 #define ADR2 Adr2
vitlog 1:5d28312892aa 39
vitlog 1:5d28312892aa 40 #define RESET Reset
vitlog 1:5d28312892aa 41 #define CRDYA CrdyA //сигнал готовности с АЦП/ЦАП
vitlog 1:5d28312892aa 42
vitlog 1:5d28312892aa 43 #define ADS1259_RESET Reset
vitlog 1:5d28312892aa 44 #define ADS1259_RDYA CrdyA
vitlog 1:5d28312892aa 45 #define MUX_AN10_IZM_RRG1 2
vitlog 1:5d28312892aa 46 #define MUX_AN10_KLAPAN_RRG1 3
vitlog 1:5d28312892aa 47
vitlog 1:5d28312892aa 48 #define ADC_CH0 0
vitlog 1:5d28312892aa 49 #define ADC_CH1
vitlog 1:5d28312892aa 50 #define ADC_CH2
vitlog 1:5d28312892aa 51
vitlog 1:5d28312892aa 52 #define PGA280_TED 4
vitlog 1:5d28312892aa 53 #define PGA280_RRG1 5
vitlog 1:5d28312892aa 54 /*конец*/
vitlog 1:5d28312892aa 55
vitlog 1:5d28312892aa 56 /*Переопределение имени пинов*/
nikmaos 3:d4b106bf3a32 57 extern DigitalOut Cs,
nikmaos 3:d4b106bf3a32 58 En1,
nikmaos 3:d4b106bf3a32 59 Adr0,
nikmaos 3:d4b106bf3a32 60 Adr1,
nikmaos 3:d4b106bf3a32 61 Adr2,
nikmaos 3:d4b106bf3a32 62 Reset,
nikmaos 6:cfe7cb0bdb1a 63 LTC1446_CLK,
nikmaos 6:cfe7cb0bdb1a 64 LTC1446_DOUT,
nikmaos 6:cfe7cb0bdb1a 65 LTC1446_CS,
nikmaos 3:d4b106bf3a32 66 ads1259_pin_Start,
nikmaos 3:d4b106bf3a32 67 ads1259_pin_CS,
nikmaos 3:d4b106bf3a32 68 /*для платы СБ-1*/
nikmaos 3:d4b106bf3a32 69 SB1_SWEN,
nikmaos 3:d4b106bf3a32 70 SB1_SHDN,PosAw,PosBw;
nikmaos 3:d4b106bf3a32 71
nikmaos 3:d4b106bf3a32 72 extern DigitalIn CrdyA,MISO,PosAr,PosBr,ads1259_pin_Drdy;
vitlog 1:5d28312892aa 73 /*Конец*/
nikmaos 6:cfe7cb0bdb1a 74 //extern SPI TED2;
nikmaos 6:cfe7cb0bdb1a 75 extern SPI AD1248_SPI;
vitlog 1:5d28312892aa 76 extern Serial UART;
vitlog 1:5d28312892aa 77
nikmaos 3:d4b106bf3a32 78 //компрессор
nikmaos 3:d4b106bf3a32 79 extern PwmOut Pressure;
nikmaos 3:d4b106bf3a32 80
vitlog 1:5d28312892aa 81 typedef union {
vitlog 1:5d28312892aa 82 struct {
vitlog 1:5d28312892aa 83 uint8_t
vitlog 1:5d28312892aa 84 adr0:1,
vitlog 1:5d28312892aa 85 adr1:1,
vitlog 1:5d28312892aa 86 adr2:1,
vitlog 1:5d28312892aa 87 :5;
vitlog 1:5d28312892aa 88 };
vitlog 1:5d28312892aa 89 struct {
vitlog 1:5d28312892aa 90 uint8_t adr:3;
vitlog 1:5d28312892aa 91 uint8_t :5;
vitlog 1:5d28312892aa 92 };
vitlog 1:5d28312892aa 93 } adress_t;
vitlog 1:5d28312892aa 94 extern adress_t adress;
vitlog 1:5d28312892aa 95
vitlog 1:5d28312892aa 96
vitlog 1:5d28312892aa 97 extern unsigned int counter;
vitlog 1:5d28312892aa 98 extern unsigned char str[32];
vitlog 1:5d28312892aa 99 extern unsigned char in; //счетчик буфера прерываний
vitlog 1:5d28312892aa 100 //RING_buffer_t buf_1; //буфер данных
vitlog 1:5d28312892aa 101
vitlog 1:5d28312892aa 102
vitlog 1:5d28312892aa 103
vitlog 1:5d28312892aa 104 void GPIO_Init(void);
vitlog 1:5d28312892aa 105 void UART_Init(void);
vitlog 1:5d28312892aa 106 void UART1_Transmit(unsigned char data);
vitlog 1:5d28312892aa 107 void UDebugTransmit(unsigned char cData);
vitlog 1:5d28312892aa 108 void DebugString (unsigned char *sData, unsigned char sz);
vitlog 1:5d28312892aa 109 void UART_gets(char maxcount);
vitlog 1:5d28312892aa 110 void SPI1_MasterInitMode(char mode);
vitlog 1:5d28312892aa 111 void SPI1_SlaveInit(void);
vitlog 1:5d28312892aa 112 void SPI1MasterTransmitString(unsigned char *sData,unsigned int sz); //передать строку размером sz
vitlog 1:5d28312892aa 113 unsigned char SPI1MasterTransferByte(unsigned char cData);//отправить и считать байт
nikmaos 3:d4b106bf3a32 114 unsigned char SPI3MasterTransferByte(unsigned char cData);
vitlog 1:5d28312892aa 115 unsigned char SPI1MasterReadByte(void);
vitlog 1:5d28312892aa 116 void TIMER32bit_Init(void);
vitlog 1:5d28312892aa 117
vitlog 1:5d28312892aa 118 namespace std{};
vitlog 1:5d28312892aa 119 using namespace std;
vitlog 1:5d28312892aa 120
vitlog 1:5d28312892aa 121 #ifdef __cplusplus
vitlog 1:5d28312892aa 122 }
vitlog 1:5d28312892aa 123 #endif
vitlog 1:5d28312892aa 124
vitlog 1:5d28312892aa 125 #endif /* PERIFCONFIG_H */