Changes done in ECG and BT
Dependencies: SDFileSystem ds3231 eeprom_Nikita mbed testUniGraphic_150217
Fork of merged_code2_20sept_2017_4th_oct_2017 by
ecg_dec.h@13:5d3b478ea9c7, 2017-05-27 (annotated)
- Committer:
- suhasini
- Date:
- Sat May 27 05:47:55 2017 +0000
- Revision:
- 13:5d3b478ea9c7
- Parent:
- 3:9a06c2bed650
- Child:
- 22:ffa88619551d
This code has ECG functionality with HRD calculation, BP, BG, new display
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
nikitateggi | 1:8316c23ec6b9 | 1 | |
nikitateggi | 1:8316c23ec6b9 | 2 | |
nikitateggi | 1:8316c23ec6b9 | 3 | #ifndef ECG_DEC_H_ |
nikitateggi | 1:8316c23ec6b9 | 4 | #define ECG_DEC_H_ |
nikitateggi | 1:8316c23ec6b9 | 5 | |
nikitateggi | 3:9a06c2bed650 | 6 | /*#include "mbed.h" |
nikitateggi | 1:8316c23ec6b9 | 7 | //#include "rtos.h" |
nikitateggi | 1:8316c23ec6b9 | 8 | #define PIN_MOSI PTA16 |
nikitateggi | 1:8316c23ec6b9 | 9 | #define PIN_MISO PTA17 |
nikitateggi | 1:8316c23ec6b9 | 10 | #define PIN_SCLK PTD1 |
nikitateggi | 1:8316c23ec6b9 | 11 | #define MA4_SIZE 4 // DO NOT CHANGE |
nikitateggi | 1:8316c23ec6b9 | 12 | //SDFileSystem sd(PTE1, PTE3, PTE2, PTE4, "sd"); |
nikitateggi | 1:8316c23ec6b9 | 13 | |
nikitateggi | 1:8316c23ec6b9 | 14 | //SPI commands |
nikitateggi | 1:8316c23ec6b9 | 15 | #define CMD_WAKEUP 0x02 |
nikitateggi | 1:8316c23ec6b9 | 16 | #define CMD_STANDBY 0x04 |
nikitateggi | 1:8316c23ec6b9 | 17 | #define CMD_RESET 0x06 |
nikitateggi | 1:8316c23ec6b9 | 18 | #define CMD_START 0x08 |
nikitateggi | 1:8316c23ec6b9 | 19 | #define CMD_STOP 0x0A |
nikitateggi | 1:8316c23ec6b9 | 20 | #define CMD_OFFSET_CAL 0x1A |
nikitateggi | 1:8316c23ec6b9 | 21 | #define CMD_RDATAC 0x10 |
nikitateggi | 1:8316c23ec6b9 | 22 | #define CMD_SDATAC 0x11 |
nikitateggi | 1:8316c23ec6b9 | 23 | #define CMD_RDATA 0x12 |
nikitateggi | 1:8316c23ec6b9 | 24 | //Note the following commands are 3 bits and have the following structure |
nikitateggi | 1:8316c23ec6b9 | 25 | // CMD_REGr_rrrr; where r_rrrr is the register address given below |
nikitateggi | 1:8316c23ec6b9 | 26 | #define CMD_WREG 0x02 |
nikitateggi | 1:8316c23ec6b9 | 27 | #define CMD_RREG 0x01 |
nikitateggi | 1:8316c23ec6b9 | 28 | |
nikitateggi | 1:8316c23ec6b9 | 29 | //SPI registers addresses, 5 bits width |
nikitateggi | 1:8316c23ec6b9 | 30 | #define REG_ID 0x00 |
nikitateggi | 1:8316c23ec6b9 | 31 | #define REG_CONFIG1 0x01 |
nikitateggi | 1:8316c23ec6b9 | 32 | #define REG_CONFIG2 0x02 |
nikitateggi | 1:8316c23ec6b9 | 33 | #define REG_LOFF 0x03 |
nikitateggi | 1:8316c23ec6b9 | 34 | #define REG_CH1SET 0x04 |
nikitateggi | 1:8316c23ec6b9 | 35 | #define REG_CH2SET 0x05 |
nikitateggi | 1:8316c23ec6b9 | 36 | #define REG_RLD_SENS 0x06 |
nikitateggi | 1:8316c23ec6b9 | 37 | #define REG_LOFF_SENS 0x07 |
nikitateggi | 1:8316c23ec6b9 | 38 | #define REG_LOFF_STAT 0x08 |
nikitateggi | 1:8316c23ec6b9 | 39 | #define REG_MISC1 0x09 |
nikitateggi | 1:8316c23ec6b9 | 40 | #define REG_MISC2 0x0A |
nikitateggi | 1:8316c23ec6b9 | 41 | #define REG_GIPO 0x0B |
nikitateggi | 1:8316c23ec6b9 | 42 | |
nikitateggi | 1:8316c23ec6b9 | 43 | //Register bit configurations |
nikitateggi | 1:8316c23ec6b9 | 44 | #define sps500 0x02 //CONFIG1 REG bits 010 |
nikitateggi | 1:8316c23ec6b9 | 45 | #define sps125 0x00 //CONFIG1 REG bits 000 |
nikitateggi | 1:8316c23ec6b9 | 46 | #define sps1k 0x03 //CONFIG1 REG bits 011 |
nikitateggi | 1:8316c23ec6b9 | 47 | #define no_mode 0xA8 //CONFIG2 REG set to zero for device check |
nikitateggi | 1:8316c23ec6b9 | 48 | #define test_mode 0xA3 //CONFIG2 REG bits set to test mode, to generate a square wave |
nikitateggi | 1:8316c23ec6b9 | 49 | #define default_mode 0xE0 //CONFIG2 REG bits set to default mode, to generate ECG signal from an external input |
nikitateggi | 1:8316c23ec6b9 | 50 | #define loff_conf 0xF0 //LOFF register bits set to F0 to configure LOFF reg for leadoff detection |
nikitateggi | 1:8316c23ec6b9 | 51 | #define offset_meas 0x01 //CH1SET REG set to Gain = 6 and offset measurement |
nikitateggi | 1:8316c23ec6b9 | 52 | #define test_inp 0x05 //CH1SET REG set to Gain = 6 and generate test signal |
nikitateggi | 1:8316c23ec6b9 | 53 | #define elec_inp 0x00 //CH1SET REG set to Gain = 6 and take in electrode input |
nikitateggi | 1:8316c23ec6b9 | 54 | #define rld_sens_sig 0x23 |
nikitateggi | 1:8316c23ec6b9 | 55 | #define loff_sens_sig 0x03 |
nikitateggi | 1:8316c23ec6b9 | 56 | #define misc1_inp 0x02 |
nikitateggi | 1:8316c23ec6b9 | 57 | #define misc2_inp 0x03 |
nikitateggi | 1:8316c23ec6b9 | 58 | |
nikitateggi | 1:8316c23ec6b9 | 59 | #define LSHIFT_8 8 //left shift the obtained 8bit data by 8 values |
nikitateggi | 1:8316c23ec6b9 | 60 | #define LSHIFT_16 16 ////left shift the obtained 8bit data by 16 values |
nikitateggi | 1:8316c23ec6b9 | 61 | #define N_ERR 100 |
nikitateggi | 1:8316c23ec6b9 | 62 | #define N_TEST 500 |
nikitateggi | 1:8316c23ec6b9 | 63 | #define N_ECG 2000 |
nikitateggi | 3:9a06c2bed650 | 64 | SPI mySpi(PIN_MOSI, PIN_MISO, PIN_SCLK) ; |
nikitateggi | 3:9a06c2bed650 | 65 | //PIN DECLARATIONS |
nikitateggi | 3:9a06c2bed650 | 66 | Serial pc(USBTX,USBRX); |
nikitateggi | 3:9a06c2bed650 | 67 | DigitalIn DRDY_BAR(PTC8); |
nikitateggi | 3:9a06c2bed650 | 68 | DigitalIn INTR(PTC7); |
nikitateggi | 3:9a06c2bed650 | 69 | DigitalOut CHIPSEL_BAR(PTD0); |
nikitateggi | 3:9a06c2bed650 | 70 | DigitalOut ADS_START(PTC16); |
nikitateggi | 3:9a06c2bed650 | 71 | DigitalOut RESET_BAR(PTC17); |
nikitateggi | 1:8316c23ec6b9 | 72 | |
nikitateggi | 3:9a06c2bed650 | 73 | DigitalOut myled(LED1); |
nikitateggi | 3:9a06c2bed650 | 74 | |
nikitateggi | 3:9a06c2bed650 | 75 | PwmOut led(PTB18); |
nikitateggi | 3:9a06c2bed650 | 76 | //SPI SETTINGS |
nikitateggi | 3:9a06c2bed650 | 77 | #define baud_rate 115200 |
nikitateggi | 3:9a06c2bed650 | 78 | #define freq 1000000 |
nikitateggi | 3:9a06c2bed650 | 79 | #define bits 8 |
nikitateggi | 3:9a06c2bed650 | 80 | #define mode 1 |
nikitateggi | 3:9a06c2bed650 | 81 | #define loop 1000000 |
nikitateggi | 3:9a06c2bed650 | 82 | |
nikitateggi | 3:9a06c2bed650 | 83 | //PPG DECLARATION |
nikitateggi | 3:9a06c2bed650 | 84 | #define MAX_BRIGHTNESS 255 // BP ADD |
nikitateggi | 1:8316c23ec6b9 | 85 | int ecg(int pid); |
nikitateggi | 3:9a06c2bed650 | 86 | */ |
suhasini | 13:5d3b478ea9c7 | 87 | float ecg(int pid); |
nikitateggi | 1:8316c23ec6b9 | 88 | #endif |