nguyen nam / Mbed 2 deprecated BSP-DISCO_F746NG

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Dependencies:   mbed

Dependents:   uSD LCD

Drivers/BSP/STM32746G-Discovery/stm32746g_discovery_sdram.h@11:862f171dda3c, 2019-06-10 (annotated)

Committer:
nhancap98
Date:
Mon Jun 10 11:10:42 2019 +0000
Revision:
11:862f171dda3c
Parent:
8:56384bddaba5 
SPKT

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bcostm 6:e1d9da7fe856 1 /**
bcostm 6:e1d9da7fe856 2 ******************************************************************************
bcostm 6:e1d9da7fe856 3 * @file stm32746g_discovery_sdram.h
bcostm 6:e1d9da7fe856 4 * @author MCD Application Team
Jerome Coutant 8:56384bddaba5 5 * @version V2.0.0
Jerome Coutant 8:56384bddaba5 6 * @date 30-December-2016
bcostm 6:e1d9da7fe856 7 * @brief This file contains the common defines and functions prototypes for
bcostm 6:e1d9da7fe856 8 * the stm32746g_discovery_sdram.c driver.
bcostm 6:e1d9da7fe856 9 ******************************************************************************
bcostm 6:e1d9da7fe856 10 * @attention
bcostm 6:e1d9da7fe856 11 *
bcostm 6:e1d9da7fe856 12 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bcostm 6:e1d9da7fe856 13 *
bcostm 6:e1d9da7fe856 14 * Redistribution and use in source and binary forms, with or without modification,
bcostm 6:e1d9da7fe856 15 * are permitted provided that the following conditions are met:
bcostm 6:e1d9da7fe856 16 * 1. Redistributions of source code must retain the above copyright notice,
bcostm 6:e1d9da7fe856 17 * this list of conditions and the following disclaimer.
bcostm 6:e1d9da7fe856 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bcostm 6:e1d9da7fe856 19 * this list of conditions and the following disclaimer in the documentation
bcostm 6:e1d9da7fe856 20 * and/or other materials provided with the distribution.
bcostm 6:e1d9da7fe856 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bcostm 6:e1d9da7fe856 22 * may be used to endorse or promote products derived from this software
bcostm 6:e1d9da7fe856 23 * without specific prior written permission.
bcostm 6:e1d9da7fe856 24 *
bcostm 6:e1d9da7fe856 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bcostm 6:e1d9da7fe856 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bcostm 6:e1d9da7fe856 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bcostm 6:e1d9da7fe856 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bcostm 6:e1d9da7fe856 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bcostm 6:e1d9da7fe856 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bcostm 6:e1d9da7fe856 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bcostm 6:e1d9da7fe856 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bcostm 6:e1d9da7fe856 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bcostm 6:e1d9da7fe856 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bcostm 6:e1d9da7fe856 35 *
bcostm 6:e1d9da7fe856 36 ******************************************************************************
bcostm 6:e1d9da7fe856 37 */
bcostm 6:e1d9da7fe856 38
bcostm 6:e1d9da7fe856 39 /* Define to prevent recursive inclusion -------------------------------------*/
bcostm 6:e1d9da7fe856 40 #ifndef __STM32746G_DISCOVERY_SDRAM_H
bcostm 6:e1d9da7fe856 41 #define __STM32746G_DISCOVERY_SDRAM_H
bcostm 6:e1d9da7fe856 42
bcostm 6:e1d9da7fe856 43 #ifdef __cplusplus
bcostm 6:e1d9da7fe856 44 extern "C" {
bcostm 6:e1d9da7fe856 45 #endif
bcostm 6:e1d9da7fe856 46
bcostm 6:e1d9da7fe856 47 /* Includes ------------------------------------------------------------------*/
bcostm 6:e1d9da7fe856 48 #include "stm32f7xx_hal.h"
bcostm 6:e1d9da7fe856 49
bcostm 6:e1d9da7fe856 50 /** @addtogroup BSP
bcostm 6:e1d9da7fe856 51 * @{
bcostm 6:e1d9da7fe856 52 */
bcostm 6:e1d9da7fe856 53
bcostm 6:e1d9da7fe856 54 /** @addtogroup STM32746G_DISCOVERY
bcostm 6:e1d9da7fe856 55 * @{
bcostm 6:e1d9da7fe856 56 */
bcostm 6:e1d9da7fe856 57
bcostm 6:e1d9da7fe856 58 /** @addtogroup STM32746G_DISCOVERY_SDRAM
bcostm 6:e1d9da7fe856 59 * @{
bcostm 6:e1d9da7fe856 60 */
bcostm 6:e1d9da7fe856 61
bcostm 6:e1d9da7fe856 62 /** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Types STM32746G_DISCOVERY_SDRAM Exported Types
bcostm 6:e1d9da7fe856 63 * @{
bcostm 6:e1d9da7fe856 64 */
bcostm 6:e1d9da7fe856 65
bcostm 6:e1d9da7fe856 66 /**
bcostm 6:e1d9da7fe856 67 * @brief SDRAM status structure definition
bcostm 6:e1d9da7fe856 68 */
bcostm 6:e1d9da7fe856 69 #define SDRAM_OK ((uint8_t)0x00)
bcostm 6:e1d9da7fe856 70 #define SDRAM_ERROR ((uint8_t)0x01)
bcostm 6:e1d9da7fe856 71
bcostm 6:e1d9da7fe856 72 /** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Constants STM32746G_DISCOVERY_SDRAM Exported Constants
bcostm 6:e1d9da7fe856 73 * @{
bcostm 6:e1d9da7fe856 74 */
bcostm 6:e1d9da7fe856 75 #define SDRAM_DEVICE_ADDR ((uint32_t)0xC0000000)
bcostm 6:e1d9da7fe856 76 #define SDRAM_DEVICE_SIZE ((uint32_t)0x800000) /* SDRAM device size in MBytes */
bcostm 6:e1d9da7fe856 77
bcostm 6:e1d9da7fe856 78 /* #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_8 */
bcostm 6:e1d9da7fe856 79 #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_16
bcostm 6:e1d9da7fe856 80
bcostm 6:e1d9da7fe856 81 #define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_2
bcostm 6:e1d9da7fe856 82 /* #define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_3 */
bcostm 6:e1d9da7fe856 83
bcostm 6:e1d9da7fe856 84 #define REFRESH_COUNT ((uint32_t)0x0603) /* SDRAM refresh counter (100Mhz SD clock) */
bcostm 6:e1d9da7fe856 85
bcostm 6:e1d9da7fe856 86 #define SDRAM_TIMEOUT ((uint32_t)0xFFFF)
bcostm 6:e1d9da7fe856 87
bcostm 6:e1d9da7fe856 88 /* DMA definitions for SDRAM DMA transfer */
bcostm 6:e1d9da7fe856 89 #define __DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
bcostm 6:e1d9da7fe856 90 #define __DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
bcostm 6:e1d9da7fe856 91 #define SDRAM_DMAx_CHANNEL DMA_CHANNEL_0
bcostm 6:e1d9da7fe856 92 #define SDRAM_DMAx_STREAM DMA2_Stream0
bcostm 6:e1d9da7fe856 93 #define SDRAM_DMAx_IRQn DMA2_Stream0_IRQn
bcostm 6:e1d9da7fe856 94 #define BSP_SDRAM_DMA_IRQHandler DMA2_Stream0_IRQHandler
bcostm 6:e1d9da7fe856 95 /**
bcostm 6:e1d9da7fe856 96 * @}
bcostm 6:e1d9da7fe856 97 */
bcostm 6:e1d9da7fe856 98
bcostm 6:e1d9da7fe856 99 /**
bcostm 6:e1d9da7fe856 100 * @brief FMC SDRAM Mode definition register defines
bcostm 6:e1d9da7fe856 101 */
bcostm 6:e1d9da7fe856 102 #define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
bcostm 6:e1d9da7fe856 103 #define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
bcostm 6:e1d9da7fe856 104 #define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
bcostm 6:e1d9da7fe856 105 #define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
bcostm 6:e1d9da7fe856 106 #define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
bcostm 6:e1d9da7fe856 107 #define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
bcostm 6:e1d9da7fe856 108 #define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
bcostm 6:e1d9da7fe856 109 #define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
bcostm 6:e1d9da7fe856 110 #define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
bcostm 6:e1d9da7fe856 111 #define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
bcostm 6:e1d9da7fe856 112 #define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
bcostm 6:e1d9da7fe856 113 /**
bcostm 6:e1d9da7fe856 114 * @}
bcostm 6:e1d9da7fe856 115 */
bcostm 6:e1d9da7fe856 116
bcostm 6:e1d9da7fe856 117 /** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Macro STM32746G_DISCOVERY_SDRAM Exported Macro
bcostm 6:e1d9da7fe856 118 * @{
bcostm 6:e1d9da7fe856 119 */
bcostm 6:e1d9da7fe856 120 /**
bcostm 6:e1d9da7fe856 121 * @}
bcostm 6:e1d9da7fe856 122 */
bcostm 6:e1d9da7fe856 123
bcostm 6:e1d9da7fe856 124 /** @addtogroup STM32746G_DISCOVERY_SDRAM_Exported_Functions
bcostm 6:e1d9da7fe856 125 * @{
bcostm 6:e1d9da7fe856 126 */
bcostm 6:e1d9da7fe856 127 uint8_t BSP_SDRAM_Init(void);
bcostm 6:e1d9da7fe856 128 uint8_t BSP_SDRAM_DeInit(void);
bcostm 6:e1d9da7fe856 129 void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount);
bcostm 6:e1d9da7fe856 130 uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 6:e1d9da7fe856 131 uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 6:e1d9da7fe856 132 uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 6:e1d9da7fe856 133 uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 6:e1d9da7fe856 134 uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);
bcostm 6:e1d9da7fe856 135
bcostm 6:e1d9da7fe856 136 /* These functions can be modified in case the current settings (e.g. DMA stream)
bcostm 6:e1d9da7fe856 137 need to be changed for specific application needs */
bcostm 6:e1d9da7fe856 138 void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params);
bcostm 6:e1d9da7fe856 139 void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params);
bcostm 6:e1d9da7fe856 140
bcostm 6:e1d9da7fe856 141
bcostm 6:e1d9da7fe856 142 /**
bcostm 6:e1d9da7fe856 143 * @}
bcostm 6:e1d9da7fe856 144 */
bcostm 6:e1d9da7fe856 145
bcostm 6:e1d9da7fe856 146 /**
bcostm 6:e1d9da7fe856 147 * @}
bcostm 6:e1d9da7fe856 148 */
bcostm 6:e1d9da7fe856 149
bcostm 6:e1d9da7fe856 150 /**
bcostm 6:e1d9da7fe856 151 * @}
bcostm 6:e1d9da7fe856 152 */
bcostm 6:e1d9da7fe856 153
bcostm 6:e1d9da7fe856 154 /**
bcostm 6:e1d9da7fe856 155 * @}
bcostm 6:e1d9da7fe856 156 */
bcostm 6:e1d9da7fe856 157
bcostm 6:e1d9da7fe856 158 #ifdef __cplusplus
bcostm 6:e1d9da7fe856 159 }
bcostm 6:e1d9da7fe856 160 #endif
bcostm 6:e1d9da7fe856 161
bcostm 6:e1d9da7fe856 162 #endif /* __STM32746G_DISCOVERY_SDRAM_H */
bcostm 6:e1d9da7fe856 163
bcostm 6:e1d9da7fe856 164 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/