Maxim nexpaq / nexpaq_dev

Preliminary main mbed library for nexpaq development

hal/api/SPI.h@0:6c56fb4bc5f0, 2016-11-04 (annotated)

Committer:
nexpaq
Date:
Fri Nov 04 20:27:58 2016 +0000
Revision:
0:6c56fb4bc5f0
Moving to library for sharing updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nexpaq 0:6c56fb4bc5f0 1 /* mbed Microcontroller Library
nexpaq 0:6c56fb4bc5f0 2 * Copyright (c) 2006-2015 ARM Limited
nexpaq 0:6c56fb4bc5f0 3 *
nexpaq 0:6c56fb4bc5f0 4 * Licensed under the Apache License, Version 2.0 (the "License");
nexpaq 0:6c56fb4bc5f0 5 * you may not use this file except in compliance with the License.
nexpaq 0:6c56fb4bc5f0 6 * You may obtain a copy of the License at
nexpaq 0:6c56fb4bc5f0 7 *
nexpaq 0:6c56fb4bc5f0 8 * http://www.apache.org/licenses/LICENSE-2.0
nexpaq 0:6c56fb4bc5f0 9 *
nexpaq 0:6c56fb4bc5f0 10 * Unless required by applicable law or agreed to in writing, software
nexpaq 0:6c56fb4bc5f0 11 * distributed under the License is distributed on an "AS IS" BASIS,
nexpaq 0:6c56fb4bc5f0 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
nexpaq 0:6c56fb4bc5f0 13 * See the License for the specific language governing permissions and
nexpaq 0:6c56fb4bc5f0 14 * limitations under the License.
nexpaq 0:6c56fb4bc5f0 15 */
nexpaq 0:6c56fb4bc5f0 16 #ifndef MBED_SPI_H
nexpaq 0:6c56fb4bc5f0 17 #define MBED_SPI_H
nexpaq 0:6c56fb4bc5f0 18
nexpaq 0:6c56fb4bc5f0 19 #include "platform.h"
nexpaq 0:6c56fb4bc5f0 20
nexpaq 0:6c56fb4bc5f0 21 #if DEVICE_SPI
nexpaq 0:6c56fb4bc5f0 22
nexpaq 0:6c56fb4bc5f0 23 #include "PlatformMutex.h"
nexpaq 0:6c56fb4bc5f0 24 #include "spi_api.h"
nexpaq 0:6c56fb4bc5f0 25 #include "SingletonPtr.h"
nexpaq 0:6c56fb4bc5f0 26
nexpaq 0:6c56fb4bc5f0 27 #if DEVICE_SPI_ASYNCH
nexpaq 0:6c56fb4bc5f0 28 #include "CThunk.h"
nexpaq 0:6c56fb4bc5f0 29 #include "dma_api.h"
nexpaq 0:6c56fb4bc5f0 30 #include "CircularBuffer.h"
nexpaq 0:6c56fb4bc5f0 31 #include "FunctionPointer.h"
nexpaq 0:6c56fb4bc5f0 32 #include "Transaction.h"
nexpaq 0:6c56fb4bc5f0 33 #endif
nexpaq 0:6c56fb4bc5f0 34
nexpaq 0:6c56fb4bc5f0 35 namespace mbed {
nexpaq 0:6c56fb4bc5f0 36
nexpaq 0:6c56fb4bc5f0 37 /** A SPI Master, used for communicating with SPI slave devices
nexpaq 0:6c56fb4bc5f0 38 *
nexpaq 0:6c56fb4bc5f0 39 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
nexpaq 0:6c56fb4bc5f0 40 *
nexpaq 0:6c56fb4bc5f0 41 * Most SPI devices will also require Chip Select and Reset signals. These
nexpaq 0:6c56fb4bc5f0 42 * can be controlled using <DigitalOut> pins
nexpaq 0:6c56fb4bc5f0 43 *
nexpaq 0:6c56fb4bc5f0 44 * @Note Synchronization level: Thread safe
nexpaq 0:6c56fb4bc5f0 45 *
nexpaq 0:6c56fb4bc5f0 46 * Example:
nexpaq 0:6c56fb4bc5f0 47 * @code
nexpaq 0:6c56fb4bc5f0 48 * // Send a byte to a SPI slave, and record the response
nexpaq 0:6c56fb4bc5f0 49 *
nexpaq 0:6c56fb4bc5f0 50 * #include "mbed.h"
nexpaq 0:6c56fb4bc5f0 51 *
nexpaq 0:6c56fb4bc5f0 52 * // hardware ssel (where applicable)
nexpaq 0:6c56fb4bc5f0 53 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
nexpaq 0:6c56fb4bc5f0 54 *
nexpaq 0:6c56fb4bc5f0 55 * // software ssel
nexpaq 0:6c56fb4bc5f0 56 * SPI device(p5, p6, p7); // mosi, miso, sclk
nexpaq 0:6c56fb4bc5f0 57 * DigitalOut cs(p8); // ssel
nexpaq 0:6c56fb4bc5f0 58 *
nexpaq 0:6c56fb4bc5f0 59 * int main() {
nexpaq 0:6c56fb4bc5f0 60 * // hardware ssel (where applicable)
nexpaq 0:6c56fb4bc5f0 61 * //int response = device.write(0xFF);
nexpaq 0:6c56fb4bc5f0 62 *
nexpaq 0:6c56fb4bc5f0 63 * device.lock();
nexpaq 0:6c56fb4bc5f0 64 * // software ssel
nexpaq 0:6c56fb4bc5f0 65 * cs = 0;
nexpaq 0:6c56fb4bc5f0 66 * int response = device.write(0xFF);
nexpaq 0:6c56fb4bc5f0 67 * cs = 1;
nexpaq 0:6c56fb4bc5f0 68 * device.unlock();
nexpaq 0:6c56fb4bc5f0 69 *
nexpaq 0:6c56fb4bc5f0 70 * }
nexpaq 0:6c56fb4bc5f0 71 * @endcode
nexpaq 0:6c56fb4bc5f0 72 */
nexpaq 0:6c56fb4bc5f0 73 class SPI {
nexpaq 0:6c56fb4bc5f0 74
nexpaq 0:6c56fb4bc5f0 75 public:
nexpaq 0:6c56fb4bc5f0 76
nexpaq 0:6c56fb4bc5f0 77 /** Create a SPI master connected to the specified pins
nexpaq 0:6c56fb4bc5f0 78 *
nexpaq 0:6c56fb4bc5f0 79 * mosi or miso can be specfied as NC if not used
nexpaq 0:6c56fb4bc5f0 80 *
nexpaq 0:6c56fb4bc5f0 81 * @param mosi SPI Master Out, Slave In pin
nexpaq 0:6c56fb4bc5f0 82 * @param miso SPI Master In, Slave Out pin
nexpaq 0:6c56fb4bc5f0 83 * @param sclk SPI Clock pin
nexpaq 0:6c56fb4bc5f0 84 * @param ssel SPI chip select pin
nexpaq 0:6c56fb4bc5f0 85 */
nexpaq 0:6c56fb4bc5f0 86 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
nexpaq 0:6c56fb4bc5f0 87
nexpaq 0:6c56fb4bc5f0 88 /** Configure the data transmission format
nexpaq 0:6c56fb4bc5f0 89 *
nexpaq 0:6c56fb4bc5f0 90 * @param bits Number of bits per SPI frame (4 - 16)
nexpaq 0:6c56fb4bc5f0 91 * @param mode Clock polarity and phase mode (0 - 3)
nexpaq 0:6c56fb4bc5f0 92 *
nexpaq 0:6c56fb4bc5f0 93 * @code
nexpaq 0:6c56fb4bc5f0 94 * mode | POL PHA
nexpaq 0:6c56fb4bc5f0 95 * -----+--------
nexpaq 0:6c56fb4bc5f0 96 * 0 | 0 0
nexpaq 0:6c56fb4bc5f0 97 * 1 | 0 1
nexpaq 0:6c56fb4bc5f0 98 * 2 | 1 0
nexpaq 0:6c56fb4bc5f0 99 * 3 | 1 1
nexpaq 0:6c56fb4bc5f0 100 * @endcode
nexpaq 0:6c56fb4bc5f0 101 */
nexpaq 0:6c56fb4bc5f0 102 void format(int bits, int mode = 0);
nexpaq 0:6c56fb4bc5f0 103
nexpaq 0:6c56fb4bc5f0 104 /** Set the spi bus clock frequency
nexpaq 0:6c56fb4bc5f0 105 *
nexpaq 0:6c56fb4bc5f0 106 * @param hz SCLK frequency in hz (default = 1MHz)
nexpaq 0:6c56fb4bc5f0 107 */
nexpaq 0:6c56fb4bc5f0 108 void frequency(int hz = 1000000);
nexpaq 0:6c56fb4bc5f0 109
nexpaq 0:6c56fb4bc5f0 110 /** Write to the SPI Slave and return the response
nexpaq 0:6c56fb4bc5f0 111 *
nexpaq 0:6c56fb4bc5f0 112 * @param value Data to be sent to the SPI slave
nexpaq 0:6c56fb4bc5f0 113 *
nexpaq 0:6c56fb4bc5f0 114 * @returns
nexpaq 0:6c56fb4bc5f0 115 * Response from the SPI slave
nexpaq 0:6c56fb4bc5f0 116 */
nexpaq 0:6c56fb4bc5f0 117 virtual int write(int value);
nexpaq 0:6c56fb4bc5f0 118
nexpaq 0:6c56fb4bc5f0 119 /** Acquire exclusive access to this SPI bus
nexpaq 0:6c56fb4bc5f0 120 */
nexpaq 0:6c56fb4bc5f0 121 virtual void lock(void);
nexpaq 0:6c56fb4bc5f0 122
nexpaq 0:6c56fb4bc5f0 123 /** Release exclusive access to this SPI bus
nexpaq 0:6c56fb4bc5f0 124 */
nexpaq 0:6c56fb4bc5f0 125 virtual void unlock(void);
nexpaq 0:6c56fb4bc5f0 126
nexpaq 0:6c56fb4bc5f0 127 #if DEVICE_SPI_ASYNCH
nexpaq 0:6c56fb4bc5f0 128
nexpaq 0:6c56fb4bc5f0 129 /** Start non-blocking SPI transfer using 8bit buffers.
nexpaq 0:6c56fb4bc5f0 130 *
nexpaq 0:6c56fb4bc5f0 131 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 132 * the default SPI value is sent
nexpaq 0:6c56fb4bc5f0 133 * @param tx_length The length of TX buffer in bytes
nexpaq 0:6c56fb4bc5f0 134 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 135 * received data are ignored
nexpaq 0:6c56fb4bc5f0 136 * @param rx_length The length of RX buffer in bytes
nexpaq 0:6c56fb4bc5f0 137 * @param callback The event callback function
nexpaq 0:6c56fb4bc5f0 138 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
nexpaq 0:6c56fb4bc5f0 139 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
nexpaq 0:6c56fb4bc5f0 140 */
nexpaq 0:6c56fb4bc5f0 141 template<typename Type>
nexpaq 0:6c56fb4bc5f0 142 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
nexpaq 0:6c56fb4bc5f0 143 if (spi_active(&_spi)) {
nexpaq 0:6c56fb4bc5f0 144 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
nexpaq 0:6c56fb4bc5f0 145 }
nexpaq 0:6c56fb4bc5f0 146 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
nexpaq 0:6c56fb4bc5f0 147 return 0;
nexpaq 0:6c56fb4bc5f0 148 }
nexpaq 0:6c56fb4bc5f0 149
nexpaq 0:6c56fb4bc5f0 150 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
nexpaq 0:6c56fb4bc5f0 151 */
nexpaq 0:6c56fb4bc5f0 152 void abort_transfer();
nexpaq 0:6c56fb4bc5f0 153
nexpaq 0:6c56fb4bc5f0 154 /** Clear the transaction buffer
nexpaq 0:6c56fb4bc5f0 155 */
nexpaq 0:6c56fb4bc5f0 156 void clear_transfer_buffer();
nexpaq 0:6c56fb4bc5f0 157
nexpaq 0:6c56fb4bc5f0 158 /** Clear the transaction buffer and abort on-going transfer.
nexpaq 0:6c56fb4bc5f0 159 */
nexpaq 0:6c56fb4bc5f0 160 void abort_all_transfers();
nexpaq 0:6c56fb4bc5f0 161
nexpaq 0:6c56fb4bc5f0 162 /** Configure DMA usage suggestion for non-blocking transfers
nexpaq 0:6c56fb4bc5f0 163 *
nexpaq 0:6c56fb4bc5f0 164 * @param usage The usage DMA hint for peripheral
nexpaq 0:6c56fb4bc5f0 165 * @return Zero if the usage was set, -1 if a transaction is on-going
nexpaq 0:6c56fb4bc5f0 166 */
nexpaq 0:6c56fb4bc5f0 167 int set_dma_usage(DMAUsage usage);
nexpaq 0:6c56fb4bc5f0 168
nexpaq 0:6c56fb4bc5f0 169 protected:
nexpaq 0:6c56fb4bc5f0 170 /** SPI IRQ handler
nexpaq 0:6c56fb4bc5f0 171 *
nexpaq 0:6c56fb4bc5f0 172 */
nexpaq 0:6c56fb4bc5f0 173 void irq_handler_asynch(void);
nexpaq 0:6c56fb4bc5f0 174
nexpaq 0:6c56fb4bc5f0 175 /** Common transfer method
nexpaq 0:6c56fb4bc5f0 176 *
nexpaq 0:6c56fb4bc5f0 177 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 178 * the default SPI value is sent
nexpaq 0:6c56fb4bc5f0 179 * @param tx_length The length of TX buffer in bytes
nexpaq 0:6c56fb4bc5f0 180 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 181 * received data are ignored
nexpaq 0:6c56fb4bc5f0 182 * @param rx_length The length of RX buffer in bytes
nexpaq 0:6c56fb4bc5f0 183 * @param bit_width The buffers element width
nexpaq 0:6c56fb4bc5f0 184 * @param callback The event callback function
nexpaq 0:6c56fb4bc5f0 185 * @param event The logical OR of events to modify
nexpaq 0:6c56fb4bc5f0 186 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
nexpaq 0:6c56fb4bc5f0 187 */
nexpaq 0:6c56fb4bc5f0 188 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
nexpaq 0:6c56fb4bc5f0 189
nexpaq 0:6c56fb4bc5f0 190 /**
nexpaq 0:6c56fb4bc5f0 191 *
nexpaq 0:6c56fb4bc5f0 192 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 193 * the default SPI value is sent
nexpaq 0:6c56fb4bc5f0 194 * @param tx_length The length of TX buffer in bytes
nexpaq 0:6c56fb4bc5f0 195 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 196 * received data are ignored
nexpaq 0:6c56fb4bc5f0 197 * @param rx_length The length of RX buffer in bytes
nexpaq 0:6c56fb4bc5f0 198 * @param bit_width The buffers element width
nexpaq 0:6c56fb4bc5f0 199 * @param callback The event callback function
nexpaq 0:6c56fb4bc5f0 200 * @param event The logical OR of events to modify
nexpaq 0:6c56fb4bc5f0 201 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
nexpaq 0:6c56fb4bc5f0 202 */
nexpaq 0:6c56fb4bc5f0 203 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
nexpaq 0:6c56fb4bc5f0 204
nexpaq 0:6c56fb4bc5f0 205 /** Configures a callback, spi peripheral and initiate a new transfer
nexpaq 0:6c56fb4bc5f0 206 *
nexpaq 0:6c56fb4bc5f0 207 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 208 * the default SPI value is sent
nexpaq 0:6c56fb4bc5f0 209 * @param tx_length The length of TX buffer in bytes
nexpaq 0:6c56fb4bc5f0 210 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
nexpaq 0:6c56fb4bc5f0 211 * received data are ignored
nexpaq 0:6c56fb4bc5f0 212 * @param rx_length The length of RX buffer in bytes
nexpaq 0:6c56fb4bc5f0 213 * @param bit_width The buffers element width
nexpaq 0:6c56fb4bc5f0 214 * @param callback The event callback function
nexpaq 0:6c56fb4bc5f0 215 * @param event The logical OR of events to modify
nexpaq 0:6c56fb4bc5f0 216 */
nexpaq 0:6c56fb4bc5f0 217 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
nexpaq 0:6c56fb4bc5f0 218
nexpaq 0:6c56fb4bc5f0 219 #if TRANSACTION_QUEUE_SIZE_SPI
nexpaq 0:6c56fb4bc5f0 220
nexpaq 0:6c56fb4bc5f0 221 /** Start a new transaction
nexpaq 0:6c56fb4bc5f0 222 *
nexpaq 0:6c56fb4bc5f0 223 * @param data Transaction data
nexpaq 0:6c56fb4bc5f0 224 */
nexpaq 0:6c56fb4bc5f0 225 void start_transaction(transaction_t *data);
nexpaq 0:6c56fb4bc5f0 226
nexpaq 0:6c56fb4bc5f0 227 /** Dequeue a transaction
nexpaq 0:6c56fb4bc5f0 228 *
nexpaq 0:6c56fb4bc5f0 229 */
nexpaq 0:6c56fb4bc5f0 230 void dequeue_transaction();
nexpaq 0:6c56fb4bc5f0 231 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
nexpaq 0:6c56fb4bc5f0 232 #endif
nexpaq 0:6c56fb4bc5f0 233
nexpaq 0:6c56fb4bc5f0 234 #endif
nexpaq 0:6c56fb4bc5f0 235
nexpaq 0:6c56fb4bc5f0 236 public:
nexpaq 0:6c56fb4bc5f0 237 virtual ~SPI() {
nexpaq 0:6c56fb4bc5f0 238 }
nexpaq 0:6c56fb4bc5f0 239
nexpaq 0:6c56fb4bc5f0 240 protected:
nexpaq 0:6c56fb4bc5f0 241 spi_t _spi;
nexpaq 0:6c56fb4bc5f0 242
nexpaq 0:6c56fb4bc5f0 243 #if DEVICE_SPI_ASYNCH
nexpaq 0:6c56fb4bc5f0 244 CThunk<SPI> _irq;
nexpaq 0:6c56fb4bc5f0 245 event_callback_t _callback;
nexpaq 0:6c56fb4bc5f0 246 DMAUsage _usage;
nexpaq 0:6c56fb4bc5f0 247 #endif
nexpaq 0:6c56fb4bc5f0 248
nexpaq 0:6c56fb4bc5f0 249 void aquire(void);
nexpaq 0:6c56fb4bc5f0 250 static SPI *_owner;
nexpaq 0:6c56fb4bc5f0 251 static SingletonPtr<PlatformMutex> _mutex;
nexpaq 0:6c56fb4bc5f0 252 int _bits;
nexpaq 0:6c56fb4bc5f0 253 int _mode;
nexpaq 0:6c56fb4bc5f0 254 int _hz;
nexpaq 0:6c56fb4bc5f0 255 };
nexpaq 0:6c56fb4bc5f0 256
nexpaq 0:6c56fb4bc5f0 257 } // namespace mbed
nexpaq 0:6c56fb4bc5f0 258
nexpaq 0:6c56fb4bc5f0 259 #endif
nexpaq 0:6c56fb4bc5f0 260
nexpaq 0:6c56fb4bc5f0 261 #endif